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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=riscv32 -mattr=+zdinx | FileCheck %s
; This test previously asserted because TailMerge created a PseudoRV32ZdinxSD
; with 2 memoperands which RISCVExpandPseudo could not handle.
define i32 @foo(double %x, ptr %y, i64 %0, i64 %1, i1 %cmp6.not, ptr %arrayidx13, ptr %arrayidx20) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi a0, a7, 1
; CHECK-NEXT: beqz a0, .LBB0_2
; CHECK-NEXT: # %bb.1: # %if.else
; CHECK-NEXT: lw a0, 4(sp)
; CHECK-NEXT: j .LBB0_3
; CHECK-NEXT: .LBB0_2: # %if.then7
; CHECK-NEXT: lw a0, 0(sp)
; CHECK-NEXT: .LBB0_3: # %common.ret
; CHECK-NEXT: fcvt.d.w a2, zero
; CHECK-NEXT: sw a2, 0(a0)
; CHECK-NEXT: sw a3, 4(a0)
; CHECK-NEXT: li a0, 0
; CHECK-NEXT: ret
entry:
br i1 %cmp6.not, label %if.else, label %if.then7
common.ret: ; preds = %if.else, %if.then7
ret i32 0
if.then7: ; preds = %entry
store double 0.000000e+00, ptr %arrayidx13, align 8
br label %common.ret
if.else: ; preds = %entry
store double 0.000000e+00, ptr %arrayidx20, align 8
br label %common.ret
}
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