File: regbankselect-reg_sequence.mir

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.8-1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,696 kB
  • sloc: cpp: 7,438,781; ansic: 1,393,871; asm: 1,012,926; python: 241,771; f90: 86,635; objc: 75,411; lisp: 42,144; pascal: 17,286; sh: 8,596; ml: 5,082; perl: 4,730; makefile: 3,591; awk: 3,523; javascript: 2,251; xml: 892; fortran: 672
file content (22 lines) | stat: -rw-r--r-- 611 bytes parent folder | download | duplicates (30) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
 
# RUN: llc %s -mtriple aarch64-- -o - -run-pass regbankselect | FileCheck %s
---
# CHECK-LABEL: foo
# Check that we produce a valid mapping for REG_SEQUENCE.
# This used to fail the RegisterBankInfo verify because
# we were using the exclusively the type of the definition
# whereas since REG_SEQUENCE are kind of target opcode
# their definition may not have a type.
#

# CHECK: %0:fpr(s128) = REG_SEQUENCE $d0, %subreg.dsub0, $d1, %subreg.dsub1

name: foo
legalized: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $d0, $d1

    %0:_(s128) = REG_SEQUENCE $d0, %subreg.dsub0, $d1, %subreg.dsub1

...