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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s
---
name: mul_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: mul_s64
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12345
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[C]]
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MUL]](s64)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = G_CONSTANT i64 12345
%2:_(s64) = G_MUL %0, %1
$vgpr0_vgpr1 = COPY %2
...
---
name: mul_s64_zext
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: mul_s64_zext
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12345
; CHECK-NEXT: [[AMDGPU_:%[0-9]+]]:_(s64) = G_AMDGPU_S_MUL_U64_U32 [[ZEXT]], [[C]]
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AMDGPU_]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_ZEXT %0
%2:_(s64) = G_CONSTANT i64 12345
%3:_(s64) = G_MUL %1, %2
$vgpr0_vgpr1 = COPY %3
...
---
name: mul_s64_sext
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: mul_s64_sext
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12345
; CHECK-NEXT: [[AMDGPU_:%[0-9]+]]:_(s64) = G_AMDGPU_S_MUL_I64_I32 [[SEXT]], [[C]]
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AMDGPU_]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_SEXT %0
%2:_(s64) = G_CONSTANT i64 12345
%3:_(s64) = G_MUL %1, %2
$vgpr0_vgpr1 = COPY %3
...
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