File: vmask-carry-in.txt

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.8-1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,696 kB
  • sloc: cpp: 7,438,781; ansic: 1,393,871; asm: 1,012,926; python: 241,771; f90: 86,635; objc: 75,411; lisp: 42,144; pascal: 17,286; sh: 8,596; ml: 5,082; perl: 4,730; makefile: 3,591; awk: 3,523; javascript: 2,251; xml: 892; fortran: 672
file content (69 lines) | stat: -rw-r--r-- 1,711 bytes parent folder | download | duplicates (5)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
# RUN: llvm-mc -triple=riscv64 -disassemble -show-inst --mattr=+v %s \
# RUN:   --M no-aliases | FileCheck %s

# Check if there is a MCOperand for the carry-in mask.

[0x57,0x04,0x4a,0x5c]
# CHECK: <MCInst #{{[0-9]+}} VMERGE_VVM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x44,0x45,0x5c]
# CHECK: <MCInst #{{[0-9]+}} VMERGE_VXM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0xb4,0x47,0x5c]
# CHECK: <MCInst #{{[0-9]+}} VMERGE_VIM
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Imm
# CHECK-NEXT: MCOperand Reg

[0x57,0x04,0x4a,0x40]
# CHECK: <MCInst #{{[0-9]+}} VADC_VVM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x44,0x45,0x40]
# CHECK: <MCInst #{{[0-9]+}} VADC_VXM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0xb4,0x47,0x40]
# CHECK: <MCInst #{{[0-9]+}} VADC_VIM
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Imm
# CHECK-NEXT: MCOperand Reg

[0x57,0x04,0x4a,0x44]
# CHECK: <MCInst #{{[0-9]+}} VMADC_VVM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x44,0x45,0x44]
# CHECK: <MCInst #{{[0-9]+}} VMADC_VXM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0xb4,0x47,0x44]
# CHECK: <MCInst #{{[0-9]+}} VMADC_VIM
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Reg
# CHECK-NEXT: MCOperand Imm
# CHECK-NEXT: MCOperand Reg

[0x57,0x04,0x4a,0x48]
# CHECK: <MCInst #{{[0-9]+}} VSBC_VVM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x44,0x45,0x48]
# CHECK: <MCInst #{{[0-9]+}} VSBC_VXM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x04,0x4a,0x4c]
# CHECK: <MCInst #{{[0-9]+}} VMSBC_VVM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x44,0x45,0x4c]
# CHECK: <MCInst #{{[0-9]+}} VMSBC_VXM
# CHECK-COUNT-4: MCOperand Reg

[0x57,0x54,0x45,0x5c]
# CHECK: <MCInst #{{[0-9]+}} VFMERGE_VFM
# CHECK-COUNT-4: MCOperand Reg