File: spill-sgpr-csr-live-ins.mir

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llvm-toolchain-20 1%3A20.1.8-1~exp1
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s

---
name: spill_csr_sgpr_argument
tracksRegLiveness: true
liveins:
  - { reg: '$sgpr50' }
body:             |
  bb.0:
    liveins: $sgpr50
    ; CHECK-LABEL: name: spill_csr_sgpr_argument
    ; CHECK: liveins: $sgpr50, $vgpr63
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr50, 0, $vgpr63
    ; CHECK-NEXT: S_NOP 0, implicit $sgpr50
    ; CHECK-NEXT: $sgpr50 = S_MOV_B32 0
    S_NOP 0, implicit $sgpr50
    $sgpr50 = S_MOV_B32 0

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