File: get-reg-error-la64.ll

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llvm-toolchain-20 1%3A20.1.8-1~exp1
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: not llc < %s --mtriple=loongarch64 -mattr=+d 2>&1 | FileCheck %s

define i32 @read_sp() nounwind {
entry:
; CHECK: On LA64, only 64-bit registers can be read.
  %a1 = call i32 @llvm.read_register.i32(metadata !0)
  ret i32 %a1
}

define void @write_sp(i32 %val) nounwind {
entry:
; CHECK: On LA64, only 64-bit registers can be written.
  call void @llvm.write_register.i32(metadata !0, i32 %val)
  ret void
}

declare i32 @llvm.read_register.i32(metadata) nounwind
declare void @llvm.write_register.i32(metadata, i32) nounwind

!0 = !{!"$sp\00"}