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; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s
declare <32 x i8> @llvm.loongarch.lasx.xvmini.b(<32 x i8>, i32)
define <32 x i8> @lasx_xvmini_b(<32 x i8> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvmini.b(<32 x i8> %va, i32 %b)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvmini.h(<16 x i16>, i32)
define <16 x i16> @lasx_xvmini_h(<16 x i16> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvmini.h(<16 x i16> %va, i32 %b)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvmini.w(<8 x i32>, i32)
define <8 x i32> @lasx_xvmini_w(<8 x i32> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvmini.w(<8 x i32> %va, i32 %b)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvmini.d(<4 x i64>, i32)
define <4 x i64> @lasx_xvmini_d(<4 x i64> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvmini.d(<4 x i64> %va, i32 %b)
ret <4 x i64> %res
}
declare <32 x i8> @llvm.loongarch.lasx.xvmini.bu(<32 x i8>, i32)
define <32 x i8> @lasx_xvmini_bu(<32 x i8> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvmini.bu(<32 x i8> %va, i32 %b)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvmini.hu(<16 x i16>, i32)
define <16 x i16> @lasx_xvmini_hu(<16 x i16> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvmini.hu(<16 x i16> %va, i32 %b)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvmini.wu(<8 x i32>, i32)
define <8 x i32> @lasx_xvmini_wu(<8 x i32> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvmini.wu(<8 x i32> %va, i32 %b)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvmini.du(<4 x i64>, i32)
define <4 x i64> @lasx_xvmini_du(<4 x i64> %va, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvmini.du(<4 x i64> %va, i32 %b)
ret <4 x i64> %res
}
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