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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv32 -target-feature +xtheadbb -emit-llvm %s -o - \
// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
// RUN: | FileCheck %s -check-prefix=RV32XTHEADBB
// RV32XTHEADBB-LABEL: @clz_32(
// RV32XTHEADBB-NEXT: entry:
// RV32XTHEADBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A:%.*]], i1 false)
// RV32XTHEADBB-NEXT: ret i32 [[TMP0]]
//
unsigned int clz_32(unsigned int a) {
return __builtin_riscv_clz_32(a);
}
// RV32XTHEADBB-LABEL: @clo_32(
// RV32XTHEADBB-NEXT: entry:
// RV32XTHEADBB-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
// RV32XTHEADBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[NOT]], i1 false)
// RV32XTHEADBB-NEXT: ret i32 [[TMP0]]
//
unsigned int clo_32(unsigned int a) {
return __builtin_riscv_clz_32(~a);
}
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