File: legalize-i64-high-low-vec-split.ll

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llvm-toolchain-21 1%3A21.1.0-1
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes='dxil-legalize' -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s

define void @split_via_extract(i64 noundef %a) {
; CHECK-LABEL: define void @split_via_extract(
; CHECK-SAME: i64 noundef [[A:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[TMP0:%.*]] = trunc i64 [[A]] to i32
; CHECK-NEXT:    [[TMP1:%.*]] = lshr i64 [[A]], 32
; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT:    ret void
;
entry:
  %vecA = bitcast i64 %a to <2 x i32>
  %low = extractelement <2 x i32> %vecA, i32 0 ; low 32 bits
  %high = extractelement <2 x i32> %vecA, i32 1 ; high 32 bits
  ret void
}