1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -passes='instcombine,early-cse<memssa>' -S %s | FileCheck %s
define i32 @load_store_sameval(ptr %p, i1 %cond1, i1 %cond2) {
; CHECK-LABEL: define i32 @load_store_sameval(
; CHECK-SAME: ptr [[P:%.*]], i1 [[COND1:%.*]], i1 [[COND2:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[PRE:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: br label %[[BLOCK:.*]]
; CHECK: [[BLOCK]]:
; CHECK-NEXT: br label %[[BLOCK2:.*]]
; CHECK: [[BLOCK2]]:
; CHECK-NEXT: br i1 [[COND2]], label %[[BLOCK3:.*]], label %[[EXIT:.*]]
; CHECK: [[BLOCK3]]:
; CHECK-NEXT: [[LOAD:%.*]] = load double, ptr [[P]], align 8
; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[LOAD]], 0.000000e+00
; CHECK-NEXT: br i1 [[CMP]], label %[[BLOCK]], label %[[BLOCK2]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret i32 0
;
entry:
%spec.select = select i1 %cond1, ptr null, ptr %p
%pre = load i32, ptr %spec.select, align 4
br label %block
block:
br label %block2
block2:
br i1 %cond2, label %block3, label %exit
block3:
%load = load double, ptr %spec.select, align 8
%cmp = fcmp une double %load, 0.000000e+00
br i1 %cmp, label %block, label %block2
exit:
store i32 %pre, ptr %spec.select, align 4
ret i32 0
}
|