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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW32 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW64 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s
---
name: s_add_u32__inline_imm__fi_offset0
tracksRegLiveness: true
stack:
- { id: 0, size: 32, alignment: 16 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_u32__inline_imm__fi_offset0
; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 12, $sgpr4, implicit-def dead $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_u32__inline_imm__fi_offset0
; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 12, $sgpr4, implicit-def dead $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_u32__inline_imm__fi_offset0
; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 12, $sgpr32, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_u32__inline_imm__fi_offset0
; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 12, $sgpr32, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_U32 12, %stack.0, implicit-def dead $scc
SI_RETURN implicit $sgpr7
...
---
name: s_add_u32__kernel__literal__fi_offset96__offset_literal
tracksRegLiveness: true
stack:
- { id: 0, size: 96, alignment: 16 }
- { id: 1, size: 128, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal
; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: {{ $}}
; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal
; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal
; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal
; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def dead $scc
SI_RETURN implicit $sgpr7
...
---
name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc
tracksRegLiveness: true
stack:
- { id: 0, size: 96, alignment: 16 }
- { id: 1, size: 128, alignment: 4 }
machineFunctionInfo:
scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
frameOffsetReg: '$sgpr33'
stackPtrOffsetReg: '$sgpr32'
isEntryFunction: true
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc
; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: {{ $}}
; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc
; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: {{ $}}
; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc
; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc
; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
...
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