1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-loop-prefetch < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-loop-prefetch -mattr=+safe-smem-prefetch < %s | FileCheck --check-prefix=GFX12-SPREFETCH %s
define amdgpu_kernel void @copy_flat(ptr nocapture %d, ptr nocapture readonly %s, i32 %n) {
; GFX12-LABEL: copy_flat:
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-NEXT: s_cbranch_scc1 .LBB0_3
; GFX12-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0xb0
; GFX12-NEXT: .LBB0_2: ; %for.body
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_alu 0xfffe
; GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v4, s0
; GFX12-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-NEXT: flat_load_b128 v[0:3], v[0:1] offset:-176
; GFX12-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: flat_store_b128 v[4:5], v[0:3]
; GFX12-NEXT: s_cbranch_scc1 .LBB0_2
; GFX12-NEXT: .LBB0_3: ; %for.end
; GFX12-NEXT: s_endpgm
;
; GFX12-SPREFETCH-LABEL: copy_flat:
; GFX12-SPREFETCH: ; %bb.0: ; %entry
; GFX12-SPREFETCH-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB0_3
; GFX12-SPREFETCH-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-SPREFETCH-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0xb0
; GFX12-SPREFETCH-NEXT: .LBB0_2: ; %for.body
; GFX12-SPREFETCH-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SPREFETCH-NEXT: s_wait_alu 0xfffe
; GFX12-SPREFETCH-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
; GFX12-SPREFETCH-NEXT: s_prefetch_data s[2:3], 0x0, null, 0
; GFX12-SPREFETCH-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v4, s0
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-SPREFETCH-NEXT: flat_load_b128 v[0:3], v[0:1] offset:-176
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-SPREFETCH-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-SPREFETCH-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SPREFETCH-NEXT: flat_store_b128 v[4:5], v[0:3]
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB0_2
; GFX12-SPREFETCH-NEXT: .LBB0_3: ; %for.end
; GFX12-SPREFETCH-NEXT: s_endpgm
entry:
%cmp6.not = icmp eq i32 %n, 0
br i1 %cmp6.not, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%i.07 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%idxprom = zext i32 %i.07 to i64
%arrayidx = getelementptr inbounds <4 x i32>, ptr %s, i64 %idxprom
%ld = load <4 x i32>, ptr %arrayidx, align 4
%arrayidx2 = getelementptr inbounds <4 x i32>, ptr %d, i64 %idxprom
store <4 x i32> %ld, ptr %arrayidx2, align 4
%inc = add nuw i32 %i.07, 1
%exitcond.not = icmp eq i32 %inc, %n
br i1 %exitcond.not, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
}
define amdgpu_kernel void @copy_global(ptr addrspace(1) nocapture %d, ptr addrspace(1) nocapture readonly %s, i32 %n) {
; GFX12-LABEL: copy_global:
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-NEXT: s_cbranch_scc1 .LBB1_3
; GFX12-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-NEXT: v_mov_b32_e32 v0, 0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0xb0
; GFX12-NEXT: .LBB1_2: ; %for.body
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: global_load_b128 v[1:4], v0, s[2:3] offset:-176
; GFX12-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1]
; GFX12-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-NEXT: s_cbranch_scc1 .LBB1_2
; GFX12-NEXT: .LBB1_3: ; %for.end
; GFX12-NEXT: s_endpgm
;
; GFX12-SPREFETCH-LABEL: copy_global:
; GFX12-SPREFETCH: ; %bb.0: ; %entry
; GFX12-SPREFETCH-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB1_3
; GFX12-SPREFETCH-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-SPREFETCH-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SPREFETCH-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0xb0
; GFX12-SPREFETCH-NEXT: .LBB1_2: ; %for.body
; GFX12-SPREFETCH-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SPREFETCH-NEXT: global_load_b128 v[1:4], v0, s[2:3] offset:-176
; GFX12-SPREFETCH-NEXT: s_prefetch_data s[2:3], 0x0, null, 0
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-SPREFETCH-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_wait_loadcnt 0x0
; GFX12-SPREFETCH-NEXT: global_store_b128 v0, v[1:4], s[0:1]
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB1_2
; GFX12-SPREFETCH-NEXT: .LBB1_3: ; %for.end
; GFX12-SPREFETCH-NEXT: s_endpgm
entry:
%cmp6.not = icmp eq i32 %n, 0
br i1 %cmp6.not, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%i.07 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%idxprom = zext i32 %i.07 to i64
%arrayidx = getelementptr inbounds <4 x i32>, ptr addrspace(1) %s, i64 %idxprom
%ld = load <4 x i32>, ptr addrspace(1) %arrayidx, align 4
%arrayidx2 = getelementptr inbounds <4 x i32>, ptr addrspace(1) %d, i64 %idxprom
store <4 x i32> %ld, ptr addrspace(1) %arrayidx2, align 4
%inc = add nuw i32 %i.07, 1
%exitcond.not = icmp eq i32 %inc, %n
br i1 %exitcond.not, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
}
define amdgpu_kernel void @copy_constant(ptr addrspace(1) nocapture %d, ptr addrspace(4) nocapture readonly %s, i32 %n) {
; GFX12-LABEL: copy_constant:
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-NEXT: s_cbranch_scc1 .LBB2_3
; GFX12-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-NEXT: v_mov_b32_e32 v0, 0
; GFX12-NEXT: .LBB2_2: ; %for.body
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_load_b128 s[8:11], s[2:3], 0x0
; GFX12-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
; GFX12-NEXT: v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v4, s11
; GFX12-NEXT: global_store_b128 v0, v[1:4], s[0:1]
; GFX12-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-NEXT: s_cbranch_scc1 .LBB2_2
; GFX12-NEXT: .LBB2_3: ; %for.end
; GFX12-NEXT: s_endpgm
;
; GFX12-SPREFETCH-LABEL: copy_constant:
; GFX12-SPREFETCH: ; %bb.0: ; %entry
; GFX12-SPREFETCH-NEXT: s_load_b32 s6, s[4:5], 0x34
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_cmp_eq_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB2_3
; GFX12-SPREFETCH-NEXT: ; %bb.1: ; %for.body.preheader
; GFX12-SPREFETCH-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SPREFETCH-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SPREFETCH-NEXT: .LBB2_2: ; %for.body
; GFX12-SPREFETCH-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_load_b128 s[8:11], s[2:3], 0x0
; GFX12-SPREFETCH-NEXT: s_prefetch_data s[2:3], 0xb0, null, 0
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s6, s6, -1
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[2:3], s[2:3], 16
; GFX12-SPREFETCH-NEXT: s_cmp_lg_u32 s6, 0
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
; GFX12-SPREFETCH-NEXT: v_dual_mov_b32 v3, s10 :: v_dual_mov_b32 v4, s11
; GFX12-SPREFETCH-NEXT: global_store_b128 v0, v[1:4], s[0:1]
; GFX12-SPREFETCH-NEXT: s_add_nc_u64 s[0:1], s[0:1], 16
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB2_2
; GFX12-SPREFETCH-NEXT: .LBB2_3: ; %for.end
; GFX12-SPREFETCH-NEXT: s_endpgm
entry:
%cmp6.not = icmp eq i32 %n, 0
br i1 %cmp6.not, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%i.07 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%idxprom = zext i32 %i.07 to i64
%arrayidx = getelementptr inbounds <4 x i32>, ptr addrspace(4) %s, i64 %idxprom
%ld = load <4 x i32>, ptr addrspace(4) %arrayidx, align 4
%arrayidx2 = getelementptr inbounds <4 x i32>, ptr addrspace(1) %d, i64 %idxprom
store <4 x i32> %ld, ptr addrspace(1) %arrayidx2, align 4
%inc = add nuw i32 %i.07, 1
%exitcond.not = icmp eq i32 %inc, %n
br i1 %exitcond.not, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
}
define amdgpu_kernel void @copy_local(ptr addrspace(3) nocapture %d, ptr addrspace(3) nocapture readonly %s, i32 %n) {
; GFX12-LABEL: copy_local:
; GFX12: ; %bb.0: ; %entry
; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_cmp_eq_u32 s2, 0
; GFX12-NEXT: s_cbranch_scc1 .LBB3_2
; GFX12-NEXT: .LBB3_1: ; %for.body
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_alu 0xfffe
; GFX12-NEXT: v_mov_b32_e32 v2, s1
; GFX12-NEXT: v_mov_b32_e32 v4, s0
; GFX12-NEXT: s_add_co_i32 s2, s2, -1
; GFX12-NEXT: s_add_co_i32 s0, s0, 16
; GFX12-NEXT: s_add_co_i32 s1, s1, 16
; GFX12-NEXT: ds_load_2addr_b32 v[0:1], v2 offset0:2 offset1:3
; GFX12-NEXT: ds_load_2addr_b32 v[2:3], v2 offset1:1
; GFX12-NEXT: s_cmp_lg_u32 s2, 0
; GFX12-NEXT: s_wait_dscnt 0x1
; GFX12-NEXT: ds_store_2addr_b32 v4, v0, v1 offset0:2 offset1:3
; GFX12-NEXT: s_wait_dscnt 0x1
; GFX12-NEXT: ds_store_2addr_b32 v4, v2, v3 offset1:1
; GFX12-NEXT: s_cbranch_scc1 .LBB3_1
; GFX12-NEXT: .LBB3_2: ; %for.end
; GFX12-NEXT: s_endpgm
;
; GFX12-SPREFETCH-LABEL: copy_local:
; GFX12-SPREFETCH: ; %bb.0: ; %entry
; GFX12-SPREFETCH-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SPREFETCH-NEXT: s_wait_kmcnt 0x0
; GFX12-SPREFETCH-NEXT: s_cmp_eq_u32 s2, 0
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB3_2
; GFX12-SPREFETCH-NEXT: .LBB3_1: ; %for.body
; GFX12-SPREFETCH-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SPREFETCH-NEXT: s_wait_alu 0xfffe
; GFX12-SPREFETCH-NEXT: v_mov_b32_e32 v2, s1
; GFX12-SPREFETCH-NEXT: v_mov_b32_e32 v4, s0
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s2, s2, -1
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s0, s0, 16
; GFX12-SPREFETCH-NEXT: s_add_co_i32 s1, s1, 16
; GFX12-SPREFETCH-NEXT: ds_load_2addr_b32 v[0:1], v2 offset0:2 offset1:3
; GFX12-SPREFETCH-NEXT: ds_load_2addr_b32 v[2:3], v2 offset1:1
; GFX12-SPREFETCH-NEXT: s_cmp_lg_u32 s2, 0
; GFX12-SPREFETCH-NEXT: s_wait_dscnt 0x1
; GFX12-SPREFETCH-NEXT: ds_store_2addr_b32 v4, v0, v1 offset0:2 offset1:3
; GFX12-SPREFETCH-NEXT: s_wait_dscnt 0x1
; GFX12-SPREFETCH-NEXT: ds_store_2addr_b32 v4, v2, v3 offset1:1
; GFX12-SPREFETCH-NEXT: s_cbranch_scc1 .LBB3_1
; GFX12-SPREFETCH-NEXT: .LBB3_2: ; %for.end
; GFX12-SPREFETCH-NEXT: s_endpgm
entry:
%cmp6.not = icmp eq i32 %n, 0
br i1 %cmp6.not, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%i.07 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%idxprom = zext i32 %i.07 to i64
%arrayidx = getelementptr inbounds <4 x i32>, ptr addrspace(3) %s, i64 %idxprom
%ld = load <4 x i32>, ptr addrspace(3) %arrayidx, align 4
%arrayidx2 = getelementptr inbounds <4 x i32>, ptr addrspace(3) %d, i64 %idxprom
store <4 x i32> %ld, ptr addrspace(3) %arrayidx2, align 4
%inc = add nuw i32 %i.07, 1
%exitcond.not = icmp eq i32 %inc, %n
br i1 %exitcond.not, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
}
|
