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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s
define void @avl_not_dominated(<vscale x 2 x i32> %v, ptr %p) {
; CHECK-LABEL: avl_not_dominated:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma
; CHECK-NEXT: vmv.x.s a1, v8
; CHECK-NEXT: slli a1, a1, 32
; CHECK-NEXT: srli a1, a1, 32
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
; CHECK-NEXT: vadd.vi v8, v8, 1
; CHECK-NEXT: vse32.v v8, (a0)
; CHECK-NEXT: ret
%w = add <vscale x 2 x i32> %v, splat (i32 1)
%evl = extractelement <vscale x 2 x i32> %v, i32 0
call void @llvm.vp.store(<vscale x 2 x i32> %w, ptr %p, <vscale x 2 x i1> splat(i1 true), i32 %evl)
ret void
}
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