File: multiple-functions.mir

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llvm-toolchain-21 1%3A21.1.4-5
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# REQUIRES: amdgpu-registered-target
# RUN: llvm-reduce -abort-on-invalid-reduction -simplify-mir -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
# RUN: FileCheck --check-prefix=RESULT %s < %t

# CHECK-INTERESTINGNESS: S_NOP 0

# RESULT: name: func0
# RESULT: S_NOP 0

# RESULT: name: func1
# RESULT-NOT: S_NOP

--- |
  define void @func0()  {
    ret void
  }

  define void @func1()  {
    ret void
  }

...
---
name: func0
tracksRegLiveness: true
body:             |
  bb.0:
    S_WAITCNT 0
    S_NOP 0
    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    INLINEASM &"", 1 /* sideeffect attdialect */
    S_ENDPGM 0, implicit %0
...

---
name: func1
tracksRegLiveness: true
body:             |
  bb.0:
    S_WAITCNT 0
    S_NOP 1
    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    INLINEASM &"", 1 /* sideeffect attdialect */
    S_ENDPGM 0, implicit %0
...