File: dag-cse.ll

package info (click to toggle)
llvm-toolchain-21 1%3A21.1.6-2
  • links: PTS, VCS
  • area: main
  • in suites: forky
  • size: 2,245,044 kB
  • sloc: cpp: 7,619,726; ansic: 1,434,018; asm: 1,058,748; python: 252,740; f90: 94,671; objc: 70,685; lisp: 42,813; pascal: 18,401; sh: 8,601; ml: 5,111; perl: 4,720; makefile: 3,666; awk: 3,523; javascript: 2,409; xml: 892; fortran: 770
file content (24 lines) | stat: -rw-r--r-- 801 bytes parent folder | download | duplicates (3)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
; RUN: llc < %s -mtriple=nvptx64 | FileCheck %s

%st = type { i8, i8, i16 }

@a = internal addrspace(1) global %st zeroinitializer, align 8
@b = internal addrspace(1) global i32 0, align 8
@c = internal addrspace(1) global i32 0, align 8

; Verify that loads with different memory types are not subject to CSE
; once they are promoted to the same type.
;
; CHECK: ld.global.v2.b8  {%[[B1:rs[0-9]+]], %[[B2:rs[0-9]+]]}, [a];
; CHECK: st.global.v2.b8  [b], {%[[B1]], %[[B2]]};
;
; CHECK: ld.global.b32 %[[C:r[0-9]+]], [a];
; CHECK: st.global.b32 [c], %[[C]];

define void @test1() #0 {
  %1 = load <2 x i8>, ptr addrspace(1) @a, align 8
  store <2 x i8> %1, ptr addrspace(1) @b, align 8
  %2 = load <2 x i16>, ptr addrspace(1) @a, align 8
  store <2 x i16> %2, ptr addrspace(1) @c, align 8
  ret void
}