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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -march=nvptx64 -mcpu=sm_100a -mattr=+ptx86 | FileCheck --check-prefixes=CHECK %s
; RUN: %if ptxas-12.8 %{ llc < %s -march=nvptx64 -mcpu=sm_100a -mattr=+ptx86 | %ptxas-verify -arch=sm_100a %}
declare void @llvm.nvvm.tcgen05.fence.before.thread.sync()
declare void @llvm.nvvm.tcgen05.fence.after.thread.sync()
declare void @llvm.nvvm.tcgen05.wait.ld()
declare void @llvm.nvvm.tcgen05.wait.st()
; CHECK-LABEL: test_tcgen05_fence
define void @test_tcgen05_fence() {
; CHECK-LABEL: test_tcgen05_fence(
; CHECK: {
; CHECK-EMPTY:
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: tcgen05.fence::before_thread_sync;
; CHECK-NEXT: tcgen05.fence::after_thread_sync;
; CHECK-NEXT: ret;
call void @llvm.nvvm.tcgen05.fence.before.thread.sync()
call void @llvm.nvvm.tcgen05.fence.after.thread.sync()
ret void
}
; CHECK-LABEL: test_tcgen05_wait
define void @test_tcgen05_wait() {
; CHECK-LABEL: test_tcgen05_wait(
; CHECK: {
; CHECK-EMPTY:
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: tcgen05.wait::ld.sync.aligned;
; CHECK-NEXT: tcgen05.wait::st.sync.aligned;
; CHECK-NEXT: ret;
call void @llvm.nvvm.tcgen05.wait.ld()
call void @llvm.nvvm.tcgen05.wait.st()
ret void
}
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