1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test i128 in GPRs versus VRs.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -no-integrated-as | FileCheck %s
define i128 @f1() {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: vgbm %v0, 0
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %v1 %v0
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: vst %v1, 0(%r2), 3
; CHECK-NEXT: br %r14
%val = call i128 asm "blah $0 $1", "=&v,v" (i128 0)
ret i128 %val
}
define i128 @f2() {
; CHECK-LABEL: f2:
; CHECK: # %bb.0:
; CHECK-NEXT: vgbm %v4, 0
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %v4
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: vst %v4, 0(%r2), 3
; CHECK-NEXT: br %r14
%val = call i128 asm "blah $0", "={v4},0" (i128 0)
ret i128 %val
}
define i128 @f3() {
; CHECK-LABEL: f3:
; CHECK: # %bb.0:
; CHECK-NEXT: lghi %r0, 0
; CHECK-NEXT: lgr %r1, %r0
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r4 %r0
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: stg %r5, 8(%r2)
; CHECK-NEXT: stg %r4, 0(%r2)
; CHECK-NEXT: br %r14
%val = call i128 asm "blah $0 $1", "=&r,r" (i128 0)
ret i128 %val
}
define i128 @f4() {
; CHECK-LABEL: f4:
; CHECK: # %bb.0:
; CHECK-NEXT: stmg %r8, %r15, 64(%r15)
; CHECK-NEXT: .cfi_offset %r8, -96
; CHECK-NEXT: .cfi_offset %r9, -88
; CHECK-NEXT: .cfi_offset %r15, -40
; CHECK-NEXT: lghi %r8, 0
; CHECK-NEXT: lgr %r9, %r8
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r8
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: stg %r9, 8(%r2)
; CHECK-NEXT: stg %r8, 0(%r2)
; CHECK-NEXT: lmg %r8, %r15, 64(%r15)
; CHECK-NEXT: br %r14
%val = call i128 asm "blah $0", "={r8},0" (i128 0)
ret i128 %val
}
|