1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=xtensa -verify-machineinstrs < %s \
; RUN: | FileCheck %s
define i32 @lshl(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: lshl:
; CHECK: ssl a3
; CHECK-NEXT: sll a2, a2
; CHECK-NEXT: ret
%c = shl i32 %x, %y
ret i32 %c
}
define i32 @lshl_imm_1(i32 %x) nounwind {
; CHECK-LABEL: lshl_imm_1:
; CHECK: slli a2, a2, 1
; CHECK-NEXT: ret
%c = shl i32 %x, 1
ret i32 %c
}
define i32 @lshl_imm_10(i32 %x) nounwind {
; CHECK-LABEL: lshl_imm_10:
; CHECK: slli a2, a2, 10
; CHECK-NEXT: ret
%c = shl i32 %x, 10
ret i32 %c
}
define i32 @lshl_imm_31(i32 %x) nounwind {
; CHECK-LABEL: lshl_imm_31:
; CHECK: slli a2, a2, 31
; CHECK-NEXT: ret
%c = shl i32 %x, 31
ret i32 %c
}
define i32 @lshr(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: lshr:
; CHECK: ssr a3
; CHECK-NEXT: srl a2, a2
; CHECK-NEXT: ret
%c = lshr i32 %x, %y
ret i32 %c
}
define i32 @lshr_imm_1(i32 %x) nounwind {
; CHECK-LABEL: lshr_imm_1:
; CHECK: srli a2, a2, 1
; CHECK-NEXT: ret
%c = lshr i32 %x, 1
ret i32 %c
}
define i32 @lshr_imm_15(i32 %x) nounwind {
; CHECK-LABEL: lshr_imm_15:
; CHECK: srli a2, a2, 15
; CHECK-NEXT: ret
%c = lshr i32 %x, 15
ret i32 %c
}
define i32 @lshr_imm_20(i32 %x) nounwind {
; CHECK-LABEL: lshr_imm_20:
; CHECK: extui a2, a2, 20, 12
; CHECK-NEXT: ret
%c = lshr i32 %x, 20
ret i32 %c
}
define i32 @ashr(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: ashr:
; CHECK: ssr a3
; CHECK-NEXT: sra a2, a2
; CHECK-NEXT: ret
%c = ashr i32 %x, %y
ret i32 %c
}
define i32 @ashr_imm_1(i32 %x) nounwind {
; CHECK-LABEL: ashr_imm_1:
; CHECK: srai a2, a2, 1
; CHECK-NEXT: ret
%c = ashr i32 %x, 1
ret i32 %c
}
define i32 @ashr_imm_10(i32 %x) nounwind {
; CHECK-LABEL: ashr_imm_10:
; CHECK: srai a2, a2, 10
; CHECK-NEXT: ret
%c = ashr i32 %x, 10
ret i32 %c
}
define i32 @ashr_imm_31(i32 %x) nounwind {
; CHECK-LABEL: ashr_imm_31:
; CHECK: srai a2, a2, 31
; CHECK-NEXT: ret
%c = ashr i32 %x, 31
ret i32 %c
}
define i64 @lshl_64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: lshl_64:
; CHECK: ssl a4
; CHECK-NEXT: src a3, a3, a2
; CHECK-NEXT: addi a8, a4, -32
; CHECK-NEXT: ssl a8
; CHECK-NEXT: sll a10, a2
; CHECK-NEXT: movi a9, 0
; CHECK-NEXT: blt a8, a9, .LBB12_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: or a3, a10, a10
; CHECK-NEXT: .LBB12_2:
; CHECK-NEXT: ssl a4
; CHECK-NEXT: sll a2, a2
; CHECK-NEXT: blt a8, a9, .LBB12_4
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: or a2, a9, a9
; CHECK-NEXT: .LBB12_4:
; CHECK-NEXT: ret
%c = shl i64 %x, %y
ret i64 %c
}
define i64 @lshr_64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: lshr_64:
; CHECK: ssr a4
; CHECK-NEXT: src a2, a3, a2
; CHECK-NEXT: addi a8, a4, -32
; CHECK-NEXT: ssr a8
; CHECK-NEXT: srl a10, a3
; CHECK-NEXT: movi a9, 0
; CHECK-NEXT: blt a8, a9, .LBB13_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: or a2, a10, a10
; CHECK-NEXT: .LBB13_2:
; CHECK-NEXT: ssr a4
; CHECK-NEXT: srl a3, a3
; CHECK-NEXT: blt a8, a9, .LBB13_4
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: or a3, a9, a9
; CHECK-NEXT: .LBB13_4:
; CHECK-NEXT: ret
%c = lshr i64 %x, %y
ret i64 %c
}
define i64 @ashr_64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: ashr_64:
; CHECK: ssr a4
; CHECK-NEXT: src a2, a3, a2
; CHECK-NEXT: addi a9, a4, -32
; CHECK-NEXT: ssr a9
; CHECK-NEXT: sra a8, a3
; CHECK-NEXT: movi a10, 0
; CHECK-NEXT: blt a9, a10, .LBB14_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: or a2, a8, a8
; CHECK-NEXT: .LBB14_2:
; CHECK-NEXT: ssr a4
; CHECK-NEXT: sra a8, a3
; CHECK-NEXT: blt a9, a10, .LBB14_4
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: srai a8, a3, 31
; CHECK-NEXT: .LBB14_4:
; CHECK-NEXT: or a3, a8, a8
; CHECK-NEXT: ret
%c = ashr i64 %x, %y
ret i64 %c
}
|
