1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @trunc_s32_s64() { ret void }
define void @trunc_s8_s64() { ret void }
define void @trunc_s8_s32() { ret void }
define void @trunc_s64_s128() { ret void }
define void @trunc_s32_s128() { ret void }
...
---
name: trunc_s32_s64
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: trunc_s32_s64
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32sp = COPY [[COPY]].sub_32
; CHECK-NEXT: $w0 = COPY [[COPY1]]
%0(s64) = COPY $x0
%1(s32) = G_TRUNC %0
$w0 = COPY %1(s32)
...
---
name: trunc_s8_s64
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: trunc_s8_s64
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
; CHECK-NEXT: $w0 = COPY [[COPY2]]
%0(s64) = COPY $x0
%1(s8) = G_TRUNC %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
---
name: trunc_s8_s32
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $w0
; CHECK-LABEL: name: trunc_s8_s32
; CHECK: liveins: $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[COPY]]
; CHECK-NEXT: $w0 = COPY [[COPY1]]
%0(s32) = COPY $w0
%1(s8) = G_TRUNC %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
---
name: trunc_s64_s128
legalized: true
regBankSelected: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $q0
; CHECK-LABEL: name: trunc_s64_s128
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY [[COPY]].dsub
; CHECK-NEXT: $x0 = COPY [[COPY1]]
%0(s128) = COPY $q0
%1(s64) = G_TRUNC %0
$x0 = COPY %1(s64)
...
---
name: trunc_s32_s128
legalized: true
regBankSelected: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $q0
; CHECK-LABEL: name: trunc_s32_s128
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY [[COPY]].ssub
; CHECK-NEXT: $w0 = COPY [[COPY1]]
%0(s128) = COPY $q0
%1(s32) = G_TRUNC %0
$w0 = COPY %1(s32)
...
|
