File: amdgpu-prelegalizer-combiner-crash.mir

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llvm-toolchain-21 1%3A21.1.6-3
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass amdgpu-prelegalizer-combiner %s -o - | FileCheck -check-prefix=GCN %s

---
name:            non_inlineable_imm_splat
body:             |
  bb.1:
    liveins: $vgpr0

    ; GCN-LABEL: name: non_inlineable_imm_splat
    ; GCN: liveins: $vgpr0
    ; GCN-NEXT: {{  $}}
    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
    ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200
    ; GCN-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16)
    ; GCN-NEXT: [[SUB:%[0-9]+]]:_(<2 x s16>) = G_SUB [[COPY]], [[BUILD_VECTOR]]
    ; GCN-NEXT: $vgpr0 = COPY [[SUB]](<2 x s16>)
    ; GCN-NEXT: SI_RETURN implicit $vgpr0
    %0:_(<2 x s16>) = COPY $vgpr0
    %2:_(s16) = G_FCONSTANT half 0xH4200
    %1:_(<2 x s16>) = G_BUILD_VECTOR %2(s16), %2(s16)
    %3:_(<2 x s16>) = G_SUB %0, %1
    $vgpr0 = COPY %3(<2 x s16>)
    SI_RETURN implicit $vgpr0

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