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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
declare <32 x i8> @llvm.loongarch.lasx.xvpackev.b(<32 x i8>, <32 x i8>)
define <32 x i8> @lasx_xvpackev_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackev_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackev.b $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvpackev.b(<32 x i8> %va, <32 x i8> %vb)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvpackev.h(<16 x i16>, <16 x i16>)
define <16 x i16> @lasx_xvpackev_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackev_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackev.h $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvpackev.h(<16 x i16> %va, <16 x i16> %vb)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvpackev.w(<8 x i32>, <8 x i32>)
define <8 x i32> @lasx_xvpackev_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackev_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackev.w $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvpackev.w(<8 x i32> %va, <8 x i32> %vb)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvpackev.d(<4 x i64>, <4 x i64>)
define <4 x i64> @lasx_xvpackev_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackev_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackev.d $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvpackev.d(<4 x i64> %va, <4 x i64> %vb)
ret <4 x i64> %res
}
declare <32 x i8> @llvm.loongarch.lasx.xvpackod.b(<32 x i8>, <32 x i8>)
define <32 x i8> @lasx_xvpackod_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackod_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackod.b $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvpackod.b(<32 x i8> %va, <32 x i8> %vb)
ret <32 x i8> %res
}
declare <16 x i16> @llvm.loongarch.lasx.xvpackod.h(<16 x i16>, <16 x i16>)
define <16 x i16> @lasx_xvpackod_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackod_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackod.h $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvpackod.h(<16 x i16> %va, <16 x i16> %vb)
ret <16 x i16> %res
}
declare <8 x i32> @llvm.loongarch.lasx.xvpackod.w(<8 x i32>, <8 x i32>)
define <8 x i32> @lasx_xvpackod_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackod_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackod.w $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvpackod.w(<8 x i32> %va, <8 x i32> %vb)
ret <8 x i32> %res
}
declare <4 x i64> @llvm.loongarch.lasx.xvpackod.d(<4 x i64>, <4 x i64>)
define <4 x i64> @lasx_xvpackod_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvpackod_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvpackod.d $xr0, $xr0, $xr1
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvpackod.d(<4 x i64> %va, <4 x i64> %vb)
ret <4 x i64> %res
}
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