1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Testfile that verifies positive case (0 or 1 only) for BCD builtins national2packed, packed2zoned and zoned2packed.
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc-unknown-unknown \
; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff \
; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
declare <16 x i8> @llvm.ppc.national2packed(<16 x i8>, i32 immarg)
define <16 x i8> @tBcd_National2packed_imm0(<16 x i8> %a) {
; CHECK-LABEL: tBcd_National2packed_imm0:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdcfn. v2, v2, 0
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.national2packed(<16 x i8> %a, i32 0)
ret <16 x i8> %0
}
define <16 x i8> @tBcd_National2packed_imm1(<16 x i8> %a) {
; CHECK-LABEL: tBcd_National2packed_imm1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdcfn. v2, v2, 1
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.national2packed(<16 x i8> %a, i32 1)
ret <16 x i8> %0
}
declare <16 x i8> @llvm.ppc.packed2national(<16 x i8>)
define <16 x i8> @tBcd_Packed2national(<16 x i8> %a) {
; CHECK-LABEL: tBcd_Packed2national:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdctn. v2, v2
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.packed2national(<16 x i8> %a)
ret <16 x i8> %0
}
declare <16 x i8> @llvm.ppc.packed2zoned(<16 x i8>, i32 immarg)
define <16 x i8> @tBcd_Packed2zoned_imm0(<16 x i8> %a) {
; CHECK-LABEL: tBcd_Packed2zoned_imm0:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdctz. v2, v2, 0
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.packed2zoned(<16 x i8> %a, i32 0)
ret <16 x i8> %0
}
define <16 x i8> @tBcd_Packed2zoned_imm1(<16 x i8> %a) {
; CHECK-LABEL: tBcd_Packed2zoned_imm1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdctz. v2, v2, 1
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.packed2zoned(<16 x i8> %a, i32 1)
ret <16 x i8> %0
}
declare <16 x i8> @llvm.ppc.zoned2packed(<16 x i8>, i32 immarg)
define <16 x i8> @tBcd_Zoned2packed_imm0(<16 x i8> %a) {
; CHECK-LABEL: tBcd_Zoned2packed_imm0:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdcfz. v2, v2, 0
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.zoned2packed(<16 x i8> %a, i32 0)
ret <16 x i8> %0
}
define <16 x i8> @tBcd_Zoned2packed_imm1(<16 x i8> %a) {
; CHECK-LABEL: tBcd_Zoned2packed_imm1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bcdcfz. v2, v2, 1
; CHECK-NEXT: blr
entry:
%0 = call <16 x i8> @llvm.ppc.zoned2packed(<16 x i8> %a, i32 1)
ret <16 x i8> %0
}
|