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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s --check-prefixes=PPC64
; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefixes=PPC32
define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
; PPC64-LABEL: muloti_test:
; PPC64: # %bb.0: # %start
; PPC64-NEXT: addic 9, 5, -1
; PPC64-NEXT: mulld 10, 5, 4
; PPC64-NEXT: mulld 11, 3, 6
; PPC64-NEXT: subfe 9, 9, 5
; PPC64-NEXT: add 10, 11, 10
; PPC64-NEXT: addic 11, 3, -1
; PPC64-NEXT: mulhdu 8, 3, 6
; PPC64-NEXT: subfe 3, 11, 3
; PPC64-NEXT: and 3, 3, 9
; PPC64-NEXT: addic 9, 8, -1
; PPC64-NEXT: subfe 8, 9, 8
; PPC64-NEXT: or 3, 3, 8
; PPC64-NEXT: mulhdu 5, 5, 4
; PPC64-NEXT: addic 8, 5, -1
; PPC64-NEXT: subfe 5, 8, 5
; PPC64-NEXT: li 7, 0
; PPC64-NEXT: or 5, 3, 5
; PPC64-NEXT: mulhdu 8, 4, 6
; PPC64-NEXT: addc 3, 8, 10
; PPC64-NEXT: addze 7, 7
; PPC64-NEXT: addic 8, 7, -1
; PPC64-NEXT: subfe 7, 8, 7
; PPC64-NEXT: or 5, 5, 7
; PPC64-NEXT: mulld 4, 4, 6
; PPC64-NEXT: blr
;
; PPC32-LABEL: muloti_test:
; PPC32: # %bb.0: # %start
; PPC32-NEXT: stwu 1, -64(1)
; PPC32-NEXT: stw 26, 40(1) # 4-byte Folded Spill
; PPC32-NEXT: mfcr 12
; PPC32-NEXT: stw 27, 44(1) # 4-byte Folded Spill
; PPC32-NEXT: mullw 27, 9, 4
; PPC32-NEXT: stw 21, 20(1) # 4-byte Folded Spill
; PPC32-NEXT: mr 11, 7
; PPC32-NEXT: stw 22, 24(1) # 4-byte Folded Spill
; PPC32-NEXT: li 7, 0
; PPC32-NEXT: mullw 26, 3, 10
; PPC32-NEXT: stw 23, 28(1) # 4-byte Folded Spill
; PPC32-NEXT: add 27, 26, 27
; PPC32-NEXT: stw 24, 32(1) # 4-byte Folded Spill
; PPC32-NEXT: cmpwi 7, 11, 0
; PPC32-NEXT: stw 25, 36(1) # 4-byte Folded Spill
; PPC32-NEXT: mullw 24, 11, 6
; PPC32-NEXT: stw 28, 48(1) # 4-byte Folded Spill
; PPC32-NEXT: stw 29, 52(1) # 4-byte Folded Spill
; PPC32-NEXT: stw 30, 56(1) # 4-byte Folded Spill
; PPC32-NEXT: mulhwu 0, 8, 6
; PPC32-NEXT: stw 12, 16(1)
; PPC32-NEXT: mr 12, 5
; PPC32-NEXT: mulhwu 5, 4, 10
; PPC32-NEXT: addc 5, 5, 27
; PPC32-NEXT: addze 27, 7
; PPC32-NEXT: cmpwi 2, 27, 0
; PPC32-NEXT: mullw 25, 12, 8
; PPC32-NEXT: add 26, 24, 25
; PPC32-NEXT: addc 0, 0, 26
; PPC32-NEXT: addze 26, 7
; PPC32-NEXT: mullw 23, 8, 6
; PPC32-NEXT: mullw 22, 4, 10
; PPC32-NEXT: addc 24, 22, 23
; PPC32-NEXT: adde 22, 5, 0
; PPC32-NEXT: mulhwu 29, 6, 10
; PPC32-NEXT: mullw 21, 12, 10
; PPC32-NEXT: addc 5, 21, 29
; PPC32-NEXT: mulhwu 30, 12, 10
; PPC32-NEXT: addze 0, 30
; PPC32-NEXT: mullw 23, 6, 9
; PPC32-NEXT: addc 5, 23, 5
; PPC32-NEXT: mulhwu 28, 6, 9
; PPC32-NEXT: addze 29, 28
; PPC32-NEXT: addc 0, 0, 29
; PPC32-NEXT: addze 29, 7
; PPC32-NEXT: mullw 30, 12, 9
; PPC32-NEXT: addc 0, 30, 0
; PPC32-NEXT: mulhwu 25, 12, 9
; PPC32-NEXT: adde 30, 25, 29
; PPC32-NEXT: addc 0, 0, 24
; PPC32-NEXT: adde 30, 30, 22
; PPC32-NEXT: addze. 29, 7
; PPC32-NEXT: mcrf 1, 0
; PPC32-NEXT: mulhwu. 29, 11, 6
; PPC32-NEXT: mcrf 6, 0
; PPC32-NEXT: mulhwu. 29, 12, 8
; PPC32-NEXT: mcrf 5, 0
; PPC32-NEXT: cmpwi 12, 0
; PPC32-NEXT: crnor 20, 2, 30
; PPC32-NEXT: cmpwi 3, 0
; PPC32-NEXT: cmpwi 7, 9, 0
; PPC32-NEXT: crnor 24, 30, 2
; PPC32-NEXT: mulhwu. 12, 3, 10
; PPC32-NEXT: crorc 20, 20, 26
; PPC32-NEXT: mcrf 7, 0
; PPC32-NEXT: crorc 20, 20, 22
; PPC32-NEXT: cmpwi 26, 0
; PPC32-NEXT: crorc 28, 20, 2
; PPC32-NEXT: mulhwu. 9, 9, 4
; PPC32-NEXT: mcrf 5, 0
; PPC32-NEXT: crorc 20, 24, 30
; PPC32-NEXT: or. 3, 4, 3
; PPC32-NEXT: mcrf 6, 0
; PPC32-NEXT: crorc 20, 20, 22
; PPC32-NEXT: or. 3, 8, 11
; PPC32-NEXT: crorc 20, 20, 10
; PPC32-NEXT: crnor 21, 2, 26
; PPC32-NEXT: cror 20, 21, 20
; PPC32-NEXT: cror 20, 20, 28
; PPC32-NEXT: crandc 20, 6, 20
; PPC32-NEXT: mullw 6, 6, 10
; PPC32-NEXT: bc 12, 20, .LBB0_2
; PPC32-NEXT: # %bb.1: # %start
; PPC32-NEXT: li 7, 1
; PPC32-NEXT: .LBB0_2: # %start
; PPC32-NEXT: lwz 12, 16(1)
; PPC32-NEXT: mr 3, 30
; PPC32-NEXT: mr 4, 0
; PPC32-NEXT: lwz 30, 56(1) # 4-byte Folded Reload
; PPC32-NEXT: mtcrf 32, 12 # cr2
; PPC32-NEXT: lwz 29, 52(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 28, 48(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 27, 44(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 26, 40(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 25, 36(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 24, 32(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 23, 28(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 22, 24(1) # 4-byte Folded Reload
; PPC32-NEXT: lwz 21, 20(1) # 4-byte Folded Reload
; PPC32-NEXT: addi 1, 1, 64
; PPC32-NEXT: blr
start:
%0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2
%1 = extractvalue { i128, i1 } %0, 0
%2 = extractvalue { i128, i1 } %0, 1
%3 = zext i1 %2 to i8
%4 = insertvalue { i128, i8 } undef, i128 %1, 0
%5 = insertvalue { i128, i8 } %4, i8 %3, 1
ret { i128, i8 } %5
}
; Function Attrs: nounwind readnone speculatable
declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind readnone speculatable }
attributes #2 = { nounwind }
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