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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# NOTE: This MIR test is required because the support for 64 bit memory ops is missing in i686 mode, Due to distinction between float/int types, support is expected in near future and there is this RFC in place https://discourse.llvm.org/t/rfc-globalisel-adding-fp-type-information-to-llt/83349. Once this support is introduced this test must be dropped and integrated into the LLVM IR tests.
# RUN: llc -mtriple=i686-linux-gnu -mattr=+x87,-sse,-sse2 -run-pass=regbankselect,instruction-select -disable-gisel-legality-check -global-isel %s -o - | FileCheck %s --check-prefixes GISEL-X86
---
name: fcmp_double_oeq
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_oeq
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
; GISEL-X86-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
; GISEL-X86-NEXT: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
; GISEL-X86-NEXT: $al = COPY [[AND8rr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(oeq), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ogt
alignment: 16
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ogt
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ogt), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_oge
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_oge
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(oge), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_olt
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_olt
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m1]], [[LD_Fp64m]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(olt), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ole
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ole
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m1]], [[LD_Fp64m]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ole), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_one
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_one
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(one), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ord
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ord
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ord), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_uno
alignment: 16
exposesReturnsTwice: false
legalized: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_uno
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(uno), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ueq
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ueq
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ueq), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ugt
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ugt
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m1]], [[LD_Fp64m]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ugt), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_uge
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_uge
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m1]], [[LD_Fp64m]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(uge), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ult
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ult
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ult), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_ule
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_ule
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags
; GISEL-X86-NEXT: $al = COPY [[SETCCr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(ule), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
---
name: fcmp_double_une
alignment: 16
exposesReturnsTwice: false
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.1.entry:
; GISEL-X86-LABEL: name: fcmp_double_une
; GISEL-X86: [[LD_Fp64m:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0)
; GISEL-X86-NEXT: [[LD_Fp64m1:%[0-9]+]]:rfp64 = nofpexcept LD_Fp64m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw :: (invariant load (s64) from %fixed-stack.0 + 8)
; GISEL-X86-NEXT: UCOM_FpIr64 [[LD_Fp64m]], [[LD_Fp64m1]], implicit-def $eflags, implicit-def $fpsw, implicit $fpcw
; GISEL-X86-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags
; GISEL-X86-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags
; GISEL-X86-NEXT: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags
; GISEL-X86-NEXT: $al = COPY [[OR8rr]]
; GISEL-X86-NEXT: RET 0, implicit $al
%3:_(p0) = G_FRAME_INDEX %fixed-stack.0
%2:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0, align 8)
%1:_(s64) = G_LOAD %3(p0) :: (invariant load (s64) from %fixed-stack.0 + 8, basealign 8)
%4:_(s8) = G_FCMP floatpred(une), %2(s64), %1
$al = COPY %4(s8)
RET 0, implicit $al
...
|
