1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
define i128 @i64_sext_i128(i64 %a, i64 %b) {
; CHECK-LABEL: i64_sext_i128:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: imulq %rsi
; CHECK-NEXT: retq
%aa = sext i64 %a to i128
%bb = sext i64 %b to i128
%cc = mul i128 %aa, %bb
ret i128 %cc
}
define i128 @i64_zext_i128(i64 %a, i64 %b) {
; CHECK-LABEL: i64_zext_i128:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %rsi
; CHECK-NEXT: retq
%aa = zext i64 %a to i128
%bb = zext i64 %b to i128
%cc = mul i128 %aa, %bb
ret i128 %cc
}
define i128 @i64_zext_sext_i128(i64 %a, i64 %b) {
; CHECK-LABEL: i64_zext_sext_i128:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %rsi
; CHECK-NEXT: sarq $63, %rsi
; CHECK-NEXT: imulq %rdi, %rsi
; CHECK-NEXT: addq %rsi, %rdx
; CHECK-NEXT: retq
%aa = zext i64 %a to i128
%bb = sext i64 %b to i128
%cc = mul i128 %aa, %bb
ret i128 %cc
}
define i128 @i64_sext_zext_i128(i64 %a, i64 %b) {
; CHECK-LABEL: i64_sext_zext_i128:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: movq %rdi, %rcx
; CHECK-NEXT: sarq $63, %rcx
; CHECK-NEXT: mulq %rsi
; CHECK-NEXT: imulq %rsi, %rcx
; CHECK-NEXT: addq %rcx, %rdx
; CHECK-NEXT: retq
%aa = sext i64 %a to i128
%bb = zext i64 %b to i128
%cc = mul i128 %aa, %bb
ret i128 %cc
}
|
