1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
|
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid element widths.
expand z23.b, p3, z13.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: expand z23.b, p3, z13.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.h, p3, z13.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: expand z23.h, p3, z13.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.s, p3, z13.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: expand z23.s, p3, z13.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.d, p3, z13.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: expand z23.d, p3, z13.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.q, p3, z13.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: expand z23.q, p3, z13.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Invalid predicate operation
expand z23.b, p3/z, z13.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: expand z23.b, p3/z, z13.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.b, p3.b, z13.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.b, p3.b, z13.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.h, p3/m, z13.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: expand z23.h, p3/m, z13.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.h, p3.h, z13.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.h, p3.h, z13.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.s, p3/z, z13.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: expand z23.s, p3/z, z13.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.s, p3.s, z13.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.s, p3.s, z13.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.d, p3/m, z13.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: expand z23.d, p3/m, z13.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.d, p3.d, z13.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.d, p3.d, z13.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Predicate not in restricted predicate range
expand z23.b, p8, z13.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.b, p8, z13.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.b, p3.b, z13.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.b, p3.b, z13.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.h, p8, z13.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.h, p8, z13.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.h, p3.h, z13.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.h, p3.h, z13.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}
expand z23.s, p8, z13.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.s, p8, z13.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
expand z23.d, p8, z13.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
// CHECK-NEXT: expand z23.d, p8, z13.d
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// --------------------------------------------------------------------------//
// Negative tests for instructions that are incompatible with movprfx
movprfx z31, z6
expand z31.b, p7, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
// CHECK-NEXT: expand z31.b, p7, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
movprfx z31.b, p0/z, z6.b
expand z31.b, p0, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
// CHECK-NEXT: expand z31.b, p0, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|