1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
|
# RUN: llvm-mc -triple=xtensa -mattr=+loop -disassemble %s | FileCheck -check-prefixes=CHECK-LOOP %s
# RUN: not llvm-mc -triple=xtensa -disassemble %s 2>&1 | FileCheck --implicit-check-not=warning: -check-prefixes=CHECK-CORE %s
## Verify that binary code is correctly disassembled with
## loop option enabled. Also verify that dissasembling without
## loop option generates warnings.
[0x76,0x83,0x40]
# CHECK-LOOP: loop a3, . +68
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
[0x76,0x93,0x40]
# CHECK-LOOP: loopnez a3, . +68
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
[0x76,0xa3,0x40]
# CHECK-LOOP: loopgtz a3, . +68
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
[0x30,0x00,0x61]
# CHECK-LOOP: xsr a3, lbeg
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
[0x30,0x01,0x61]
# CHECK-LOOP: xsr a3, lend
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
[0x30,0x02,0x61]
# CHECK-LOOP: xsr a3, lcount
# CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding
|