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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S --passes=hotcoldsplit --hotcoldsplit-max-params=1 < %s | FileCheck %s
target datalayout = "E-m:a-p:32:32-i64:64-n32"
define void @foo(i32 %cond) {
; CHECK-LABEL: define void @foo(
; CHECK-SAME: i32 [[COND:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[COND_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 [[COND]], ptr [[COND_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[COND_ADDR]], align 4
; CHECK-NEXT: [[STKS:%.*]] = tail call ptr @llvm.stacksave.p0()
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[IF_THEN:.*]], label %[[IF_END2:.*]]
; CHECK: [[IF_THEN]]:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[COND_ADDR]], align 4
; CHECK-NEXT: call void @sink(i32 [[TMP0]])
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 10
; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN1:.*]], label %[[IF_ELSE:.*]]
; CHECK: [[IF_THEN1]]:
; CHECK-NEXT: call void @sideeffect(i32 2)
; CHECK-NEXT: br label %[[IF_END:.*]]
; CHECK: [[IF_ELSE]]:
; CHECK-NEXT: call void @sink(i32 0)
; CHECK-NEXT: call void @sideeffect(i32 0)
; CHECK-NEXT: call void @llvm.stackrestore.p0(ptr [[STKS]])
; CHECK-NEXT: br label %[[IF_END]]
; CHECK: [[IF_END]]:
; CHECK-NEXT: br label %[[IF_END2]]
; CHECK: [[IF_END2]]:
; CHECK-NEXT: call void @sideeffect(i32 1)
; CHECK-NEXT: ret void
;
entry:
%cond.addr = alloca i32
store i32 %cond, ptr %cond.addr
%0 = load i32, ptr %cond.addr
%stks = tail call ptr @llvm.stacksave.p0()
%tobool = icmp ne i32 %0, 0
br i1 %tobool, label %if.then, label %if.end2
if.then: ; preds = %entry
%1 = load i32, ptr %cond.addr
call void @sink(i32 %0)
%cmp = icmp sgt i32 %1, 10
br i1 %cmp, label %if.then1, label %if.else
if.then1: ; preds = %if.then
call void @sideeffect(i32 2)
br label %if.end
if.else: ; preds = %if.then
call void @sink(i32 0)
call void @sideeffect(i32 0)
call void @llvm.stackrestore.p0(ptr %stks)
br label %if.end
if.end: ; preds = %if.else, %if.then1
br label %if.end2
if.end2: ; preds = %entry
call void @sideeffect(i32 1)
ret void
}
declare void @sideeffect(i32)
declare void @sink(i32) cold
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