1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=slp-vectorizer < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"
; Make sure we do not generate malformed phis not in the beginning of block.
define void @test() #0 {
; CHECK-LABEL: @test(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ 1, [[BB1]] ], [ 2, [[BB:%.*]] ]
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP18:%.*]], [[BB1]] ], [ 3, [[BB]] ]
; CHECK-NEXT: [[TMP3:%.*]] = mul i32 4, [[TMP]]
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP]]
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], [[TMP]]
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP5]], [[TMP]]
; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[TMP6]], [[TMP]]
; CHECK-NEXT: [[TMP8:%.*]] = mul i32 [[TMP7]], [[TMP]]
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], [[TMP]]
; CHECK-NEXT: [[TMP10:%.*]] = mul i32 [[TMP9]], [[TMP]]
; CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], [[TMP]]
; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[TMP11]], [[TMP]]
; CHECK-NEXT: [[TMP13:%.*]] = mul i32 [[TMP12]], [[TMP]]
; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[TMP13]], [[TMP]]
; CHECK-NEXT: [[TMP15:%.*]] = mul i32 [[TMP14]], [[TMP]]
; CHECK-NEXT: [[TMP16:%.*]] = mul i32 [[TMP15]], [[TMP]]
; CHECK-NEXT: [[TMP17:%.*]] = mul i32 [[TMP16]], [[TMP]]
; CHECK-NEXT: [[TMP18]] = mul i32 [[TMP17]], [[TMP]]
; CHECK-NEXT: br label [[BB1]]
;
bb:
br label %bb1
bb1: ; preds = %bb1, %bb
%tmp = phi i32 [ 1, %bb1 ], [ 2, %bb ]
%tmp2 = phi i32 [ %tmp18, %bb1 ], [ 3, %bb ]
%tmp3 = mul i32 4, %tmp
%tmp4 = mul i32 %tmp3, %tmp
%tmp5 = mul i32 %tmp4, %tmp
%tmp6 = mul i32 %tmp5, %tmp
%tmp7 = mul i32 %tmp6, %tmp
%tmp8 = mul i32 %tmp7, %tmp
%tmp9 = mul i32 %tmp8, %tmp
%tmp10 = mul i32 %tmp9, %tmp
%tmp11 = mul i32 %tmp10, %tmp
%tmp12 = mul i32 %tmp11, %tmp
%tmp13 = mul i32 %tmp12, %tmp
%tmp14 = mul i32 %tmp13, %tmp
%tmp15 = mul i32 %tmp14, %tmp
%tmp16 = mul i32 %tmp15, %tmp
%tmp17 = mul i32 %tmp16, %tmp
%tmp18 = mul i32 %tmp17, %tmp
br label %bb1
}
define void @test_2(ptr addrspace(1) %arg, i32 %arg1) #0 {
; CHECK-LABEL: @test_2(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ 3, [[BB:%.*]] ], [ 3, [[BB2]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 0, [[BB]] ], [ 3, [[BB2]] ]
; CHECK-NEXT: [[TMP0:%.*]] = mul i32 [[TMP]], 8
; CHECK-NEXT: [[OP_RDX:%.*]] = add i32 27, [[TMP0]]
; CHECK-NEXT: call void @use(i32 [[OP_RDX]])
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2: ; preds = %bb2, %bb
%tmp = phi i32 [ 3, %bb ], [ 3, %bb2 ]
%tmp3 = phi i32 [ 0, %bb ], [ 3, %bb2 ]
%tmp4 = add i32 %tmp, 3
%tmp5 = add i32 3, %tmp4
%tmp6 = add i32 %tmp, %tmp5
%tmp7 = add i32 3, %tmp6
%tmp8 = add i32 %tmp, %tmp7
%tmp9 = add i32 3, %tmp8
%tmp10 = add i32 %tmp, %tmp9
%tmp11 = add i32 3, %tmp10
%tmp12 = add i32 %tmp, %tmp11
%tmp13 = add i32 3, %tmp12
%tmp14 = add i32 %tmp, %tmp13
%tmp15 = add i32 3, %tmp14
%tmp16 = add i32 %tmp, %tmp15
%tmp17 = add i32 3, %tmp16
%tmp18 = add i32 %tmp, %tmp17
%tmp19 = add i32 3, %tmp18
call void @use(i32 %tmp19)
br label %bb2
}
; Make sure we don't crash.
define i64 @test_3() #0 {
; CHECK-LABEL: @test_3(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x i32> [ splat (i32 3), [[BB1]] ], [ poison, [[BB2:%.*]] ]
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <28 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1>
; CHECK-NEXT: [[VAL4:%.*]] = extractelement <28 x i32> [[TMP3]], i32 0
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <32 x i32> poison, i32 [[VAL4]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i32> [[TMP0]], <32 x i32> poison, <32 x i32> zeroinitializer
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <32 x i32> [[TMP1]], <32 x i32> poison, <28 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27>
; CHECK-NEXT: [[RDX_OP:%.*]] = mul <28 x i32> [[TMP5]], [[TMP3]]
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <28 x i32> [[RDX_OP]], <28 x i32> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <32 x i32> [[TMP1]], <32 x i32> [[TMP7]], <32 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 28, i32 29, i32 30, i32 31>
; CHECK-NEXT: [[OP_RDX27:%.*]] = call i32 @llvm.vector.reduce.mul.v32i32(<32 x i32> [[TMP6]])
; CHECK-NEXT: [[VAL64:%.*]] = add i32 3, [[OP_RDX27]]
; CHECK-NEXT: [[VAL65:%.*]] = sext i32 [[VAL64]] to i64
; CHECK-NEXT: ret i64 [[VAL65]]
;
bb:
br label %bb1
bb1: ; preds = %bb
br label %bb3
bb2: ; No predecessors!
br label %bb3
bb3: ; preds = %bb2, %bb1
%val = phi i32 [ 3, %bb1 ], [ 3, %bb2 ]
%val4 = phi i32 [ 3, %bb1 ], [ 3, %bb2 ]
%val5 = mul i32 %val, %val4
%val6 = mul i32 %val5, %val4
%val7 = mul i32 %val6, %val4
%val8 = mul i32 %val7, %val4
%val9 = mul i32 %val8, %val4
%val10 = mul i32 %val9, %val4
%val11 = mul i32 %val10, %val4
%val12 = mul i32 %val11, %val4
%val13 = mul i32 %val12, %val4
%val14 = mul i32 %val13, %val4
%val15 = mul i32 %val14, %val4
%val16 = mul i32 %val15, %val4
%val17 = mul i32 %val16, %val4
%val18 = mul i32 %val17, %val4
%val19 = mul i32 %val18, %val4
%val20 = mul i32 %val19, %val4
%val21 = mul i32 %val20, %val4
%val22 = mul i32 %val21, %val4
%val23 = mul i32 %val22, %val4
%val24 = mul i32 %val23, %val4
%val25 = mul i32 %val24, %val4
%val26 = mul i32 %val25, %val4
%val27 = mul i32 %val26, %val4
%val28 = mul i32 %val27, %val4
%val29 = mul i32 %val28, %val4
%val30 = mul i32 %val29, %val4
%val31 = mul i32 %val30, %val4
%val32 = mul i32 %val31, %val4
%val33 = mul i32 %val32, %val4
%val34 = mul i32 %val33, %val4
%val35 = mul i32 %val34, %val4
%val36 = mul i32 %val35, %val4
%val37 = mul i32 %val36, %val4
%val38 = mul i32 %val37, %val4
%val39 = mul i32 %val38, %val4
%val40 = mul i32 %val39, %val4
%val41 = mul i32 %val40, %val4
%val42 = mul i32 %val41, %val4
%val43 = mul i32 %val42, %val4
%val44 = mul i32 %val43, %val4
%val45 = mul i32 %val44, %val4
%val46 = mul i32 %val45, %val4
%val47 = mul i32 %val46, %val4
%val48 = mul i32 %val47, %val4
%val49 = mul i32 %val48, %val4
%val50 = mul i32 %val49, %val4
%val51 = mul i32 %val50, %val4
%val52 = mul i32 %val51, %val4
%val53 = mul i32 %val52, %val4
%val54 = mul i32 %val53, %val4
%val55 = mul i32 %val54, %val4
%val56 = mul i32 %val55, %val4
%val57 = mul i32 %val56, %val4
%val58 = mul i32 %val57, %val4
%val59 = mul i32 %val58, %val4
%val60 = mul i32 %val59, %val4
%val61 = mul i32 %val60, %val4
%val62 = mul i32 %val61, %val4
%val63 = mul i32 %val62, %val4
%val64 = add i32 3, %val63
%val65 = sext i32 %val64 to i64
ret i64 %val65
}
declare void @use(i32) #0
attributes #0 = { "target-features"="+sse4.1" }
|
