File: RegisterCoalescer.h

package info (click to toggle)
llvm-toolchain-21 1%3A21.1.7-1
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 2,245,064 kB
  • sloc: cpp: 7,619,731; ansic: 1,434,018; asm: 1,058,748; python: 252,740; f90: 94,671; objc: 70,685; lisp: 42,813; pascal: 18,401; sh: 8,601; ml: 5,111; perl: 4,720; makefile: 3,676; awk: 3,523; javascript: 2,409; xml: 892; fortran: 770
file content (115 lines) | stat: -rw-r--r-- 4,087 bytes parent folder | download | duplicates (2)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
//===- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the abstract interface for register coalescers,
// allowing them to interact with and query register allocators.
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
#define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H

#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/Register.h"

namespace llvm {

class MachineInstr;
class TargetRegisterClass;
class TargetRegisterInfo;

/// A helper class for register coalescers. When deciding if
/// two registers can be coalesced, CoalescerPair can determine if a copy
/// instruction would become an identity copy after coalescing.
class CoalescerPair {
  const TargetRegisterInfo &TRI;

  /// The register that will be left after coalescing. It can be a
  /// virtual or physical register.
  Register DstReg;

  /// The virtual register that will be coalesced into dstReg.
  Register SrcReg;

  /// The sub-register index of the old DstReg in the new coalesced register.
  unsigned DstIdx = 0;

  /// The sub-register index of the old SrcReg in the new coalesced register.
  unsigned SrcIdx = 0;

  /// True when the original copy was a partial subregister copy.
  bool Partial = false;

  /// True when both regs are virtual and newRC is constrained.
  bool CrossClass = false;

  /// True when DstReg and SrcReg are reversed from the original
  /// copy instruction.
  bool Flipped = false;

  /// The register class of the coalesced register, or NULL if DstReg
  /// is a physreg. This register class may be a super-register of both
  /// SrcReg and DstReg.
  const TargetRegisterClass *NewRC = nullptr;

public:
  CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {}

  /// Create a CoalescerPair representing a virtreg-to-physreg copy.
  /// No need to call setRegisters().
  CoalescerPair(Register VirtReg, MCRegister PhysReg,
                const TargetRegisterInfo &tri)
      : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg) {}

  /// Set registers to match the copy instruction MI. Return
  /// false if MI is not a coalescable copy instruction.
  bool setRegisters(const MachineInstr *);

  /// Swap SrcReg and DstReg. Return false if swapping is impossible
  /// because DstReg is a physical register, or SubIdx is set.
  bool flip();

  /// Return true if MI is a copy instruction that will become
  /// an identity copy after coalescing.
  bool isCoalescable(const MachineInstr *) const;

  /// Return true if DstReg is a physical register.
  bool isPhys() const { return !NewRC; }

  /// Return true if the original copy instruction did not copy
  /// the full register, but was a subreg operation.
  bool isPartial() const { return Partial; }

  /// Return true if DstReg is virtual and NewRC is a smaller
  /// register class than DstReg's.
  bool isCrossClass() const { return CrossClass; }

  /// Return true when getSrcReg is the register being defined by
  /// the original copy instruction.
  bool isFlipped() const { return Flipped; }

  /// Return the register (virtual or physical) that will remain
  /// after coalescing.
  Register getDstReg() const { return DstReg; }

  /// Return the virtual register that will be coalesced away.
  Register getSrcReg() const { return SrcReg; }

  /// Return the subregister index that DstReg will be coalesced into, or 0.
  unsigned getDstIdx() const { return DstIdx; }

  /// Return the subregister index that SrcReg will be coalesced into, or 0.
  unsigned getSrcIdx() const { return SrcIdx; }

  /// Return the register class of the coalesced register.
  const TargetRegisterClass *getNewRC() const { return NewRC; }
};

} // end namespace llvm

#endif // LLVM_LIB_CODEGEN_REGISTERCOALESCER_H