File: vec_set-9.ll

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llvm-toolchain-3.5 1%3A3.5.2-3~bpo8%2B2
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; RUN: llc < %s -march=x86-64 -mattr=-avx,-pad-short-functions | FileCheck %s

; CHECK: test3
; CHECK: movd
; CHECK-NOT: movd
; CHECK: {{movlhps.*%xmm0, %xmm0}}
; CHECK-NEXT: ret

define <2 x i64> @test3(i64 %A) nounwind {
entry:
	%B = insertelement <2 x i64> undef, i64 %A, i32 1
	ret <2 x i64> %B
}