File: inlineasm-imm-arm.ll

package info (click to toggle)
llvm-toolchain-3.9 1%3A3.9.1-8
  • links: PTS, VCS
  • area: main
  • in suites: stretch
  • size: 441,060 kB
  • ctags: 428,777
  • sloc: cpp: 2,546,577; ansic: 538,318; asm: 119,677; objc: 103,316; python: 102,148; sh: 27,847; pascal: 5,626; ml: 5,510; perl: 5,293; lisp: 4,801; makefile: 2,177; xml: 686; cs: 362; php: 212; csh: 117
file content (31 lines) | stat: -rw-r--r-- 971 bytes parent folder | download | duplicates (44)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
; RUN: llc -mtriple=arm-eabi -no-integrated-as %s -o /dev/null

; Test ARM-mode "I" constraint, for any Data Processing immediate.
define i32 @testI(i32 %x) {
	%y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind
	ret i32 %y
}

; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC.
define void @testJ() {
	tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind
	ret void
}

; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates.
define void @testK() {
	tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind
	ret void
}

; Test ARM-mode "L" constraint, for negated Data Processing immediates.
define void @testL() {
	tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind
	ret void
}

; Test ARM-mode "M" constraint, for value between 0 and 32.
define i32 @testM(i32 %x) {
	%y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
	ret i32 %y
}