File: build-vector-shuffle.ll

package info (click to toggle)
llvm-toolchain-4.0 1%3A4.0.1-10~deb9u2
  • links: PTS, VCS
  • area: main
  • in suites: stretch
  • size: 493,332 kB
  • sloc: cpp: 2,698,100; ansic: 552,773; asm: 128,821; python: 121,589; objc: 105,054; sh: 21,174; lisp: 6,758; ml: 5,532; perl: 5,311; pascal: 5,245; makefile: 2,083; cs: 1,868; xml: 686; php: 212; csh: 117
file content (21 lines) | stat: -rw-r--r-- 688 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check that we don't crash.
; CHECK: vshuff

target triple = "hexagon"

define void @hex_interleaved.s0.__outermost() local_unnamed_addr #0 {
entry:
  %0 = icmp eq i32 undef, 0
  %sel2 = select i1 %0, <32 x i16> undef, <32 x i16> zeroinitializer
  %1 = bitcast <32 x i16> %sel2 to <16 x i32>
  %2 = tail call <16 x i32> @llvm.hexagon.V6.vshuffh(<16 x i32> %1)
  store <16 x i32> %2, <16 x i32>* undef, align 2
  unreachable
}

; Function Attrs: nounwind readnone
declare <16 x i32> @llvm.hexagon.V6.vshuffh(<16 x i32>) #1

attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx" }
attributes #1 = { nounwind readnone }