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# RUN: llc -o - %s -mtriple=thumb-arm-none-eabi -mcpu=cortex-m0 -run-pass scavenger-test | FileCheck %s
---
# CHECK-LABEL: name: scavengebug0
# Make sure we are not spilling/using a physreg used in the very last
# instruction of the scavenging range.
# CHECK-NOT: tSTRi {{.*}}%r0,{{.*}}%r0
# CHECK-NOT: tSTRi {{.*}}%r1,{{.*}}%r1
# CHECK-NOT: tSTRi {{.*}}%r2,{{.*}}%r2
# CHECK-NOT: tSTRi {{.*}}%r3,{{.*}}%r3
# CHECK-NOT: tSTRi {{.*}}%r4,{{.*}}%r4
# CHECK-NOT: tSTRi {{.*}}%r5,{{.*}}%r5
# CHECK-NOT: tSTRi {{.*}}%r6,{{.*}}%r6
# CHECK-NOT: tSTRi {{.*}}%r7,{{.*}}%r7
name: scavengebug0
body: |
bb.0:
; Bring up register pressure to force emergency spilling
%r0 = IMPLICIT_DEF
%r1 = IMPLICIT_DEF
%r2 = IMPLICIT_DEF
%r3 = IMPLICIT_DEF
%r4 = IMPLICIT_DEF
%r5 = IMPLICIT_DEF
%r6 = IMPLICIT_DEF
%r7 = IMPLICIT_DEF
%0 : tgpr = IMPLICIT_DEF
%0 = tADDhirr %0, %sp, 14, %noreg
tSTRi %r0, %0, 0, 14, %noreg
%1 : tgpr = IMPLICIT_DEF
%1 = tADDhirr %1, %sp, 14, %noreg
tSTRi %r1, %1, 0, 14, %noreg
%2 : tgpr = IMPLICIT_DEF
%2 = tADDhirr %2, %sp, 14, %noreg
tSTRi %r2, %2, 0, 14, %noreg
%3 : tgpr = IMPLICIT_DEF
%3 = tADDhirr %3, %sp, 14, %noreg
tSTRi %r3, %3, 0, 14, %noreg
%4 : tgpr = IMPLICIT_DEF
%4 = tADDhirr %4, %sp, 14, %noreg
tSTRi %r4, %4, 0, 14, %noreg
%5 : tgpr = IMPLICIT_DEF
%5 = tADDhirr %5, %sp, 14, %noreg
tSTRi %r5, %5, 0, 14, %noreg
%6 : tgpr = IMPLICIT_DEF
%6 = tADDhirr %6, %sp, 14, %noreg
tSTRi %r6, %6, 0, 14, %noreg
%7 : tgpr = IMPLICIT_DEF
%7 = tADDhirr %7, %sp, 14, %noreg
tSTRi %r7, %7, 0, 14, %noreg
KILL %r0
KILL %r1
KILL %r2
KILL %r3
KILL %r4
KILL %r5
KILL %r6
KILL %r7
|
