File: machine-instructions.mir

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llvm-toolchain-6.0 1%3A6.0.1-10
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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses X86 machine instructions
# correctly.

--- |

  define i32 @inc(i32 %a) {
  entry:
    %b = mul i32 %a, 11
    ret i32 %b
  }

...
---
# CHECK: name: inc
name:            inc
body: |
  bb.0.entry:
    ; CHECK:      MOV32rr
    ; CHECK-NEXT: RETQ
    %eax = MOV32rr %eax
     RETQ %eax
...