File: select-intrinsic-x86-flags-read-u32.mir

package info (click to toggle)
llvm-toolchain-6.0 1%3A6.0.1-10
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 598,080 kB
  • sloc: cpp: 3,046,253; ansic: 595,057; asm: 271,965; python: 128,926; objc: 106,554; sh: 21,906; lisp: 10,191; pascal: 6,094; ml: 5,544; perl: 5,265; makefile: 2,227; cs: 2,027; xml: 686; php: 212; csh: 117
file content (27 lines) | stat: -rw-r--r-- 914 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=i386-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s

--- |
  define void @read_flags() { ret void }
...

---
# Check that we select a the x86.flags.read.u32 intrinsic into a RDFLAGS
# instruction. Also check that we constrain the register class of the COPY to
# gr32.
name:            read_flags
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }

body:             |
  bb.0:
    ; CHECK-LABEL: name: read_flags
    ; CHECK: [[RDFLAGS32_:%[0-9]+]]:gr32 = RDFLAGS32 implicit-def %esp, implicit %esp
    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[RDFLAGS32_]], %subreg.sub_32bit
    ; CHECK: %rax = COPY [[SUBREG_TO_REG]]
    %0(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.x86.flags.read.u32)
    %rax = COPY %0(s32)
...