File: inlineasm-imm-arm.ll

package info (click to toggle)
llvm-toolchain-7 1%3A7.0.1-8%2Bdeb10u2
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 734,616 kB
  • sloc: cpp: 3,776,926; ansic: 633,271; asm: 350,301; python: 142,716; objc: 107,612; sh: 22,626; lisp: 11,056; perl: 7,999; pascal: 6,742; ml: 5,537; awk: 3,536; makefile: 2,557; cs: 2,027; xml: 841; javascript: 518; ruby: 156
file content (31 lines) | stat: -rw-r--r-- 971 bytes parent folder | download | duplicates (41)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
; RUN: llc -mtriple=arm-eabi -no-integrated-as %s -o /dev/null

; Test ARM-mode "I" constraint, for any Data Processing immediate.
define i32 @testI(i32 %x) {
	%y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind
	ret i32 %y
}

; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC.
define void @testJ() {
	tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind
	ret void
}

; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates.
define void @testK() {
	tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind
	ret void
}

; Test ARM-mode "L" constraint, for negated Data Processing immediates.
define void @testL() {
	tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind
	ret void
}

; Test ARM-mode "M" constraint, for value between 0 and 32.
define i32 @testM(i32 %x) {
	%y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
	ret i32 %y
}