1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
|
//===--------------------- Pipeline.cpp -------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file implements an ordered container of stages that simulate the
/// pipeline of a hardware backend.
///
//===----------------------------------------------------------------------===//
#include "Pipeline.h"
#include "HWEventListener.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/Support/Debug.h"
namespace mca {
#define DEBUG_TYPE "llvm-mca"
using namespace llvm;
void Pipeline::addEventListener(HWEventListener *Listener) {
if (Listener)
Listeners.insert(Listener);
for (auto &S : Stages)
S->addListener(Listener);
}
bool Pipeline::hasWorkToProcess() {
const auto It = llvm::find_if(Stages, [](const std::unique_ptr<Stage> &S) {
return S->hasWorkToComplete();
});
return It != Stages.end();
}
// This routine returns early if any stage returns 'false' after execute() is
// called on it.
bool Pipeline::executeStages(InstRef &IR) {
for (const std::unique_ptr<Stage> &S : Stages)
if (!S->execute(IR))
return false;
return true;
}
void Pipeline::preExecuteStages() {
for (const std::unique_ptr<Stage> &S : Stages)
S->preExecute();
}
void Pipeline::postExecuteStages() {
for (const std::unique_ptr<Stage> &S : Stages)
S->postExecute();
}
void Pipeline::run() {
while (hasWorkToProcess()) {
notifyCycleBegin();
runCycle();
notifyCycleEnd();
++Cycles;
}
}
void Pipeline::runCycle() {
// Update the stages before we do any processing for this cycle.
InstRef IR;
for (auto &S : Stages)
S->cycleStart();
// Continue executing this cycle until any stage claims it cannot make
// progress.
while (true) {
preExecuteStages();
if (!executeStages(IR))
break;
postExecuteStages();
}
for (auto &S : Stages)
S->cycleEnd();
}
void Pipeline::notifyCycleBegin() {
LLVM_DEBUG(dbgs() << "[E] Cycle begin: " << Cycles << '\n');
for (HWEventListener *Listener : Listeners)
Listener->onCycleBegin();
}
void Pipeline::notifyCycleEnd() {
LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n\n");
for (HWEventListener *Listener : Listeners)
Listener->onCycleEnd();
}
} // namespace mca.
|
