1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
|
# RUN: llc -O0 -mtriple arm-- -mattr=+neon -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
define void @test_add_s64() { ret void }
define void @test_sub_s64() { ret void }
...
---
name: test_add_s64
# CHECK-LABEL: name: test_add_s64
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: fprb }
- { id: 1, class: fprb }
- { id: 2, class: fprb }
body: |
bb.0:
liveins: $d0, $d1
%0(s64) = COPY $d0
; CHECK: [[VREGX:%[0-9]+]]:dpr = COPY $d0
%1(s64) = COPY $d1
; CHECK: [[VREGY:%[0-9]+]]:dpr = COPY $d1
%2(s64) = G_ADD %0, %1
; CHECK: [[VREGSUM:%[0-9]+]]:dpr = VADDv1i64 [[VREGX]], [[VREGY]], 14, $noreg
$d0 = COPY %2(s64)
; CHECK: $d0 = COPY [[VREGSUM]]
BX_RET 14, $noreg, implicit $d0
; CHECK: BX_RET 14, $noreg, implicit $d0
...
---
name: test_sub_s64
# CHECK-LABEL: name: test_sub_s64
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: fprb }
- { id: 1, class: fprb }
- { id: 2, class: fprb }
body: |
bb.0:
liveins: $d0, $d1
%0(s64) = COPY $d0
; CHECK: [[VREGX:%[0-9]+]]:dpr = COPY $d0
%1(s64) = COPY $d1
; CHECK: [[VREGY:%[0-9]+]]:dpr = COPY $d1
%2(s64) = G_SUB %0, %1
; CHECK: [[VREGSUM:%[0-9]+]]:dpr = VSUBv1i64 [[VREGX]], [[VREGY]], 14, $noreg
$d0 = COPY %2(s64)
; CHECK: $d0 = COPY [[VREGSUM]]
BX_RET 14, $noreg, implicit $d0
; CHECK: BX_RET 14, $noreg, implicit $d0
|
