File: test_g_intrinsic_w_side_effects.mir

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# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target

---
name:            test_intrinsic_w_side_effects
legalized:       true
regBankSelected: false
selected:        false
tracksRegLiveness: true
liveins:
body:             |
  bb.0:

    %0:_(p3) = G_IMPLICIT_DEF
    %1:_(s32) = G_IMPLICIT_DEF

    ; CHECK: Bad machine code: Too few operands
    G_INTRINSIC

    ; CHECK: Bad machine code: G_INTRINSIC first src operand must be an intrinsic ID
    G_INTRINSIC_W_SIDE_EFFECTS 0

    ; CHECK: Bad machine code: G_INTRINSIC first src operand must be an intrinsic ID
    G_INTRINSIC_W_SIDE_EFFECTS %0, %1

    ; CHECK: Bad machine code: G_INTRINSIC first src operand must be an intrinsic ID
    %2:_(s32) = G_INTRINSIC %0, %1

    ; CHECK: Bad machine code: G_INTRINSIC first src operand must be an intrinsic ID
    %3:_(s32), %4:_(s32) = G_INTRINSIC_W_SIDE_EFFECTS %0, %1

    ; CHECK: Bad machine code: G_INTRINSIC_W_SIDE_EFFECTS used with readnone intrinsic
    %5:_(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.rcp), %1

...