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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @FMADDSrrr_fpr() { ret void }
...
---
name: FMADDSrrr_fpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
- { id: 2, class: fpr }
- { id: 3, class: fpr }
body: |
bb.0:
liveins: $w0, $w1, $w2
; CHECK-LABEL: name: FMADDSrrr_fpr
; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $w0
; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $w1
; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY $w2
; CHECK: [[FMADDSrrr:%[0-9]+]]:fpr32 = FMADDSrrr [[COPY]], [[COPY1]], [[COPY2]]
; CHECK: $w0 = COPY [[FMADDSrrr]]
%0(s32) = COPY $w0
%1(s32) = COPY $w1
%2(s32) = COPY $w2
%3(s32) = G_FMA %0, %1, %2
$w0 = COPY %3
...
|
