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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GCN
---
name: minnum
legalized: true
regBankSelected: true
# GCN-LABEL: name: minnum
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4, $sgpr10_sgpr11, $vgpr10_vgpr11, $vgpr12_vgpr13
; GCN: [[SGPR0:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
; GCN: [[VGPR0:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN: [[VGPR1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
%3:vgpr(p1) = COPY $vgpr3_vgpr4
; GCN: [[SGPR64_0:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
; GCN: [[VGPR64_0:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
; GCN: [[VGPR64_1:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
%10:sgpr(s64) = COPY $sgpr10_sgpr11
%11:vgpr(s64) = COPY $vgpr10_vgpr11
%12:vgpr(s64) = COPY $vgpr12_vgpr13
; minnum vs
; GCN: V_MIN_F32_e32 [[SGPR0]], [[VGPR0]]
%4:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %1, %0
; minnum sv
; GCN: V_MIN_F32_e32 [[SGPR0]], [[VGPR0]]
%5:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %0, %1
; minnum vv
; GCN: V_MIN_F32_e32 [[VGPR0]], [[VGPR1]]
%6:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %1, %2
G_STORE %4, %3 :: (store 4, addrspace 1)
G_STORE %5, %3 :: (store 4, addrspace 1)
G_STORE %6, %3 :: (store 4, addrspace 1)
; 64-bit
; minnum vs
; GCN: V_MIN_F64 0, [[SGPR64_0]], 0, [[VGPR64_0]], 0, 0
%14:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %10, %11
; minnum sv
; GCN: V_MIN_F64 0, [[VGPR64_0]], 0, [[SGPR64_0]], 0, 0
%15:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %11, %10
; minnum vv
; GCN: V_MIN_F64 0, [[VGPR64_0]], 0, [[VGPR64_1]], 0, 0
%16:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %11, %12
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
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