File: thumb-select-imm.mir

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llvm-toolchain-9 1%3A9.0.1-16
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# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
  define void @test_movi() { ret void }
  define void @test_movi16() { ret void }
  define void @test_movi32() { ret void }
...
---
name:            test_movi
# CHECK-LABEL: name: test_movi
legalized:       true
regBankSelected: true
selected:        false
# CHECK: selected: true
registers:
  - { id: 0, class: gprb }
body:             |
  bb.0:
    %0(s32) = G_CONSTANT i32 786444 ; 0x000c000c
    ; CHECK: [[VREGRES:%[0-9]+]]:rgpr = t2MOVi 786444, 14, $noreg, $noreg

    $r0 = COPY %0(s32)
    ; CHECK: $r0 = COPY [[VREGRES]]

    BX_RET 14, $noreg, implicit $r0
    ; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
name:            test_movi16
# CHECK-LABEL: name: test_movi16
legalized:       true
regBankSelected: true
selected:        false
# CHECK: selected: true
registers:
  - { id: 0, class: gprb }
body:             |
  bb.0:
    %0(s32) = G_CONSTANT i32 65533
    ; CHECK: [[VREGRES:%[0-9]+]]:rgpr = t2MOVi16 65533, 14, $noreg

    $r0 = COPY %0(s32)
    ; CHECK: $r0 = COPY [[VREGRES]]

    BX_RET 14, $noreg, implicit $r0
    ; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
name:            test_movi32
# CHECK-LABEL: name: test_movi32
legalized:       true
regBankSelected: true
selected:        false
# CHECK: selected: true
registers:
  - { id: 0, class: gprb }
body:             |
  bb.0:
    %0(s32) = G_CONSTANT i32 185470479 ; 0x0b0e0e0f
    ; CHECK: [[VREGY:%[0-9]+]]:rgpr = t2MOVi32imm 185470479

    $r0 = COPY %0(s32)
    ; CHECK: $r0 = COPY [[VREGRES]]

    BX_RET 14, $noreg, implicit $r0
    ; CHECK: BX_RET 14, $noreg, implicit $r0
...