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; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
@glob = common local_unnamed_addr global i16 0, align 2
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtus(i16 zeroext %a, i16 zeroext %b) {
; CHECK-LABEL: test_igtus:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK-NEXT: rldicl r3, [[REG]], 1, 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i16 %a, %b
%conv2 = zext i1 %cmp to i32
ret i32 %conv2
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtus_sext(i16 zeroext %a, i16 zeroext %b) {
; CHECK-LABEL: test_igtus_sext:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK-NEXT: sradi r3, [[REG]], 63
; CHECK-NEXT: blr
entry:
%cmp = icmp ugt i16 %a, %b
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtus_z(i16 zeroext %a) {
; CHECK-LABEL: test_igtus_z:
; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i16 %a, 0
%conv1 = zext i1 %cmp to i32
ret i32 %conv1
}
; Function Attrs: norecurse nounwind readnone
define signext i32 @test_igtus_sext_z(i16 zeroext %a) {
; CHECK-LABEL: test_igtus_sext_z:
; CHECK: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i16 %a, 0
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind
define void @test_igtus_store(i16 zeroext %a, i16 zeroext %b) {
; CHECK-LABEL: test_igtus_store:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63
; CHECK: blr
entry:
%cmp = icmp ugt i16 %a, %b
%conv3 = zext i1 %cmp to i16
store i16 %conv3, i16* @glob, align 2
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtus_sext_store(i16 zeroext %a, i16 zeroext %b) {
; CHECK-LABEL: test_igtus_sext_store:
; CHECK: sub [[REG:r[0-9]+]], r4, r3
; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
; CHECK: blr
entry:
%cmp = icmp ugt i16 %a, %b
%conv3 = sext i1 %cmp to i16
store i16 %conv3, i16* @glob, align 2
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtus_z_store(i16 zeroext %a) {
; CHECK-LABEL: test_igtus_z_store:
; CHECK: cntlzw r3, r3
; CHECK: srwi r3, r3, 5
; CHECK: xori r3, r3, 1
; CHECK: sth r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i16 %a, 0
%conv2 = zext i1 %cmp to i16
store i16 %conv2, i16* @glob, align 2
ret void
}
; Function Attrs: norecurse nounwind
define void @test_igtus_sext_z_store(i16 zeroext %a) {
; CHECK-LABEL: test_igtus_sext_z_store:
; CHECK: cntlzw r3, r3
; CHECK: srwi r3, r3, 5
; CHECK: xori r3, r3, 1
; CHECK: neg r3, r3
; CHECK: sth r3, 0(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp ne i16 %a, 0
%conv2 = sext i1 %cmp to i16
store i16 %conv2, i16* @glob, align 2
ret void
}
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