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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-generic-linux-gnu -mattr=+avx < %s | FileCheck %s
define void @test(ptr %0, float %1) {
; CHECK-LABEL: define void @test(
; CHECK-SAME: ptr [[TMP0:%.*]], float [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[TMP0]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> <float 0.000000e+00, float poison>, float [[TMP3]], i32 1
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> <float poison, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float [[TMP3]], i32 0
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP1]], i32 0
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: br label %[[BB8:.*]]
; CHECK: [[BB8]]:
; CHECK-NEXT: [[TMP9:%.*]] = phi <4 x float> [ [[TMP15:%.*]], %[[BB8]] ], [ [[TMP5]], [[TMP2:%.*]] ]
; CHECK-NEXT: [[TMP10:%.*]] = phi <2 x float> [ [[TMP7]], %[[BB8]] ], [ [[TMP4]], [[TMP2]] ]
; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP10]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 0>
; CHECK-NEXT: [[TMP12:%.*]] = fmul <4 x float> [[TMP9]], zeroinitializer
; CHECK-NEXT: [[TMP13:%.*]] = fadd <4 x float> [[TMP12]], zeroinitializer
; CHECK-NEXT: store <4 x float> [[TMP13]], ptr [[TMP0]], align 16
; CHECK-NEXT: [[TMP14:%.*]] = fmul <4 x float> [[TMP11]], zeroinitializer
; CHECK-NEXT: [[TMP15]] = fadd <4 x float> [[TMP14]], zeroinitializer
; CHECK-NEXT: br label %[[BB8]]
;
%3 = load float, ptr %0, align 4
br label %4
4:
%5 = phi float [ %1, %4 ], [ %3, %2 ]
%6 = phi float [ %1, %4 ], [ 0.000000e+00, %2 ]
%7 = phi float [ %28, %4 ], [ 0.000000e+00, %2 ]
%8 = phi float [ %26, %4 ], [ 0.000000e+00, %2 ]
%9 = phi float [ %26, %4 ], [ %3, %2 ]
%10 = phi float [ %24, %4 ], [ 0.000000e+00, %2 ]
%11 = fmul float %9, 0.000000e+00
%12 = fadd float %11, 0.000000e+00
%13 = fmul float %7, 0.000000e+00
%14 = fadd float %13, 0.000000e+00
%15 = fmul float %10, 0.000000e+00
%16 = fadd float %15, 0.000000e+00
%17 = fmul float %8, 0.000000e+00
%18 = fadd float %17, 0.000000e+00
%19 = insertelement <4 x float> zeroinitializer, float %12, i64 0
%20 = insertelement <4 x float> %19, float %14, i64 1
%21 = insertelement <4 x float> %20, float %16, i64 2
%22 = insertelement <4 x float> %21, float %18, i64 3
store <4 x float> %22, ptr %0, align 16
%23 = fmul float %6, 0.000000e+00
%24 = fadd float %23, 0.000000e+00
%25 = fmul float %6, 0.000000e+00
%26 = fadd float %25, 0.000000e+00
%27 = fmul float %5, 0.000000e+00
%28 = fadd float %27, 0.000000e+00
br label %4
}
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