File: subreg-to-reg-6.ll

package info (click to toggle)
llvm 2.6-9.1
  • links: PTS
  • area: main
  • in suites: squeeze
  • size: 57,604 kB
  • ctags: 44,336
  • sloc: cpp: 344,766; sh: 12,407; ansic: 10,617; ada: 3,070; ml: 2,505; perl: 2,496; makefile: 1,426; pascal: 1,163; exp: 389; asm: 307; python: 298; objc: 260; lisp: 182; csh: 117; xml: 38; f90: 36; tcl: 20
file content (29 lines) | stat: -rw-r--r-- 514 bytes parent folder | download 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
 
; RUN: llvm-as < %s | llc -march=x86-64

define i64 @foo() nounwind {
entry:
	%t0 = load i32* null, align 8
	switch i32 %t0, label %bb65 [
		i32 16, label %bb
		i32 12, label %bb56
	]

bb:
	br label %bb65

bb56:
	unreachable

bb65:
	%a = phi i64 [ 0, %bb ], [ 0, %entry ]
	tail call void asm "", "{cx}"(i64 %a) nounwind
	%t15 = and i64 %a, 4294967295
	ret i64 %t15
}

define i64 @bar(i64 %t0) nounwind {
	call void asm "", "{cx}"(i64 0) nounwind
	%t1 = sub i64 0, %t0
	%t2 = and i64 %t1, 4294967295
	ret i64 %t2
}