File: predsimplify.reg4.ll

package info (click to toggle)
llvm 2.6-9.1
  • links: PTS
  • area: main
  • in suites: squeeze
  • size: 57,604 kB
  • ctags: 44,336
  • sloc: cpp: 344,766; sh: 12,407; ansic: 10,617; ada: 3,070; ml: 2,505; perl: 2,496; makefile: 1,426; pascal: 1,163; exp: 389; asm: 307; python: 298; objc: 260; lisp: 182; csh: 117; xml: 38; f90: 36; tcl: 20
file content (28 lines) | stat: -rw-r--r-- 712 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
; RUN: llvm-as < %s | opt -predsimplify -disable-output
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"

define void @f(i32 %x, i32 %y) {
entry:
	%tmp = icmp eq i32 %x, 10		; <i1> [#uses=1]
	%tmp.not = xor i1 %tmp, true		; <i1> [#uses=1]
	%tmp3 = icmp eq i32 %x, %y		; <i1> [#uses=1]
	%bothcond = and i1 %tmp.not, %tmp3		; <i1> [#uses=1]
	br i1 %bothcond, label %cond_true4, label %return
cond_true4:		; preds = %entry
	switch i32 %y, label %return [
		 i32 9, label %bb
		 i32 10, label %bb6
	]
bb:		; preds = %cond_true4
	call void @g( i32 9 )
	ret void
bb6:		; preds = %cond_true4
	call void @g( i32 10 )
	ret void
return:		; preds = %cond_true4, %entry
	ret void
}

declare void @g(i32)