1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
|
From: YOKOTA Hiroshi <yokota.hgml@gmail.com>
Date: Tue, 14 Sep 2021 23:51:04 +0900
Subject: Disable hardware acceleration support on armel
Forwarded: https://sourceforge.net/p/sevenzip/patches/369/
Use "__ARM_ARCH" to split "armel" and "armhf".
ARM v7 feature breaks ARM v5 compiler because the feature is not supported
by ARM v5 compiler.
__ARM_ARCH:
armel = 5
armhf = 7
Index: mame/3rdparty/lzma/C/Aes.c
===================================================================
--- mame.orig/3rdparty/lzma/C/Aes.c
+++ mame/3rdparty/lzma/C/Aes.c
@@ -56,6 +56,7 @@ static Byte InvS[256];
#ifdef MY_CPU_X86_OR_AMD64
#define USE_HW_AES
#elif defined(MY_CPU_ARM_OR_ARM64) && defined(MY_CPU_LE)
+ #if (__ARM_ARCH >= 7)
#if defined(__clang__)
#if (__clang_major__ >= 8) // fix that check
#define USE_HW_AES
@@ -69,6 +70,7 @@ static Byte InvS[256];
#define USE_HW_AES
#endif
#endif
+ #endif
#endif
#ifdef USE_HW_AES
Index: mame/3rdparty/lzma/C/AesOpt.c
===================================================================
--- mame.orig/3rdparty/lzma/C/AesOpt.c
+++ mame/3rdparty/lzma/C/AesOpt.c
@@ -556,6 +556,7 @@ VAES_COMPAT_STUB (AesCtr_Code_HW)
#elif defined(MY_CPU_ARM_OR_ARM64) && defined(MY_CPU_LE)
+ #if (__ARM_ARCH >= 7)
#if defined(__clang__)
#if (__clang_major__ >= 8) // fix that check
#define USE_HW_AES
@@ -569,6 +570,7 @@ VAES_COMPAT_STUB (AesCtr_Code_HW)
#define USE_HW_AES
#endif
#endif
+ #endif
#ifdef USE_HW_AES
Index: mame/3rdparty/lzma/C/Sha256.c
===================================================================
--- mame.orig/3rdparty/lzma/C/Sha256.c
+++ mame/3rdparty/lzma/C/Sha256.c
@@ -33,6 +33,7 @@ This code is based on public domain code
#endif
#endif
#elif defined(MY_CPU_ARM_OR_ARM64)
+ #if (__ARM_ARCH >= 7)
#ifdef _MSC_VER
#if _MSC_VER >= 1910
#define Z7_COMPILER_SHA256_SUPPORTED
@@ -46,6 +47,7 @@ This code is based on public domain code
#define Z7_COMPILER_SHA256_SUPPORTED
#endif
#endif
+ #endif
#endif
void Z7_FASTCALL Sha256_UpdateBlocks(UInt32 state[8], const Byte *data, size_t numBlocks);
Index: mame/3rdparty/lzma/C/Sha256Opt.c
===================================================================
--- mame.orig/3rdparty/lzma/C/Sha256Opt.c
+++ mame/3rdparty/lzma/C/Sha256Opt.c
@@ -204,6 +204,7 @@ void Z7_FASTCALL Sha256_UpdateBlocks_HW(
#elif defined(MY_CPU_ARM_OR_ARM64)
+ #if (__ARM_ARCH >= 7)
#if defined(__clang__)
#if (__clang_major__ >= 8) // fix that check
#define USE_HW_SHA
@@ -217,6 +218,7 @@ void Z7_FASTCALL Sha256_UpdateBlocks_HW(
#define USE_HW_SHA
#endif
#endif
+ #endif
#ifdef USE_HW_SHA
Index: mame/3rdparty/lzma/CPP/7zip/Crypto/MyAes.cpp
===================================================================
--- mame.orig/3rdparty/lzma/CPP/7zip/Crypto/MyAes.cpp
+++ mame/3rdparty/lzma/CPP/7zip/Crypto/MyAes.cpp
@@ -155,6 +155,7 @@ Z7_COM7F_IMF2(UInt32, CAesCtrCoder::Filt
#ifdef MY_CPU_X86_OR_AMD64
#define USE_HW_AES
#elif defined(MY_CPU_ARM_OR_ARM64) && defined(MY_CPU_LE)
+ #if (__ARM_ARCH >= 7)
#if defined(__clang__)
#if (__clang_major__ >= 8) // fix that check
#define USE_HW_AES
@@ -168,6 +169,7 @@ Z7_COM7F_IMF2(UInt32, CAesCtrCoder::Filt
#define USE_HW_AES
#endif
#endif
+ #endif
#endif
#ifdef USE_HW_AES
|
