1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141 5142 5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188 5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591 5592 5593 5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677 5678 5679 5680 5681 5682 5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757 5758 5759 5760 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968 5969 5970 5971 5972 5973 5974 5975 5976 5977 5978 5979 5980 5981 5982 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6002 6003 6004 6005 6006 6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 6071 6072 6073 6074 6075 6076 6077 6078 6079 6080 6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107 6108 6109 6110 6111 6112 6113 6114 6115 6116 6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139 6140 6141 6142 6143 6144 6145 6146 6147 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6361 6362 6363 6364 6365 6366 6367 6368 6369 6370 6371 6372 6373 6374 6375 6376 6377 6378 6379 6380 6381 6382 6383 6384 6385 6386 6387 6388 6389 6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401 6402 6403 6404 6405 6406 6407 6408 6409 6410 6411 6412 6413 6414 6415 6416 6417 6418 6419 6420 6421 6422 6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441 6442 6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483 6484 6485 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501 6502 6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 6561 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800 6801 6802 6803 6804 6805 6806 6807 6808 6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 6829 6830 6831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863 6864 6865 6866 6867 6868 6869 6870 6871 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888 6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 6925 6926 6927 6928 6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967 6968 6969 6970 6971 6972 6973 6974 6975 6976 6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129 7130 7131 7132 7133 7134 7135 7136 7137 7138 7139 7140 7141 7142 7143 7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185 7186 7187 7188 7189 7190 7191 7192 7193 7194 7195 7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209 7210 7211 7212 7213 7214 7215 7216 7217 7218 7219 7220 7221 7222 7223 7224 7225 7226 7227 7228 7229 7230 7231 7232 7233 7234 7235 7236 7237 7238 7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286 7287 7288 7289 7290 7291 7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304 7305 7306 7307 7308 7309 7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323 7324 7325 7326 7327 7328 7329 7330 7331 7332 7333 7334 7335 7336 7337 7338 7339 7340 7341 7342 7343 7344 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381 7382 7383 7384 7385 7386 7387 7388 7389 7390 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408 7409 7410 7411 7412 7413 7414 7415 7416 7417 7418 7419 7420 7421 7422 7423 7424 7425 7426 7427 7428 7429 7430 7431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7455 7456 7457 7458 7459 7460 7461 7462 7463 7464 7465 7466 7467 7468 7469 7470 7471 7472 7473 7474 7475 7476 7477 7478 7479 7480 7481 7482 7483 7484 7485 7486 7487 7488 7489 7490 7491 7492 7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505 7506 7507 7508 7509 7510 7511 7512 7513 7514 7515 7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 7529 7530 7531 7532 7533 7534 7535 7536 7537 7538 7539 7540 7541 7542 7543 7544 7545 7546 7547 7548 7549 7550 7551 7552 7553 7554 7555 7556 7557 7558 7559 7560 7561 7562 7563 7564 7565 7566 7567 7568 7569 7570 7571 7572 7573 7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 7584 7585 7586 7587 7588 7589 7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600 7601 7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618 7619 7620 7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706 7707 7708 7709 7710 7711 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724 7725 7726 7727 7728 7729 7730 7731 7732 7733 7734 7735 7736 7737 7738 7739 7740 7741 7742 7743 7744 7745 7746 7747 7748 7749 7750 7751 7752 7753 7754 7755 7756 7757 7758 7759 7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 7777 7778 7779 7780 7781 7782 7783 7784 7785 7786 7787 7788 7789 7790 7791 7792 7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825 7826 7827 7828 7829 7830 7831 7832 7833 7834 7835 7836 7837 7838 7839 7840 7841 7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866 7867 7868 7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897 7898 7899 7900 7901 7902 7903 7904 7905 7906 7907 7908 7909 7910 7911 7912 7913 7914 7915 7916 7917 7918 7919 7920 7921 7922 7923 7924 7925 7926 7927 7928 7929 7930 7931 7932 7933 7934 7935 7936 7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947 7948 7949 7950 7951 7952 7953 7954 7955 7956 7957 7958 7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969 7970 7971 7972 7973 7974 7975 7976 7977 7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 8088 8089 8090 8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121 8122 8123 8124 8125 8126 8127 8128 8129 8130 8131 8132 8133 8134 8135 8136 8137 8138 8139 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161 8162 8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197 8198 8199 8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212 8213 8214 8215 8216 8217 8218 8219 8220 8221 8222 8223 8224 8225 8226 8227 8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242 8243 8244 8245 8246 8247 8248 8249 8250 8251 8252 8253 8254 8255 8256 8257 8258 8259 8260 8261 8262 8263 8264 8265 8266 8267 8268 8269 8270 8271 8272 8273 8274 8275 8276 8277 8278 8279 8280 8281 8282 8283 8284 8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301 8302 8303 8304 8305 8306 8307 8308 8309 8310 8311 8312 8313 8314 8315 8316 8317 8318 8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330 8331 8332 8333 8334 8335 8336 8337 8338 8339 8340 8341 8342 8343 8344 8345 8346 8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359 8360 8361 8362 8363 8364 8365 8366 8367 8368 8369 8370 8371 8372 8373 8374 8375 8376 8377 8378 8379 8380 8381 8382 8383 8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 8420 8421 8422 8423 8424 8425 8426 8427 8428 8429 8430 8431 8432 8433 8434 8435 8436 8437 8438 8439 8440 8441 8442 8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 8454 8455 8456 8457 8458 8459 8460 8461 8462 8463 8464 8465 8466 8467 8468 8469 8470 8471 8472 8473 8474 8475 8476 8477 8478 8479 8480 8481 8482 8483 8484 8485 8486 8487 8488 8489 8490 8491 8492 8493 8494 8495 8496 8497 8498 8499 8500 8501 8502 8503 8504 8505 8506 8507 8508 8509 8510 8511 8512 8513 8514 8515 8516 8517 8518 8519 8520 8521 8522 8523 8524 8525 8526 8527 8528 8529 8530 8531 8532 8533 8534 8535 8536 8537 8538 8539 8540 8541 8542 8543 8544 8545 8546 8547 8548 8549 8550 8551 8552 8553 8554 8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590 8591 8592 8593 8594 8595 8596 8597 8598 8599 8600 8601 8602 8603 8604 8605 8606 8607 8608 8609 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627 8628 8629 8630 8631 8632 8633 8634 8635 8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656 8657 8658 8659 8660 8661 8662 8663 8664 8665 8666 8667 8668 8669 8670 8671 8672 8673 8674 8675 8676 8677 8678 8679 8680 8681 8682 8683 8684 8685 8686 8687 8688 8689 8690 8691 8692 8693 8694 8695 8696 8697 8698 8699 8700 8701 8702 8703 8704 8705 8706 8707 8708 8709 8710 8711 8712 8713 8714 8715 8716 8717 8718 8719 8720 8721 8722 8723 8724 8725 8726 8727 8728 8729 8730 8731 8732 8733 8734 8735 8736 8737 8738 8739 8740 8741 8742 8743 8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755 8756 8757 8758 8759 8760 8761 8762 8763 8764 8765 8766 8767 8768 8769 8770 8771 8772 8773 8774 8775 8776 8777 8778 8779 8780 8781 8782 8783 8784 8785 8786 8787 8788 8789 8790 8791 8792 8793 8794 8795 8796 8797 8798 8799 8800 8801 8802 8803 8804 8805 8806 8807 8808 8809 8810 8811 8812 8813 8814 8815 8816 8817 8818 8819 8820 8821 8822 8823 8824 8825 8826 8827 8828 8829 8830 8831 8832 8833 8834 8835 8836 8837 8838 8839 8840 8841 8842 8843 8844 8845 8846 8847 8848 8849 8850 8851 8852 8853 8854 8855 8856 8857 8858 8859 8860 8861 8862 8863 8864 8865 8866 8867 8868 8869 8870 8871 8872 8873 8874 8875 8876 8877 8878 8879 8880 8881 8882 8883 8884 8885 8886 8887 8888 8889 8890 8891 8892 8893 8894 8895 8896 8897 8898 8899 8900 8901 8902 8903 8904 8905 8906 8907 8908 8909 8910 8911 8912 8913 8914 8915 8916 8917 8918 8919 8920 8921 8922 8923 8924 8925 8926 8927 8928 8929 8930 8931 8932 8933 8934 8935 8936 8937 8938 8939 8940 8941 8942 8943 8944 8945 8946 8947 8948 8949 8950 8951 8952 8953 8954 8955 8956 8957 8958 8959 8960 8961 8962 8963 8964 8965 8966 8967 8968 8969 8970 8971 8972 8973 8974 8975 8976 8977 8978 8979 8980 8981 8982 8983 8984 8985 8986 8987 8988 8989 8990 8991 8992 8993 8994 8995 8996 8997 8998 8999 9000 9001 9002 9003 9004 9005 9006 9007 9008 9009 9010 9011 9012 9013 9014 9015 9016 9017 9018 9019 9020 9021 9022 9023 9024 9025 9026 9027 9028 9029 9030 9031 9032 9033 9034 9035 9036 9037 9038 9039 9040 9041 9042 9043 9044 9045 9046 9047 9048 9049 9050 9051 9052 9053 9054 9055 9056 9057 9058 9059 9060 9061 9062 9063 9064 9065 9066 9067 9068 9069 9070 9071 9072 9073 9074 9075 9076 9077 9078 9079 9080 9081 9082 9083 9084 9085 9086 9087 9088 9089 9090 9091 9092 9093 9094 9095 9096 9097 9098 9099 9100 9101 9102 9103 9104 9105 9106 9107 9108 9109 9110 9111 9112 9113 9114 9115 9116 9117 9118 9119 9120 9121 9122 9123 9124 9125 9126 9127 9128 9129 9130 9131 9132 9133 9134 9135 9136 9137 9138 9139 9140 9141 9142 9143 9144 9145 9146 9147 9148 9149 9150 9151 9152 9153 9154 9155 9156 9157 9158 9159 9160 9161 9162 9163 9164 9165 9166 9167 9168 9169 9170 9171 9172 9173 9174 9175 9176 9177 9178 9179 9180 9181 9182 9183 9184 9185 9186 9187 9188 9189 9190 9191 9192 9193 9194 9195 9196 9197 9198 9199 9200 9201 9202 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 9213 9214 9215 9216 9217 9218 9219 9220 9221 9222 9223 9224 9225 9226 9227 9228 9229 9230 9231 9232 9233 9234 9235 9236 9237 9238 9239 9240 9241 9242 9243 9244 9245 9246 9247 9248 9249 9250 9251 9252 9253 9254 9255 9256 9257 9258 9259 9260 9261 9262 9263 9264 9265 9266 9267 9268 9269 9270 9271 9272 9273 9274 9275 9276 9277 9278 9279 9280 9281 9282 9283 9284 9285 9286 9287 9288 9289 9290 9291 9292 9293 9294 9295 9296 9297 9298 9299 9300 9301 9302 9303 9304 9305 9306 9307 9308 9309 9310 9311 9312 9313 9314 9315 9316 9317 9318 9319 9320 9321 9322 9323 9324 9325 9326 9327 9328 9329 9330 9331 9332 9333 9334 9335 9336 9337 9338 9339 9340 9341 9342 9343 9344 9345 9346 9347 9348 9349 9350 9351 9352 9353 9354 9355 9356 9357 9358 9359 9360 9361 9362 9363 9364 9365 9366 9367 9368 9369 9370 9371 9372 9373 9374 9375 9376 9377 9378 9379 9380 9381 9382 9383 9384 9385 9386 9387 9388 9389 9390 9391 9392 9393 9394 9395 9396 9397 9398 9399 9400 9401 9402 9403 9404 9405 9406 9407 9408 9409 9410 9411 9412 9413 9414 9415 9416 9417 9418 9419 9420 9421 9422 9423 9424 9425 9426 9427 9428 9429 9430 9431 9432 9433 9434 9435 9436 9437 9438 9439 9440 9441 9442 9443 9444 9445 9446 9447 9448 9449 9450 9451 9452 9453 9454 9455 9456 9457 9458 9459 9460 9461 9462 9463 9464 9465 9466 9467 9468 9469 9470 9471 9472 9473 9474 9475 9476 9477 9478 9479 9480 9481 9482 9483 9484 9485 9486 9487 9488 9489 9490 9491 9492 9493 9494 9495 9496 9497 9498 9499 9500 9501 9502 9503 9504 9505 9506 9507 9508 9509 9510 9511 9512 9513 9514 9515 9516 9517 9518 9519 9520 9521 9522 9523 9524 9525 9526 9527 9528 9529 9530 9531 9532 9533 9534 9535 9536 9537 9538 9539 9540 9541 9542 9543 9544 9545 9546 9547 9548 9549 9550 9551 9552 9553 9554 9555 9556 9557 9558 9559 9560 9561 9562 9563 9564 9565 9566 9567 9568 9569 9570 9571 9572 9573 9574 9575 9576 9577 9578 9579 9580 9581 9582 9583 9584 9585 9586 9587 9588 9589 9590 9591 9592 9593 9594 9595 9596 9597 9598 9599 9600 9601 9602 9603 9604 9605 9606 9607 9608 9609 9610 9611 9612 9613 9614 9615 9616 9617 9618 9619 9620 9621 9622 9623 9624 9625 9626 9627 9628 9629 9630 9631 9632 9633 9634 9635 9636 9637 9638 9639 9640 9641 9642 9643 9644 9645 9646 9647 9648 9649 9650 9651 9652 9653 9654 9655 9656 9657 9658 9659 9660 9661 9662 9663 9664 9665 9666 9667 9668 9669 9670 9671 9672 9673 9674 9675 9676 9677 9678 9679 9680 9681 9682 9683 9684 9685 9686 9687 9688 9689 9690 9691 9692 9693 9694 9695 9696 9697 9698 9699 9700 9701 9702 9703 9704 9705 9706 9707 9708 9709 9710 9711 9712 9713 9714 9715 9716 9717 9718 9719 9720 9721 9722 9723 9724 9725 9726 9727 9728 9729 9730 9731 9732 9733 9734 9735 9736 9737 9738 9739 9740 9741 9742 9743 9744 9745 9746 9747 9748 9749 9750 9751 9752 9753 9754 9755 9756 9757 9758 9759 9760 9761 9762 9763 9764 9765 9766 9767 9768 9769 9770 9771 9772 9773 9774 9775 9776 9777 9778 9779 9780 9781 9782 9783 9784 9785 9786 9787 9788 9789 9790 9791 9792 9793 9794 9795 9796 9797 9798 9799 9800 9801 9802 9803 9804 9805 9806 9807 9808 9809 9810 9811 9812 9813 9814 9815 9816 9817 9818 9819 9820 9821 9822 9823 9824 9825 9826 9827 9828 9829 9830 9831 9832 9833 9834 9835 9836 9837 9838 9839 9840 9841 9842 9843 9844 9845 9846 9847 9848 9849 9850 9851 9852 9853 9854 9855 9856 9857 9858 9859 9860 9861 9862 9863 9864 9865 9866 9867 9868 9869 9870 9871 9872 9873 9874 9875 9876 9877 9878 9879 9880 9881 9882 9883 9884 9885 9886 9887 9888 9889 9890 9891 9892 9893 9894 9895 9896 9897 9898 9899 9900 9901 9902 9903 9904 9905 9906 9907 9908 9909 9910 9911 9912 9913 9914 9915 9916 9917 9918 9919 9920 9921 9922 9923 9924 9925 9926 9927 9928 9929 9930 9931 9932 9933 9934 9935 9936 9937 9938 9939 9940 9941 9942 9943 9944 9945 9946 9947 9948 9949 9950 9951 9952 9953 9954 9955 9956 9957 9958 9959 9960 9961 9962 9963 9964 9965 9966 9967 9968 9969 9970 9971 9972 9973 9974 9975 9976 9977 9978 9979 9980 9981 9982 9983 9984 9985 9986 9987 9988 9989 9990 9991 9992 9993 9994 9995 9996 9997 9998 9999 10000 10001 10002 10003 10004 10005 10006 10007 10008 10009 10010 10011 10012 10013 10014 10015 10016 10017 10018 10019 10020 10021 10022 10023 10024 10025 10026 10027 10028 10029 10030 10031 10032 10033 10034 10035 10036 10037 10038 10039 10040 10041 10042 10043 10044 10045 10046 10047 10048 10049 10050 10051 10052 10053 10054 10055 10056 10057 10058 10059 10060 10061 10062 10063 10064 10065 10066 10067 10068 10069 10070 10071 10072 10073 10074 10075 10076 10077 10078 10079 10080 10081 10082 10083 10084 10085 10086 10087 10088 10089 10090 10091 10092 10093 10094 10095 10096 10097 10098 10099 10100 10101 10102 10103 10104 10105 10106 10107 10108 10109 10110 10111 10112 10113 10114 10115 10116 10117 10118 10119 10120 10121 10122 10123 10124 10125 10126 10127 10128 10129 10130 10131 10132 10133 10134 10135 10136 10137 10138 10139 10140 10141 10142 10143 10144 10145 10146 10147 10148 10149 10150 10151 10152 10153 10154 10155 10156 10157 10158 10159 10160 10161 10162 10163 10164 10165 10166 10167 10168 10169 10170 10171 10172 10173 10174 10175 10176 10177 10178 10179 10180 10181 10182 10183 10184 10185 10186 10187 10188 10189 10190 10191 10192 10193 10194 10195 10196 10197 10198 10199 10200 10201 10202 10203 10204 10205 10206 10207 10208 10209 10210 10211 10212 10213 10214 10215 10216 10217 10218 10219 10220 10221 10222 10223 10224 10225 10226 10227 10228 10229 10230 10231 10232 10233 10234 10235 10236 10237 10238 10239 10240 10241 10242 10243 10244 10245 10246 10247 10248 10249 10250 10251 10252 10253 10254 10255 10256 10257 10258 10259 10260 10261 10262 10263 10264 10265 10266 10267 10268 10269 10270 10271 10272 10273 10274 10275 10276 10277 10278 10279 10280 10281 10282 10283 10284 10285 10286 10287 10288 10289 10290 10291 10292 10293 10294 10295 10296 10297 10298 10299 10300 10301 10302 10303 10304 10305 10306 10307 10308 10309 10310 10311 10312 10313 10314 10315 10316 10317 10318 10319 10320 10321 10322 10323 10324 10325 10326 10327 10328 10329 10330 10331 10332 10333 10334 10335 10336 10337 10338 10339 10340 10341 10342 10343 10344 10345 10346 10347 10348 10349 10350 10351 10352 10353 10354 10355 10356 10357 10358 10359 10360 10361 10362 10363 10364 10365 10366 10367 10368 10369 10370 10371 10372 10373 10374 10375 10376 10377 10378 10379 10380 10381 10382 10383 10384 10385 10386 10387 10388 10389 10390 10391 10392 10393 10394 10395 10396 10397 10398 10399 10400 10401 10402 10403 10404 10405 10406 10407 10408 10409 10410 10411 10412 10413 10414 10415 10416 10417 10418 10419 10420 10421 10422 10423 10424 10425 10426 10427 10428 10429 10430 10431 10432 10433 10434 10435 10436 10437 10438 10439 10440 10441 10442 10443 10444 10445 10446 10447 10448 10449 10450 10451 10452 10453 10454 10455 10456 10457 10458 10459 10460 10461 10462 10463 10464 10465 10466 10467 10468 10469 10470 10471 10472 10473 10474 10475 10476 10477 10478 10479 10480 10481 10482 10483 10484 10485 10486 10487 10488 10489 10490 10491 10492 10493 10494 10495 10496 10497 10498 10499 10500 10501 10502 10503 10504 10505 10506 10507 10508 10509 10510 10511 10512 10513 10514 10515 10516 10517 10518 10519 10520 10521 10522 10523 10524 10525 10526 10527 10528 10529 10530 10531 10532 10533 10534 10535 10536 10537 10538 10539 10540 10541 10542 10543 10544 10545 10546 10547 10548 10549 10550 10551 10552 10553 10554 10555 10556 10557 10558 10559 10560 10561 10562 10563 10564 10565 10566 10567 10568 10569 10570 10571 10572 10573 10574 10575 10576 10577 10578 10579 10580 10581 10582 10583 10584 10585 10586 10587 10588 10589 10590 10591 10592 10593 10594 10595 10596 10597 10598 10599 10600 10601 10602 10603 10604 10605 10606 10607 10608 10609 10610 10611 10612 10613 10614 10615 10616 10617 10618 10619 10620 10621 10622 10623 10624 10625 10626 10627 10628 10629 10630 10631 10632 10633 10634 10635 10636 10637 10638 10639 10640 10641 10642 10643 10644 10645 10646 10647 10648 10649 10650 10651 10652 10653 10654 10655 10656 10657 10658 10659 10660 10661 10662 10663 10664 10665 10666 10667 10668 10669 10670 10671 10672 10673 10674 10675 10676 10677 10678 10679 10680 10681 10682 10683 10684 10685 10686 10687 10688 10689 10690 10691 10692 10693 10694 10695 10696 10697 10698 10699 10700 10701 10702 10703 10704 10705 10706 10707 10708 10709 10710 10711 10712 10713 10714 10715 10716 10717 10718 10719 10720 10721 10722 10723 10724 10725 10726 10727 10728 10729 10730 10731 10732 10733 10734 10735 10736 10737 10738 10739 10740 10741 10742 10743 10744 10745 10746 10747 10748 10749 10750 10751 10752 10753 10754 10755 10756 10757 10758 10759 10760 10761 10762 10763 10764 10765 10766 10767 10768 10769 10770 10771 10772 10773 10774 10775 10776 10777 10778 10779 10780 10781 10782 10783 10784 10785 10786 10787 10788 10789 10790 10791 10792 10793 10794 10795 10796 10797 10798 10799 10800 10801 10802 10803 10804 10805 10806 10807 10808 10809 10810 10811 10812 10813 10814 10815 10816 10817 10818 10819 10820 10821 10822 10823 10824 10825 10826 10827 10828 10829 10830 10831 10832 10833 10834 10835 10836 10837 10838 10839 10840 10841 10842 10843 10844 10845 10846 10847 10848 10849 10850 10851 10852 10853 10854 10855 10856 10857 10858 10859 10860 10861 10862 10863 10864 10865 10866 10867 10868 10869 10870 10871 10872 10873 10874 10875 10876 10877 10878 10879 10880 10881 10882 10883 10884 10885 10886 10887 10888 10889 10890 10891 10892 10893 10894 10895 10896 10897 10898 10899 10900 10901 10902 10903 10904 10905 10906 10907 10908 10909 10910 10911 10912 10913 10914 10915 10916 10917 10918 10919 10920 10921 10922 10923 10924 10925 10926 10927 10928 10929 10930 10931 10932 10933 10934 10935 10936 10937 10938 10939 10940 10941 10942 10943 10944 10945 10946 10947 10948 10949 10950 10951 10952 10953 10954 10955 10956 10957 10958 10959 10960 10961 10962 10963 10964 10965 10966 10967 10968 10969 10970 10971 10972 10973 10974 10975 10976 10977 10978 10979 10980 10981 10982 10983 10984 10985 10986 10987 10988 10989 10990 10991 10992 10993 10994 10995 10996 10997 10998 10999 11000 11001 11002 11003 11004 11005 11006 11007 11008 11009 11010 11011 11012 11013 11014 11015 11016 11017 11018 11019 11020 11021 11022 11023 11024 11025 11026 11027 11028 11029 11030 11031 11032 11033 11034 11035 11036 11037 11038 11039 11040 11041 11042 11043 11044 11045 11046 11047 11048 11049 11050 11051 11052 11053 11054 11055 11056 11057 11058 11059 11060 11061 11062 11063 11064 11065 11066 11067 11068 11069 11070 11071 11072 11073 11074 11075 11076 11077 11078 11079 11080 11081 11082 11083 11084 11085 11086 11087 11088 11089 11090 11091 11092 11093 11094 11095 11096 11097 11098 11099 11100 11101 11102 11103 11104 11105 11106 11107 11108 11109 11110 11111 11112 11113 11114 11115 11116 11117 11118 11119 11120 11121 11122 11123 11124 11125 11126 11127 11128 11129 11130 11131 11132 11133 11134 11135 11136 11137 11138 11139 11140 11141 11142 11143 11144 11145 11146 11147 11148 11149 11150 11151 11152 11153 11154 11155 11156 11157 11158 11159 11160 11161 11162 11163 11164 11165 11166 11167 11168 11169 11170 11171 11172 11173 11174 11175 11176 11177 11178 11179 11180 11181 11182 11183 11184 11185 11186 11187 11188 11189 11190 11191 11192 11193 11194 11195 11196 11197 11198 11199 11200 11201 11202 11203 11204 11205 11206 11207 11208 11209 11210 11211 11212 11213 11214 11215 11216 11217 11218 11219 11220 11221 11222 11223 11224 11225 11226 11227 11228 11229 11230 11231 11232 11233 11234 11235 11236 11237 11238 11239 11240 11241 11242 11243 11244 11245 11246 11247 11248 11249 11250 11251 11252 11253 11254 11255 11256 11257 11258 11259 11260 11261 11262 11263 11264 11265 11266 11267 11268 11269 11270 11271 11272 11273 11274 11275 11276 11277 11278 11279 11280 11281 11282 11283 11284 11285 11286 11287 11288 11289 11290 11291 11292 11293 11294 11295 11296 11297 11298 11299 11300 11301 11302 11303 11304 11305 11306 11307 11308 11309 11310 11311 11312 11313 11314 11315 11316 11317 11318 11319 11320 11321 11322 11323 11324 11325 11326 11327 11328 11329 11330 11331 11332 11333 11334 11335 11336 11337 11338 11339 11340 11341 11342 11343 11344 11345 11346 11347 11348 11349 11350 11351 11352 11353 11354 11355 11356 11357 11358 11359 11360 11361 11362 11363 11364 11365 11366 11367 11368 11369 11370 11371 11372 11373 11374 11375 11376 11377 11378 11379 11380 11381 11382 11383 11384 11385 11386 11387 11388 11389 11390 11391 11392 11393 11394 11395 11396 11397 11398 11399 11400 11401 11402 11403 11404 11405 11406 11407 11408 11409 11410 11411 11412 11413 11414 11415 11416 11417 11418 11419 11420 11421 11422 11423 11424 11425 11426 11427 11428 11429 11430 11431 11432 11433 11434 11435 11436 11437 11438 11439 11440 11441 11442 11443 11444 11445 11446 11447 11448 11449 11450 11451 11452 11453 11454 11455 11456 11457 11458 11459 11460 11461 11462 11463 11464 11465 11466 11467 11468 11469 11470 11471 11472 11473 11474 11475 11476 11477 11478 11479 11480 11481 11482 11483 11484 11485 11486 11487 11488 11489 11490 11491 11492 11493 11494 11495 11496 11497 11498 11499 11500 11501 11502 11503 11504 11505 11506 11507 11508 11509 11510 11511 11512 11513 11514 11515 11516 11517 11518 11519 11520 11521 11522 11523 11524 11525 11526 11527 11528 11529 11530 11531 11532 11533 11534 11535 11536 11537 11538 11539 11540 11541 11542 11543 11544 11545 11546 11547 11548 11549 11550 11551 11552 11553 11554 11555 11556 11557 11558 11559 11560 11561 11562 11563 11564 11565 11566 11567 11568 11569 11570 11571 11572 11573 11574 11575 11576 11577 11578 11579 11580 11581 11582 11583 11584 11585 11586 11587 11588 11589 11590 11591 11592 11593 11594 11595 11596 11597 11598 11599 11600 11601 11602 11603 11604 11605 11606 11607 11608 11609 11610 11611 11612 11613 11614 11615 11616 11617 11618 11619 11620 11621 11622 11623 11624 11625 11626 11627 11628 11629 11630 11631 11632 11633 11634 11635 11636 11637 11638 11639 11640 11641 11642 11643 11644 11645 11646 11647 11648 11649 11650 11651 11652 11653 11654 11655 11656 11657 11658 11659 11660 11661 11662 11663 11664 11665 11666 11667 11668 11669 11670 11671 11672 11673 11674 11675 11676 11677 11678 11679 11680 11681 11682 11683 11684 11685 11686 11687 11688 11689 11690 11691 11692 11693 11694 11695 11696 11697 11698 11699 11700 11701 11702 11703 11704 11705 11706 11707 11708 11709 11710 11711 11712 11713 11714 11715 11716 11717 11718 11719 11720 11721 11722 11723 11724 11725 11726 11727 11728 11729 11730 11731 11732 11733 11734 11735 11736 11737 11738 11739 11740 11741 11742 11743 11744 11745 11746 11747 11748 11749 11750 11751 11752 11753 11754 11755 11756 11757 11758 11759 11760 11761 11762 11763 11764 11765 11766 11767 11768 11769 11770 11771 11772 11773 11774 11775 11776 11777 11778 11779 11780 11781 11782 11783 11784 11785 11786 11787 11788 11789 11790 11791 11792 11793 11794 11795 11796 11797 11798 11799 11800 11801 11802 11803 11804 11805 11806 11807 11808 11809 11810 11811 11812 11813 11814 11815 11816 11817 11818 11819 11820 11821 11822 11823 11824 11825 11826 11827 11828 11829 11830 11831 11832 11833 11834 11835 11836 11837 11838 11839 11840 11841 11842 11843 11844 11845 11846 11847 11848 11849 11850 11851 11852 11853 11854 11855 11856 11857 11858 11859 11860 11861 11862 11863 11864 11865 11866 11867 11868 11869 11870 11871 11872 11873 11874 11875 11876 11877 11878 11879 11880 11881 11882 11883 11884 11885 11886 11887 11888 11889 11890 11891 11892 11893 11894 11895 11896 11897 11898 11899 11900 11901 11902 11903 11904 11905 11906 11907 11908 11909 11910 11911 11912 11913 11914 11915 11916 11917 11918 11919 11920 11921 11922 11923 11924 11925 11926 11927 11928 11929 11930 11931 11932 11933 11934 11935 11936 11937 11938 11939 11940 11941 11942 11943 11944 11945 11946 11947 11948 11949 11950 11951 11952 11953 11954 11955 11956 11957 11958 11959 11960 11961 11962 11963 11964 11965 11966 11967 11968 11969 11970 11971 11972 11973 11974 11975 11976 11977 11978 11979 11980 11981 11982 11983 11984 11985 11986 11987 11988 11989 11990 11991 11992 11993 11994 11995 11996 11997 11998 11999 12000 12001 12002 12003 12004 12005 12006 12007 12008 12009 12010 12011 12012 12013 12014 12015 12016 12017 12018 12019 12020 12021 12022 12023 12024 12025 12026 12027 12028 12029 12030 12031 12032 12033 12034 12035 12036 12037 12038 12039 12040 12041 12042 12043 12044 12045 12046 12047 12048 12049 12050 12051 12052 12053 12054 12055 12056 12057 12058 12059 12060 12061 12062 12063 12064 12065 12066 12067 12068 12069 12070 12071 12072 12073 12074 12075 12076 12077 12078 12079 12080 12081 12082 12083 12084 12085 12086 12087 12088 12089 12090 12091 12092 12093 12094 12095 12096 12097 12098 12099 12100 12101 12102 12103 12104 12105 12106 12107 12108 12109 12110 12111 12112 12113 12114 12115 12116 12117 12118 12119 12120 12121 12122 12123 12124 12125 12126 12127 12128 12129 12130 12131 12132 12133 12134 12135 12136 12137 12138 12139 12140 12141 12142 12143 12144 12145 12146 12147 12148 12149 12150 12151 12152 12153 12154 12155 12156 12157 12158 12159 12160 12161 12162 12163 12164 12165 12166 12167 12168 12169 12170 12171 12172 12173 12174 12175 12176 12177 12178 12179 12180 12181 12182 12183 12184 12185 12186 12187 12188 12189 12190 12191 12192 12193 12194 12195 12196 12197 12198 12199 12200 12201 12202 12203 12204 12205 12206 12207 12208 12209 12210 12211 12212 12213 12214 12215 12216 12217 12218 12219 12220 12221 12222 12223 12224 12225 12226 12227 12228 12229 12230 12231 12232 12233 12234 12235 12236 12237 12238 12239 12240 12241 12242 12243 12244 12245 12246 12247 12248 12249 12250 12251 12252 12253 12254 12255 12256 12257 12258 12259 12260 12261 12262 12263 12264 12265 12266 12267 12268 12269 12270 12271 12272 12273 12274 12275 12276 12277 12278 12279 12280 12281 12282 12283 12284 12285 12286 12287 12288 12289 12290 12291 12292 12293 12294 12295 12296 12297 12298 12299 12300 12301 12302 12303 12304 12305 12306 12307 12308 12309 12310 12311 12312 12313 12314 12315 12316 12317 12318 12319 12320 12321 12322 12323 12324 12325 12326 12327 12328 12329 12330 12331 12332 12333 12334 12335 12336 12337 12338 12339 12340 12341 12342 12343 12344 12345 12346 12347 12348 12349 12350 12351 12352 12353 12354 12355 12356 12357 12358 12359 12360 12361 12362 12363 12364 12365 12366 12367 12368 12369 12370 12371 12372 12373 12374 12375 12376 12377 12378 12379 12380 12381 12382 12383 12384 12385 12386 12387 12388 12389 12390 12391 12392 12393 12394 12395 12396 12397 12398 12399 12400 12401 12402 12403 12404 12405 12406 12407 12408 12409 12410 12411 12412 12413 12414 12415 12416 12417 12418 12419 12420 12421 12422 12423 12424 12425 12426 12427 12428 12429 12430 12431 12432 12433 12434 12435 12436 12437 12438 12439 12440 12441 12442 12443 12444 12445 12446 12447 12448 12449 12450 12451 12452 12453 12454 12455 12456 12457 12458 12459 12460 12461 12462 12463 12464 12465 12466 12467 12468 12469 12470 12471 12472 12473 12474 12475 12476 12477 12478 12479 12480 12481 12482 12483 12484 12485 12486 12487 12488 12489 12490 12491 12492 12493 12494 12495 12496 12497 12498 12499 12500 12501 12502 12503 12504 12505 12506 12507 12508 12509 12510 12511 12512 12513 12514 12515 12516 12517 12518 12519 12520 12521 12522 12523 12524 12525 12526 12527 12528 12529 12530 12531 12532 12533 12534 12535 12536 12537 12538 12539 12540 12541 12542 12543 12544 12545 12546 12547 12548 12549 12550 12551 12552 12553 12554 12555 12556 12557 12558 12559 12560 12561 12562 12563 12564 12565 12566 12567 12568 12569 12570 12571 12572 12573 12574 12575 12576 12577 12578 12579 12580 12581 12582 12583 12584 12585 12586 12587 12588 12589 12590 12591 12592 12593 12594 12595 12596 12597 12598 12599 12600 12601 12602 12603 12604 12605 12606 12607 12608 12609 12610 12611 12612 12613 12614 12615 12616 12617 12618 12619 12620 12621 12622 12623 12624 12625 12626 12627 12628 12629 12630 12631 12632 12633 12634 12635 12636 12637 12638 12639 12640 12641 12642 12643 12644 12645 12646 12647 12648 12649 12650 12651 12652 12653 12654 12655 12656 12657 12658 12659 12660 12661 12662 12663 12664 12665 12666 12667 12668 12669 12670 12671 12672 12673 12674 12675 12676 12677 12678 12679 12680 12681 12682 12683 12684 12685 12686 12687 12688 12689 12690 12691 12692 12693 12694 12695 12696 12697 12698 12699 12700 12701 12702 12703 12704 12705 12706 12707 12708 12709 12710 12711 12712 12713 12714 12715 12716 12717 12718 12719 12720 12721 12722 12723 12724 12725 12726 12727 12728 12729 12730 12731 12732 12733 12734 12735 12736 12737 12738 12739 12740 12741 12742 12743 12744 12745 12746 12747 12748 12749 12750 12751 12752 12753 12754 12755 12756 12757 12758 12759 12760 12761 12762 12763 12764 12765 12766 12767 12768 12769 12770 12771 12772 12773 12774 12775 12776 12777 12778 12779 12780 12781 12782 12783 12784 12785 12786 12787 12788 12789 12790 12791 12792 12793 12794 12795 12796 12797 12798 12799 12800 12801 12802 12803 12804 12805 12806 12807 12808 12809 12810 12811 12812 12813 12814 12815 12816 12817 12818 12819 12820 12821 12822 12823 12824 12825 12826 12827 12828 12829 12830 12831 12832 12833 12834 12835 12836 12837 12838 12839 12840 12841 12842 12843 12844 12845 12846 12847 12848 12849 12850 12851 12852 12853 12854 12855 12856 12857 12858 12859 12860 12861 12862 12863 12864 12865 12866 12867 12868 12869 12870 12871 12872 12873 12874 12875 12876 12877 12878 12879 12880 12881 12882 12883 12884 12885 12886 12887 12888 12889 12890 12891 12892 12893 12894 12895 12896 12897 12898 12899 12900 12901 12902 12903 12904 12905 12906 12907 12908 12909 12910 12911 12912 12913 12914 12915 12916 12917 12918 12919 12920 12921 12922 12923 12924 12925 12926 12927 12928 12929 12930 12931 12932 12933 12934 12935 12936 12937 12938 12939 12940 12941 12942 12943 12944 12945 12946 12947 12948 12949 12950 12951 12952 12953 12954 12955 12956 12957 12958 12959 12960 12961 12962 12963 12964 12965 12966 12967 12968 12969 12970 12971 12972 12973 12974 12975 12976 12977 12978 12979 12980 12981 12982 12983 12984 12985 12986 12987 12988 12989 12990 12991 12992 12993 12994 12995 12996 12997 12998 12999 13000 13001 13002 13003 13004 13005 13006 13007 13008 13009 13010 13011 13012 13013 13014 13015 13016 13017 13018 13019 13020 13021 13022 13023 13024 13025 13026 13027 13028 13029 13030 13031 13032 13033 13034 13035 13036 13037 13038 13039 13040 13041 13042 13043 13044 13045 13046 13047 13048 13049 13050 13051 13052 13053 13054 13055 13056 13057 13058 13059 13060 13061 13062 13063 13064 13065 13066 13067 13068 13069 13070 13071 13072 13073 13074 13075 13076 13077 13078 13079 13080 13081 13082 13083 13084 13085 13086 13087 13088 13089 13090 13091 13092 13093 13094 13095 13096 13097 13098 13099 13100 13101 13102 13103 13104 13105 13106 13107 13108 13109 13110 13111 13112 13113 13114 13115 13116 13117 13118 13119 13120 13121 13122 13123 13124 13125 13126 13127 13128 13129 13130 13131 13132 13133 13134 13135 13136 13137 13138 13139 13140 13141 13142 13143 13144 13145 13146 13147 13148 13149 13150 13151 13152 13153 13154 13155 13156 13157 13158 13159 13160 13161 13162 13163 13164 13165 13166 13167 13168 13169 13170 13171 13172 13173 13174 13175 13176 13177 13178 13179 13180 13181 13182 13183 13184 13185 13186 13187 13188 13189 13190 13191 13192 13193 13194 13195 13196 13197 13198 13199 13200 13201 13202 13203 13204 13205 13206 13207 13208 13209 13210 13211 13212 13213 13214 13215 13216 13217 13218 13219 13220 13221 13222 13223 13224 13225 13226 13227 13228 13229 13230 13231 13232 13233 13234 13235 13236 13237 13238 13239 13240 13241 13242 13243 13244 13245 13246 13247 13248 13249 13250 13251 13252 13253 13254 13255 13256 13257 13258 13259 13260 13261 13262 13263 13264 13265 13266 13267 13268 13269 13270 13271 13272 13273 13274 13275 13276 13277 13278 13279 13280 13281 13282 13283 13284 13285 13286 13287 13288 13289 13290 13291 13292 13293 13294 13295 13296 13297 13298 13299 13300 13301 13302 13303 13304 13305 13306 13307 13308 13309 13310 13311 13312 13313 13314 13315 13316 13317 13318 13319 13320 13321 13322 13323 13324 13325 13326 13327 13328 13329 13330 13331 13332 13333 13334 13335 13336 13337 13338 13339 13340 13341 13342 13343 13344 13345 13346 13347 13348 13349 13350 13351 13352 13353 13354 13355 13356 13357 13358 13359 13360 13361 13362 13363 13364 13365 13366 13367 13368 13369 13370 13371 13372 13373 13374 13375 13376 13377 13378 13379 13380 13381 13382 13383 13384 13385 13386 13387 13388 13389 13390 13391 13392 13393 13394 13395 13396 13397 13398 13399 13400 13401 13402 13403 13404 13405 13406 13407 13408 13409 13410 13411 13412 13413 13414 13415 13416 13417 13418 13419 13420 13421 13422 13423 13424 13425 13426 13427 13428 13429 13430 13431 13432 13433 13434 13435 13436 13437 13438 13439 13440 13441 13442 13443 13444 13445 13446 13447 13448 13449 13450 13451 13452 13453 13454 13455 13456 13457 13458 13459 13460 13461 13462 13463 13464 13465 13466 13467 13468 13469 13470 13471 13472 13473 13474 13475 13476 13477 13478 13479 13480 13481 13482 13483 13484 13485 13486 13487 13488 13489 13490 13491 13492 13493 13494 13495 13496 13497 13498 13499 13500 13501 13502 13503 13504 13505 13506 13507 13508 13509 13510 13511 13512 13513 13514 13515 13516 13517 13518 13519 13520 13521 13522 13523 13524 13525 13526 13527 13528 13529 13530 13531 13532 13533 13534 13535 13536 13537 13538 13539 13540 13541 13542 13543 13544 13545 13546 13547 13548 13549 13550 13551 13552 13553 13554 13555 13556 13557 13558 13559 13560 13561 13562 13563 13564 13565 13566 13567 13568 13569 13570 13571 13572 13573 13574 13575 13576 13577 13578 13579 13580 13581 13582 13583 13584 13585 13586 13587 13588 13589 13590 13591 13592 13593 13594 13595 13596 13597 13598 13599 13600 13601 13602 13603 13604 13605 13606 13607 13608 13609 13610 13611 13612 13613 13614 13615 13616 13617 13618 13619 13620 13621 13622 13623 13624 13625 13626 13627 13628 13629 13630 13631 13632 13633 13634 13635 13636 13637 13638 13639 13640 13641 13642 13643 13644 13645 13646 13647 13648 13649 13650 13651 13652 13653 13654 13655 13656 13657 13658 13659 13660 13661 13662 13663 13664 13665 13666 13667 13668 13669 13670 13671 13672 13673 13674 13675 13676 13677 13678 13679 13680 13681 13682 13683 13684 13685 13686 13687 13688 13689 13690 13691 13692 13693 13694 13695 13696 13697 13698 13699 13700 13701 13702 13703 13704 13705 13706 13707 13708 13709 13710 13711 13712 13713 13714 13715 13716 13717 13718 13719 13720 13721 13722 13723 13724 13725 13726 13727 13728 13729 13730 13731 13732 13733 13734 13735 13736 13737 13738 13739 13740 13741 13742 13743 13744 13745 13746 13747 13748 13749 13750 13751 13752 13753 13754 13755 13756 13757 13758 13759 13760 13761 13762 13763 13764 13765 13766 13767 13768 13769 13770 13771 13772 13773 13774 13775 13776 13777 13778 13779 13780 13781 13782 13783 13784 13785 13786 13787 13788 13789 13790 13791 13792 13793 13794 13795 13796 13797 13798 13799 13800 13801 13802 13803 13804 13805 13806 13807 13808 13809 13810 13811 13812 13813 13814 13815 13816 13817 13818 13819 13820 13821 13822 13823 13824 13825 13826 13827 13828 13829 13830 13831 13832 13833 13834 13835 13836 13837 13838 13839 13840 13841 13842 13843 13844 13845 13846 13847 13848 13849 13850 13851 13852 13853 13854 13855 13856 13857 13858 13859 13860 13861 13862 13863 13864 13865 13866 13867 13868 13869 13870 13871 13872 13873 13874 13875 13876 13877 13878 13879 13880 13881 13882 13883 13884 13885 13886 13887 13888 13889 13890 13891 13892 13893 13894 13895 13896 13897 13898 13899 13900 13901 13902 13903 13904 13905 13906 13907 13908 13909 13910 13911 13912 13913 13914 13915 13916 13917 13918 13919 13920 13921 13922 13923 13924 13925 13926 13927 13928 13929 13930 13931 13932 13933 13934 13935 13936 13937 13938 13939 13940 13941 13942 13943 13944 13945 13946 13947 13948 13949 13950 13951 13952 13953 13954 13955 13956 13957 13958 13959 13960 13961 13962 13963 13964 13965 13966 13967 13968 13969 13970 13971 13972 13973 13974 13975 13976 13977 13978 13979 13980 13981 13982 13983 13984 13985 13986 13987 13988 13989 13990 13991 13992 13993 13994 13995 13996 13997 13998 13999 14000 14001 14002 14003 14004 14005 14006 14007 14008 14009 14010 14011 14012 14013 14014 14015 14016 14017 14018 14019 14020 14021 14022 14023 14024 14025 14026 14027 14028 14029 14030 14031 14032 14033 14034 14035 14036 14037 14038 14039 14040 14041 14042 14043 14044 14045 14046 14047 14048 14049 14050 14051 14052 14053 14054 14055 14056 14057 14058 14059 14060 14061 14062 14063 14064 14065 14066 14067 14068 14069 14070 14071 14072 14073 14074 14075 14076 14077 14078 14079 14080 14081 14082 14083 14084 14085 14086 14087 14088 14089 14090 14091 14092 14093 14094 14095 14096 14097 14098 14099 14100 14101 14102 14103 14104 14105 14106 14107 14108 14109 14110 14111 14112 14113 14114 14115 14116 14117 14118 14119 14120 14121 14122 14123 14124 14125 14126 14127 14128 14129 14130 14131 14132 14133 14134 14135 14136 14137 14138 14139 14140 14141 14142 14143 14144 14145 14146 14147 14148 14149 14150 14151 14152 14153 14154 14155 14156 14157 14158 14159 14160 14161 14162 14163 14164 14165 14166 14167 14168 14169 14170 14171 14172 14173 14174 14175 14176 14177 14178 14179 14180 14181 14182 14183 14184 14185 14186 14187 14188 14189 14190 14191 14192 14193 14194 14195 14196 14197 14198 14199 14200 14201 14202 14203 14204 14205 14206 14207 14208 14209 14210 14211 14212 14213 14214 14215 14216 14217 14218 14219 14220 14221 14222 14223 14224 14225 14226 14227 14228 14229 14230 14231 14232 14233 14234 14235 14236 14237 14238 14239 14240 14241 14242 14243 14244 14245 14246 14247 14248 14249 14250 14251 14252 14253 14254 14255 14256 14257 14258 14259 14260 14261 14262 14263 14264 14265 14266 14267 14268 14269 14270 14271 14272 14273 14274 14275 14276 14277 14278 14279 14280 14281 14282 14283 14284 14285 14286 14287 14288 14289 14290 14291 14292 14293 14294 14295 14296 14297 14298 14299 14300 14301 14302 14303 14304 14305 14306 14307 14308 14309 14310 14311 14312 14313 14314 14315 14316 14317 14318 14319 14320 14321 14322 14323 14324 14325 14326 14327 14328 14329 14330 14331 14332 14333 14334 14335 14336 14337 14338 14339 14340 14341 14342 14343 14344 14345 14346 14347 14348 14349 14350 14351 14352 14353 14354 14355 14356 14357 14358 14359 14360 14361 14362 14363 14364 14365 14366 14367 14368 14369 14370 14371 14372 14373 14374 14375 14376 14377 14378 14379 14380 14381 14382 14383 14384 14385 14386 14387 14388 14389 14390 14391 14392 14393 14394 14395 14396 14397 14398 14399 14400 14401 14402 14403 14404 14405 14406 14407 14408 14409 14410 14411 14412 14413 14414 14415 14416 14417 14418 14419 14420 14421 14422 14423 14424 14425 14426 14427 14428 14429 14430 14431 14432 14433 14434 14435 14436 14437 14438 14439 14440 14441 14442 14443 14444 14445 14446 14447 14448 14449 14450 14451 14452 14453 14454 14455 14456 14457 14458 14459 14460 14461 14462 14463 14464 14465 14466 14467 14468 14469 14470 14471 14472 14473 14474 14475 14476 14477 14478 14479 14480 14481 14482 14483 14484 14485 14486 14487 14488 14489 14490 14491 14492 14493 14494 14495 14496 14497 14498 14499 14500 14501 14502 14503 14504 14505 14506 14507 14508 14509 14510 14511 14512 14513 14514 14515 14516 14517 14518 14519 14520 14521 14522 14523 14524 14525 14526 14527 14528 14529 14530 14531 14532 14533 14534 14535 14536 14537 14538 14539 14540 14541 14542 14543 14544 14545 14546 14547 14548 14549 14550 14551 14552 14553 14554 14555 14556 14557 14558 14559 14560 14561 14562 14563 14564 14565 14566 14567 14568 14569 14570 14571 14572 14573 14574 14575 14576 14577 14578 14579 14580 14581 14582 14583 14584 14585 14586 14587 14588 14589 14590 14591 14592 14593 14594 14595 14596 14597 14598 14599 14600 14601 14602 14603 14604 14605 14606 14607 14608 14609 14610 14611 14612 14613 14614 14615 14616 14617 14618 14619 14620 14621 14622 14623 14624 14625 14626 14627 14628 14629 14630 14631 14632 14633 14634 14635 14636 14637 14638 14639 14640 14641 14642 14643 14644 14645 14646 14647 14648 14649 14650 14651 14652 14653 14654 14655 14656 14657 14658 14659 14660 14661 14662 14663 14664 14665 14666 14667 14668 14669 14670 14671 14672 14673 14674 14675 14676 14677 14678 14679 14680 14681 14682 14683 14684 14685 14686 14687 14688 14689 14690 14691 14692 14693 14694 14695 14696 14697 14698 14699 14700 14701 14702 14703 14704 14705 14706 14707 14708 14709 14710 14711 14712 14713 14714 14715 14716 14717 14718 14719 14720 14721 14722 14723 14724 14725 14726 14727 14728 14729 14730 14731 14732 14733 14734 14735 14736 14737 14738 14739 14740 14741 14742 14743 14744 14745 14746 14747 14748 14749 14750 14751 14752 14753 14754 14755 14756 14757 14758 14759 14760 14761 14762 14763 14764 14765 14766 14767 14768 14769 14770 14771 14772 14773 14774 14775 14776 14777 14778 14779 14780 14781 14782 14783 14784 14785 14786 14787 14788 14789 14790 14791 14792 14793 14794 14795 14796 14797 14798 14799 14800 14801 14802 14803 14804 14805 14806 14807 14808 14809 14810 14811 14812 14813 14814 14815 14816 14817 14818 14819 14820 14821 14822 14823 14824 14825 14826 14827 14828 14829 14830 14831 14832 14833 14834 14835 14836 14837 14838 14839 14840 14841 14842 14843 14844 14845 14846 14847 14848 14849 14850 14851 14852 14853 14854 14855 14856 14857 14858 14859 14860 14861 14862 14863 14864 14865 14866 14867 14868 14869 14870 14871 14872 14873 14874 14875 14876 14877 14878 14879 14880 14881 14882 14883 14884 14885 14886 14887 14888 14889 14890 14891 14892 14893 14894 14895 14896 14897 14898 14899 14900 14901 14902 14903 14904 14905 14906 14907 14908 14909 14910 14911 14912 14913 14914 14915 14916 14917 14918 14919 14920 14921 14922 14923 14924 14925 14926 14927 14928 14929 14930 14931 14932 14933 14934 14935 14936 14937 14938 14939 14940 14941 14942 14943 14944 14945 14946 14947 14948 14949 14950 14951 14952 14953 14954 14955 14956 14957 14958 14959 14960 14961 14962 14963 14964 14965 14966 14967 14968 14969 14970 14971 14972 14973 14974 14975 14976 14977 14978 14979 14980 14981 14982 14983 14984 14985 14986 14987 14988 14989 14990 14991 14992 14993 14994 14995 14996 14997 14998 14999 15000 15001 15002 15003 15004 15005 15006 15007 15008 15009 15010 15011 15012 15013 15014 15015 15016 15017 15018 15019 15020 15021 15022 15023 15024 15025 15026 15027 15028 15029 15030 15031 15032 15033 15034 15035 15036 15037 15038 15039 15040 15041 15042 15043 15044 15045 15046 15047 15048 15049 15050 15051 15052 15053 15054 15055 15056 15057 15058 15059 15060 15061 15062 15063 15064 15065 15066 15067 15068 15069 15070 15071 15072 15073 15074 15075 15076 15077 15078 15079 15080 15081 15082 15083 15084 15085 15086 15087 15088 15089 15090 15091 15092 15093 15094 15095 15096 15097 15098 15099 15100 15101 15102 15103 15104 15105 15106 15107 15108 15109 15110 15111 15112 15113 15114 15115 15116 15117 15118 15119 15120 15121 15122 15123 15124 15125 15126 15127 15128 15129 15130 15131 15132 15133 15134 15135 15136 15137 15138 15139 15140 15141 15142 15143 15144 15145 15146 15147 15148 15149 15150 15151 15152 15153 15154 15155 15156 15157 15158 15159 15160 15161 15162 15163 15164 15165 15166 15167 15168 15169 15170 15171 15172 15173 15174 15175 15176 15177 15178 15179 15180 15181 15182 15183 15184 15185 15186 15187 15188 15189 15190 15191 15192 15193 15194 15195 15196 15197 15198 15199 15200 15201 15202 15203 15204 15205 15206 15207 15208 15209 15210 15211 15212 15213 15214 15215 15216 15217 15218 15219 15220 15221 15222 15223 15224 15225 15226 15227 15228 15229 15230 15231 15232 15233 15234 15235 15236 15237 15238 15239 15240 15241 15242 15243 15244 15245 15246 15247 15248 15249 15250 15251 15252 15253 15254 15255 15256 15257 15258 15259 15260 15261 15262 15263 15264 15265 15266 15267 15268 15269 15270 15271 15272 15273 15274 15275 15276 15277 15278 15279 15280 15281 15282 15283 15284 15285 15286 15287 15288 15289 15290 15291 15292 15293 15294 15295 15296 15297 15298 15299 15300 15301 15302 15303 15304 15305 15306 15307 15308 15309 15310 15311 15312 15313 15314 15315 15316 15317 15318 15319 15320 15321 15322 15323 15324 15325 15326 15327 15328 15329 15330 15331 15332 15333 15334 15335 15336 15337 15338 15339 15340 15341 15342 15343 15344 15345 15346 15347 15348 15349 15350 15351 15352 15353 15354 15355 15356 15357 15358 15359 15360 15361 15362 15363 15364 15365 15366 15367 15368 15369 15370 15371 15372 15373 15374 15375 15376 15377 15378 15379 15380 15381 15382 15383 15384 15385 15386 15387 15388 15389 15390 15391 15392 15393 15394 15395 15396 15397 15398 15399 15400 15401 15402 15403 15404 15405 15406 15407 15408 15409 15410 15411 15412 15413 15414 15415 15416 15417 15418 15419 15420 15421 15422 15423 15424 15425 15426 15427 15428 15429 15430 15431 15432 15433 15434 15435 15436 15437 15438 15439 15440 15441 15442 15443 15444 15445 15446 15447 15448 15449 15450 15451 15452 15453 15454 15455 15456 15457 15458 15459 15460 15461 15462 15463 15464 15465 15466 15467 15468 15469 15470 15471 15472 15473 15474 15475 15476 15477 15478 15479 15480 15481 15482 15483 15484 15485 15486 15487 15488 15489 15490 15491 15492 15493 15494 15495 15496 15497 15498 15499 15500 15501 15502 15503 15504 15505 15506 15507 15508 15509 15510 15511 15512 15513 15514 15515 15516 15517 15518 15519 15520 15521 15522 15523 15524 15525 15526 15527 15528 15529 15530 15531 15532 15533 15534 15535 15536 15537 15538 15539 15540 15541 15542 15543 15544 15545 15546 15547 15548 15549 15550 15551 15552 15553 15554 15555 15556 15557 15558 15559 15560 15561 15562 15563 15564 15565 15566 15567 15568 15569 15570 15571 15572 15573 15574 15575 15576 15577 15578 15579 15580 15581 15582 15583 15584 15585 15586 15587 15588 15589 15590 15591 15592 15593 15594 15595 15596 15597 15598 15599 15600 15601 15602 15603 15604 15605 15606 15607 15608 15609 15610 15611 15612 15613 15614 15615 15616 15617 15618 15619 15620 15621 15622 15623 15624 15625 15626 15627 15628 15629 15630 15631 15632 15633 15634 15635 15636 15637 15638 15639 15640 15641 15642 15643 15644 15645 15646 15647 15648 15649 15650 15651 15652 15653 15654 15655 15656 15657 15658 15659 15660 15661 15662 15663 15664 15665 15666 15667 15668 15669 15670 15671 15672 15673 15674 15675 15676 15677 15678 15679 15680 15681 15682 15683 15684 15685 15686 15687 15688 15689 15690 15691 15692 15693 15694 15695 15696 15697 15698 15699 15700 15701 15702 15703 15704 15705 15706 15707 15708 15709 15710 15711 15712 15713 15714 15715 15716 15717 15718 15719 15720 15721 15722 15723 15724 15725 15726 15727 15728 15729 15730 15731 15732 15733 15734 15735 15736 15737 15738 15739 15740 15741 15742 15743 15744 15745 15746 15747 15748 15749 15750 15751 15752 15753 15754 15755 15756 15757 15758 15759 15760 15761 15762 15763 15764 15765 15766 15767 15768 15769 15770 15771 15772 15773 15774 15775 15776 15777 15778 15779 15780 15781 15782 15783 15784 15785 15786 15787 15788 15789 15790 15791 15792 15793 15794 15795 15796 15797 15798 15799 15800 15801 15802 15803 15804 15805 15806 15807 15808 15809 15810 15811 15812 15813 15814 15815 15816 15817 15818 15819 15820 15821 15822 15823 15824 15825 15826 15827 15828 15829 15830 15831 15832 15833 15834 15835 15836 15837 15838 15839 15840 15841 15842 15843 15844 15845 15846 15847 15848 15849 15850 15851 15852 15853 15854 15855 15856 15857 15858 15859 15860 15861 15862 15863 15864 15865 15866 15867 15868 15869 15870 15871 15872 15873 15874 15875 15876 15877 15878 15879 15880 15881 15882 15883 15884 15885 15886 15887 15888 15889 15890 15891 15892 15893 15894 15895 15896 15897 15898 15899 15900 15901 15902 15903 15904 15905 15906 15907 15908 15909 15910 15911 15912 15913 15914 15915 15916 15917 15918 15919 15920 15921 15922 15923 15924 15925 15926 15927 15928 15929 15930 15931 15932 15933 15934 15935 15936 15937 15938 15939 15940 15941 15942 15943 15944 15945 15946 15947 15948 15949 15950 15951 15952 15953 15954 15955 15956 15957 15958 15959 15960 15961 15962 15963 15964 15965 15966 15967 15968 15969 15970 15971 15972 15973 15974 15975 15976 15977 15978 15979 15980 15981 15982 15983 15984 15985 15986 15987 15988 15989 15990 15991 15992 15993 15994 15995 15996 15997 15998 15999 16000 16001 16002 16003 16004 16005 16006 16007 16008 16009 16010 16011 16012 16013 16014 16015 16016 16017 16018 16019 16020 16021 16022 16023 16024 16025 16026 16027 16028 16029 16030 16031 16032 16033 16034 16035 16036 16037 16038 16039 16040 16041 16042 16043 16044 16045 16046 16047 16048 16049 16050 16051 16052 16053 16054 16055 16056 16057 16058 16059 16060 16061 16062 16063 16064 16065 16066 16067 16068 16069 16070 16071 16072 16073 16074 16075 16076 16077 16078 16079 16080 16081 16082 16083 16084 16085 16086 16087 16088 16089 16090 16091 16092 16093 16094 16095 16096 16097 16098 16099 16100 16101 16102 16103 16104 16105 16106 16107 16108 16109 16110 16111 16112 16113 16114 16115 16116 16117 16118 16119 16120 16121 16122 16123 16124 16125 16126 16127 16128 16129 16130 16131 16132 16133 16134 16135 16136 16137 16138 16139 16140 16141 16142 16143 16144 16145 16146 16147 16148 16149 16150 16151 16152 16153 16154 16155 16156 16157 16158 16159 16160 16161 16162 16163 16164 16165 16166 16167 16168 16169 16170 16171 16172 16173 16174 16175 16176 16177 16178 16179 16180 16181 16182 16183 16184 16185 16186 16187 16188 16189 16190 16191 16192 16193 16194 16195 16196 16197 16198 16199 16200 16201 16202 16203 16204 16205 16206 16207 16208 16209 16210 16211 16212 16213 16214 16215 16216 16217 16218 16219 16220 16221 16222 16223 16224 16225 16226 16227 16228 16229 16230 16231 16232 16233 16234 16235 16236 16237 16238 16239 16240 16241 16242 16243 16244 16245 16246 16247 16248 16249 16250 16251 16252 16253 16254 16255 16256 16257 16258 16259 16260 16261 16262 16263 16264 16265 16266 16267 16268 16269 16270 16271 16272 16273 16274 16275 16276 16277 16278 16279 16280 16281 16282 16283 16284 16285 16286 16287 16288 16289 16290 16291 16292 16293 16294 16295 16296 16297 16298 16299 16300 16301 16302 16303 16304 16305 16306 16307 16308 16309 16310 16311 16312 16313 16314 16315 16316 16317 16318 16319 16320 16321 16322 16323 16324 16325 16326 16327 16328 16329 16330 16331 16332 16333 16334 16335 16336 16337 16338 16339 16340 16341 16342 16343 16344 16345 16346 16347 16348 16349 16350 16351 16352 16353 16354 16355 16356 16357 16358 16359 16360 16361 16362 16363 16364 16365 16366 16367 16368 16369 16370 16371 16372 16373 16374 16375 16376 16377 16378 16379 16380 16381 16382 16383 16384 16385 16386 16387 16388 16389 16390 16391 16392 16393 16394 16395 16396 16397 16398 16399 16400 16401 16402 16403 16404 16405 16406 16407 16408 16409 16410 16411 16412 16413 16414 16415 16416 16417 16418 16419 16420 16421 16422 16423 16424 16425 16426 16427 16428 16429 16430 16431 16432 16433 16434 16435 16436 16437 16438 16439 16440 16441 16442 16443 16444 16445 16446 16447 16448 16449 16450 16451 16452 16453 16454 16455 16456 16457 16458 16459 16460 16461 16462 16463 16464 16465 16466 16467 16468 16469 16470 16471 16472 16473 16474 16475 16476 16477 16478 16479 16480 16481 16482 16483 16484 16485 16486 16487 16488 16489 16490 16491 16492 16493 16494 16495 16496 16497 16498 16499 16500 16501 16502 16503 16504 16505 16506 16507 16508 16509 16510 16511 16512 16513 16514 16515 16516 16517 16518 16519 16520 16521 16522 16523 16524 16525 16526 16527 16528 16529 16530 16531 16532 16533 16534 16535 16536 16537 16538 16539 16540 16541 16542 16543 16544 16545 16546 16547 16548 16549 16550 16551 16552 16553 16554 16555 16556 16557 16558 16559 16560 16561 16562 16563 16564 16565 16566 16567 16568 16569 16570 16571 16572 16573 16574 16575 16576 16577 16578 16579 16580 16581 16582 16583 16584 16585 16586 16587 16588 16589 16590 16591 16592 16593 16594 16595 16596 16597 16598 16599 16600 16601 16602 16603 16604 16605 16606 16607 16608 16609 16610 16611 16612 16613 16614 16615 16616 16617 16618 16619 16620 16621 16622 16623 16624 16625 16626 16627 16628 16629 16630 16631 16632 16633 16634 16635 16636 16637 16638 16639 16640 16641 16642 16643 16644 16645 16646 16647 16648 16649 16650 16651 16652 16653 16654 16655 16656 16657 16658 16659 16660 16661 16662 16663 16664 16665 16666 16667 16668 16669 16670 16671 16672 16673 16674 16675 16676 16677 16678 16679 16680 16681 16682 16683 16684 16685 16686 16687 16688 16689 16690 16691 16692 16693 16694 16695 16696 16697 16698 16699 16700 16701 16702 16703 16704 16705 16706 16707 16708 16709 16710 16711 16712 16713 16714 16715 16716 16717 16718 16719 16720 16721 16722 16723 16724 16725 16726 16727 16728 16729 16730 16731 16732 16733 16734 16735 16736 16737 16738 16739 16740 16741 16742 16743 16744 16745 16746 16747 16748 16749 16750 16751 16752 16753 16754 16755 16756 16757 16758 16759 16760 16761 16762 16763 16764 16765 16766 16767 16768 16769 16770 16771 16772 16773 16774 16775 16776 16777 16778 16779 16780 16781 16782 16783 16784 16785 16786 16787 16788 16789 16790 16791 16792 16793 16794 16795 16796 16797 16798 16799 16800 16801 16802 16803 16804 16805 16806 16807 16808 16809 16810 16811 16812 16813 16814 16815 16816 16817 16818 16819 16820 16821 16822 16823 16824 16825 16826 16827 16828 16829 16830 16831 16832 16833 16834 16835 16836 16837 16838 16839 16840 16841 16842 16843 16844 16845 16846 16847 16848 16849 16850 16851 16852 16853 16854 16855 16856 16857 16858 16859 16860 16861 16862 16863 16864 16865 16866 16867 16868 16869 16870 16871 16872 16873 16874 16875 16876 16877 16878 16879 16880 16881 16882 16883 16884 16885 16886 16887 16888 16889 16890 16891 16892 16893 16894 16895 16896 16897 16898 16899 16900 16901 16902 16903 16904 16905 16906 16907 16908 16909 16910 16911 16912 16913 16914 16915 16916 16917 16918 16919 16920 16921 16922 16923 16924 16925 16926 16927 16928 16929 16930 16931 16932 16933 16934 16935 16936 16937 16938 16939 16940 16941 16942 16943 16944 16945 16946 16947 16948 16949 16950 16951 16952 16953 16954 16955 16956 16957 16958 16959 16960 16961 16962 16963 16964 16965 16966 16967 16968 16969 16970 16971 16972 16973 16974 16975 16976 16977 16978 16979 16980 16981 16982 16983 16984 16985 16986 16987 16988 16989 16990 16991 16992 16993 16994 16995 16996 16997 16998 16999 17000 17001 17002 17003 17004 17005 17006 17007 17008 17009 17010 17011 17012 17013 17014 17015 17016 17017 17018 17019 17020 17021 17022 17023 17024 17025 17026 17027 17028 17029 17030 17031 17032 17033 17034 17035 17036 17037 17038 17039 17040 17041 17042 17043 17044 17045 17046 17047 17048 17049 17050 17051 17052 17053 17054 17055 17056 17057 17058 17059 17060 17061 17062 17063 17064 17065 17066 17067 17068 17069 17070 17071 17072 17073 17074 17075 17076 17077 17078 17079 17080 17081 17082 17083 17084 17085 17086 17087 17088 17089 17090 17091 17092 17093 17094 17095 17096 17097 17098 17099 17100 17101 17102 17103 17104 17105 17106 17107 17108 17109 17110 17111 17112 17113 17114 17115 17116 17117 17118 17119 17120 17121 17122 17123 17124 17125 17126 17127 17128 17129 17130 17131 17132 17133 17134 17135 17136 17137 17138 17139 17140 17141 17142 17143 17144 17145 17146 17147 17148 17149 17150 17151 17152 17153 17154 17155 17156 17157 17158 17159 17160 17161 17162 17163 17164 17165 17166 17167 17168 17169 17170 17171 17172 17173 17174 17175 17176 17177 17178 17179 17180 17181 17182 17183 17184 17185 17186 17187 17188 17189 17190 17191 17192 17193 17194 17195 17196 17197 17198 17199 17200 17201 17202 17203 17204 17205 17206 17207 17208 17209 17210 17211 17212 17213 17214 17215 17216 17217 17218 17219 17220 17221 17222 17223 17224 17225 17226 17227 17228 17229 17230 17231 17232 17233 17234 17235 17236 17237 17238 17239 17240 17241 17242 17243 17244 17245 17246 17247 17248 17249 17250 17251 17252 17253 17254 17255 17256 17257 17258 17259 17260 17261 17262 17263 17264 17265 17266 17267 17268 17269 17270 17271 17272 17273 17274 17275 17276 17277 17278 17279 17280 17281 17282 17283 17284 17285 17286 17287 17288 17289 17290 17291 17292 17293 17294 17295 17296 17297 17298 17299 17300 17301 17302 17303 17304 17305 17306 17307 17308 17309 17310 17311 17312 17313 17314 17315 17316 17317 17318 17319 17320 17321 17322 17323 17324 17325 17326 17327 17328 17329 17330 17331 17332 17333 17334 17335 17336 17337 17338 17339 17340 17341 17342 17343 17344 17345 17346 17347 17348 17349 17350 17351 17352 17353 17354 17355 17356 17357 17358 17359 17360 17361 17362 17363 17364 17365 17366 17367 17368 17369 17370 17371 17372 17373 17374 17375 17376 17377 17378 17379 17380 17381 17382 17383 17384 17385 17386 17387 17388 17389 17390 17391 17392 17393 17394 17395 17396 17397 17398 17399 17400 17401 17402 17403 17404 17405 17406 17407 17408 17409 17410 17411 17412 17413 17414 17415 17416 17417 17418 17419 17420 17421 17422 17423 17424 17425 17426 17427 17428 17429 17430 17431 17432 17433 17434 17435 17436 17437 17438 17439 17440 17441 17442 17443 17444 17445 17446 17447 17448 17449 17450 17451 17452 17453 17454 17455 17456 17457 17458 17459 17460 17461 17462 17463 17464 17465 17466 17467 17468 17469 17470 17471 17472 17473 17474 17475 17476 17477 17478 17479 17480 17481 17482 17483 17484 17485 17486 17487 17488 17489 17490 17491 17492 17493 17494 17495 17496 17497 17498 17499 17500 17501 17502 17503 17504 17505 17506 17507 17508 17509 17510 17511 17512 17513 17514 17515 17516 17517 17518 17519 17520 17521 17522 17523 17524 17525 17526 17527 17528 17529 17530 17531 17532 17533 17534 17535 17536 17537 17538 17539 17540 17541 17542 17543 17544 17545 17546 17547 17548 17549 17550 17551 17552 17553 17554 17555 17556 17557 17558 17559 17560 17561 17562 17563 17564 17565 17566 17567 17568 17569 17570 17571 17572 17573 17574 17575 17576 17577 17578 17579 17580 17581 17582 17583 17584 17585 17586 17587 17588 17589 17590 17591 17592 17593 17594 17595 17596 17597 17598 17599 17600 17601 17602 17603 17604 17605 17606 17607 17608 17609 17610 17611 17612 17613 17614 17615 17616 17617 17618 17619 17620 17621 17622 17623 17624 17625 17626 17627 17628 17629 17630 17631 17632 17633 17634 17635 17636 17637 17638 17639 17640 17641 17642 17643 17644 17645 17646 17647 17648 17649 17650 17651 17652 17653 17654 17655 17656 17657 17658 17659 17660 17661 17662 17663 17664 17665 17666 17667 17668 17669 17670 17671 17672 17673 17674 17675 17676 17677 17678 17679 17680 17681 17682 17683 17684 17685 17686 17687 17688 17689 17690 17691 17692 17693 17694 17695 17696 17697 17698 17699 17700 17701 17702 17703 17704 17705 17706 17707 17708 17709 17710 17711 17712 17713 17714 17715 17716 17717 17718 17719 17720 17721 17722 17723 17724 17725 17726 17727 17728 17729 17730 17731 17732 17733 17734 17735 17736 17737 17738 17739 17740 17741 17742 17743 17744 17745 17746 17747 17748 17749 17750 17751 17752 17753 17754 17755 17756 17757 17758 17759 17760 17761 17762 17763 17764 17765 17766 17767 17768 17769 17770 17771 17772 17773 17774 17775 17776 17777 17778 17779 17780 17781 17782 17783 17784 17785 17786 17787 17788 17789 17790 17791 17792 17793 17794 17795 17796 17797 17798 17799 17800 17801 17802 17803 17804 17805 17806 17807 17808 17809 17810 17811 17812 17813 17814 17815 17816 17817 17818 17819 17820 17821 17822 17823 17824 17825 17826 17827 17828 17829 17830 17831 17832 17833 17834 17835 17836 17837 17838 17839 17840 17841 17842 17843 17844 17845 17846 17847 17848 17849 17850 17851 17852 17853 17854 17855 17856 17857 17858 17859 17860 17861 17862 17863 17864 17865 17866 17867 17868 17869 17870 17871 17872 17873 17874 17875 17876 17877 17878 17879 17880 17881 17882 17883 17884 17885 17886 17887 17888 17889 17890 17891 17892 17893 17894 17895 17896 17897 17898 17899 17900 17901 17902 17903 17904 17905 17906 17907 17908 17909 17910 17911 17912 17913 17914 17915 17916 17917 17918 17919 17920 17921 17922 17923 17924 17925 17926 17927 17928 17929 17930 17931 17932 17933 17934 17935 17936 17937 17938 17939 17940 17941 17942 17943 17944 17945 17946 17947 17948 17949 17950 17951 17952 17953 17954 17955 17956 17957 17958 17959 17960 17961 17962 17963 17964 17965 17966 17967 17968 17969 17970 17971 17972 17973 17974 17975 17976 17977 17978 17979 17980 17981 17982 17983 17984 17985 17986 17987 17988 17989 17990 17991 17992 17993 17994 17995 17996 17997 17998 17999 18000 18001 18002 18003 18004 18005 18006 18007 18008 18009 18010 18011 18012 18013 18014 18015 18016 18017 18018 18019 18020 18021 18022 18023 18024 18025 18026 18027 18028 18029 18030 18031 18032 18033 18034 18035 18036 18037 18038 18039 18040 18041 18042 18043 18044 18045 18046 18047 18048 18049 18050 18051 18052 18053 18054 18055 18056 18057 18058 18059 18060 18061 18062 18063 18064 18065 18066 18067 18068 18069 18070 18071 18072 18073 18074 18075 18076 18077 18078 18079 18080 18081 18082 18083 18084 18085 18086 18087 18088 18089 18090 18091 18092 18093 18094 18095 18096 18097 18098 18099 18100 18101 18102 18103 18104 18105 18106 18107 18108 18109 18110 18111 18112 18113 18114 18115 18116 18117 18118 18119 18120 18121 18122 18123 18124 18125 18126 18127 18128 18129 18130 18131 18132 18133 18134 18135 18136 18137 18138 18139 18140 18141 18142 18143 18144 18145 18146 18147 18148 18149 18150 18151 18152 18153 18154 18155 18156 18157 18158 18159 18160 18161 18162 18163 18164 18165 18166 18167 18168 18169 18170 18171 18172 18173 18174 18175 18176 18177 18178 18179 18180 18181 18182 18183 18184 18185 18186 18187 18188 18189 18190 18191 18192 18193 18194 18195 18196 18197 18198 18199 18200 18201 18202 18203 18204 18205 18206 18207 18208 18209 18210 18211 18212 18213 18214 18215 18216 18217 18218 18219 18220 18221 18222 18223 18224 18225 18226 18227 18228 18229 18230 18231 18232 18233 18234 18235 18236 18237 18238 18239 18240 18241 18242 18243 18244 18245 18246 18247 18248 18249 18250 18251 18252 18253 18254 18255 18256 18257 18258 18259 18260 18261 18262 18263 18264 18265 18266 18267 18268 18269 18270 18271 18272 18273 18274 18275 18276 18277 18278 18279 18280 18281 18282 18283 18284 18285 18286 18287 18288 18289 18290 18291 18292 18293 18294 18295 18296 18297 18298 18299 18300 18301 18302 18303 18304 18305 18306 18307 18308 18309 18310 18311 18312 18313 18314 18315 18316 18317 18318 18319 18320 18321 18322 18323 18324 18325 18326 18327 18328 18329 18330 18331 18332 18333 18334 18335 18336 18337 18338 18339 18340 18341 18342 18343 18344 18345 18346 18347 18348 18349 18350 18351 18352 18353 18354 18355 18356 18357 18358 18359 18360 18361 18362 18363 18364 18365 18366 18367 18368 18369 18370 18371 18372 18373 18374 18375 18376 18377 18378 18379 18380 18381 18382 18383 18384 18385 18386 18387 18388 18389 18390 18391 18392 18393 18394 18395 18396 18397 18398 18399 18400 18401 18402 18403 18404 18405 18406 18407 18408 18409 18410 18411 18412 18413 18414 18415 18416 18417 18418 18419 18420 18421 18422 18423 18424 18425 18426 18427 18428 18429 18430 18431 18432 18433 18434 18435 18436 18437 18438 18439 18440 18441 18442 18443 18444 18445 18446 18447 18448 18449 18450 18451 18452 18453 18454 18455 18456 18457 18458 18459 18460 18461 18462 18463 18464 18465 18466 18467 18468 18469 18470 18471 18472 18473 18474 18475 18476 18477 18478 18479 18480 18481 18482 18483 18484 18485 18486 18487 18488 18489 18490 18491 18492 18493 18494 18495 18496 18497 18498 18499 18500 18501 18502 18503 18504 18505 18506 18507 18508 18509 18510 18511 18512 18513 18514 18515 18516 18517 18518 18519 18520 18521 18522 18523 18524 18525 18526 18527 18528 18529 18530 18531 18532 18533 18534 18535 18536 18537 18538 18539 18540 18541 18542 18543 18544 18545 18546 18547 18548 18549 18550 18551 18552 18553 18554 18555 18556 18557 18558 18559 18560 18561 18562 18563 18564 18565 18566 18567 18568 18569 18570 18571 18572 18573 18574 18575 18576 18577 18578 18579 18580 18581 18582 18583 18584 18585 18586 18587 18588 18589 18590 18591 18592 18593 18594 18595 18596 18597 18598 18599 18600 18601 18602 18603 18604 18605 18606 18607 18608 18609 18610 18611 18612 18613 18614 18615 18616 18617 18618 18619 18620 18621 18622 18623 18624 18625 18626 18627 18628 18629 18630 18631 18632 18633 18634 18635 18636 18637 18638 18639 18640 18641 18642 18643 18644 18645 18646 18647 18648 18649 18650 18651 18652 18653 18654 18655 18656 18657 18658 18659 18660 18661 18662 18663 18664 18665 18666 18667 18668 18669 18670 18671 18672 18673 18674 18675 18676 18677 18678 18679 18680 18681 18682 18683 18684 18685 18686 18687 18688 18689 18690 18691 18692 18693 18694 18695 18696 18697 18698 18699 18700 18701 18702 18703 18704 18705 18706 18707 18708 18709 18710 18711 18712 18713 18714 18715 18716 18717 18718 18719 18720 18721 18722 18723 18724 18725 18726 18727 18728 18729 18730 18731 18732 18733 18734 18735 18736 18737 18738 18739 18740 18741 18742 18743 18744 18745 18746 18747 18748 18749 18750 18751 18752 18753 18754 18755 18756 18757 18758 18759 18760 18761 18762 18763 18764 18765 18766 18767 18768 18769 18770 18771 18772 18773 18774 18775 18776 18777 18778 18779 18780 18781 18782 18783 18784 18785 18786 18787 18788 18789 18790 18791 18792 18793 18794 18795 18796 18797 18798 18799 18800 18801 18802 18803 18804 18805 18806 18807 18808 18809 18810 18811 18812 18813 18814 18815 18816 18817 18818 18819 18820 18821 18822 18823 18824 18825 18826 18827 18828 18829 18830 18831 18832 18833 18834 18835 18836 18837 18838 18839 18840 18841 18842 18843 18844 18845 18846 18847 18848 18849 18850 18851 18852 18853 18854 18855 18856 18857 18858 18859 18860 18861 18862 18863 18864 18865 18866 18867 18868 18869 18870 18871 18872 18873 18874 18875 18876 18877 18878 18879 18880 18881 18882 18883 18884 18885 18886 18887 18888 18889 18890 18891 18892 18893 18894 18895 18896 18897 18898 18899 18900 18901 18902 18903 18904 18905 18906 18907 18908 18909 18910 18911 18912 18913 18914 18915 18916 18917 18918 18919 18920 18921 18922 18923 18924 18925 18926 18927 18928 18929 18930 18931 18932 18933 18934 18935 18936 18937 18938 18939 18940 18941 18942 18943 18944 18945 18946 18947 18948 18949 18950 18951 18952 18953 18954 18955 18956 18957 18958 18959 18960 18961 18962 18963 18964 18965 18966 18967 18968 18969 18970 18971 18972 18973 18974 18975 18976 18977 18978 18979 18980 18981 18982 18983 18984 18985 18986 18987 18988 18989 18990 18991 18992 18993 18994 18995 18996 18997 18998 18999 19000 19001 19002 19003 19004 19005 19006 19007 19008 19009 19010 19011 19012 19013 19014 19015 19016 19017 19018 19019 19020 19021 19022 19023 19024 19025 19026 19027 19028 19029 19030 19031 19032 19033 19034 19035 19036 19037 19038 19039 19040 19041 19042 19043 19044 19045 19046 19047 19048 19049 19050 19051 19052 19053 19054 19055 19056 19057 19058 19059 19060 19061 19062 19063 19064 19065 19066 19067 19068 19069 19070 19071 19072 19073 19074 19075 19076 19077 19078 19079 19080 19081 19082 19083 19084 19085 19086 19087 19088 19089 19090 19091 19092 19093 19094 19095 19096 19097 19098 19099 19100 19101 19102 19103 19104 19105 19106 19107 19108 19109 19110 19111 19112 19113 19114 19115 19116 19117 19118 19119 19120 19121 19122 19123 19124 19125 19126 19127 19128 19129 19130 19131 19132 19133 19134 19135 19136 19137 19138 19139 19140 19141 19142 19143 19144 19145 19146 19147 19148 19149 19150 19151 19152 19153 19154 19155 19156 19157 19158 19159 19160 19161 19162 19163 19164 19165 19166 19167 19168 19169 19170 19171 19172 19173 19174 19175 19176 19177 19178 19179 19180 19181 19182 19183 19184 19185 19186 19187 19188 19189 19190 19191 19192 19193 19194 19195 19196 19197 19198 19199 19200 19201 19202 19203 19204 19205 19206 19207 19208 19209 19210 19211 19212 19213 19214 19215 19216 19217 19218 19219 19220 19221 19222 19223 19224 19225 19226 19227 19228 19229 19230 19231 19232 19233 19234 19235 19236 19237 19238 19239 19240 19241 19242 19243 19244 19245 19246 19247 19248 19249 19250 19251 19252 19253 19254 19255 19256 19257 19258 19259 19260 19261 19262 19263 19264 19265 19266 19267 19268 19269 19270 19271 19272 19273 19274 19275 19276 19277 19278 19279 19280 19281 19282 19283 19284 19285 19286 19287 19288 19289 19290 19291 19292 19293 19294 19295 19296 19297 19298 19299 19300 19301 19302 19303 19304 19305 19306 19307 19308 19309 19310 19311 19312 19313 19314 19315 19316 19317 19318 19319 19320 19321 19322 19323 19324 19325 19326 19327 19328 19329 19330 19331 19332 19333 19334 19335 19336 19337 19338 19339 19340 19341 19342 19343 19344 19345 19346 19347 19348 19349 19350 19351 19352 19353 19354 19355 19356 19357 19358 19359 19360 19361 19362 19363 19364 19365 19366 19367 19368 19369 19370 19371 19372 19373 19374 19375 19376 19377 19378 19379 19380 19381 19382 19383 19384 19385 19386 19387 19388 19389 19390 19391 19392 19393 19394 19395 19396 19397 19398 19399 19400 19401 19402 19403 19404 19405 19406 19407 19408 19409 19410 19411 19412 19413 19414 19415 19416 19417 19418 19419 19420 19421 19422 19423 19424 19425 19426 19427 19428 19429 19430 19431 19432 19433 19434 19435 19436 19437 19438 19439 19440 19441 19442 19443 19444 19445 19446 19447 19448 19449 19450 19451 19452 19453 19454 19455 19456 19457 19458 19459 19460 19461 19462 19463 19464 19465 19466 19467 19468 19469 19470 19471 19472 19473 19474 19475 19476 19477 19478 19479 19480 19481 19482 19483 19484 19485 19486 19487 19488 19489 19490 19491 19492 19493 19494 19495 19496 19497 19498 19499 19500 19501 19502 19503 19504 19505 19506 19507 19508 19509 19510 19511 19512 19513 19514 19515 19516 19517 19518 19519 19520 19521 19522 19523 19524 19525 19526 19527 19528 19529 19530 19531 19532 19533 19534 19535 19536 19537 19538 19539 19540 19541 19542 19543 19544 19545 19546 19547 19548 19549 19550 19551 19552 19553 19554 19555 19556 19557 19558 19559 19560 19561 19562 19563 19564 19565 19566 19567 19568 19569 19570 19571 19572 19573 19574 19575 19576 19577 19578 19579 19580 19581 19582 19583 19584 19585 19586 19587 19588 19589 19590 19591 19592 19593 19594 19595 19596 19597 19598 19599 19600 19601 19602 19603 19604 19605 19606 19607 19608 19609 19610 19611 19612 19613 19614 19615 19616 19617 19618 19619 19620 19621 19622 19623 19624 19625 19626 19627 19628 19629 19630 19631 19632 19633 19634 19635 19636 19637 19638 19639 19640 19641 19642 19643 19644 19645 19646 19647 19648 19649 19650 19651 19652 19653 19654 19655 19656 19657 19658 19659 19660 19661 19662 19663 19664 19665 19666 19667 19668 19669 19670 19671 19672 19673 19674 19675 19676 19677 19678 19679 19680 19681 19682 19683 19684 19685 19686 19687 19688 19689 19690 19691 19692 19693 19694 19695 19696 19697 19698 19699 19700 19701 19702 19703 19704 19705 19706 19707 19708 19709 19710 19711 19712 19713 19714 19715 19716 19717 19718 19719 19720 19721 19722 19723 19724 19725 19726 19727 19728 19729 19730 19731 19732 19733 19734 19735 19736 19737 19738 19739 19740 19741 19742 19743 19744 19745 19746 19747 19748 19749 19750 19751 19752 19753 19754 19755 19756 19757 19758 19759 19760 19761 19762 19763 19764 19765 19766 19767 19768 19769 19770 19771 19772 19773 19774 19775 19776 19777 19778 19779 19780 19781 19782 19783 19784 19785 19786 19787 19788 19789 19790 19791 19792 19793 19794 19795 19796 19797 19798 19799 19800 19801 19802 19803 19804 19805 19806 19807 19808 19809 19810 19811 19812 19813 19814 19815 19816 19817 19818 19819 19820 19821 19822 19823 19824 19825 19826 19827 19828 19829 19830 19831 19832 19833 19834 19835 19836 19837 19838 19839 19840 19841 19842 19843 19844 19845 19846 19847 19848 19849 19850 19851 19852 19853 19854 19855 19856 19857 19858 19859 19860 19861 19862 19863 19864 19865 19866 19867 19868 19869 19870 19871 19872 19873 19874 19875 19876 19877 19878 19879 19880 19881 19882 19883 19884 19885 19886 19887 19888 19889 19890 19891 19892 19893 19894 19895 19896 19897 19898 19899 19900 19901 19902 19903 19904 19905 19906 19907 19908 19909 19910 19911 19912 19913 19914 19915 19916 19917 19918 19919 19920 19921 19922 19923 19924 19925 19926 19927 19928 19929 19930 19931 19932 19933 19934 19935 19936 19937 19938 19939 19940 19941 19942 19943 19944 19945 19946 19947 19948 19949 19950 19951 19952 19953 19954 19955 19956 19957 19958 19959 19960 19961 19962 19963 19964 19965 19966 19967 19968 19969 19970 19971 19972 19973 19974 19975 19976 19977 19978 19979 19980 19981 19982 19983 19984 19985 19986 19987 19988 19989 19990 19991 19992 19993 19994 19995 19996 19997 19998 19999 20000 20001 20002 20003 20004 20005 20006 20007 20008 20009 20010 20011 20012 20013 20014 20015 20016 20017 20018 20019 20020 20021 20022 20023 20024 20025 20026 20027 20028 20029 20030 20031 20032 20033 20034 20035 20036 20037 20038 20039 20040 20041 20042 20043 20044 20045 20046 20047 20048 20049 20050 20051 20052 20053 20054 20055 20056 20057 20058 20059 20060 20061 20062 20063 20064 20065 20066 20067 20068 20069 20070 20071 20072 20073 20074 20075 20076 20077 20078 20079 20080 20081 20082 20083 20084 20085 20086 20087 20088 20089 20090 20091 20092 20093 20094 20095 20096 20097 20098 20099 20100 20101 20102 20103 20104 20105 20106 20107 20108 20109 20110 20111 20112 20113 20114 20115 20116 20117 20118 20119 20120 20121 20122 20123 20124 20125 20126 20127 20128 20129 20130 20131 20132 20133 20134 20135 20136 20137 20138 20139 20140 20141 20142 20143 20144 20145 20146 20147 20148 20149 20150 20151 20152 20153 20154 20155 20156 20157 20158 20159 20160 20161 20162 20163 20164 20165 20166 20167 20168 20169 20170 20171 20172 20173 20174 20175 20176 20177 20178 20179 20180 20181 20182 20183 20184 20185 20186 20187 20188 20189 20190 20191 20192 20193 20194 20195 20196 20197 20198 20199 20200 20201 20202 20203 20204 20205 20206 20207 20208 20209 20210 20211 20212 20213 20214 20215 20216 20217 20218 20219 20220 20221 20222 20223 20224 20225 20226 20227 20228 20229 20230 20231 20232 20233 20234 20235 20236 20237 20238 20239 20240 20241 20242 20243 20244 20245 20246 20247 20248 20249 20250 20251 20252 20253 20254 20255 20256 20257 20258 20259 20260 20261 20262 20263 20264 20265 20266 20267 20268 20269 20270 20271 20272 20273 20274 20275 20276 20277 20278 20279 20280 20281 20282 20283 20284 20285 20286 20287 20288 20289 20290 20291 20292 20293 20294 20295 20296 20297 20298 20299 20300 20301 20302 20303 20304 20305 20306 20307 20308 20309 20310 20311 20312 20313 20314 20315 20316 20317 20318 20319 20320 20321 20322 20323 20324 20325 20326 20327 20328 20329 20330 20331 20332 20333 20334 20335 20336 20337 20338 20339 20340 20341 20342 20343 20344 20345 20346 20347 20348 20349 20350 20351 20352 20353 20354 20355 20356 20357 20358 20359 20360 20361 20362 20363 20364 20365 20366 20367 20368 20369 20370 20371 20372 20373 20374 20375 20376 20377 20378 20379 20380 20381 20382 20383 20384 20385 20386 20387 20388 20389 20390 20391 20392 20393 20394 20395 20396 20397 20398 20399 20400 20401 20402 20403 20404 20405 20406 20407 20408 20409 20410 20411 20412 20413 20414 20415 20416 20417 20418 20419 20420 20421 20422 20423 20424 20425 20426 20427 20428 20429 20430 20431 20432 20433 20434 20435 20436 20437 20438 20439 20440 20441 20442 20443 20444 20445 20446 20447 20448 20449 20450 20451 20452 20453 20454 20455 20456 20457 20458 20459 20460 20461 20462 20463 20464 20465 20466 20467 20468 20469 20470 20471 20472 20473 20474 20475 20476 20477 20478 20479 20480 20481 20482 20483 20484 20485 20486 20487 20488 20489 20490 20491 20492 20493 20494 20495 20496 20497 20498 20499 20500 20501 20502 20503 20504 20505 20506 20507 20508 20509 20510 20511 20512 20513 20514 20515 20516 20517 20518 20519 20520 20521 20522 20523 20524 20525 20526 20527 20528 20529 20530 20531 20532 20533 20534 20535 20536 20537 20538 20539 20540 20541 20542 20543 20544 20545 20546 20547 20548 20549 20550 20551 20552 20553 20554 20555 20556 20557 20558 20559 20560 20561 20562 20563 20564 20565 20566 20567 20568 20569 20570 20571 20572 20573 20574 20575 20576 20577 20578 20579 20580 20581 20582 20583 20584 20585 20586 20587 20588 20589 20590 20591 20592 20593 20594 20595 20596 20597 20598 20599 20600 20601 20602 20603 20604 20605 20606 20607 20608 20609 20610 20611 20612 20613 20614 20615 20616 20617 20618 20619 20620 20621 20622 20623 20624 20625 20626 20627 20628 20629 20630 20631 20632 20633 20634 20635 20636 20637 20638 20639 20640 20641 20642 20643 20644 20645 20646 20647 20648 20649 20650 20651 20652 20653 20654 20655 20656 20657 20658 20659 20660 20661 20662 20663 20664 20665 20666 20667 20668 20669 20670 20671 20672 20673 20674 20675 20676 20677 20678 20679 20680 20681 20682 20683 20684 20685 20686 20687 20688 20689 20690 20691 20692 20693 20694 20695 20696 20697 20698 20699 20700 20701 20702 20703 20704 20705 20706 20707 20708 20709 20710 20711 20712 20713 20714 20715 20716 20717 20718 20719 20720 20721 20722 20723 20724 20725 20726 20727 20728 20729 20730 20731 20732 20733 20734 20735 20736 20737 20738 20739 20740 20741 20742 20743 20744 20745 20746 20747 20748 20749 20750 20751 20752 20753 20754 20755 20756 20757 20758 20759 20760 20761 20762 20763 20764 20765 20766 20767 20768 20769 20770 20771 20772 20773 20774 20775 20776 20777 20778 20779 20780 20781 20782 20783 20784 20785 20786 20787 20788 20789 20790 20791 20792 20793 20794 20795 20796 20797 20798 20799 20800 20801 20802 20803 20804 20805 20806 20807 20808 20809 20810 20811 20812 20813 20814 20815 20816 20817 20818 20819 20820 20821 20822 20823 20824 20825 20826 20827 20828 20829 20830 20831 20832 20833 20834 20835 20836 20837 20838 20839 20840 20841 20842 20843 20844 20845 20846 20847 20848 20849 20850 20851 20852 20853 20854 20855 20856 20857 20858 20859 20860 20861 20862 20863 20864 20865 20866 20867 20868 20869 20870 20871 20872 20873 20874 20875 20876 20877 20878 20879 20880 20881 20882 20883 20884 20885 20886 20887 20888 20889 20890 20891 20892 20893 20894 20895 20896 20897 20898 20899 20900 20901 20902 20903 20904 20905 20906 20907 20908 20909 20910 20911 20912 20913 20914 20915 20916 20917 20918 20919 20920 20921 20922 20923 20924 20925 20926 20927 20928 20929 20930 20931 20932 20933 20934 20935 20936 20937 20938 20939 20940 20941 20942 20943 20944 20945 20946 20947 20948 20949 20950 20951 20952 20953 20954 20955 20956 20957 20958 20959 20960 20961 20962 20963 20964 20965 20966 20967 20968 20969 20970 20971 20972 20973 20974 20975 20976 20977 20978 20979 20980 20981 20982 20983 20984 20985 20986 20987 20988 20989 20990 20991 20992 20993 20994 20995 20996 20997 20998 20999 21000 21001 21002 21003 21004 21005 21006 21007 21008 21009 21010 21011 21012 21013 21014 21015 21016 21017 21018 21019 21020 21021 21022 21023 21024 21025 21026 21027 21028 21029 21030 21031 21032 21033 21034 21035 21036 21037 21038 21039 21040 21041 21042 21043 21044 21045 21046 21047 21048 21049 21050 21051 21052 21053 21054 21055 21056 21057 21058 21059 21060 21061 21062 21063 21064 21065 21066 21067 21068 21069 21070 21071 21072 21073 21074 21075 21076 21077 21078 21079 21080 21081 21082 21083 21084 21085 21086 21087 21088 21089 21090 21091 21092 21093 21094 21095 21096 21097 21098 21099 21100 21101 21102 21103 21104 21105 21106 21107 21108 21109 21110 21111 21112 21113 21114 21115 21116 21117 21118 21119 21120 21121 21122 21123 21124 21125 21126 21127 21128 21129 21130 21131 21132 21133 21134 21135 21136 21137 21138 21139 21140 21141 21142 21143 21144 21145 21146 21147 21148 21149 21150 21151 21152 21153 21154 21155 21156 21157 21158 21159 21160 21161 21162 21163 21164 21165 21166 21167 21168 21169 21170 21171 21172 21173 21174 21175 21176 21177 21178 21179 21180 21181 21182 21183 21184 21185 21186 21187 21188 21189 21190 21191 21192 21193 21194 21195 21196 21197 21198 21199 21200 21201 21202 21203 21204 21205 21206 21207 21208 21209 21210 21211 21212 21213 21214 21215 21216 21217 21218 21219 21220 21221 21222 21223 21224 21225 21226 21227 21228 21229 21230 21231 21232 21233 21234 21235 21236 21237 21238 21239 21240 21241 21242 21243 21244 21245 21246 21247 21248 21249 21250 21251 21252 21253 21254 21255 21256 21257 21258 21259 21260 21261 21262 21263 21264 21265 21266 21267 21268 21269 21270 21271 21272 21273 21274 21275 21276 21277 21278 21279 21280 21281 21282 21283 21284 21285 21286 21287 21288 21289 21290 21291 21292 21293 21294 21295 21296 21297 21298 21299 21300 21301 21302 21303 21304 21305 21306 21307 21308 21309 21310 21311 21312 21313 21314 21315 21316 21317 21318 21319 21320 21321 21322 21323 21324 21325 21326 21327 21328 21329 21330 21331 21332 21333 21334 21335 21336 21337 21338 21339 21340 21341 21342 21343 21344 21345 21346 21347 21348 21349 21350 21351 21352 21353 21354 21355 21356 21357 21358 21359 21360 21361 21362 21363 21364 21365 21366 21367 21368 21369 21370 21371 21372 21373 21374 21375 21376 21377 21378 21379 21380 21381 21382 21383 21384 21385 21386 21387 21388 21389 21390 21391 21392 21393 21394 21395 21396 21397 21398 21399 21400 21401 21402 21403 21404 21405 21406 21407 21408 21409 21410 21411 21412 21413 21414 21415 21416 21417 21418 21419 21420 21421 21422 21423 21424 21425 21426 21427 21428 21429 21430 21431 21432 21433 21434 21435 21436 21437 21438 21439 21440 21441 21442 21443 21444 21445 21446 21447 21448 21449 21450 21451 21452 21453 21454 21455 21456 21457 21458 21459 21460 21461 21462 21463 21464 21465 21466 21467 21468 21469 21470 21471 21472 21473 21474 21475 21476 21477 21478 21479 21480 21481 21482 21483 21484 21485 21486 21487 21488 21489 21490 21491 21492 21493 21494 21495 21496 21497 21498 21499 21500 21501 21502 21503 21504 21505 21506 21507 21508 21509 21510 21511 21512 21513 21514 21515 21516 21517 21518 21519 21520 21521 21522 21523 21524 21525 21526 21527 21528 21529 21530 21531 21532 21533 21534 21535 21536 21537 21538 21539 21540 21541 21542 21543 21544 21545 21546 21547 21548 21549 21550 21551 21552 21553 21554 21555 21556 21557 21558 21559 21560 21561 21562 21563 21564 21565 21566 21567 21568 21569 21570 21571 21572 21573 21574 21575 21576 21577 21578 21579 21580 21581 21582 21583 21584 21585 21586 21587 21588 21589 21590 21591 21592 21593 21594 21595 21596 21597 21598 21599 21600 21601 21602 21603 21604 21605 21606 21607 21608 21609 21610 21611 21612 21613 21614 21615 21616 21617 21618 21619 21620 21621 21622 21623 21624 21625 21626 21627 21628 21629 21630 21631 21632 21633 21634 21635 21636 21637 21638 21639 21640 21641 21642 21643 21644 21645 21646 21647 21648 21649 21650 21651 21652 21653 21654 21655 21656 21657 21658 21659 21660 21661 21662 21663 21664 21665 21666 21667 21668 21669 21670 21671 21672 21673 21674 21675 21676 21677 21678 21679 21680 21681 21682 21683 21684 21685 21686 21687 21688 21689 21690 21691 21692 21693 21694 21695 21696 21697 21698 21699 21700 21701 21702 21703 21704 21705 21706 21707 21708 21709 21710 21711 21712 21713 21714 21715 21716 21717 21718 21719 21720 21721 21722 21723 21724 21725 21726 21727 21728 21729 21730 21731 21732 21733 21734 21735 21736 21737 21738 21739 21740 21741 21742 21743 21744 21745 21746 21747 21748 21749 21750 21751 21752 21753 21754 21755 21756 21757 21758 21759 21760 21761 21762 21763 21764 21765 21766 21767 21768 21769 21770 21771 21772 21773 21774 21775 21776 21777 21778 21779 21780 21781 21782 21783 21784 21785 21786 21787 21788 21789 21790 21791 21792 21793 21794 21795 21796 21797 21798 21799 21800 21801 21802 21803 21804 21805 21806 21807 21808 21809 21810 21811 21812 21813 21814 21815 21816 21817 21818 21819 21820 21821 21822 21823 21824 21825 21826 21827 21828 21829 21830 21831 21832 21833 21834 21835 21836 21837 21838 21839 21840 21841 21842 21843 21844 21845 21846 21847 21848 21849 21850 21851 21852 21853 21854 21855 21856 21857 21858 21859 21860 21861 21862 21863 21864 21865 21866 21867 21868 21869 21870 21871 21872 21873 21874 21875 21876 21877 21878 21879 21880 21881 21882 21883 21884 21885 21886 21887 21888 21889 21890 21891 21892 21893 21894 21895 21896 21897 21898 21899 21900 21901 21902 21903 21904 21905 21906 21907 21908 21909 21910 21911 21912 21913 21914 21915 21916 21917 21918 21919 21920 21921 21922 21923 21924 21925 21926 21927 21928 21929 21930 21931 21932 21933 21934 21935 21936 21937 21938 21939 21940 21941 21942 21943 21944 21945 21946 21947 21948 21949 21950 21951 21952 21953 21954 21955 21956 21957 21958 21959 21960 21961 21962 21963 21964 21965 21966 21967 21968 21969 21970 21971 21972 21973 21974 21975 21976 21977 21978 21979 21980 21981 21982 21983 21984 21985 21986 21987 21988 21989 21990 21991 21992 21993 21994 21995 21996 21997 21998 21999 22000 22001 22002 22003 22004 22005 22006 22007 22008 22009 22010 22011 22012 22013 22014 22015 22016 22017 22018 22019 22020 22021 22022 22023 22024 22025 22026 22027 22028 22029 22030 22031 22032 22033 22034 22035 22036 22037 22038 22039 22040 22041 22042 22043 22044 22045 22046 22047 22048 22049 22050 22051 22052 22053 22054 22055 22056 22057 22058 22059 22060 22061 22062 22063 22064 22065 22066 22067 22068 22069 22070 22071 22072 22073 22074 22075 22076 22077 22078 22079 22080 22081 22082 22083 22084 22085 22086 22087 22088 22089 22090 22091 22092 22093 22094 22095 22096 22097 22098 22099 22100 22101 22102 22103 22104 22105 22106 22107 22108 22109 22110 22111 22112 22113 22114 22115 22116 22117 22118 22119 22120 22121 22122 22123 22124 22125 22126 22127 22128 22129 22130 22131 22132 22133 22134 22135 22136 22137 22138 22139 22140 22141 22142 22143 22144 22145 22146 22147 22148 22149 22150 22151 22152 22153 22154 22155 22156 22157 22158 22159 22160 22161 22162 22163 22164 22165 22166 22167 22168 22169 22170 22171 22172 22173 22174 22175 22176 22177 22178 22179 22180 22181 22182 22183 22184 22185 22186 22187 22188 22189 22190 22191 22192 22193 22194 22195 22196 22197 22198 22199 22200 22201 22202 22203 22204 22205 22206 22207 22208 22209 22210 22211 22212 22213 22214 22215 22216 22217 22218 22219 22220 22221 22222 22223 22224 22225 22226 22227 22228 22229 22230 22231 22232 22233 22234 22235 22236 22237 22238 22239 22240 22241 22242 22243 22244 22245 22246 22247 22248 22249 22250 22251 22252 22253 22254 22255 22256 22257 22258 22259 22260 22261 22262 22263 22264 22265 22266 22267 22268 22269 22270 22271 22272 22273 22274 22275 22276 22277 22278 22279 22280 22281 22282 22283 22284 22285 22286 22287 22288 22289 22290 22291 22292 22293 22294 22295 22296 22297 22298 22299 22300 22301 22302 22303 22304 22305 22306 22307 22308 22309 22310 22311 22312 22313 22314 22315 22316 22317 22318 22319 22320 22321 22322 22323 22324 22325 22326 22327 22328 22329 22330 22331 22332 22333 22334 22335 22336 22337 22338 22339 22340 22341 22342 22343 22344 22345 22346 22347 22348 22349 22350 22351 22352 22353 22354 22355 22356 22357 22358 22359 22360 22361 22362 22363 22364 22365 22366 22367 22368 22369 22370 22371 22372 22373 22374 22375 22376 22377 22378 22379 22380 22381 22382 22383 22384 22385 22386 22387 22388 22389 22390 22391 22392 22393 22394 22395 22396 22397 22398 22399 22400 22401 22402 22403 22404 22405 22406 22407 22408 22409 22410 22411 22412 22413 22414 22415 22416 22417 22418 22419 22420 22421 22422 22423 22424 22425 22426 22427 22428 22429 22430 22431 22432 22433 22434 22435 22436 22437 22438 22439 22440 22441 22442 22443 22444 22445 22446 22447 22448 22449 22450 22451 22452 22453 22454 22455 22456 22457 22458 22459 22460 22461 22462 22463 22464 22465 22466 22467 22468 22469 22470 22471 22472 22473 22474 22475 22476 22477 22478 22479 22480 22481 22482 22483 22484 22485 22486 22487 22488 22489 22490 22491 22492 22493 22494 22495 22496 22497 22498 22499 22500 22501 22502 22503 22504 22505 22506 22507 22508 22509 22510 22511 22512 22513 22514 22515 22516 22517 22518 22519 22520 22521 22522 22523 22524 22525 22526 22527 22528 22529 22530 22531 22532 22533 22534 22535 22536 22537 22538 22539 22540 22541 22542 22543 22544 22545 22546 22547 22548 22549 22550 22551 22552 22553 22554 22555 22556 22557 22558 22559 22560 22561 22562 22563 22564 22565 22566 22567 22568 22569 22570 22571 22572 22573 22574 22575 22576 22577 22578 22579 22580 22581 22582 22583 22584 22585 22586 22587 22588 22589 22590 22591 22592 22593 22594 22595 22596 22597 22598 22599 22600 22601 22602 22603 22604 22605 22606 22607 22608 22609 22610 22611 22612 22613 22614 22615 22616 22617 22618 22619 22620 22621 22622 22623 22624 22625 22626 22627 22628 22629 22630 22631 22632 22633 22634 22635 22636 22637 22638 22639 22640 22641 22642 22643 22644 22645 22646 22647 22648 22649 22650 22651 22652 22653 22654 22655 22656 22657 22658 22659 22660 22661 22662 22663 22664 22665 22666 22667 22668 22669 22670 22671 22672 22673 22674 22675 22676 22677 22678 22679 22680 22681 22682 22683 22684 22685 22686 22687 22688 22689 22690 22691 22692 22693 22694 22695 22696 22697 22698 22699 22700 22701 22702 22703 22704 22705 22706 22707 22708 22709 22710 22711 22712 22713 22714 22715 22716 22717 22718 22719 22720 22721 22722 22723 22724 22725 22726 22727 22728 22729 22730 22731 22732 22733 22734 22735 22736 22737 22738 22739 22740 22741 22742 22743 22744 22745 22746 22747 22748 22749 22750 22751 22752 22753 22754 22755 22756 22757 22758 22759 22760 22761 22762 22763 22764 22765 22766 22767 22768 22769 22770 22771 22772 22773 22774 22775 22776 22777 22778 22779 22780 22781 22782 22783 22784 22785 22786 22787 22788 22789 22790 22791 22792 22793 22794 22795 22796 22797 22798 22799 22800 22801 22802 22803 22804 22805 22806 22807 22808 22809 22810 22811 22812 22813 22814 22815 22816 22817 22818 22819 22820 22821 22822 22823 22824 22825 22826 22827 22828 22829 22830 22831 22832 22833 22834 22835 22836 22837 22838 22839 22840 22841 22842 22843 22844 22845 22846 22847 22848 22849 22850 22851 22852 22853 22854 22855 22856 22857 22858 22859 22860 22861 22862 22863 22864 22865 22866 22867 22868 22869 22870 22871 22872 22873 22874 22875 22876 22877 22878 22879 22880 22881 22882 22883 22884 22885 22886 22887 22888 22889 22890 22891 22892 22893 22894 22895 22896 22897 22898 22899 22900 22901 22902 22903 22904 22905 22906 22907 22908 22909 22910 22911 22912 22913 22914 22915 22916 22917 22918 22919 22920 22921 22922 22923 22924 22925 22926 22927 22928 22929 22930 22931 22932 22933 22934 22935 22936 22937 22938 22939 22940 22941 22942 22943 22944 22945 22946 22947 22948 22949 22950 22951 22952 22953 22954 22955 22956 22957 22958 22959 22960 22961 22962 22963 22964 22965 22966 22967 22968 22969 22970 22971 22972 22973 22974 22975 22976 22977 22978 22979 22980 22981 22982 22983 22984 22985 22986 22987 22988 22989 22990 22991 22992 22993 22994 22995 22996 22997 22998 22999 23000 23001 23002 23003 23004 23005 23006 23007 23008 23009 23010 23011 23012 23013 23014 23015 23016 23017 23018 23019 23020 23021 23022 23023 23024 23025 23026 23027 23028 23029 23030 23031 23032 23033 23034 23035 23036 23037 23038 23039 23040 23041 23042 23043 23044 23045 23046 23047 23048 23049 23050 23051 23052 23053 23054 23055 23056 23057 23058 23059 23060 23061 23062 23063 23064 23065 23066 23067 23068 23069 23070 23071 23072 23073 23074 23075 23076 23077 23078 23079 23080 23081 23082 23083 23084 23085 23086 23087 23088 23089 23090 23091 23092 23093 23094 23095 23096 23097 23098 23099 23100 23101 23102 23103 23104 23105 23106 23107 23108 23109 23110 23111 23112 23113 23114 23115 23116 23117 23118 23119 23120 23121 23122 23123 23124 23125 23126 23127 23128 23129 23130 23131 23132 23133 23134 23135 23136 23137 23138 23139 23140 23141 23142 23143 23144 23145 23146 23147 23148 23149 23150 23151 23152 23153 23154 23155 23156 23157 23158 23159 23160 23161 23162 23163 23164 23165 23166 23167 23168 23169 23170 23171 23172 23173 23174 23175 23176 23177 23178 23179 23180 23181 23182 23183 23184 23185 23186 23187 23188 23189 23190 23191 23192 23193 23194 23195 23196 23197 23198 23199 23200 23201 23202 23203 23204 23205 23206 23207 23208 23209 23210 23211 23212 23213 23214 23215 23216 23217 23218 23219 23220 23221 23222 23223 23224 23225 23226 23227 23228 23229 23230 23231 23232 23233 23234 23235 23236 23237 23238 23239 23240 23241 23242 23243 23244 23245 23246 23247 23248 23249 23250 23251 23252 23253 23254 23255 23256 23257 23258 23259 23260 23261 23262 23263 23264 23265 23266 23267 23268 23269 23270 23271 23272 23273 23274 23275 23276 23277 23278 23279 23280 23281 23282 23283 23284 23285 23286 23287 23288 23289 23290 23291 23292 23293 23294 23295 23296 23297 23298 23299 23300 23301 23302 23303 23304 23305 23306 23307 23308 23309 23310 23311 23312 23313 23314 23315 23316 23317 23318 23319 23320 23321 23322 23323 23324 23325 23326 23327 23328 23329 23330 23331 23332 23333 23334 23335 23336 23337 23338 23339 23340 23341 23342 23343 23344 23345 23346 23347 23348 23349 23350 23351 23352 23353 23354 23355 23356 23357 23358 23359 23360 23361 23362 23363 23364 23365 23366 23367 23368 23369 23370 23371 23372 23373 23374 23375 23376 23377 23378 23379 23380 23381 23382 23383 23384 23385 23386 23387 23388 23389 23390 23391 23392 23393 23394 23395 23396 23397 23398 23399 23400 23401 23402 23403 23404 23405 23406 23407 23408 23409 23410 23411 23412 23413 23414 23415 23416 23417 23418 23419 23420 23421 23422 23423 23424 23425 23426 23427 23428 23429 23430 23431 23432 23433 23434 23435 23436 23437 23438 23439 23440 23441 23442 23443 23444 23445 23446 23447 23448 23449 23450 23451 23452 23453 23454 23455 23456 23457 23458 23459 23460 23461 23462 23463 23464 23465 23466 23467 23468 23469 23470 23471 23472 23473 23474 23475 23476 23477 23478 23479 23480 23481 23482 23483 23484 23485 23486 23487 23488 23489 23490 23491 23492 23493 23494 23495 23496 23497 23498 23499 23500 23501 23502 23503 23504 23505 23506 23507 23508 23509 23510 23511 23512 23513 23514 23515 23516 23517 23518 23519 23520 23521 23522 23523 23524 23525 23526 23527 23528 23529 23530 23531 23532 23533 23534 23535 23536 23537 23538 23539 23540 23541 23542 23543 23544 23545 23546 23547 23548 23549 23550 23551 23552 23553 23554 23555 23556 23557 23558 23559 23560 23561 23562 23563 23564 23565 23566 23567 23568 23569 23570 23571 23572 23573 23574 23575 23576 23577 23578 23579 23580 23581 23582 23583 23584 23585 23586 23587 23588 23589 23590 23591 23592 23593 23594 23595 23596 23597 23598 23599 23600 23601 23602 23603 23604 23605 23606 23607 23608 23609 23610 23611 23612 23613 23614 23615 23616 23617 23618 23619 23620 23621 23622 23623 23624 23625 23626 23627 23628 23629 23630 23631 23632 23633 23634 23635 23636 23637 23638 23639 23640 23641 23642 23643 23644 23645 23646 23647 23648 23649 23650 23651 23652 23653 23654 23655 23656 23657 23658 23659 23660 23661 23662 23663 23664 23665 23666 23667 23668 23669 23670 23671 23672 23673 23674 23675 23676 23677 23678 23679 23680 23681 23682 23683 23684 23685 23686 23687 23688 23689 23690 23691 23692 23693 23694 23695 23696 23697 23698 23699 23700 23701 23702 23703 23704 23705 23706 23707 23708 23709 23710 23711 23712 23713 23714 23715 23716 23717 23718 23719 23720 23721 23722 23723 23724 23725 23726 23727 23728 23729 23730 23731 23732 23733 23734 23735 23736 23737 23738 23739 23740 23741 23742 23743 23744 23745 23746 23747 23748 23749 23750 23751 23752 23753 23754 23755 23756 23757 23758 23759 23760 23761 23762 23763 23764 23765 23766 23767 23768 23769 23770 23771 23772 23773 23774 23775 23776 23777 23778 23779 23780 23781 23782 23783 23784 23785 23786 23787 23788 23789 23790 23791 23792 23793 23794 23795 23796 23797 23798 23799 23800 23801 23802 23803 23804 23805 23806 23807 23808 23809 23810 23811 23812 23813 23814 23815 23816 23817 23818 23819 23820 23821 23822 23823 23824 23825 23826 23827 23828 23829 23830 23831 23832 23833 23834 23835 23836 23837 23838 23839 23840 23841 23842 23843 23844 23845 23846 23847 23848 23849 23850 23851 23852 23853 23854 23855 23856 23857 23858 23859 23860 23861 23862 23863 23864 23865 23866 23867 23868 23869 23870 23871 23872 23873 23874 23875 23876 23877 23878 23879 23880 23881 23882 23883 23884 23885 23886 23887 23888 23889 23890 23891 23892 23893 23894 23895 23896 23897 23898 23899 23900 23901 23902 23903 23904 23905 23906 23907 23908 23909 23910 23911 23912 23913 23914 23915 23916 23917 23918 23919 23920 23921 23922 23923 23924 23925 23926 23927 23928 23929 23930 23931 23932 23933 23934 23935 23936 23937 23938 23939 23940 23941 23942 23943 23944 23945 23946 23947 23948 23949 23950 23951 23952 23953 23954 23955 23956 23957 23958 23959 23960 23961 23962 23963 23964 23965 23966 23967 23968 23969 23970 23971 23972 23973 23974 23975 23976 23977 23978 23979 23980 23981 23982 23983 23984 23985 23986 23987 23988 23989 23990 23991 23992 23993 23994 23995 23996 23997 23998 23999 24000 24001 24002 24003 24004 24005 24006 24007 24008 24009 24010 24011 24012 24013 24014 24015 24016 24017 24018 24019 24020 24021 24022 24023 24024 24025 24026 24027 24028 24029 24030 24031 24032 24033 24034 24035 24036 24037 24038 24039 24040 24041 24042 24043 24044 24045 24046 24047 24048 24049 24050 24051 24052 24053 24054 24055 24056 24057 24058 24059 24060 24061 24062 24063 24064 24065 24066 24067 24068 24069 24070 24071 24072 24073 24074 24075 24076 24077 24078 24079 24080 24081 24082 24083 24084 24085 24086 24087 24088 24089 24090 24091 24092 24093 24094 24095 24096 24097 24098 24099 24100 24101 24102 24103 24104 24105 24106 24107 24108 24109 24110 24111 24112 24113 24114 24115 24116 24117 24118 24119 24120 24121 24122 24123 24124 24125 24126 24127 24128 24129 24130 24131 24132 24133 24134 24135 24136 24137 24138 24139 24140 24141 24142 24143 24144 24145 24146 24147 24148 24149 24150 24151 24152 24153 24154 24155 24156 24157 24158 24159 24160 24161 24162 24163 24164 24165 24166 24167 24168 24169 24170 24171 24172 24173 24174 24175 24176 24177 24178 24179 24180 24181 24182 24183 24184 24185 24186 24187 24188 24189 24190 24191 24192 24193 24194 24195 24196 24197 24198 24199 24200 24201 24202 24203 24204 24205 24206 24207 24208 24209 24210 24211 24212 24213 24214 24215 24216 24217 24218 24219 24220 24221 24222 24223 24224 24225 24226 24227 24228 24229 24230 24231 24232 24233 24234 24235 24236 24237 24238 24239 24240 24241 24242 24243 24244 24245 24246 24247 24248 24249 24250 24251 24252 24253 24254 24255 24256 24257 24258 24259 24260 24261 24262 24263 24264 24265 24266 24267 24268 24269 24270 24271 24272 24273 24274 24275 24276 24277 24278 24279 24280 24281 24282 24283 24284 24285 24286 24287 24288 24289 24290 24291 24292 24293 24294 24295 24296 24297 24298 24299 24300 24301 24302 24303 24304 24305 24306 24307 24308 24309 24310 24311 24312 24313 24314 24315 24316 24317 24318 24319 24320 24321 24322 24323 24324 24325 24326 24327 24328 24329 24330 24331 24332 24333 24334 24335 24336 24337 24338 24339 24340 24341 24342 24343 24344 24345 24346 24347 24348 24349 24350 24351 24352 24353 24354 24355 24356 24357 24358 24359 24360 24361 24362 24363 24364 24365 24366 24367 24368 24369 24370 24371 24372 24373 24374 24375 24376 24377 24378 24379 24380 24381 24382 24383 24384 24385 24386 24387 24388 24389 24390 24391 24392 24393 24394 24395 24396 24397 24398 24399 24400 24401 24402 24403 24404 24405 24406 24407 24408 24409 24410 24411 24412 24413 24414 24415 24416 24417 24418 24419 24420 24421 24422 24423 24424 24425 24426 24427 24428 24429 24430 24431 24432 24433 24434 24435 24436 24437 24438 24439 24440 24441 24442 24443 24444 24445 24446 24447 24448 24449 24450 24451 24452 24453 24454 24455 24456 24457 24458 24459 24460 24461 24462 24463 24464 24465 24466 24467 24468 24469 24470 24471 24472 24473 24474 24475 24476 24477 24478 24479 24480 24481 24482 24483 24484 24485 24486 24487 24488 24489 24490 24491 24492 24493 24494 24495 24496 24497 24498 24499 24500 24501 24502 24503 24504 24505 24506 24507 24508 24509 24510 24511 24512 24513 24514 24515 24516 24517 24518 24519 24520 24521 24522 24523 24524 24525 24526 24527 24528 24529 24530 24531 24532 24533 24534 24535 24536 24537 24538 24539 24540 24541 24542 24543 24544 24545 24546 24547 24548 24549 24550 24551 24552 24553 24554 24555 24556 24557 24558 24559 24560 24561 24562 24563 24564 24565 24566 24567 24568 24569 24570 24571 24572 24573 24574 24575 24576 24577 24578 24579 24580 24581 24582 24583 24584 24585 24586 24587 24588 24589 24590 24591 24592 24593 24594 24595 24596 24597 24598 24599 24600 24601 24602 24603 24604 24605 24606 24607 24608 24609 24610 24611 24612 24613 24614 24615 24616 24617 24618 24619 24620 24621 24622 24623 24624 24625 24626 24627 24628 24629 24630 24631 24632 24633 24634 24635 24636 24637 24638 24639 24640 24641 24642 24643 24644 24645 24646 24647 24648 24649 24650 24651 24652 24653 24654 24655 24656 24657 24658 24659 24660 24661 24662 24663 24664 24665 24666 24667 24668 24669 24670 24671 24672 24673 24674 24675 24676 24677 24678 24679 24680 24681 24682 24683 24684 24685 24686 24687 24688 24689 24690 24691 24692 24693 24694 24695 24696 24697 24698 24699 24700 24701 24702 24703 24704 24705 24706 24707 24708 24709 24710 24711 24712 24713 24714 24715 24716 24717 24718 24719 24720 24721 24722 24723 24724 24725 24726 24727 24728 24729 24730 24731 24732 24733 24734 24735 24736 24737 24738 24739 24740 24741 24742 24743 24744 24745 24746 24747 24748 24749 24750 24751 24752 24753 24754 24755 24756 24757 24758 24759 24760 24761 24762 24763 24764 24765 24766 24767 24768 24769 24770 24771 24772 24773 24774 24775 24776 24777 24778 24779 24780 24781 24782 24783 24784 24785 24786 24787 24788 24789 24790 24791 24792 24793 24794 24795 24796 24797 24798 24799 24800 24801 24802 24803 24804 24805 24806 24807 24808 24809 24810 24811 24812 24813 24814 24815 24816 24817 24818 24819 24820 24821 24822 24823 24824 24825 24826 24827 24828 24829 24830 24831 24832 24833 24834 24835 24836 24837 24838 24839 24840 24841 24842 24843 24844 24845 24846 24847 24848 24849 24850 24851 24852 24853 24854 24855 24856 24857 24858 24859 24860 24861 24862 24863 24864 24865 24866 24867 24868 24869 24870 24871 24872 24873 24874 24875 24876 24877 24878 24879 24880 24881 24882 24883 24884 24885 24886 24887 24888 24889 24890 24891 24892 24893 24894 24895 24896 24897 24898 24899 24900 24901 24902 24903 24904 24905 24906 24907 24908 24909 24910 24911 24912 24913 24914 24915 24916 24917 24918 24919 24920 24921 24922 24923 24924 24925 24926 24927 24928 24929 24930 24931 24932 24933 24934 24935 24936 24937 24938 24939 24940 24941 24942 24943 24944 24945 24946 24947 24948 24949 24950 24951 24952 24953 24954 24955 24956 24957 24958 24959 24960 24961 24962 24963 24964 24965 24966 24967 24968 24969 24970 24971 24972 24973 24974 24975 24976 24977 24978 24979 24980 24981 24982 24983 24984 24985 24986 24987 24988 24989 24990 24991 24992 24993 24994 24995 24996 24997 24998 24999 25000 25001 25002 25003 25004 25005 25006 25007 25008 25009 25010 25011 25012 25013 25014 25015 25016 25017 25018 25019 25020 25021 25022 25023 25024 25025 25026 25027 25028 25029 25030 25031 25032 25033 25034 25035 25036 25037 25038 25039 25040 25041 25042 25043 25044 25045 25046 25047 25048 25049 25050 25051 25052 25053 25054 25055 25056 25057 25058 25059 25060 25061 25062 25063 25064 25065 25066 25067 25068 25069 25070 25071 25072 25073 25074 25075 25076 25077 25078 25079 25080 25081 25082 25083 25084 25085 25086 25087 25088 25089 25090 25091 25092 25093 25094 25095 25096 25097 25098 25099 25100 25101 25102 25103 25104 25105 25106 25107 25108 25109 25110 25111 25112 25113 25114 25115 25116 25117 25118 25119 25120 25121 25122 25123 25124 25125 25126 25127 25128 25129 25130 25131 25132 25133 25134 25135 25136 25137 25138 25139 25140 25141 25142 25143 25144 25145 25146 25147 25148 25149 25150 25151 25152 25153 25154 25155 25156 25157 25158 25159 25160 25161 25162 25163 25164 25165 25166 25167 25168 25169 25170 25171 25172 25173 25174 25175 25176 25177 25178 25179 25180 25181 25182 25183 25184 25185 25186 25187 25188 25189 25190 25191 25192 25193 25194 25195 25196 25197 25198 25199 25200 25201 25202 25203 25204 25205 25206 25207 25208 25209 25210 25211 25212 25213 25214 25215 25216 25217 25218 25219 25220 25221 25222 25223 25224 25225 25226 25227 25228 25229 25230 25231 25232 25233 25234 25235 25236 25237 25238 25239 25240 25241 25242 25243 25244 25245 25246 25247 25248 25249 25250 25251 25252 25253 25254 25255 25256 25257 25258 25259 25260 25261 25262 25263 25264 25265 25266 25267 25268 25269 25270 25271 25272 25273 25274 25275 25276 25277 25278 25279 25280 25281 25282 25283 25284 25285 25286 25287 25288 25289 25290 25291 25292 25293 25294 25295 25296 25297 25298 25299 25300 25301 25302 25303 25304 25305 25306 25307 25308 25309 25310 25311 25312 25313 25314 25315 25316 25317 25318 25319 25320 25321 25322 25323 25324 25325 25326 25327 25328 25329 25330 25331 25332 25333 25334 25335 25336 25337 25338 25339 25340 25341 25342 25343 25344 25345 25346 25347 25348 25349 25350 25351 25352 25353 25354 25355 25356 25357 25358 25359 25360 25361 25362 25363 25364 25365 25366 25367 25368 25369 25370 25371 25372 25373 25374 25375 25376 25377 25378 25379 25380 25381 25382 25383 25384 25385 25386 25387 25388 25389 25390 25391 25392 25393 25394 25395 25396 25397 25398 25399 25400 25401 25402 25403 25404 25405 25406 25407 25408 25409 25410 25411 25412 25413 25414 25415 25416 25417 25418 25419 25420 25421 25422 25423 25424 25425 25426 25427 25428 25429 25430 25431 25432 25433 25434 25435 25436 25437 25438 25439 25440 25441 25442 25443 25444 25445 25446 25447 25448 25449 25450 25451 25452 25453 25454 25455 25456 25457 25458 25459 25460 25461 25462 25463 25464 25465 25466 25467 25468 25469 25470 25471 25472 25473 25474 25475 25476 25477 25478 25479 25480 25481 25482 25483 25484 25485 25486 25487 25488 25489 25490 25491 25492 25493 25494 25495 25496 25497 25498 25499 25500 25501 25502 25503 25504 25505 25506 25507 25508 25509 25510 25511 25512 25513 25514 25515 25516 25517 25518 25519 25520 25521 25522 25523 25524 25525 25526 25527 25528 25529 25530 25531 25532 25533 25534 25535 25536 25537 25538 25539 25540 25541 25542 25543 25544 25545 25546 25547 25548 25549 25550 25551 25552 25553 25554 25555 25556 25557 25558 25559 25560 25561 25562 25563 25564 25565 25566 25567 25568 25569 25570 25571 25572 25573 25574 25575 25576 25577 25578 25579 25580 25581 25582 25583 25584 25585 25586 25587 25588 25589 25590 25591 25592 25593 25594 25595 25596 25597 25598 25599 25600 25601 25602 25603 25604 25605 25606 25607 25608 25609 25610 25611 25612 25613 25614 25615 25616 25617 25618 25619 25620 25621 25622 25623 25624 25625 25626 25627 25628 25629 25630 25631 25632 25633 25634 25635 25636 25637 25638 25639 25640 25641 25642 25643 25644 25645 25646 25647 25648 25649 25650 25651 25652 25653 25654 25655 25656 25657 25658 25659 25660 25661 25662 25663 25664 25665 25666 25667 25668 25669 25670 25671 25672 25673 25674 25675 25676 25677 25678 25679 25680 25681 25682 25683 25684 25685 25686 25687 25688 25689 25690 25691 25692 25693 25694 25695 25696 25697 25698 25699 25700 25701 25702 25703 25704 25705 25706 25707 25708 25709 25710 25711 25712 25713 25714 25715 25716 25717 25718 25719 25720 25721 25722 25723 25724 25725 25726 25727 25728 25729 25730 25731 25732 25733 25734 25735 25736 25737 25738 25739 25740 25741 25742 25743 25744 25745 25746 25747 25748 25749 25750 25751 25752 25753 25754 25755 25756 25757 25758 25759 25760 25761 25762 25763 25764 25765 25766 25767 25768 25769 25770 25771 25772 25773 25774 25775 25776 25777 25778 25779 25780 25781 25782 25783 25784 25785 25786 25787 25788 25789 25790 25791 25792 25793 25794 25795 25796 25797 25798 25799 25800 25801 25802 25803 25804 25805 25806 25807 25808 25809 25810 25811 25812 25813 25814 25815 25816 25817 25818 25819 25820 25821 25822 25823 25824 25825 25826 25827 25828 25829 25830 25831 25832 25833 25834 25835 25836 25837 25838 25839 25840 25841 25842 25843 25844 25845 25846 25847 25848 25849 25850 25851 25852 25853 25854 25855 25856 25857 25858 25859 25860 25861 25862 25863 25864 25865 25866 25867 25868 25869 25870 25871 25872 25873 25874 25875 25876 25877 25878 25879 25880 25881 25882 25883 25884 25885 25886 25887 25888 25889 25890 25891 25892 25893 25894 25895 25896 25897 25898 25899 25900 25901 25902 25903 25904 25905 25906 25907 25908 25909 25910 25911 25912 25913 25914 25915 25916 25917 25918 25919 25920 25921 25922 25923 25924 25925 25926 25927 25928 25929 25930 25931 25932 25933 25934 25935 25936 25937 25938 25939 25940 25941 25942 25943 25944 25945 25946 25947 25948 25949 25950 25951 25952 25953 25954 25955 25956 25957 25958 25959 25960 25961 25962 25963 25964 25965 25966 25967 25968 25969 25970 25971 25972 25973 25974 25975 25976 25977 25978 25979 25980 25981 25982 25983 25984 25985 25986 25987 25988 25989 25990 25991 25992 25993 25994 25995 25996 25997 25998 25999 26000 26001 26002 26003 26004 26005 26006 26007 26008 26009 26010 26011 26012 26013 26014 26015 26016 26017 26018 26019 26020 26021 26022 26023 26024 26025 26026 26027 26028 26029 26030 26031 26032 26033 26034 26035 26036 26037 26038 26039 26040 26041 26042 26043 26044 26045 26046 26047 26048 26049 26050 26051 26052 26053 26054 26055 26056 26057 26058 26059 26060 26061 26062 26063 26064 26065 26066 26067 26068 26069 26070 26071 26072 26073 26074 26075 26076 26077 26078 26079 26080 26081 26082 26083 26084 26085 26086 26087 26088 26089 26090 26091 26092 26093 26094 26095 26096 26097 26098 26099 26100 26101 26102 26103 26104 26105 26106 26107 26108 26109 26110 26111 26112 26113 26114 26115 26116 26117 26118 26119 26120 26121 26122 26123 26124 26125 26126 26127 26128 26129 26130 26131 26132 26133 26134 26135 26136 26137 26138 26139 26140 26141 26142 26143 26144 26145 26146 26147 26148 26149 26150 26151 26152 26153 26154 26155 26156 26157 26158 26159 26160 26161 26162 26163 26164 26165 26166 26167 26168 26169 26170 26171 26172 26173 26174 26175 26176 26177 26178 26179 26180 26181 26182 26183 26184 26185 26186 26187 26188 26189 26190 26191 26192 26193 26194 26195 26196 26197 26198 26199 26200 26201 26202 26203 26204 26205 26206 26207 26208 26209 26210 26211 26212 26213 26214 26215 26216 26217 26218 26219 26220 26221 26222 26223 26224 26225 26226 26227 26228 26229 26230 26231 26232 26233 26234 26235 26236 26237 26238 26239 26240 26241 26242 26243 26244 26245 26246 26247 26248 26249 26250 26251 26252 26253 26254 26255 26256 26257 26258 26259 26260 26261 26262 26263 26264 26265 26266 26267 26268 26269 26270 26271 26272 26273 26274 26275 26276 26277 26278 26279 26280 26281 26282 26283 26284 26285 26286 26287 26288 26289 26290 26291 26292 26293 26294 26295 26296 26297 26298 26299 26300 26301 26302 26303 26304 26305 26306 26307 26308 26309 26310 26311 26312 26313 26314 26315 26316 26317 26318 26319 26320 26321 26322 26323 26324 26325 26326 26327 26328 26329 26330 26331 26332 26333 26334 26335 26336 26337 26338 26339 26340 26341 26342 26343 26344 26345 26346 26347 26348 26349 26350 26351 26352 26353 26354 26355 26356 26357 26358 26359 26360 26361 26362 26363 26364 26365 26366 26367 26368 26369 26370 26371 26372 26373 26374 26375 26376 26377 26378 26379 26380 26381 26382 26383 26384 26385 26386 26387 26388 26389 26390 26391 26392 26393 26394 26395 26396 26397 26398 26399 26400 26401 26402 26403 26404 26405 26406 26407 26408 26409 26410 26411 26412 26413 26414 26415 26416 26417 26418 26419 26420 26421 26422 26423 26424 26425 26426 26427 26428 26429 26430 26431 26432 26433 26434 26435 26436 26437 26438 26439 26440 26441 26442 26443 26444 26445 26446 26447 26448 26449 26450 26451 26452 26453 26454 26455 26456 26457 26458 26459 26460 26461 26462 26463 26464 26465 26466 26467 26468 26469 26470 26471 26472 26473 26474 26475 26476 26477 26478 26479 26480 26481 26482 26483 26484 26485 26486 26487 26488 26489 26490 26491 26492 26493 26494 26495 26496 26497 26498 26499 26500 26501 26502 26503 26504 26505 26506 26507 26508 26509 26510 26511 26512 26513 26514 26515 26516 26517 26518 26519 26520 26521 26522 26523 26524 26525 26526 26527 26528 26529 26530 26531 26532 26533 26534 26535 26536 26537 26538 26539 26540 26541 26542 26543 26544 26545 26546 26547 26548 26549 26550 26551 26552 26553 26554 26555 26556 26557 26558 26559 26560 26561 26562 26563 26564 26565 26566 26567 26568 26569 26570 26571 26572 26573 26574 26575 26576 26577 26578 26579 26580 26581 26582 26583 26584 26585 26586 26587 26588 26589 26590 26591 26592 26593 26594 26595 26596 26597 26598 26599 26600 26601 26602 26603 26604 26605 26606 26607 26608 26609 26610 26611 26612 26613 26614 26615 26616 26617 26618 26619 26620 26621 26622 26623 26624 26625 26626 26627 26628 26629 26630 26631 26632 26633 26634 26635 26636 26637 26638 26639 26640 26641 26642 26643 26644 26645 26646 26647 26648 26649 26650 26651 26652 26653 26654 26655 26656 26657 26658 26659 26660 26661 26662 26663 26664 26665 26666 26667 26668 26669 26670 26671 26672 26673 26674 26675 26676 26677 26678 26679 26680 26681 26682 26683 26684 26685 26686 26687 26688 26689 26690 26691 26692 26693 26694 26695 26696 26697 26698 26699 26700 26701 26702 26703 26704 26705 26706 26707 26708 26709 26710 26711 26712 26713 26714 26715 26716 26717 26718 26719 26720 26721 26722 26723 26724 26725 26726 26727 26728 26729 26730 26731 26732 26733 26734 26735 26736 26737 26738 26739 26740 26741 26742 26743 26744 26745 26746 26747 26748 26749 26750 26751 26752 26753 26754 26755 26756 26757 26758 26759 26760 26761 26762 26763 26764 26765 26766 26767 26768 26769 26770 26771 26772 26773 26774 26775 26776 26777 26778 26779 26780 26781 26782 26783 26784 26785 26786 26787 26788 26789 26790 26791 26792 26793 26794 26795 26796 26797 26798 26799 26800 26801 26802 26803 26804 26805 26806 26807 26808 26809 26810 26811 26812 26813 26814 26815 26816 26817 26818 26819 26820 26821 26822 26823 26824 26825 26826 26827 26828 26829 26830 26831 26832 26833 26834 26835 26836 26837 26838 26839 26840 26841 26842 26843 26844 26845 26846 26847 26848 26849 26850 26851 26852 26853 26854 26855 26856 26857 26858 26859 26860 26861 26862 26863 26864 26865 26866 26867 26868 26869 26870 26871 26872 26873 26874 26875 26876 26877 26878 26879 26880 26881 26882 26883 26884 26885 26886 26887 26888 26889 26890 26891 26892 26893 26894 26895 26896 26897 26898 26899 26900 26901 26902 26903 26904 26905 26906 26907 26908 26909 26910 26911 26912 26913 26914 26915 26916 26917 26918 26919 26920 26921 26922 26923 26924 26925 26926 26927 26928 26929 26930 26931 26932 26933 26934 26935 26936 26937 26938 26939 26940 26941 26942 26943 26944 26945 26946 26947 26948 26949 26950 26951 26952 26953 26954 26955 26956 26957 26958 26959 26960 26961 26962 26963 26964 26965 26966 26967 26968 26969 26970 26971 26972 26973 26974 26975 26976 26977 26978 26979 26980 26981 26982 26983 26984 26985 26986 26987 26988 26989 26990 26991 26992 26993 26994 26995 26996 26997 26998 26999 27000 27001 27002 27003 27004 27005 27006 27007 27008 27009 27010 27011 27012 27013 27014 27015 27016 27017 27018 27019 27020 27021 27022 27023 27024 27025 27026 27027 27028 27029 27030 27031 27032 27033 27034 27035 27036 27037 27038 27039 27040 27041 27042 27043 27044 27045 27046 27047 27048 27049 27050 27051 27052 27053 27054 27055 27056 27057 27058 27059 27060 27061 27062 27063 27064 27065 27066 27067 27068 27069 27070 27071 27072 27073 27074 27075 27076 27077 27078 27079 27080 27081 27082 27083 27084 27085 27086 27087 27088 27089 27090 27091 27092 27093 27094 27095 27096 27097 27098 27099 27100 27101 27102 27103 27104 27105 27106 27107 27108 27109 27110 27111 27112 27113 27114 27115 27116 27117 27118 27119 27120 27121 27122 27123 27124 27125 27126 27127 27128 27129 27130 27131 27132 27133 27134 27135 27136 27137 27138 27139 27140 27141 27142 27143 27144 27145 27146 27147 27148 27149 27150 27151 27152 27153 27154 27155 27156 27157 27158 27159 27160 27161 27162 27163 27164 27165 27166 27167 27168 27169 27170 27171 27172 27173 27174 27175 27176 27177 27178 27179 27180 27181 27182 27183 27184 27185 27186 27187 27188 27189 27190 27191 27192 27193 27194 27195 27196 27197 27198 27199 27200 27201 27202 27203 27204 27205 27206 27207 27208 27209 27210 27211 27212 27213 27214 27215 27216 27217 27218 27219 27220 27221 27222 27223 27224 27225 27226 27227 27228 27229 27230 27231 27232 27233 27234 27235 27236 27237 27238 27239 27240 27241 27242 27243 27244 27245 27246 27247 27248 27249 27250 27251 27252 27253 27254 27255 27256 27257 27258 27259 27260 27261 27262 27263 27264 27265 27266 27267 27268 27269 27270 27271 27272 27273 27274 27275 27276 27277 27278 27279 27280 27281 27282 27283 27284 27285 27286 27287 27288 27289 27290 27291 27292 27293 27294 27295 27296 27297 27298 27299 27300 27301 27302 27303 27304 27305 27306 27307 27308 27309 27310 27311 27312 27313 27314 27315 27316 27317 27318 27319 27320 27321 27322 27323 27324 27325 27326 27327 27328 27329 27330 27331 27332 27333 27334 27335 27336 27337 27338 27339 27340 27341 27342 27343 27344 27345 27346 27347 27348 27349 27350 27351 27352 27353 27354 27355 27356 27357 27358 27359 27360 27361 27362 27363 27364 27365 27366 27367 27368 27369 27370 27371 27372 27373 27374 27375 27376 27377 27378 27379 27380 27381 27382 27383 27384 27385 27386 27387 27388 27389 27390 27391 27392 27393 27394 27395 27396 27397 27398 27399 27400 27401 27402 27403 27404 27405 27406 27407 27408 27409 27410 27411 27412 27413 27414 27415 27416 27417 27418 27419 27420 27421 27422 27423 27424 27425 27426 27427 27428 27429 27430 27431 27432 27433 27434 27435 27436 27437 27438 27439 27440 27441 27442 27443 27444 27445 27446 27447 27448 27449 27450 27451 27452 27453 27454 27455 27456 27457 27458 27459 27460 27461 27462 27463 27464 27465 27466 27467 27468 27469 27470 27471 27472 27473 27474 27475 27476 27477 27478 27479 27480 27481 27482 27483 27484 27485 27486 27487 27488 27489 27490 27491 27492 27493 27494 27495 27496 27497 27498 27499 27500 27501 27502 27503 27504 27505 27506 27507 27508 27509 27510 27511 27512 27513 27514 27515 27516 27517 27518 27519 27520 27521 27522 27523 27524 27525 27526 27527 27528 27529 27530 27531 27532 27533 27534 27535 27536 27537 27538 27539 27540 27541 27542 27543 27544 27545 27546 27547 27548 27549 27550 27551 27552 27553 27554 27555 27556 27557 27558 27559 27560 27561 27562 27563 27564 27565 27566 27567 27568 27569 27570 27571 27572 27573 27574 27575 27576 27577 27578 27579 27580 27581 27582 27583 27584 27585 27586 27587 27588 27589 27590 27591 27592 27593 27594 27595 27596 27597 27598 27599 27600 27601 27602 27603 27604 27605 27606 27607 27608 27609 27610 27611 27612 27613 27614 27615 27616 27617 27618 27619 27620 27621 27622 27623 27624 27625 27626 27627 27628 27629 27630 27631 27632 27633 27634 27635 27636 27637 27638 27639 27640 27641 27642 27643 27644 27645 27646 27647 27648 27649 27650 27651 27652 27653 27654 27655 27656 27657 27658 27659 27660 27661 27662 27663 27664 27665 27666 27667 27668 27669 27670 27671 27672 27673 27674 27675 27676 27677 27678 27679 27680 27681 27682 27683 27684 27685 27686 27687 27688 27689 27690 27691 27692 27693 27694 27695 27696 27697 27698 27699 27700 27701 27702 27703 27704 27705 27706 27707 27708 27709 27710 27711 27712 27713 27714 27715 27716 27717 27718 27719 27720 27721 27722 27723 27724 27725 27726 27727 27728 27729 27730 27731 27732 27733 27734 27735 27736 27737 27738 27739 27740 27741 27742 27743 27744 27745 27746 27747 27748 27749 27750 27751 27752 27753 27754 27755 27756 27757 27758 27759 27760 27761 27762 27763 27764 27765 27766 27767 27768 27769 27770 27771 27772 27773 27774 27775 27776 27777 27778 27779 27780 27781 27782 27783 27784 27785 27786 27787 27788 27789 27790 27791 27792 27793 27794 27795 27796 27797 27798 27799 27800 27801 27802 27803 27804 27805 27806 27807 27808 27809 27810 27811 27812 27813 27814 27815 27816 27817 27818 27819 27820 27821 27822 27823 27824 27825 27826 27827 27828 27829 27830 27831 27832 27833 27834 27835 27836 27837 27838 27839 27840 27841 27842 27843 27844 27845 27846 27847 27848 27849 27850 27851 27852 27853 27854 27855 27856 27857 27858 27859 27860 27861 27862 27863 27864 27865 27866 27867 27868 27869 27870 27871 27872 27873 27874 27875 27876 27877 27878 27879 27880 27881 27882 27883 27884 27885 27886 27887 27888 27889 27890 27891 27892 27893 27894 27895 27896 27897 27898 27899 27900 27901 27902 27903 27904 27905 27906 27907 27908 27909 27910 27911 27912 27913 27914 27915 27916 27917 27918 27919 27920 27921 27922 27923 27924 27925 27926 27927 27928 27929 27930 27931 27932 27933 27934 27935 27936 27937 27938 27939 27940 27941 27942 27943 27944 27945 27946 27947 27948 27949 27950 27951 27952 27953 27954 27955 27956 27957 27958 27959 27960 27961 27962 27963 27964 27965 27966 27967 27968 27969 27970 27971 27972 27973 27974 27975 27976 27977 27978 27979 27980 27981 27982 27983 27984 27985 27986 27987 27988 27989 27990 27991 27992 27993 27994 27995 27996 27997 27998 27999 28000 28001 28002 28003 28004 28005 28006 28007 28008 28009 28010 28011 28012 28013 28014 28015 28016 28017 28018 28019 28020 28021 28022 28023 28024 28025 28026 28027 28028 28029 28030 28031 28032 28033 28034 28035 28036 28037 28038 28039 28040 28041 28042 28043 28044 28045 28046 28047 28048 28049 28050 28051 28052 28053 28054 28055 28056 28057 28058 28059 28060 28061 28062 28063 28064 28065 28066 28067 28068 28069 28070 28071 28072 28073 28074 28075 28076 28077 28078 28079 28080 28081 28082 28083 28084 28085 28086 28087 28088 28089 28090 28091 28092 28093 28094 28095 28096 28097 28098 28099 28100 28101 28102 28103 28104 28105 28106 28107 28108 28109 28110 28111 28112 28113 28114 28115 28116 28117 28118 28119 28120 28121 28122 28123 28124 28125 28126 28127 28128 28129 28130 28131 28132 28133 28134 28135 28136 28137 28138 28139 28140 28141 28142 28143 28144 28145 28146 28147 28148 28149 28150 28151 28152 28153 28154 28155 28156 28157 28158 28159 28160 28161 28162 28163 28164 28165 28166 28167 28168 28169 28170 28171 28172 28173 28174 28175 28176 28177 28178 28179 28180 28181 28182 28183 28184 28185 28186 28187 28188 28189 28190 28191 28192 28193 28194 28195 28196 28197 28198 28199 28200 28201 28202 28203 28204 28205 28206 28207 28208 28209 28210 28211 28212 28213 28214 28215 28216 28217 28218 28219 28220 28221 28222 28223 28224 28225 28226 28227 28228 28229 28230 28231 28232 28233 28234 28235 28236 28237 28238 28239 28240 28241 28242 28243 28244 28245 28246 28247 28248 28249 28250 28251 28252 28253 28254 28255 28256 28257 28258 28259 28260 28261 28262 28263 28264 28265 28266 28267 28268 28269 28270 28271 28272 28273 28274 28275 28276 28277 28278 28279 28280 28281 28282 28283 28284 28285 28286 28287 28288 28289 28290 28291 28292 28293 28294 28295 28296 28297 28298 28299 28300 28301 28302 28303 28304 28305 28306 28307 28308 28309 28310 28311 28312 28313 28314 28315 28316 28317 28318 28319 28320 28321 28322 28323 28324 28325 28326 28327 28328 28329 28330 28331 28332 28333 28334 28335 28336 28337 28338 28339 28340 28341 28342 28343 28344 28345 28346 28347 28348 28349 28350 28351 28352 28353 28354 28355 28356 28357 28358 28359 28360 28361 28362 28363 28364 28365 28366 28367 28368 28369 28370 28371 28372 28373 28374 28375 28376 28377 28378 28379 28380 28381 28382 28383 28384 28385 28386 28387 28388 28389 28390 28391 28392 28393 28394 28395 28396 28397 28398 28399 28400 28401 28402 28403 28404 28405 28406 28407 28408 28409 28410 28411 28412 28413 28414 28415 28416 28417 28418 28419 28420 28421 28422 28423 28424 28425 28426 28427 28428 28429 28430 28431 28432 28433 28434 28435 28436 28437 28438 28439 28440 28441 28442 28443 28444 28445 28446 28447 28448 28449 28450 28451 28452 28453 28454 28455 28456 28457 28458 28459 28460 28461 28462 28463 28464 28465 28466 28467 28468 28469 28470 28471 28472 28473 28474 28475 28476 28477 28478 28479 28480 28481 28482 28483 28484 28485 28486 28487 28488 28489 28490 28491 28492 28493 28494 28495 28496 28497 28498 28499 28500 28501 28502 28503 28504 28505 28506 28507 28508 28509 28510 28511 28512 28513 28514 28515 28516 28517 28518 28519 28520 28521 28522 28523 28524 28525 28526 28527 28528 28529 28530 28531 28532 28533 28534 28535 28536 28537 28538 28539 28540 28541 28542 28543 28544 28545 28546 28547 28548 28549 28550 28551 28552 28553 28554 28555 28556 28557 28558 28559 28560 28561 28562 28563 28564 28565 28566 28567 28568 28569 28570 28571 28572 28573 28574 28575 28576 28577 28578 28579 28580 28581 28582 28583 28584 28585 28586 28587 28588 28589 28590 28591 28592 28593 28594 28595 28596 28597 28598 28599 28600 28601 28602 28603 28604 28605 28606 28607 28608 28609 28610 28611 28612 28613 28614 28615 28616 28617 28618 28619 28620 28621 28622 28623 28624 28625 28626 28627 28628 28629 28630 28631 28632 28633 28634 28635 28636 28637 28638 28639 28640 28641 28642 28643 28644 28645 28646 28647 28648 28649 28650 28651 28652 28653 28654 28655 28656 28657 28658 28659 28660 28661 28662 28663 28664 28665 28666 28667 28668 28669 28670 28671 28672 28673 28674 28675 28676 28677 28678 28679 28680 28681 28682 28683 28684 28685 28686 28687 28688 28689 28690 28691 28692 28693 28694 28695 28696 28697 28698 28699 28700 28701 28702 28703 28704 28705 28706 28707 28708 28709 28710 28711 28712 28713 28714 28715 28716 28717 28718 28719 28720 28721 28722 28723 28724 28725 28726 28727 28728 28729 28730 28731 28732 28733 28734 28735 28736 28737 28738 28739 28740 28741 28742 28743 28744 28745 28746 28747 28748 28749 28750 28751 28752 28753 28754 28755 28756 28757 28758 28759 28760 28761 28762 28763 28764 28765 28766 28767 28768 28769 28770 28771 28772 28773 28774 28775 28776 28777 28778 28779 28780 28781 28782 28783 28784 28785 28786 28787 28788 28789 28790 28791 28792 28793 28794 28795 28796 28797 28798 28799 28800 28801 28802 28803 28804 28805 28806 28807 28808 28809 28810 28811 28812 28813 28814 28815 28816 28817 28818 28819 28820 28821 28822 28823 28824 28825 28826 28827 28828 28829 28830 28831 28832 28833 28834 28835 28836 28837 28838 28839 28840 28841 28842 28843 28844 28845 28846 28847 28848 28849 28850 28851 28852 28853 28854 28855 28856 28857 28858 28859 28860 28861 28862 28863 28864 28865 28866 28867 28868 28869 28870 28871 28872 28873 28874 28875 28876 28877 28878 28879 28880 28881 28882 28883 28884 28885 28886 28887 28888 28889 28890 28891 28892 28893 28894 28895 28896 28897 28898 28899 28900 28901 28902 28903 28904 28905 28906 28907 28908 28909 28910 28911 28912 28913 28914 28915 28916 28917 28918 28919 28920 28921 28922 28923 28924 28925 28926 28927 28928 28929 28930 28931 28932 28933 28934 28935 28936 28937 28938 28939 28940 28941 28942 28943 28944 28945 28946 28947 28948 28949 28950 28951 28952 28953 28954 28955 28956 28957 28958 28959 28960 28961 28962 28963 28964 28965 28966 28967 28968 28969 28970 28971 28972 28973 28974 28975 28976 28977 28978 28979 28980 28981 28982 28983 28984 28985 28986 28987 28988 28989 28990 28991 28992 28993 28994 28995 28996 28997 28998 28999 29000 29001 29002 29003 29004 29005 29006 29007 29008 29009 29010 29011 29012 29013 29014 29015 29016 29017 29018 29019 29020 29021 29022 29023 29024 29025 29026 29027 29028 29029 29030 29031 29032 29033 29034 29035 29036 29037 29038 29039 29040 29041 29042 29043 29044 29045 29046 29047 29048 29049 29050 29051 29052 29053 29054 29055 29056 29057 29058 29059 29060 29061 29062 29063 29064 29065 29066 29067 29068 29069 29070 29071 29072 29073 29074 29075 29076 29077 29078 29079 29080 29081 29082 29083 29084 29085 29086 29087 29088 29089 29090 29091 29092 29093 29094 29095 29096 29097 29098 29099 29100 29101 29102 29103 29104 29105 29106 29107 29108 29109 29110 29111 29112 29113 29114 29115 29116 29117 29118 29119 29120 29121 29122 29123 29124 29125 29126 29127 29128 29129 29130 29131 29132 29133 29134 29135 29136 29137 29138 29139 29140 29141 29142 29143 29144 29145 29146 29147 29148 29149 29150 29151 29152 29153 29154 29155 29156 29157 29158 29159 29160 29161 29162 29163 29164 29165 29166 29167 29168 29169 29170 29171 29172 29173 29174 29175 29176 29177 29178 29179 29180 29181 29182 29183 29184 29185 29186 29187 29188 29189 29190 29191 29192 29193 29194 29195 29196 29197 29198 29199 29200 29201 29202 29203 29204 29205 29206 29207 29208 29209 29210 29211 29212 29213 29214 29215 29216 29217 29218 29219 29220 29221 29222 29223 29224 29225 29226 29227 29228 29229 29230 29231 29232 29233 29234 29235 29236 29237 29238 29239 29240 29241 29242 29243 29244 29245 29246 29247 29248 29249 29250 29251 29252 29253 29254 29255 29256 29257 29258 29259 29260 29261 29262 29263 29264 29265 29266 29267 29268 29269 29270 29271 29272 29273 29274 29275 29276 29277 29278 29279 29280 29281 29282 29283 29284 29285 29286 29287 29288 29289 29290 29291 29292 29293 29294 29295 29296 29297 29298 29299 29300 29301 29302 29303 29304 29305 29306 29307 29308 29309 29310 29311 29312 29313 29314 29315 29316 29317 29318 29319 29320 29321 29322 29323 29324 29325 29326 29327 29328 29329 29330 29331 29332 29333 29334 29335 29336 29337 29338 29339 29340 29341 29342 29343 29344 29345 29346 29347 29348 29349 29350 29351 29352 29353 29354 29355 29356 29357 29358 29359 29360 29361 29362 29363 29364 29365 29366 29367 29368 29369 29370 29371 29372 29373 29374 29375 29376 29377 29378 29379 29380 29381 29382 29383 29384 29385 29386 29387 29388 29389 29390 29391 29392 29393 29394 29395 29396 29397 29398 29399 29400 29401 29402 29403 29404 29405 29406 29407 29408 29409 29410 29411 29412 29413 29414 29415 29416 29417 29418 29419 29420 29421 29422 29423 29424 29425 29426 29427 29428 29429 29430 29431 29432 29433 29434 29435 29436 29437 29438 29439 29440 29441 29442 29443 29444 29445 29446 29447 29448 29449 29450 29451 29452 29453 29454 29455 29456 29457 29458 29459 29460 29461 29462 29463 29464 29465 29466 29467 29468 29469 29470 29471 29472 29473 29474 29475 29476 29477 29478 29479 29480 29481 29482 29483 29484 29485 29486 29487 29488 29489 29490 29491 29492 29493 29494 29495 29496 29497 29498 29499 29500 29501 29502 29503 29504 29505 29506 29507 29508 29509 29510 29511 29512 29513 29514 29515 29516 29517 29518 29519 29520 29521 29522 29523 29524 29525 29526 29527 29528 29529 29530 29531 29532 29533 29534 29535 29536 29537 29538 29539 29540 29541 29542 29543 29544 29545 29546 29547 29548 29549 29550 29551 29552 29553 29554 29555 29556 29557 29558 29559 29560 29561 29562 29563 29564 29565 29566 29567 29568 29569 29570 29571 29572 29573 29574 29575 29576 29577 29578 29579 29580 29581 29582 29583 29584 29585 29586 29587 29588 29589 29590 29591 29592 29593 29594 29595 29596 29597 29598 29599 29600 29601 29602 29603 29604 29605 29606 29607 29608 29609 29610 29611 29612 29613 29614 29615 29616 29617 29618 29619 29620 29621 29622 29623 29624 29625 29626 29627 29628 29629 29630 29631 29632 29633 29634 29635 29636 29637 29638 29639 29640 29641 29642 29643 29644 29645 29646 29647 29648 29649 29650 29651 29652 29653 29654 29655 29656 29657 29658 29659 29660 29661 29662 29663 29664 29665 29666 29667 29668 29669 29670 29671 29672 29673 29674 29675 29676 29677 29678 29679 29680 29681 29682 29683 29684 29685 29686 29687 29688 29689 29690 29691 29692 29693 29694 29695 29696 29697 29698 29699 29700 29701 29702 29703 29704 29705 29706 29707 29708 29709 29710 29711 29712 29713 29714 29715 29716 29717 29718 29719 29720 29721 29722 29723 29724 29725 29726 29727 29728 29729 29730 29731 29732 29733 29734 29735 29736 29737 29738 29739 29740 29741 29742 29743 29744 29745 29746 29747 29748 29749 29750 29751 29752 29753 29754 29755 29756 29757 29758 29759 29760 29761 29762 29763 29764 29765 29766 29767 29768 29769 29770 29771 29772 29773 29774 29775 29776 29777 29778 29779 29780 29781 29782 29783 29784 29785 29786 29787 29788 29789 29790 29791 29792 29793 29794 29795 29796 29797 29798 29799 29800 29801 29802 29803 29804 29805 29806 29807 29808 29809 29810 29811 29812 29813 29814 29815 29816 29817 29818 29819 29820 29821 29822 29823 29824 29825 29826 29827 29828 29829 29830 29831 29832 29833 29834 29835 29836 29837 29838 29839 29840 29841 29842 29843 29844 29845 29846 29847 29848 29849 29850 29851 29852 29853 29854 29855 29856 29857 29858 29859 29860 29861 29862 29863 29864 29865 29866 29867 29868 29869 29870 29871 29872 29873 29874 29875 29876 29877 29878 29879 29880 29881 29882 29883 29884 29885 29886 29887 29888 29889 29890 29891 29892 29893 29894 29895 29896 29897 29898 29899 29900 29901 29902 29903 29904 29905 29906 29907 29908 29909 29910 29911 29912 29913 29914 29915 29916 29917 29918 29919 29920 29921 29922 29923 29924 29925 29926 29927 29928 29929 29930 29931 29932 29933 29934 29935 29936 29937 29938 29939 29940 29941 29942 29943 29944 29945 29946 29947 29948 29949 29950 29951 29952 29953 29954 29955 29956 29957 29958 29959 29960 29961 29962 29963 29964 29965 29966 29967 29968 29969 29970 29971 29972 29973 29974 29975 29976 29977 29978 29979 29980 29981 29982 29983 29984 29985 29986 29987 29988 29989 29990 29991 29992 29993 29994 29995 29996 29997 29998 29999 30000 30001 30002 30003 30004 30005 30006 30007 30008 30009 30010 30011 30012 30013 30014 30015 30016 30017 30018 30019 30020 30021 30022 30023 30024 30025 30026 30027 30028 30029 30030 30031 30032 30033 30034 30035 30036 30037 30038 30039 30040 30041 30042 30043 30044 30045 30046 30047 30048 30049 30050 30051 30052 30053 30054 30055 30056 30057 30058 30059 30060 30061 30062 30063 30064 30065 30066 30067 30068 30069 30070 30071 30072 30073 30074 30075 30076 30077 30078 30079 30080 30081 30082 30083 30084 30085 30086 30087 30088 30089 30090 30091 30092 30093 30094 30095 30096 30097 30098 30099 30100 30101 30102 30103 30104 30105 30106 30107 30108 30109 30110 30111 30112 30113 30114 30115 30116 30117 30118 30119 30120 30121 30122 30123 30124 30125 30126 30127 30128 30129 30130 30131 30132 30133 30134 30135 30136 30137 30138 30139 30140 30141 30142 30143 30144 30145 30146 30147 30148 30149 30150 30151 30152 30153 30154 30155 30156 30157 30158 30159 30160 30161 30162 30163 30164 30165 30166 30167 30168 30169 30170 30171 30172 30173 30174 30175 30176 30177 30178 30179 30180 30181 30182 30183 30184 30185 30186 30187 30188 30189 30190 30191 30192 30193 30194 30195 30196 30197 30198 30199 30200 30201 30202 30203 30204 30205 30206 30207 30208 30209 30210 30211 30212 30213 30214 30215 30216 30217 30218 30219 30220 30221 30222 30223 30224 30225 30226 30227 30228 30229 30230 30231 30232 30233 30234 30235 30236 30237 30238 30239 30240 30241 30242 30243 30244 30245 30246 30247 30248 30249 30250 30251 30252 30253 30254 30255 30256 30257 30258 30259 30260 30261 30262 30263 30264 30265 30266 30267 30268 30269 30270 30271 30272 30273 30274 30275 30276 30277 30278 30279 30280 30281 30282 30283 30284 30285 30286 30287 30288 30289 30290 30291 30292 30293 30294 30295 30296 30297 30298 30299 30300 30301 30302 30303 30304 30305 30306 30307 30308 30309 30310 30311 30312 30313 30314 30315 30316 30317 30318 30319 30320 30321 30322 30323 30324 30325 30326 30327 30328 30329 30330 30331 30332 30333 30334 30335 30336 30337 30338 30339 30340 30341 30342 30343 30344 30345 30346 30347 30348 30349 30350 30351 30352 30353 30354 30355 30356 30357 30358 30359 30360 30361 30362 30363 30364 30365 30366 30367 30368 30369 30370 30371 30372 30373 30374 30375 30376 30377 30378 30379 30380 30381 30382 30383 30384 30385 30386 30387 30388 30389 30390 30391 30392 30393 30394 30395 30396 30397 30398 30399 30400 30401 30402 30403 30404 30405 30406 30407 30408 30409 30410 30411 30412 30413 30414 30415 30416 30417 30418 30419 30420 30421 30422 30423 30424 30425 30426 30427 30428 30429 30430 30431 30432 30433 30434 30435 30436 30437 30438 30439 30440 30441 30442 30443 30444 30445 30446 30447 30448 30449 30450 30451 30452 30453 30454 30455 30456 30457 30458 30459 30460 30461 30462 30463 30464 30465 30466 30467 30468 30469 30470 30471 30472 30473 30474 30475 30476 30477 30478 30479 30480 30481 30482 30483 30484 30485 30486 30487 30488 30489 30490 30491 30492 30493 30494 30495 30496 30497 30498 30499 30500 30501 30502 30503 30504 30505 30506 30507 30508 30509 30510 30511 30512 30513 30514 30515 30516 30517 30518 30519 30520 30521 30522 30523 30524 30525 30526 30527 30528 30529 30530 30531 30532 30533 30534 30535 30536 30537 30538 30539 30540 30541 30542 30543 30544 30545 30546 30547 30548 30549 30550 30551 30552 30553 30554 30555 30556 30557 30558 30559 30560 30561 30562 30563 30564 30565 30566 30567 30568 30569 30570 30571 30572 30573 30574 30575 30576 30577 30578 30579 30580 30581 30582 30583 30584 30585 30586 30587 30588 30589 30590 30591 30592 30593 30594 30595 30596 30597 30598 30599 30600 30601 30602 30603 30604 30605 30606 30607 30608 30609 30610 30611 30612 30613 30614 30615 30616 30617 30618 30619 30620 30621 30622 30623 30624 30625 30626 30627 30628 30629 30630 30631 30632 30633 30634 30635 30636 30637 30638 30639 30640 30641 30642 30643 30644 30645 30646 30647 30648 30649 30650 30651 30652 30653 30654 30655 30656 30657 30658 30659 30660 30661 30662 30663 30664 30665 30666 30667 30668 30669 30670 30671 30672 30673 30674 30675 30676 30677 30678 30679 30680 30681 30682 30683 30684 30685 30686 30687 30688 30689 30690 30691 30692 30693 30694 30695 30696 30697 30698 30699 30700 30701 30702 30703 30704 30705 30706 30707 30708 30709 30710 30711 30712 30713 30714 30715 30716 30717 30718 30719 30720 30721 30722 30723 30724 30725 30726 30727 30728 30729 30730 30731 30732 30733 30734 30735 30736 30737 30738 30739 30740 30741 30742 30743 30744 30745 30746 30747 30748 30749 30750 30751 30752 30753 30754 30755 30756 30757 30758 30759 30760 30761 30762 30763 30764 30765 30766 30767 30768 30769 30770 30771 30772 30773 30774 30775 30776 30777 30778 30779 30780 30781 30782 30783 30784 30785 30786 30787 30788 30789 30790 30791 30792 30793 30794 30795 30796 30797 30798 30799 30800 30801 30802 30803 30804 30805 30806 30807 30808 30809 30810 30811 30812 30813 30814 30815 30816 30817 30818 30819 30820 30821 30822 30823 30824 30825 30826 30827 30828 30829 30830 30831 30832 30833 30834 30835 30836 30837 30838 30839 30840 30841 30842 30843 30844 30845 30846 30847 30848 30849 30850 30851 30852 30853 30854 30855 30856 30857 30858 30859 30860 30861 30862 30863 30864 30865 30866 30867 30868 30869 30870 30871 30872 30873 30874 30875 30876 30877 30878 30879 30880 30881 30882 30883 30884 30885 30886 30887 30888 30889 30890 30891 30892 30893 30894 30895 30896 30897 30898 30899 30900 30901 30902 30903 30904 30905 30906 30907 30908 30909 30910 30911 30912 30913 30914 30915 30916 30917 30918 30919 30920 30921 30922 30923 30924 30925 30926 30927 30928 30929 30930 30931 30932 30933 30934 30935 30936 30937 30938 30939 30940 30941 30942 30943 30944 30945 30946 30947 30948 30949 30950 30951 30952 30953 30954 30955 30956 30957 30958 30959 30960 30961 30962 30963 30964 30965 30966 30967 30968 30969 30970 30971 30972 30973 30974 30975 30976 30977 30978 30979 30980 30981 30982 30983 30984 30985 30986 30987 30988 30989 30990 30991 30992 30993 30994 30995 30996 30997 30998 30999 31000 31001 31002 31003 31004 31005 31006 31007 31008 31009 31010 31011 31012 31013 31014 31015 31016 31017 31018 31019 31020 31021 31022 31023 31024 31025 31026 31027 31028 31029 31030 31031 31032 31033 31034 31035 31036 31037 31038 31039 31040 31041 31042 31043 31044 31045 31046 31047 31048 31049 31050 31051 31052 31053 31054 31055 31056 31057 31058 31059 31060 31061 31062 31063 31064 31065 31066 31067 31068 31069 31070 31071 31072 31073 31074 31075 31076 31077 31078 31079 31080 31081 31082 31083 31084 31085 31086 31087 31088 31089 31090 31091 31092 31093 31094 31095 31096 31097 31098 31099 31100 31101 31102 31103 31104 31105 31106 31107 31108 31109 31110 31111 31112 31113 31114 31115 31116 31117 31118 31119 31120 31121 31122 31123 31124 31125 31126 31127 31128 31129 31130 31131 31132 31133 31134 31135 31136 31137 31138 31139 31140 31141 31142 31143 31144 31145 31146 31147 31148 31149 31150 31151 31152 31153 31154 31155 31156 31157 31158 31159 31160 31161 31162 31163 31164 31165 31166 31167 31168 31169 31170 31171 31172 31173 31174 31175 31176 31177 31178 31179 31180 31181 31182 31183 31184 31185 31186 31187 31188 31189 31190 31191 31192 31193 31194 31195 31196 31197 31198 31199 31200 31201 31202 31203 31204 31205 31206 31207 31208 31209 31210 31211 31212 31213 31214 31215 31216 31217 31218 31219 31220 31221 31222 31223 31224 31225 31226 31227 31228 31229 31230 31231 31232 31233 31234 31235 31236 31237 31238 31239 31240 31241 31242 31243 31244 31245 31246 31247 31248 31249 31250 31251 31252 31253 31254 31255 31256 31257 31258 31259 31260 31261 31262 31263 31264 31265 31266 31267 31268 31269 31270 31271 31272 31273 31274 31275 31276 31277 31278 31279 31280 31281 31282 31283 31284 31285 31286 31287 31288 31289 31290 31291 31292 31293 31294 31295 31296 31297 31298 31299 31300 31301 31302 31303 31304 31305 31306 31307 31308 31309 31310 31311 31312 31313 31314 31315 31316 31317 31318 31319 31320 31321 31322 31323 31324 31325 31326 31327 31328 31329 31330 31331 31332 31333 31334 31335 31336 31337 31338 31339 31340 31341 31342 31343 31344 31345 31346 31347 31348 31349 31350 31351 31352 31353 31354 31355 31356 31357 31358 31359 31360 31361 31362 31363 31364 31365 31366 31367 31368 31369 31370 31371 31372 31373 31374 31375 31376 31377 31378 31379 31380 31381 31382 31383 31384 31385 31386 31387 31388 31389 31390 31391 31392 31393 31394 31395 31396 31397 31398 31399 31400 31401 31402 31403 31404 31405 31406 31407 31408 31409 31410 31411 31412 31413 31414 31415 31416 31417 31418 31419 31420 31421 31422 31423 31424 31425 31426 31427 31428 31429 31430 31431 31432 31433 31434 31435 31436 31437 31438 31439 31440 31441 31442 31443 31444 31445 31446 31447 31448 31449 31450 31451 31452 31453 31454 31455 31456 31457 31458 31459 31460 31461 31462 31463 31464 31465 31466 31467 31468 31469 31470 31471 31472 31473 31474 31475 31476 31477 31478 31479 31480 31481 31482 31483 31484 31485 31486 31487 31488 31489 31490 31491 31492 31493 31494 31495 31496 31497 31498 31499 31500 31501 31502 31503 31504 31505 31506 31507 31508 31509 31510 31511 31512 31513 31514 31515 31516 31517 31518 31519 31520 31521 31522 31523 31524 31525 31526 31527 31528 31529 31530 31531 31532 31533 31534 31535 31536 31537 31538 31539 31540 31541 31542 31543 31544 31545 31546 31547 31548 31549 31550 31551 31552 31553 31554 31555 31556 31557 31558 31559 31560 31561 31562 31563 31564 31565 31566 31567 31568 31569 31570 31571 31572 31573 31574 31575 31576 31577 31578 31579 31580 31581 31582 31583 31584 31585 31586 31587 31588 31589 31590 31591 31592 31593 31594 31595 31596 31597 31598 31599 31600 31601 31602 31603 31604 31605 31606 31607 31608 31609 31610 31611 31612 31613 31614 31615 31616 31617 31618 31619 31620 31621 31622 31623 31624 31625 31626 31627 31628 31629 31630 31631 31632 31633 31634 31635 31636 31637 31638 31639 31640 31641 31642 31643 31644 31645 31646 31647 31648 31649 31650 31651 31652 31653 31654 31655 31656 31657 31658 31659 31660 31661 31662 31663 31664 31665 31666 31667 31668 31669 31670 31671 31672 31673 31674 31675 31676 31677 31678 31679 31680 31681 31682 31683 31684 31685 31686 31687 31688 31689 31690 31691 31692 31693 31694 31695 31696 31697 31698 31699 31700 31701 31702 31703 31704 31705 31706 31707 31708 31709 31710 31711 31712 31713 31714 31715 31716 31717 31718 31719 31720 31721 31722 31723 31724 31725 31726 31727 31728 31729 31730 31731 31732 31733 31734 31735 31736 31737 31738 31739 31740 31741 31742 31743 31744 31745 31746 31747 31748 31749 31750 31751 31752 31753 31754 31755 31756 31757 31758 31759 31760 31761 31762 31763 31764 31765 31766 31767 31768 31769 31770 31771 31772 31773 31774 31775 31776 31777 31778 31779 31780 31781 31782 31783 31784 31785 31786 31787 31788 31789 31790 31791 31792 31793 31794 31795 31796 31797 31798 31799 31800 31801 31802 31803 31804 31805 31806 31807 31808 31809 31810 31811 31812 31813 31814 31815 31816 31817 31818 31819 31820 31821 31822 31823 31824 31825 31826 31827 31828 31829 31830 31831 31832 31833 31834 31835 31836 31837 31838 31839 31840 31841 31842 31843 31844 31845 31846 31847 31848 31849 31850 31851 31852 31853 31854 31855 31856 31857 31858 31859 31860 31861 31862 31863 31864 31865 31866 31867 31868 31869 31870 31871 31872 31873 31874 31875 31876 31877 31878 31879 31880 31881 31882 31883 31884 31885 31886 31887 31888 31889 31890 31891 31892 31893 31894 31895 31896 31897 31898 31899 31900 31901 31902 31903 31904 31905 31906 31907 31908 31909 31910 31911 31912 31913 31914 31915 31916 31917 31918 31919 31920 31921 31922 31923 31924 31925 31926 31927 31928 31929 31930 31931 31932 31933 31934 31935 31936 31937 31938 31939 31940 31941 31942 31943 31944 31945 31946 31947 31948 31949 31950 31951 31952 31953 31954 31955 31956 31957 31958 31959 31960 31961 31962 31963 31964 31965 31966 31967 31968 31969 31970 31971 31972 31973 31974 31975 31976 31977 31978 31979 31980 31981 31982 31983 31984 31985 31986 31987 31988 31989 31990 31991 31992 31993 31994 31995 31996 31997 31998 31999 32000 32001 32002 32003 32004 32005 32006 32007 32008 32009 32010 32011 32012 32013 32014 32015 32016 32017 32018 32019 32020 32021 32022 32023 32024 32025 32026 32027 32028 32029 32030 32031 32032 32033 32034 32035 32036 32037 32038 32039 32040 32041 32042 32043 32044 32045 32046 32047 32048 32049 32050 32051 32052 32053 32054 32055 32056 32057 32058 32059 32060 32061 32062 32063 32064 32065 32066 32067 32068 32069 32070 32071 32072 32073 32074 32075 32076 32077 32078 32079 32080 32081 32082 32083 32084 32085 32086 32087 32088 32089 32090 32091 32092 32093 32094 32095 32096 32097 32098 32099 32100 32101 32102 32103 32104 32105 32106 32107 32108 32109 32110 32111 32112 32113 32114 32115 32116 32117 32118 32119 32120 32121 32122 32123 32124 32125 32126 32127 32128 32129 32130 32131 32132 32133 32134 32135 32136 32137 32138 32139 32140 32141 32142 32143 32144 32145 32146 32147 32148 32149 32150 32151 32152 32153 32154 32155 32156 32157 32158 32159 32160 32161 32162 32163 32164 32165 32166 32167 32168 32169 32170 32171 32172 32173 32174 32175 32176 32177 32178 32179 32180 32181 32182 32183 32184 32185 32186 32187 32188 32189 32190 32191 32192 32193 32194 32195 32196 32197 32198 32199 32200 32201 32202 32203 32204 32205 32206 32207 32208 32209 32210 32211 32212 32213 32214 32215 32216 32217 32218 32219 32220 32221 32222 32223 32224 32225 32226 32227 32228 32229 32230 32231 32232 32233 32234 32235 32236 32237 32238 32239 32240 32241 32242 32243 32244 32245 32246 32247 32248 32249 32250 32251 32252 32253 32254 32255 32256 32257 32258 32259 32260 32261 32262 32263 32264 32265 32266 32267 32268 32269 32270 32271 32272 32273 32274 32275 32276 32277 32278 32279 32280 32281 32282 32283 32284 32285 32286 32287 32288 32289 32290 32291 32292 32293 32294 32295 32296 32297 32298 32299 32300 32301 32302 32303 32304 32305 32306 32307 32308 32309 32310 32311 32312 32313 32314 32315 32316 32317 32318 32319 32320 32321 32322 32323 32324 32325 32326 32327 32328 32329 32330 32331 32332 32333 32334 32335 32336 32337 32338 32339 32340 32341 32342 32343 32344 32345 32346 32347 32348 32349 32350 32351 32352 32353 32354 32355 32356 32357 32358 32359 32360 32361 32362 32363 32364 32365 32366 32367 32368 32369 32370 32371 32372 32373 32374 32375 32376 32377 32378 32379 32380 32381 32382 32383 32384 32385 32386 32387 32388 32389 32390 32391 32392 32393 32394 32395 32396 32397 32398 32399 32400 32401 32402 32403 32404 32405 32406 32407 32408 32409 32410 32411 32412 32413 32414 32415 32416 32417 32418 32419 32420 32421 32422 32423 32424 32425 32426 32427 32428 32429 32430 32431 32432 32433 32434 32435 32436 32437 32438 32439 32440 32441 32442 32443 32444 32445 32446 32447 32448 32449 32450 32451 32452 32453 32454 32455 32456 32457 32458 32459 32460 32461 32462 32463 32464 32465 32466 32467 32468 32469 32470 32471 32472 32473 32474 32475 32476 32477 32478 32479 32480 32481 32482 32483 32484 32485 32486 32487 32488 32489 32490 32491 32492 32493 32494 32495 32496 32497 32498 32499 32500 32501 32502 32503 32504 32505 32506 32507 32508 32509 32510 32511 32512 32513 32514 32515 32516 32517 32518 32519 32520 32521 32522 32523 32524 32525 32526 32527 32528 32529 32530 32531 32532 32533 32534 32535 32536 32537 32538 32539 32540 32541 32542 32543 32544 32545 32546 32547 32548 32549 32550 32551 32552 32553 32554 32555 32556 32557 32558 32559 32560 32561 32562 32563 32564 32565 32566 32567 32568 32569 32570 32571 32572 32573 32574 32575 32576 32577 32578 32579 32580 32581 32582 32583 32584 32585 32586 32587 32588 32589 32590 32591 32592 32593 32594 32595 32596 32597 32598 32599 32600 32601 32602 32603 32604 32605 32606 32607 32608 32609 32610 32611 32612 32613 32614 32615 32616 32617 32618 32619 32620 32621 32622 32623 32624 32625 32626 32627 32628 32629 32630 32631 32632 32633 32634 32635 32636 32637 32638 32639 32640 32641 32642 32643 32644 32645 32646 32647 32648 32649 32650 32651 32652 32653 32654 32655 32656 32657 32658 32659 32660 32661 32662 32663 32664 32665 32666 32667 32668 32669 32670 32671 32672 32673 32674 32675 32676 32677 32678 32679 32680 32681 32682 32683 32684 32685 32686 32687 32688 32689 32690 32691 32692 32693 32694 32695 32696 32697 32698 32699 32700 32701 32702 32703 32704 32705 32706 32707 32708 32709 32710 32711 32712 32713 32714 32715 32716 32717 32718 32719 32720 32721 32722 32723 32724 32725 32726 32727 32728 32729 32730 32731 32732 32733 32734 32735 32736 32737 32738 32739 32740 32741 32742 32743 32744 32745 32746 32747 32748 32749 32750 32751 32752 32753 32754 32755 32756 32757 32758 32759 32760 32761 32762 32763 32764 32765 32766 32767 32768 32769 32770 32771 32772 32773 32774 32775 32776 32777 32778 32779 32780 32781 32782 32783 32784 32785 32786 32787 32788 32789 32790 32791 32792 32793 32794 32795 32796 32797 32798 32799 32800 32801 32802 32803 32804 32805 32806 32807 32808 32809 32810 32811 32812 32813 32814 32815 32816 32817 32818 32819 32820 32821 32822 32823 32824 32825 32826 32827 32828 32829 32830 32831 32832 32833 32834 32835 32836 32837 32838 32839 32840 32841 32842 32843 32844 32845 32846 32847 32848 32849 32850 32851 32852 32853 32854 32855 32856 32857 32858 32859 32860 32861 32862 32863 32864 32865 32866 32867 32868 32869 32870 32871 32872 32873 32874 32875 32876 32877 32878 32879 32880 32881 32882 32883 32884 32885 32886 32887 32888 32889 32890 32891 32892 32893 32894 32895 32896 32897 32898 32899 32900 32901 32902 32903 32904 32905 32906 32907 32908 32909 32910 32911 32912 32913 32914 32915 32916 32917 32918 32919 32920 32921 32922 32923 32924 32925 32926 32927 32928 32929 32930 32931 32932 32933 32934 32935 32936 32937 32938 32939 32940 32941 32942 32943 32944 32945 32946 32947 32948 32949 32950 32951 32952 32953 32954 32955 32956 32957 32958 32959 32960 32961 32962 32963 32964 32965 32966 32967 32968 32969 32970 32971 32972 32973 32974 32975 32976 32977 32978 32979 32980 32981 32982 32983 32984 32985 32986 32987 32988 32989 32990 32991 32992 32993 32994 32995 32996 32997 32998 32999 33000 33001 33002 33003 33004 33005 33006 33007 33008 33009 33010 33011 33012 33013 33014 33015 33016 33017 33018 33019 33020 33021 33022 33023 33024 33025 33026 33027 33028 33029 33030 33031 33032 33033 33034 33035 33036 33037 33038 33039 33040 33041 33042 33043 33044 33045 33046 33047 33048 33049 33050 33051 33052 33053 33054 33055 33056 33057 33058 33059 33060 33061 33062 33063 33064 33065 33066 33067 33068 33069 33070 33071 33072 33073 33074 33075 33076 33077 33078 33079 33080 33081 33082 33083 33084 33085 33086 33087 33088 33089 33090 33091 33092 33093 33094 33095 33096 33097 33098 33099 33100 33101 33102 33103 33104 33105 33106 33107 33108 33109 33110 33111 33112 33113 33114 33115 33116 33117 33118 33119 33120 33121 33122 33123 33124 33125 33126 33127 33128 33129 33130 33131 33132 33133 33134 33135 33136 33137 33138 33139 33140 33141 33142 33143 33144 33145 33146 33147 33148 33149 33150 33151 33152 33153 33154 33155 33156 33157 33158 33159 33160 33161 33162 33163 33164 33165 33166 33167 33168 33169 33170 33171 33172 33173 33174 33175 33176 33177 33178 33179 33180 33181 33182 33183 33184 33185 33186 33187 33188 33189 33190 33191 33192 33193 33194 33195 33196 33197 33198 33199 33200 33201 33202 33203 33204 33205 33206 33207 33208 33209 33210 33211 33212 33213 33214 33215 33216 33217 33218 33219 33220 33221 33222 33223 33224 33225 33226 33227 33228 33229 33230 33231 33232 33233 33234 33235 33236 33237 33238 33239 33240 33241 33242 33243 33244 33245 33246 33247 33248 33249 33250 33251 33252 33253 33254 33255 33256 33257 33258 33259 33260 33261 33262 33263 33264 33265 33266 33267 33268 33269 33270 33271 33272 33273 33274 33275 33276 33277 33278 33279 33280 33281 33282 33283 33284 33285 33286 33287 33288 33289 33290 33291 33292 33293 33294 33295 33296 33297 33298 33299 33300 33301 33302 33303 33304 33305 33306 33307 33308 33309 33310 33311 33312 33313 33314 33315 33316 33317 33318 33319 33320 33321 33322 33323 33324 33325 33326 33327 33328 33329 33330 33331 33332 33333 33334 33335 33336 33337 33338 33339 33340 33341 33342 33343 33344 33345 33346 33347 33348 33349 33350 33351 33352 33353 33354 33355 33356 33357 33358 33359 33360 33361 33362 33363 33364 33365 33366 33367 33368 33369 33370 33371 33372 33373 33374 33375 33376 33377 33378 33379 33380 33381 33382 33383 33384 33385 33386 33387 33388 33389 33390 33391 33392 33393 33394 33395 33396 33397 33398 33399 33400 33401 33402 33403 33404 33405 33406 33407 33408 33409 33410 33411 33412 33413 33414 33415 33416 33417 33418 33419 33420 33421 33422 33423 33424 33425 33426 33427 33428 33429 33430 33431 33432 33433 33434 33435 33436 33437 33438 33439 33440 33441 33442 33443 33444 33445 33446 33447 33448 33449 33450 33451 33452 33453 33454 33455 33456 33457 33458 33459 33460 33461 33462 33463 33464 33465 33466 33467 33468 33469 33470 33471 33472 33473 33474 33475 33476 33477 33478 33479 33480 33481 33482 33483 33484 33485 33486 33487 33488 33489 33490 33491 33492 33493 33494 33495 33496 33497 33498 33499 33500 33501 33502 33503 33504 33505 33506 33507 33508 33509 33510 33511 33512 33513 33514 33515 33516 33517 33518 33519 33520 33521 33522 33523 33524 33525 33526 33527 33528 33529 33530 33531 33532 33533 33534 33535 33536 33537 33538 33539 33540 33541 33542 33543 33544 33545 33546 33547 33548 33549 33550 33551 33552 33553 33554 33555 33556 33557 33558 33559 33560 33561 33562 33563 33564 33565 33566 33567 33568 33569 33570 33571 33572 33573 33574 33575 33576 33577 33578 33579 33580 33581 33582 33583 33584 33585 33586 33587 33588 33589 33590 33591 33592 33593 33594 33595 33596 33597 33598 33599 33600 33601 33602 33603 33604 33605 33606 33607 33608 33609 33610 33611 33612 33613 33614 33615 33616 33617 33618 33619 33620 33621 33622 33623 33624 33625 33626 33627 33628 33629 33630 33631 33632 33633 33634 33635 33636 33637 33638 33639 33640 33641 33642 33643 33644 33645 33646 33647 33648 33649 33650 33651 33652 33653 33654 33655 33656 33657 33658 33659 33660 33661 33662 33663 33664 33665 33666 33667 33668 33669 33670 33671 33672 33673 33674 33675 33676 33677 33678 33679 33680 33681 33682 33683 33684 33685 33686 33687 33688 33689 33690 33691 33692 33693 33694 33695 33696 33697 33698 33699 33700 33701 33702 33703 33704 33705 33706 33707 33708 33709 33710 33711 33712 33713 33714 33715 33716 33717 33718 33719 33720 33721 33722 33723 33724 33725 33726 33727 33728 33729 33730 33731 33732 33733 33734 33735 33736 33737 33738 33739 33740 33741 33742 33743 33744 33745 33746 33747 33748 33749 33750 33751 33752 33753 33754 33755 33756 33757 33758 33759 33760 33761 33762 33763 33764 33765 33766 33767 33768 33769 33770 33771 33772 33773 33774 33775 33776 33777 33778 33779 33780 33781 33782 33783 33784 33785 33786 33787 33788 33789 33790 33791 33792 33793 33794 33795 33796 33797 33798 33799 33800 33801 33802 33803 33804 33805 33806 33807 33808 33809 33810 33811 33812 33813 33814 33815 33816 33817 33818 33819 33820 33821 33822 33823 33824 33825 33826 33827 33828 33829 33830 33831 33832 33833 33834 33835 33836 33837 33838 33839 33840 33841 33842 33843 33844 33845 33846 33847 33848 33849 33850 33851 33852 33853 33854 33855 33856 33857 33858 33859 33860 33861 33862 33863 33864 33865 33866 33867 33868 33869 33870 33871 33872 33873 33874 33875 33876 33877 33878 33879 33880 33881 33882 33883 33884 33885 33886 33887 33888 33889 33890 33891 33892 33893 33894 33895 33896 33897 33898 33899 33900 33901 33902 33903 33904 33905 33906 33907 33908 33909 33910 33911 33912 33913 33914 33915 33916 33917 33918 33919 33920 33921 33922 33923 33924 33925 33926 33927 33928 33929 33930 33931 33932 33933 33934 33935 33936 33937 33938 33939 33940 33941 33942 33943 33944 33945 33946 33947 33948 33949 33950 33951 33952 33953 33954 33955 33956 33957 33958 33959 33960 33961 33962 33963 33964 33965 33966 33967 33968 33969 33970 33971 33972 33973 33974 33975 33976 33977 33978 33979 33980 33981 33982 33983 33984 33985 33986 33987 33988 33989 33990 33991 33992 33993 33994 33995 33996 33997 33998 33999 34000 34001 34002 34003 34004 34005 34006 34007 34008 34009 34010 34011 34012 34013 34014 34015 34016 34017 34018 34019 34020 34021 34022 34023 34024 34025 34026 34027 34028 34029 34030 34031 34032 34033 34034 34035 34036 34037 34038 34039 34040 34041 34042 34043 34044 34045 34046 34047 34048 34049 34050 34051 34052 34053 34054 34055 34056 34057 34058 34059 34060 34061 34062 34063 34064 34065 34066 34067 34068 34069 34070 34071 34072 34073 34074 34075 34076 34077 34078 34079 34080 34081 34082 34083 34084 34085 34086 34087 34088 34089 34090 34091 34092 34093 34094 34095 34096 34097 34098 34099 34100 34101 34102 34103 34104 34105 34106 34107 34108 34109 34110 34111 34112 34113 34114 34115 34116 34117 34118 34119 34120 34121 34122 34123 34124 34125 34126 34127 34128 34129 34130 34131 34132 34133 34134 34135 34136 34137 34138 34139 34140 34141 34142 34143 34144 34145 34146 34147 34148 34149 34150 34151 34152 34153 34154 34155 34156 34157 34158 34159 34160 34161 34162 34163 34164 34165 34166 34167 34168 34169 34170 34171 34172 34173 34174 34175 34176 34177 34178 34179 34180 34181 34182 34183 34184 34185 34186 34187 34188 34189 34190 34191 34192 34193 34194 34195 34196 34197 34198 34199 34200 34201 34202 34203 34204 34205 34206 34207 34208 34209 34210 34211 34212 34213 34214 34215 34216 34217 34218 34219 34220 34221 34222 34223 34224 34225 34226 34227 34228 34229 34230 34231 34232 34233 34234 34235 34236 34237 34238 34239 34240 34241 34242 34243 34244 34245 34246 34247 34248 34249 34250 34251 34252 34253 34254 34255 34256 34257 34258 34259 34260 34261 34262 34263 34264 34265 34266 34267 34268 34269 34270 34271 34272 34273 34274 34275 34276 34277 34278 34279 34280 34281 34282 34283 34284 34285 34286 34287 34288 34289 34290 34291 34292 34293 34294 34295 34296 34297 34298 34299 34300 34301 34302 34303 34304 34305 34306 34307 34308 34309 34310 34311 34312 34313 34314 34315 34316 34317 34318 34319 34320 34321 34322 34323 34324 34325 34326 34327 34328 34329 34330 34331 34332 34333 34334 34335 34336 34337 34338 34339 34340 34341 34342 34343 34344 34345 34346 34347 34348 34349 34350 34351 34352 34353 34354 34355 34356 34357 34358 34359 34360 34361 34362 34363 34364 34365 34366 34367 34368 34369 34370 34371 34372 34373 34374 34375 34376 34377 34378 34379 34380 34381 34382 34383 34384 34385 34386 34387 34388 34389 34390 34391 34392 34393 34394 34395 34396 34397 34398 34399 34400 34401 34402 34403 34404 34405 34406 34407 34408 34409 34410 34411 34412 34413 34414 34415 34416 34417 34418 34419 34420 34421 34422 34423 34424 34425 34426 34427 34428 34429 34430 34431 34432 34433 34434 34435 34436 34437 34438 34439 34440 34441 34442 34443 34444 34445 34446 34447 34448 34449 34450 34451 34452 34453 34454 34455 34456 34457 34458 34459 34460 34461 34462 34463 34464 34465 34466 34467 34468 34469 34470 34471 34472 34473 34474 34475 34476 34477 34478 34479 34480 34481 34482 34483 34484 34485 34486 34487 34488 34489 34490 34491 34492 34493 34494 34495 34496 34497 34498 34499 34500 34501 34502 34503 34504 34505 34506 34507 34508 34509 34510 34511 34512 34513 34514 34515 34516 34517 34518 34519 34520 34521 34522 34523 34524 34525 34526 34527 34528 34529 34530 34531 34532 34533 34534 34535 34536 34537 34538 34539 34540 34541 34542 34543 34544 34545 34546 34547 34548 34549 34550 34551 34552 34553 34554 34555 34556 34557 34558 34559 34560 34561 34562 34563 34564 34565 34566 34567 34568 34569 34570 34571 34572 34573 34574 34575 34576 34577 34578 34579 34580 34581 34582 34583 34584 34585 34586 34587 34588 34589 34590 34591 34592 34593 34594 34595 34596 34597 34598 34599 34600 34601 34602 34603 34604 34605 34606 34607 34608 34609 34610 34611 34612 34613 34614 34615 34616 34617 34618 34619 34620 34621 34622 34623 34624 34625 34626 34627 34628 34629 34630 34631 34632 34633 34634 34635 34636 34637 34638 34639 34640 34641 34642 34643 34644 34645 34646 34647 34648 34649 34650 34651 34652 34653 34654 34655 34656 34657 34658 34659 34660 34661 34662 34663 34664 34665 34666 34667 34668 34669 34670 34671 34672 34673 34674 34675 34676 34677 34678 34679 34680 34681 34682 34683 34684 34685 34686 34687 34688 34689 34690 34691 34692 34693 34694 34695 34696 34697 34698 34699 34700 34701 34702 34703 34704 34705 34706 34707 34708 34709 34710 34711 34712 34713 34714 34715 34716 34717 34718 34719 34720 34721 34722 34723 34724 34725 34726 34727 34728 34729 34730 34731 34732 34733 34734 34735 34736 34737 34738 34739 34740 34741 34742 34743 34744 34745 34746 34747 34748 34749 34750 34751 34752 34753 34754 34755 34756 34757 34758 34759 34760 34761 34762 34763 34764 34765 34766 34767 34768 34769 34770 34771 34772 34773 34774 34775 34776 34777 34778 34779 34780 34781 34782 34783 34784 34785 34786 34787 34788 34789 34790 34791 34792 34793 34794 34795 34796 34797 34798 34799 34800 34801 34802 34803 34804 34805 34806 34807 34808 34809 34810 34811 34812 34813 34814 34815 34816 34817 34818 34819 34820 34821 34822 34823 34824 34825 34826 34827 34828 34829 34830 34831 34832 34833 34834 34835 34836 34837 34838 34839 34840 34841 34842 34843 34844 34845 34846 34847 34848 34849 34850 34851 34852 34853 34854 34855 34856 34857 34858 34859 34860 34861 34862 34863 34864 34865 34866 34867 34868 34869 34870 34871 34872 34873 34874 34875 34876 34877 34878 34879 34880 34881 34882 34883 34884 34885 34886 34887 34888 34889 34890 34891 34892 34893 34894 34895 34896 34897 34898 34899 34900 34901 34902 34903 34904 34905 34906 34907 34908 34909 34910 34911 34912 34913 34914 34915 34916 34917 34918 34919 34920 34921 34922 34923 34924 34925 34926 34927 34928 34929 34930 34931 34932 34933 34934 34935 34936 34937 34938 34939 34940 34941 34942 34943 34944 34945 34946 34947 34948 34949 34950 34951 34952 34953 34954 34955 34956 34957 34958 34959 34960 34961 34962 34963 34964 34965 34966 34967 34968 34969 34970 34971 34972 34973 34974 34975 34976 34977 34978 34979 34980 34981 34982 34983 34984 34985 34986 34987 34988 34989 34990 34991 34992 34993 34994 34995 34996 34997 34998 34999 35000 35001 35002 35003 35004 35005 35006 35007 35008 35009 35010 35011 35012 35013 35014 35015 35016 35017 35018 35019 35020 35021 35022 35023 35024 35025 35026 35027 35028 35029 35030 35031 35032 35033 35034 35035 35036 35037 35038 35039 35040 35041 35042 35043 35044 35045 35046 35047 35048 35049 35050 35051 35052 35053 35054 35055 35056 35057 35058 35059 35060 35061 35062 35063 35064 35065 35066 35067 35068 35069 35070 35071 35072 35073 35074 35075 35076 35077 35078 35079 35080 35081 35082 35083 35084 35085 35086 35087 35088 35089 35090 35091 35092 35093 35094 35095 35096 35097 35098 35099 35100 35101 35102 35103 35104 35105 35106 35107 35108 35109 35110 35111 35112 35113 35114 35115 35116 35117 35118 35119 35120 35121 35122 35123 35124 35125 35126 35127 35128 35129 35130 35131 35132 35133 35134 35135 35136 35137 35138 35139 35140 35141 35142 35143 35144 35145 35146 35147 35148 35149 35150 35151 35152 35153 35154 35155 35156 35157 35158 35159 35160 35161 35162 35163 35164 35165 35166 35167 35168 35169 35170 35171 35172 35173 35174 35175 35176 35177 35178 35179 35180 35181 35182 35183 35184 35185 35186 35187 35188 35189 35190 35191 35192 35193 35194 35195 35196 35197 35198 35199 35200 35201 35202 35203 35204 35205 35206 35207 35208 35209 35210 35211 35212 35213 35214 35215 35216 35217 35218 35219 35220 35221 35222 35223 35224 35225 35226 35227 35228 35229 35230 35231 35232 35233 35234 35235 35236 35237 35238 35239 35240 35241 35242 35243 35244 35245 35246 35247 35248 35249 35250 35251 35252 35253 35254 35255 35256 35257 35258 35259 35260 35261 35262 35263 35264 35265 35266 35267 35268 35269 35270 35271 35272 35273 35274 35275 35276 35277 35278 35279 35280 35281 35282 35283 35284 35285 35286 35287 35288 35289 35290 35291 35292 35293 35294 35295 35296 35297 35298 35299 35300 35301 35302 35303 35304 35305 35306 35307 35308 35309 35310 35311 35312 35313 35314 35315 35316 35317 35318 35319 35320 35321 35322 35323 35324 35325 35326 35327 35328 35329 35330 35331 35332 35333 35334 35335 35336 35337 35338 35339 35340 35341 35342 35343 35344 35345 35346 35347 35348 35349 35350 35351 35352 35353 35354 35355 35356 35357 35358 35359 35360 35361 35362 35363 35364 35365 35366 35367 35368 35369 35370 35371 35372 35373 35374 35375 35376 35377 35378 35379 35380 35381 35382 35383 35384 35385 35386 35387 35388 35389 35390 35391 35392 35393 35394 35395 35396 35397 35398 35399 35400 35401 35402 35403 35404 35405 35406 35407 35408 35409 35410 35411 35412 35413 35414 35415 35416 35417 35418 35419 35420 35421 35422 35423 35424 35425 35426 35427 35428 35429 35430 35431 35432 35433 35434 35435 35436 35437 35438 35439 35440 35441 35442 35443 35444 35445 35446 35447 35448 35449 35450 35451 35452 35453 35454 35455 35456 35457 35458 35459 35460 35461 35462 35463 35464 35465 35466 35467 35468 35469 35470 35471 35472 35473 35474 35475 35476 35477 35478 35479 35480 35481 35482 35483 35484 35485 35486 35487 35488 35489 35490 35491 35492 35493 35494 35495 35496 35497 35498 35499 35500 35501 35502 35503 35504 35505 35506 35507 35508 35509 35510 35511 35512 35513 35514 35515 35516 35517 35518 35519 35520 35521 35522 35523 35524 35525 35526 35527 35528 35529 35530 35531 35532 35533 35534 35535 35536 35537 35538 35539 35540 35541 35542 35543 35544 35545 35546 35547 35548 35549 35550 35551 35552 35553 35554 35555 35556 35557 35558 35559 35560 35561 35562 35563 35564 35565 35566 35567 35568 35569 35570 35571 35572 35573 35574 35575 35576 35577 35578 35579 35580 35581 35582 35583 35584 35585 35586 35587 35588 35589 35590 35591 35592 35593 35594 35595 35596 35597 35598 35599 35600 35601 35602 35603 35604 35605 35606 35607 35608 35609 35610 35611 35612 35613 35614 35615 35616 35617 35618 35619 35620 35621 35622 35623 35624 35625 35626 35627 35628 35629 35630 35631 35632 35633 35634 35635 35636 35637 35638 35639 35640 35641 35642 35643 35644 35645 35646 35647 35648 35649 35650 35651 35652 35653 35654 35655 35656 35657 35658 35659 35660 35661 35662 35663 35664 35665 35666 35667 35668 35669 35670 35671 35672 35673 35674 35675 35676 35677 35678 35679 35680 35681 35682 35683 35684 35685 35686 35687 35688 35689 35690 35691 35692 35693 35694 35695 35696 35697 35698 35699 35700 35701 35702 35703 35704 35705 35706 35707 35708 35709 35710 35711 35712 35713 35714 35715 35716 35717 35718 35719 35720 35721 35722 35723 35724 35725 35726 35727 35728 35729 35730 35731 35732 35733 35734 35735 35736 35737 35738 35739 35740 35741 35742 35743 35744 35745 35746 35747 35748 35749 35750 35751 35752 35753 35754 35755 35756 35757 35758 35759 35760 35761 35762 35763 35764 35765 35766 35767 35768 35769 35770 35771 35772 35773 35774 35775 35776 35777 35778 35779 35780 35781 35782 35783 35784 35785 35786 35787 35788 35789 35790 35791 35792 35793 35794 35795 35796 35797 35798 35799 35800 35801 35802 35803 35804 35805 35806 35807 35808 35809 35810 35811 35812 35813 35814 35815 35816 35817 35818 35819 35820 35821 35822 35823 35824 35825 35826 35827 35828 35829 35830 35831 35832 35833 35834 35835 35836 35837 35838 35839 35840 35841 35842 35843 35844 35845 35846 35847 35848 35849 35850 35851 35852 35853 35854 35855 35856 35857 35858 35859 35860 35861 35862 35863 35864 35865 35866 35867 35868 35869 35870 35871 35872 35873 35874 35875 35876 35877 35878 35879 35880 35881 35882 35883 35884 35885 35886 35887 35888 35889 35890 35891 35892 35893 35894 35895 35896 35897 35898 35899 35900 35901 35902 35903 35904 35905 35906 35907 35908 35909 35910 35911 35912 35913 35914 35915 35916 35917 35918 35919 35920 35921 35922 35923 35924 35925 35926 35927 35928 35929 35930 35931 35932 35933 35934 35935 35936 35937 35938 35939 35940 35941 35942 35943 35944 35945 35946 35947 35948 35949 35950 35951 35952 35953 35954 35955 35956 35957 35958 35959 35960 35961 35962 35963 35964 35965 35966 35967 35968 35969 35970 35971 35972 35973 35974 35975 35976 35977 35978 35979 35980 35981 35982 35983 35984 35985 35986 35987 35988 35989 35990 35991 35992 35993 35994 35995 35996 35997 35998 35999 36000 36001 36002 36003 36004 36005 36006 36007 36008 36009 36010 36011 36012 36013 36014 36015 36016 36017 36018 36019 36020 36021 36022 36023 36024 36025 36026 36027 36028 36029 36030 36031 36032 36033 36034 36035 36036 36037 36038 36039 36040 36041 36042 36043 36044 36045 36046 36047 36048 36049 36050 36051 36052 36053 36054 36055 36056 36057 36058 36059 36060 36061 36062 36063 36064 36065 36066 36067 36068 36069 36070 36071 36072 36073 36074 36075 36076 36077 36078 36079 36080 36081 36082 36083 36084 36085 36086 36087 36088 36089 36090 36091 36092 36093 36094 36095 36096 36097 36098 36099 36100 36101 36102 36103 36104 36105 36106 36107 36108 36109 36110 36111 36112 36113 36114 36115 36116 36117 36118 36119 36120 36121 36122 36123 36124 36125 36126 36127 36128 36129 36130 36131 36132 36133 36134 36135 36136 36137 36138 36139 36140 36141 36142 36143 36144 36145 36146 36147 36148 36149 36150 36151 36152 36153 36154 36155 36156 36157 36158 36159 36160 36161 36162 36163 36164 36165 36166 36167 36168 36169 36170 36171 36172 36173 36174 36175 36176 36177 36178 36179 36180 36181 36182 36183 36184 36185 36186 36187 36188 36189 36190 36191 36192 36193 36194 36195 36196 36197 36198 36199 36200 36201 36202 36203 36204 36205 36206 36207 36208 36209 36210 36211 36212 36213 36214 36215 36216 36217 36218 36219 36220 36221 36222 36223 36224 36225 36226 36227 36228 36229 36230 36231 36232 36233 36234 36235 36236 36237 36238 36239 36240 36241 36242 36243 36244 36245 36246 36247 36248 36249 36250 36251 36252 36253 36254 36255 36256 36257 36258 36259 36260 36261 36262 36263 36264 36265 36266 36267 36268 36269 36270 36271 36272 36273 36274 36275 36276 36277 36278 36279 36280 36281 36282 36283 36284 36285 36286 36287 36288 36289 36290 36291 36292 36293 36294 36295 36296 36297 36298 36299 36300 36301 36302 36303 36304 36305 36306 36307 36308 36309 36310 36311 36312 36313 36314 36315 36316 36317 36318 36319 36320 36321 36322 36323 36324 36325 36326 36327 36328 36329 36330 36331 36332 36333 36334 36335 36336 36337 36338 36339 36340 36341 36342 36343 36344 36345 36346 36347 36348 36349 36350 36351 36352 36353 36354 36355 36356 36357 36358 36359 36360 36361 36362 36363 36364 36365 36366 36367 36368 36369 36370 36371 36372 36373 36374 36375 36376 36377 36378 36379 36380 36381 36382 36383 36384 36385 36386 36387 36388 36389 36390 36391 36392 36393 36394 36395 36396 36397 36398 36399 36400 36401 36402 36403 36404 36405 36406 36407 36408 36409 36410 36411 36412 36413 36414 36415 36416 36417 36418 36419 36420 36421 36422 36423 36424 36425 36426 36427 36428 36429 36430 36431 36432 36433 36434 36435 36436 36437 36438 36439 36440 36441 36442 36443 36444 36445 36446 36447 36448 36449 36450 36451 36452 36453 36454 36455 36456 36457 36458 36459 36460 36461 36462 36463 36464 36465 36466 36467 36468 36469 36470 36471 36472 36473 36474 36475 36476 36477 36478 36479 36480 36481 36482 36483 36484 36485 36486 36487 36488 36489 36490 36491 36492 36493 36494 36495 36496 36497 36498 36499 36500 36501 36502 36503 36504 36505 36506 36507 36508 36509 36510 36511 36512 36513 36514 36515 36516 36517 36518 36519 36520 36521 36522 36523 36524 36525 36526 36527 36528 36529 36530 36531 36532 36533 36534 36535 36536 36537 36538 36539 36540 36541 36542 36543 36544 36545 36546 36547 36548 36549 36550 36551 36552 36553 36554 36555 36556 36557 36558 36559 36560 36561 36562 36563 36564 36565 36566 36567 36568 36569 36570 36571 36572 36573 36574 36575 36576 36577 36578 36579 36580 36581 36582 36583 36584 36585 36586 36587 36588 36589 36590 36591 36592 36593 36594 36595 36596 36597 36598 36599 36600 36601 36602 36603 36604 36605 36606 36607 36608 36609 36610 36611 36612 36613 36614 36615 36616 36617 36618 36619 36620 36621 36622 36623 36624 36625 36626 36627 36628 36629 36630 36631 36632 36633 36634 36635 36636 36637 36638 36639 36640 36641 36642 36643 36644 36645 36646 36647 36648 36649 36650 36651 36652 36653 36654 36655 36656 36657 36658 36659 36660 36661 36662 36663 36664 36665 36666 36667 36668 36669 36670 36671 36672 36673 36674 36675 36676 36677 36678 36679 36680 36681 36682 36683 36684 36685 36686 36687 36688 36689 36690 36691 36692 36693 36694 36695 36696 36697 36698 36699 36700 36701 36702 36703 36704 36705 36706 36707 36708 36709 36710 36711 36712 36713 36714 36715 36716 36717 36718 36719 36720 36721 36722 36723 36724 36725 36726 36727 36728 36729 36730 36731 36732 36733 36734 36735 36736 36737 36738 36739 36740 36741 36742 36743 36744 36745 36746 36747 36748 36749 36750 36751 36752 36753 36754 36755 36756 36757 36758 36759 36760 36761 36762 36763 36764 36765 36766 36767 36768 36769 36770 36771 36772 36773 36774 36775 36776 36777 36778 36779 36780 36781 36782 36783 36784 36785 36786 36787 36788 36789 36790 36791 36792 36793 36794 36795 36796 36797 36798 36799 36800 36801 36802 36803 36804 36805 36806 36807 36808 36809 36810 36811 36812 36813 36814 36815 36816 36817 36818 36819 36820 36821 36822 36823 36824 36825 36826 36827 36828 36829 36830 36831 36832 36833 36834 36835 36836 36837 36838 36839 36840 36841 36842 36843 36844 36845 36846 36847 36848 36849 36850 36851 36852 36853 36854 36855 36856 36857 36858 36859 36860 36861 36862 36863 36864 36865 36866 36867 36868 36869 36870 36871 36872 36873 36874 36875 36876 36877 36878 36879 36880 36881 36882 36883 36884 36885 36886 36887 36888 36889 36890 36891 36892 36893 36894 36895 36896 36897 36898 36899 36900 36901 36902 36903 36904 36905 36906 36907 36908 36909 36910 36911 36912 36913 36914 36915 36916 36917 36918 36919 36920 36921 36922 36923 36924 36925 36926 36927 36928 36929 36930 36931 36932 36933 36934 36935 36936 36937 36938 36939 36940 36941 36942 36943 36944 36945 36946 36947 36948 36949 36950 36951 36952 36953 36954 36955 36956 36957 36958 36959 36960 36961 36962 36963 36964 36965 36966 36967 36968 36969 36970 36971 36972 36973 36974 36975 36976 36977 36978 36979 36980 36981 36982 36983 36984 36985 36986 36987 36988 36989 36990 36991 36992 36993 36994 36995 36996 36997 36998 36999 37000 37001 37002 37003 37004 37005 37006 37007 37008 37009 37010 37011 37012 37013 37014 37015 37016 37017 37018 37019 37020 37021 37022 37023 37024 37025 37026 37027 37028 37029 37030 37031 37032 37033 37034 37035 37036 37037 37038 37039 37040 37041 37042 37043 37044 37045 37046 37047 37048 37049 37050 37051 37052 37053 37054 37055 37056 37057 37058 37059 37060 37061 37062 37063 37064 37065 37066 37067 37068 37069 37070 37071 37072 37073 37074 37075 37076 37077 37078 37079 37080 37081 37082 37083 37084 37085 37086 37087 37088 37089 37090 37091 37092 37093 37094 37095 37096 37097 37098 37099 37100 37101 37102 37103 37104 37105 37106 37107 37108 37109 37110 37111 37112 37113 37114 37115 37116 37117 37118 37119 37120 37121 37122 37123 37124 37125 37126 37127 37128 37129 37130 37131 37132 37133 37134 37135 37136 37137 37138 37139 37140 37141 37142 37143 37144 37145 37146 37147 37148 37149 37150 37151 37152 37153 37154 37155 37156 37157 37158 37159 37160 37161 37162 37163 37164 37165 37166 37167 37168 37169 37170 37171 37172 37173 37174 37175 37176 37177 37178 37179 37180 37181 37182 37183 37184 37185 37186 37187 37188 37189 37190 37191 37192 37193 37194 37195 37196 37197 37198 37199 37200 37201 37202 37203 37204 37205 37206 37207 37208 37209 37210 37211 37212 37213 37214 37215 37216 37217 37218 37219 37220 37221 37222 37223 37224 37225 37226 37227 37228 37229 37230 37231 37232 37233 37234 37235 37236 37237 37238 37239 37240 37241 37242 37243 37244 37245 37246 37247 37248 37249 37250 37251 37252 37253 37254 37255 37256 37257 37258 37259 37260 37261 37262 37263 37264 37265 37266 37267 37268 37269 37270 37271 37272 37273 37274 37275 37276 37277 37278 37279 37280 37281 37282 37283 37284 37285 37286 37287 37288 37289 37290 37291 37292 37293 37294 37295 37296 37297 37298 37299 37300 37301 37302 37303 37304 37305 37306 37307 37308 37309 37310 37311 37312 37313 37314 37315 37316 37317 37318 37319 37320 37321 37322 37323 37324 37325 37326 37327 37328 37329 37330 37331 37332 37333 37334 37335 37336 37337 37338 37339 37340 37341 37342 37343 37344 37345 37346 37347 37348 37349 37350 37351 37352 37353 37354 37355 37356 37357 37358 37359 37360 37361 37362 37363 37364 37365 37366 37367 37368 37369 37370 37371 37372 37373 37374 37375 37376 37377 37378 37379 37380 37381 37382 37383 37384 37385 37386 37387 37388 37389 37390 37391 37392 37393 37394 37395 37396 37397 37398 37399 37400 37401 37402 37403 37404 37405 37406 37407 37408 37409 37410 37411 37412 37413 37414 37415 37416 37417 37418 37419 37420 37421 37422 37423 37424 37425 37426 37427 37428 37429 37430 37431 37432 37433 37434 37435 37436 37437 37438 37439 37440 37441 37442 37443 37444 37445 37446 37447 37448 37449 37450 37451 37452 37453 37454 37455 37456 37457 37458 37459 37460 37461 37462 37463 37464 37465 37466 37467 37468 37469 37470 37471 37472 37473 37474 37475 37476 37477 37478 37479 37480 37481 37482 37483 37484 37485 37486 37487 37488 37489 37490 37491 37492 37493 37494 37495 37496 37497 37498 37499 37500 37501 37502 37503 37504 37505 37506 37507 37508 37509 37510 37511 37512 37513 37514 37515 37516 37517 37518 37519 37520 37521 37522 37523 37524 37525 37526 37527 37528 37529 37530 37531 37532 37533 37534 37535 37536 37537 37538 37539 37540 37541 37542 37543 37544 37545 37546 37547 37548 37549 37550 37551 37552 37553 37554 37555 37556 37557 37558 37559 37560 37561 37562 37563 37564 37565 37566 37567 37568 37569 37570 37571 37572 37573 37574 37575 37576 37577 37578 37579 37580 37581 37582 37583 37584 37585 37586 37587 37588 37589 37590 37591 37592 37593 37594 37595 37596 37597 37598 37599 37600 37601 37602 37603 37604 37605 37606 37607 37608 37609 37610 37611 37612 37613 37614 37615 37616 37617 37618 37619 37620 37621 37622 37623 37624 37625 37626 37627 37628 37629 37630 37631 37632 37633 37634 37635 37636 37637 37638 37639 37640 37641 37642 37643 37644 37645 37646 37647 37648 37649 37650 37651 37652 37653 37654 37655 37656 37657 37658 37659 37660 37661 37662 37663 37664 37665 37666 37667 37668 37669 37670 37671 37672 37673 37674 37675 37676 37677 37678 37679 37680 37681 37682 37683 37684 37685 37686 37687 37688 37689 37690 37691 37692 37693 37694 37695 37696 37697 37698 37699 37700 37701 37702 37703 37704 37705 37706 37707 37708 37709 37710 37711 37712 37713 37714 37715 37716 37717 37718 37719 37720 37721 37722 37723 37724 37725 37726 37727 37728 37729 37730 37731 37732 37733 37734 37735 37736 37737 37738 37739 37740 37741 37742 37743 37744 37745 37746 37747 37748 37749 37750 37751 37752 37753 37754 37755 37756 37757 37758 37759 37760 37761 37762 37763 37764 37765 37766 37767 37768 37769 37770 37771 37772 37773 37774 37775 37776 37777 37778 37779 37780 37781 37782 37783 37784 37785 37786 37787 37788 37789 37790 37791 37792 37793 37794 37795 37796 37797 37798 37799 37800 37801 37802 37803 37804 37805 37806 37807 37808 37809 37810 37811 37812 37813 37814 37815 37816 37817 37818 37819 37820 37821 37822 37823 37824 37825 37826 37827 37828 37829 37830 37831 37832 37833 37834 37835 37836 37837 37838 37839 37840 37841 37842 37843 37844 37845 37846 37847 37848 37849 37850 37851 37852 37853 37854 37855 37856 37857 37858 37859 37860 37861 37862 37863 37864 37865 37866 37867 37868 37869 37870 37871 37872 37873 37874 37875 37876 37877 37878 37879 37880 37881 37882 37883 37884 37885 37886 37887 37888 37889 37890 37891 37892 37893 37894 37895 37896 37897 37898 37899 37900 37901 37902 37903 37904 37905 37906 37907 37908 37909 37910 37911 37912 37913 37914 37915 37916 37917 37918 37919 37920 37921 37922 37923 37924 37925 37926 37927 37928 37929 37930 37931 37932 37933 37934 37935 37936 37937 37938 37939 37940 37941 37942 37943 37944 37945 37946 37947 37948 37949 37950 37951 37952 37953 37954 37955 37956 37957 37958 37959 37960 37961 37962 37963 37964 37965 37966 37967 37968 37969 37970 37971 37972 37973 37974 37975 37976 37977 37978 37979 37980 37981 37982 37983 37984 37985 37986 37987 37988 37989 37990 37991 37992 37993 37994 37995 37996 37997 37998 37999 38000 38001 38002 38003 38004 38005 38006 38007 38008 38009 38010 38011 38012 38013 38014 38015 38016 38017 38018 38019 38020 38021 38022 38023 38024 38025 38026 38027 38028 38029 38030 38031 38032 38033 38034 38035 38036 38037 38038 38039 38040 38041 38042 38043 38044 38045 38046 38047 38048 38049 38050 38051 38052 38053 38054 38055 38056 38057 38058 38059 38060 38061 38062 38063 38064 38065 38066 38067 38068 38069 38070 38071 38072 38073 38074 38075 38076 38077 38078 38079 38080 38081 38082 38083 38084 38085 38086 38087 38088 38089 38090 38091 38092 38093 38094 38095 38096 38097 38098 38099 38100 38101 38102 38103 38104 38105 38106 38107 38108 38109 38110 38111 38112 38113 38114 38115 38116 38117 38118 38119 38120 38121 38122 38123 38124 38125 38126 38127 38128 38129 38130 38131 38132 38133 38134 38135 38136 38137 38138 38139 38140 38141 38142 38143 38144 38145 38146 38147 38148 38149 38150 38151 38152 38153 38154 38155 38156 38157 38158 38159 38160 38161 38162 38163 38164 38165 38166 38167 38168 38169 38170 38171 38172 38173 38174 38175 38176 38177 38178 38179 38180 38181 38182 38183 38184 38185 38186 38187 38188 38189 38190 38191 38192 38193 38194 38195 38196 38197 38198 38199 38200 38201 38202 38203 38204 38205 38206 38207 38208 38209 38210 38211 38212 38213 38214 38215 38216 38217 38218 38219 38220 38221 38222 38223 38224 38225 38226 38227 38228 38229 38230 38231 38232 38233 38234 38235 38236 38237 38238 38239 38240 38241 38242 38243 38244 38245 38246 38247 38248 38249 38250 38251 38252 38253 38254 38255 38256 38257 38258 38259 38260 38261 38262 38263 38264 38265 38266 38267 38268 38269 38270 38271 38272 38273 38274 38275 38276 38277 38278 38279 38280 38281 38282 38283 38284 38285 38286 38287 38288 38289 38290 38291 38292 38293 38294 38295 38296 38297 38298 38299 38300 38301 38302 38303 38304 38305 38306 38307 38308 38309 38310 38311 38312 38313 38314 38315 38316 38317 38318 38319 38320 38321 38322 38323 38324 38325 38326 38327 38328 38329 38330 38331 38332 38333 38334 38335 38336 38337 38338 38339 38340 38341 38342 38343 38344 38345 38346 38347 38348 38349 38350 38351 38352 38353 38354 38355 38356 38357 38358 38359 38360 38361 38362 38363 38364 38365 38366 38367 38368 38369 38370 38371 38372 38373 38374 38375 38376 38377 38378 38379 38380 38381 38382 38383 38384 38385 38386 38387 38388 38389 38390 38391 38392 38393 38394 38395 38396 38397 38398 38399 38400 38401 38402 38403 38404 38405 38406 38407 38408 38409 38410 38411 38412 38413 38414 38415 38416 38417 38418 38419 38420 38421 38422 38423 38424 38425 38426 38427 38428 38429 38430 38431 38432 38433 38434 38435 38436 38437 38438 38439 38440 38441 38442 38443 38444 38445 38446 38447 38448 38449 38450 38451 38452 38453 38454 38455 38456 38457 38458 38459 38460 38461 38462 38463 38464 38465 38466 38467 38468 38469 38470 38471 38472 38473 38474 38475 38476 38477 38478 38479 38480 38481 38482 38483 38484 38485 38486 38487 38488 38489 38490 38491 38492 38493 38494 38495 38496 38497 38498 38499 38500 38501 38502 38503 38504 38505 38506 38507 38508 38509 38510 38511 38512 38513 38514 38515 38516 38517 38518 38519 38520 38521 38522 38523 38524 38525 38526 38527 38528 38529 38530 38531 38532 38533 38534 38535 38536 38537 38538 38539 38540 38541 38542 38543 38544 38545 38546 38547 38548 38549 38550 38551 38552 38553 38554 38555 38556 38557 38558 38559 38560 38561 38562 38563 38564 38565 38566 38567 38568 38569 38570 38571 38572 38573 38574 38575 38576 38577 38578 38579 38580 38581 38582 38583 38584 38585 38586 38587 38588 38589 38590 38591 38592 38593 38594 38595 38596 38597 38598 38599 38600 38601 38602 38603 38604 38605 38606 38607 38608 38609 38610 38611 38612 38613 38614 38615 38616 38617 38618 38619 38620 38621 38622 38623 38624 38625 38626 38627 38628 38629 38630 38631 38632 38633 38634 38635 38636 38637 38638 38639 38640 38641 38642 38643 38644 38645 38646 38647 38648 38649 38650 38651 38652 38653 38654 38655 38656 38657 38658 38659 38660 38661 38662 38663 38664 38665 38666 38667 38668 38669 38670 38671 38672 38673 38674 38675 38676 38677 38678 38679 38680 38681 38682 38683 38684 38685 38686 38687 38688 38689 38690 38691 38692 38693 38694 38695 38696 38697 38698 38699 38700 38701 38702 38703 38704 38705 38706 38707 38708 38709 38710 38711 38712 38713 38714 38715 38716 38717 38718 38719 38720 38721 38722 38723 38724 38725 38726 38727 38728 38729 38730 38731 38732 38733 38734 38735 38736 38737 38738 38739 38740 38741 38742 38743 38744 38745 38746 38747 38748 38749 38750 38751 38752 38753 38754 38755 38756 38757 38758 38759 38760 38761 38762 38763 38764 38765 38766 38767 38768 38769 38770 38771 38772 38773 38774 38775 38776 38777 38778 38779 38780 38781 38782 38783 38784 38785 38786 38787 38788 38789 38790 38791 38792 38793 38794 38795 38796 38797 38798 38799 38800 38801 38802 38803 38804 38805 38806 38807 38808 38809 38810 38811 38812 38813 38814 38815 38816 38817 38818 38819 38820 38821 38822 38823 38824 38825 38826 38827 38828 38829 38830 38831 38832 38833 38834 38835 38836 38837 38838 38839 38840 38841 38842 38843 38844 38845 38846 38847 38848 38849 38850 38851 38852 38853 38854 38855 38856 38857 38858 38859 38860 38861 38862 38863 38864 38865 38866 38867 38868 38869 38870 38871 38872 38873 38874 38875 38876 38877 38878 38879 38880 38881 38882 38883 38884 38885 38886 38887 38888 38889 38890 38891 38892 38893 38894 38895 38896 38897 38898 38899 38900 38901 38902 38903 38904 38905 38906 38907 38908 38909 38910 38911 38912 38913 38914 38915 38916 38917 38918 38919 38920 38921 38922 38923 38924 38925 38926 38927 38928 38929 38930 38931 38932 38933 38934 38935 38936 38937 38938 38939 38940 38941 38942 38943 38944 38945 38946 38947 38948 38949 38950 38951 38952 38953 38954 38955 38956 38957 38958 38959 38960 38961 38962 38963 38964 38965 38966 38967 38968 38969 38970 38971 38972 38973 38974 38975 38976 38977 38978 38979 38980 38981 38982 38983 38984 38985 38986 38987 38988 38989 38990 38991 38992 38993 38994 38995 38996 38997 38998 38999 39000 39001 39002 39003 39004 39005 39006 39007 39008 39009 39010 39011 39012 39013 39014 39015 39016 39017 39018 39019 39020 39021 39022 39023 39024 39025 39026 39027 39028 39029 39030 39031 39032 39033 39034 39035 39036 39037 39038 39039 39040 39041 39042 39043 39044 39045 39046 39047 39048 39049 39050 39051 39052 39053 39054 39055 39056 39057 39058 39059 39060 39061 39062 39063 39064 39065 39066 39067 39068 39069 39070 39071 39072 39073 39074 39075 39076 39077 39078 39079 39080 39081 39082 39083 39084 39085 39086 39087 39088 39089 39090 39091 39092 39093 39094 39095 39096 39097 39098 39099 39100 39101 39102 39103 39104 39105 39106 39107 39108 39109 39110 39111 39112 39113 39114 39115 39116 39117 39118 39119 39120 39121 39122 39123 39124 39125 39126 39127 39128 39129 39130 39131 39132 39133 39134 39135 39136 39137 39138 39139 39140 39141 39142 39143 39144 39145 39146 39147 39148 39149 39150 39151 39152 39153 39154 39155 39156 39157 39158 39159 39160 39161 39162 39163 39164 39165 39166 39167 39168 39169 39170 39171 39172 39173 39174 39175 39176 39177 39178 39179 39180 39181 39182 39183 39184 39185 39186 39187 39188 39189 39190 39191 39192 39193 39194 39195 39196 39197 39198 39199 39200 39201 39202 39203 39204 39205 39206 39207 39208 39209 39210 39211 39212 39213 39214 39215 39216 39217 39218 39219 39220 39221 39222 39223 39224 39225 39226 39227 39228 39229 39230 39231 39232 39233 39234 39235 39236 39237 39238 39239 39240 39241 39242 39243 39244 39245 39246 39247 39248 39249 39250 39251 39252 39253 39254 39255 39256 39257 39258 39259 39260 39261 39262 39263 39264 39265 39266 39267 39268 39269 39270 39271 39272 39273 39274 39275 39276 39277 39278 39279 39280 39281 39282 39283 39284 39285 39286 39287 39288 39289 39290 39291 39292 39293 39294 39295 39296 39297 39298 39299 39300 39301 39302 39303 39304 39305 39306 39307 39308 39309 39310 39311 39312 39313 39314 39315 39316 39317 39318 39319 39320 39321 39322 39323 39324 39325 39326 39327 39328 39329 39330 39331 39332 39333 39334 39335 39336 39337 39338 39339 39340 39341 39342 39343 39344 39345 39346 39347 39348 39349 39350 39351 39352 39353 39354 39355 39356 39357 39358 39359 39360 39361 39362 39363 39364 39365 39366 39367 39368 39369 39370 39371 39372 39373 39374 39375 39376 39377 39378 39379 39380 39381 39382 39383 39384 39385 39386 39387 39388 39389 39390 39391 39392 39393 39394 39395 39396 39397 39398 39399 39400 39401 39402 39403 39404 39405 39406 39407 39408 39409 39410 39411 39412 39413 39414 39415 39416 39417 39418 39419 39420 39421 39422 39423 39424 39425 39426 39427 39428 39429 39430 39431 39432 39433 39434 39435 39436 39437 39438 39439 39440 39441 39442 39443 39444 39445 39446 39447 39448 39449 39450 39451 39452 39453 39454 39455 39456 39457 39458 39459 39460 39461 39462 39463 39464 39465 39466 39467 39468 39469 39470 39471 39472 39473 39474 39475 39476 39477 39478 39479 39480 39481 39482 39483 39484 39485 39486 39487 39488 39489 39490 39491 39492 39493 39494 39495 39496 39497 39498 39499 39500 39501 39502 39503 39504 39505 39506 39507 39508 39509 39510 39511 39512 39513 39514 39515 39516 39517 39518 39519 39520 39521 39522 39523 39524 39525 39526 39527 39528 39529 39530 39531 39532 39533 39534 39535 39536 39537 39538 39539 39540 39541 39542 39543 39544 39545 39546 39547 39548 39549 39550 39551 39552 39553 39554 39555 39556 39557 39558 39559 39560 39561 39562 39563 39564 39565 39566 39567 39568 39569 39570 39571 39572 39573 39574 39575 39576 39577 39578 39579 39580 39581 39582 39583 39584 39585 39586 39587 39588 39589 39590 39591 39592 39593 39594 39595 39596 39597 39598 39599 39600 39601 39602 39603 39604 39605 39606 39607 39608 39609 39610 39611 39612 39613 39614 39615 39616 39617 39618 39619 39620 39621 39622 39623 39624 39625 39626 39627 39628 39629 39630 39631 39632 39633 39634 39635 39636 39637 39638 39639 39640 39641 39642 39643 39644 39645 39646 39647 39648 39649 39650 39651 39652 39653 39654 39655 39656 39657 39658 39659 39660 39661 39662 39663 39664 39665 39666 39667 39668 39669 39670 39671 39672 39673 39674 39675 39676 39677 39678 39679 39680 39681 39682 39683 39684 39685 39686 39687 39688 39689 39690 39691 39692 39693 39694 39695 39696 39697 39698 39699 39700 39701 39702 39703 39704 39705 39706 39707 39708 39709 39710 39711 39712 39713 39714 39715 39716 39717 39718 39719 39720 39721 39722 39723 39724 39725 39726 39727 39728 39729 39730 39731 39732 39733 39734 39735 39736 39737 39738 39739 39740 39741 39742 39743 39744 39745 39746 39747 39748 39749 39750 39751 39752 39753 39754 39755 39756 39757 39758 39759 39760 39761 39762 39763 39764 39765 39766 39767 39768 39769 39770 39771 39772 39773 39774 39775 39776 39777 39778 39779 39780 39781 39782 39783 39784 39785 39786 39787 39788 39789 39790 39791 39792 39793 39794 39795 39796 39797 39798 39799 39800 39801 39802 39803 39804 39805 39806 39807 39808 39809 39810 39811 39812 39813 39814 39815 39816 39817 39818 39819 39820 39821 39822 39823 39824 39825 39826 39827 39828 39829 39830 39831 39832 39833 39834 39835 39836 39837 39838 39839 39840 39841 39842 39843 39844 39845 39846 39847 39848 39849 39850 39851 39852 39853 39854 39855 39856 39857 39858 39859 39860 39861 39862 39863 39864 39865 39866 39867 39868 39869 39870 39871 39872 39873 39874 39875 39876 39877 39878 39879 39880 39881 39882 39883 39884 39885 39886 39887 39888 39889 39890 39891 39892 39893 39894 39895 39896 39897 39898 39899 39900 39901 39902 39903 39904 39905 39906 39907 39908 39909 39910 39911 39912 39913 39914 39915 39916 39917 39918 39919 39920 39921 39922 39923 39924 39925 39926 39927 39928 39929 39930 39931 39932 39933 39934 39935 39936 39937 39938 39939 39940 39941 39942 39943 39944 39945 39946 39947 39948 39949 39950 39951 39952 39953 39954 39955 39956 39957 39958 39959 39960 39961 39962 39963 39964 39965 39966 39967 39968 39969 39970 39971 39972 39973 39974 39975 39976 39977 39978 39979 39980 39981 39982 39983 39984 39985 39986 39987 39988 39989 39990 39991 39992 39993 39994 39995 39996 39997 39998 39999 40000 40001 40002 40003 40004 40005 40006 40007 40008 40009 40010 40011 40012 40013 40014 40015 40016 40017 40018 40019 40020 40021 40022 40023 40024 40025 40026 40027 40028 40029 40030 40031 40032 40033 40034 40035 40036 40037 40038 40039 40040 40041 40042 40043 40044 40045 40046 40047 40048 40049 40050 40051 40052 40053 40054 40055 40056 40057 40058 40059 40060 40061 40062 40063 40064 40065 40066 40067 40068 40069 40070 40071 40072 40073 40074 40075 40076 40077 40078 40079 40080 40081 40082 40083 40084 40085 40086 40087 40088 40089 40090 40091 40092 40093 40094 40095 40096 40097 40098 40099 40100 40101 40102 40103 40104 40105 40106 40107 40108 40109 40110 40111 40112 40113 40114 40115 40116 40117 40118 40119 40120 40121 40122 40123 40124 40125 40126 40127 40128 40129 40130 40131 40132 40133 40134 40135 40136 40137 40138 40139 40140 40141 40142 40143 40144 40145 40146 40147 40148 40149 40150 40151 40152 40153 40154 40155 40156 40157 40158 40159 40160 40161 40162 40163 40164 40165 40166 40167 40168 40169 40170 40171 40172 40173 40174 40175 40176 40177 40178 40179 40180 40181 40182 40183 40184 40185 40186 40187 40188 40189 40190 40191 40192 40193 40194 40195 40196 40197 40198 40199 40200 40201 40202 40203 40204 40205 40206 40207 40208 40209 40210 40211 40212 40213 40214 40215 40216 40217 40218 40219 40220 40221 40222 40223 40224 40225 40226 40227 40228 40229 40230 40231 40232 40233 40234 40235 40236 40237 40238 40239 40240 40241 40242 40243 40244 40245 40246 40247 40248 40249 40250 40251 40252 40253 40254 40255 40256 40257 40258 40259 40260 40261 40262 40263 40264 40265 40266 40267 40268 40269 40270 40271 40272 40273 40274 40275 40276 40277 40278 40279 40280 40281 40282 40283 40284 40285 40286 40287 40288 40289 40290 40291 40292 40293 40294 40295 40296 40297 40298 40299 40300 40301 40302 40303 40304 40305 40306 40307 40308 40309 40310 40311 40312 40313 40314 40315 40316 40317 40318 40319 40320 40321 40322 40323 40324 40325 40326 40327 40328 40329 40330 40331 40332 40333 40334 40335 40336 40337 40338 40339 40340 40341 40342 40343 40344 40345 40346 40347 40348 40349 40350 40351 40352 40353 40354 40355 40356 40357 40358 40359 40360 40361 40362 40363 40364 40365 40366 40367 40368 40369 40370 40371 40372 40373 40374 40375 40376 40377 40378 40379 40380 40381 40382 40383 40384 40385 40386 40387 40388 40389 40390 40391 40392 40393 40394 40395 40396 40397 40398 40399 40400 40401 40402 40403 40404 40405 40406 40407 40408 40409 40410 40411 40412 40413 40414 40415 40416 40417 40418 40419 40420 40421 40422 40423 40424 40425 40426 40427 40428 40429 40430 40431 40432 40433 40434 40435 40436 40437 40438 40439 40440 40441 40442 40443 40444 40445 40446 40447 40448 40449 40450 40451 40452 40453 40454 40455 40456 40457 40458 40459 40460 40461 40462 40463 40464 40465 40466 40467 40468 40469 40470 40471 40472 40473 40474 40475 40476 40477 40478 40479 40480 40481 40482 40483 40484 40485 40486 40487 40488 40489 40490 40491 40492 40493 40494 40495 40496 40497 40498 40499 40500 40501 40502 40503 40504 40505 40506 40507 40508 40509 40510 40511 40512 40513 40514 40515 40516 40517 40518 40519 40520 40521 40522 40523 40524 40525 40526 40527 40528 40529 40530 40531 40532 40533 40534 40535 40536 40537 40538 40539 40540 40541 40542 40543 40544 40545 40546 40547 40548 40549 40550 40551 40552 40553 40554 40555 40556 40557 40558 40559 40560 40561 40562 40563 40564 40565 40566 40567 40568 40569 40570 40571 40572 40573 40574 40575 40576 40577 40578 40579 40580 40581 40582 40583 40584 40585 40586 40587 40588 40589 40590 40591 40592 40593 40594 40595 40596 40597 40598 40599 40600 40601 40602 40603 40604 40605 40606 40607 40608 40609 40610 40611 40612 40613 40614 40615 40616 40617 40618 40619 40620 40621 40622 40623 40624 40625 40626 40627 40628 40629 40630 40631 40632 40633 40634 40635 40636 40637 40638 40639 40640 40641 40642 40643 40644 40645 40646 40647 40648 40649 40650 40651 40652 40653 40654 40655 40656 40657 40658 40659 40660 40661 40662 40663 40664 40665 40666 40667 40668 40669 40670 40671 40672 40673 40674 40675 40676 40677 40678 40679 40680 40681 40682 40683 40684 40685 40686 40687 40688 40689 40690 40691 40692 40693 40694 40695 40696 40697 40698 40699 40700 40701 40702 40703 40704 40705 40706 40707 40708 40709 40710 40711 40712 40713 40714 40715 40716 40717 40718 40719 40720 40721 40722 40723 40724 40725 40726 40727 40728 40729 40730 40731 40732 40733 40734 40735 40736 40737 40738 40739 40740 40741 40742 40743 40744 40745 40746 40747 40748 40749 40750 40751 40752 40753 40754 40755 40756 40757 40758 40759 40760 40761 40762 40763 40764 40765 40766 40767 40768 40769 40770 40771 40772 40773 40774 40775 40776 40777 40778 40779 40780 40781 40782 40783 40784 40785 40786 40787 40788 40789 40790 40791 40792 40793 40794 40795 40796 40797 40798 40799 40800 40801 40802 40803 40804 40805 40806 40807 40808 40809 40810 40811 40812 40813 40814 40815 40816 40817 40818 40819 40820 40821 40822 40823 40824 40825 40826 40827 40828 40829 40830 40831 40832 40833 40834 40835 40836 40837 40838 40839 40840 40841 40842 40843 40844 40845 40846 40847 40848 40849 40850 40851 40852 40853 40854 40855 40856 40857 40858 40859 40860 40861 40862 40863 40864 40865 40866 40867 40868 40869 40870 40871 40872 40873 40874 40875 40876 40877 40878 40879 40880 40881 40882 40883 40884 40885 40886 40887 40888 40889 40890 40891 40892 40893 40894 40895 40896 40897 40898 40899 40900 40901 40902 40903 40904 40905 40906 40907 40908 40909 40910 40911 40912 40913 40914 40915 40916 40917 40918 40919 40920 40921 40922 40923 40924 40925 40926 40927 40928 40929 40930 40931 40932 40933 40934 40935 40936 40937 40938 40939 40940 40941 40942 40943 40944 40945 40946 40947 40948 40949 40950 40951 40952 40953 40954 40955 40956 40957 40958 40959 40960 40961 40962 40963 40964 40965 40966 40967 40968 40969 40970 40971 40972 40973 40974 40975 40976 40977 40978 40979 40980 40981 40982 40983 40984 40985 40986 40987 40988 40989 40990 40991 40992 40993 40994 40995 40996 40997 40998 40999 41000 41001 41002 41003 41004 41005 41006 41007 41008 41009 41010 41011 41012 41013 41014 41015 41016 41017 41018 41019 41020 41021 41022 41023 41024 41025 41026 41027 41028 41029 41030 41031 41032 41033 41034 41035 41036 41037 41038 41039 41040 41041 41042 41043 41044 41045 41046 41047 41048 41049 41050 41051 41052 41053 41054 41055 41056 41057 41058 41059 41060 41061 41062 41063 41064 41065 41066 41067 41068 41069 41070 41071 41072 41073 41074 41075 41076 41077 41078 41079 41080 41081 41082 41083 41084 41085 41086 41087 41088 41089 41090 41091 41092 41093 41094 41095 41096 41097 41098 41099 41100 41101 41102 41103 41104 41105 41106 41107 41108 41109 41110 41111 41112 41113 41114 41115 41116 41117 41118 41119 41120 41121 41122 41123 41124 41125 41126 41127 41128 41129 41130 41131 41132 41133 41134 41135 41136 41137 41138 41139 41140 41141 41142 41143 41144 41145 41146 41147 41148 41149 41150 41151 41152 41153 41154 41155 41156 41157 41158 41159 41160 41161 41162 41163 41164 41165 41166 41167 41168 41169 41170 41171 41172 41173 41174 41175 41176 41177 41178 41179 41180 41181 41182 41183 41184 41185 41186 41187 41188 41189 41190 41191 41192 41193 41194 41195 41196 41197 41198 41199 41200 41201 41202 41203 41204 41205 41206 41207 41208 41209 41210 41211 41212 41213 41214 41215 41216 41217 41218 41219 41220 41221 41222 41223 41224 41225 41226 41227 41228 41229 41230 41231 41232 41233 41234 41235 41236 41237 41238 41239 41240 41241 41242 41243 41244 41245 41246 41247 41248 41249 41250 41251 41252 41253 41254 41255 41256 41257 41258 41259 41260 41261 41262 41263 41264 41265 41266 41267 41268 41269 41270 41271 41272 41273 41274 41275 41276 41277 41278 41279 41280 41281 41282 41283 41284 41285 41286 41287 41288 41289 41290 41291 41292 41293 41294 41295 41296 41297 41298 41299 41300 41301 41302 41303 41304 41305 41306 41307 41308 41309 41310 41311 41312 41313 41314 41315 41316 41317 41318 41319 41320 41321 41322 41323 41324 41325 41326 41327 41328 41329 41330 41331 41332 41333 41334 41335 41336 41337 41338 41339 41340 41341 41342 41343 41344 41345 41346 41347 41348 41349 41350 41351 41352 41353 41354 41355 41356 41357 41358 41359 41360 41361 41362 41363 41364 41365 41366 41367 41368 41369 41370 41371 41372 41373 41374 41375 41376 41377 41378 41379 41380 41381 41382 41383 41384 41385 41386 41387 41388 41389 41390 41391 41392 41393 41394 41395 41396 41397 41398 41399 41400 41401 41402 41403 41404 41405 41406 41407 41408 41409 41410 41411 41412 41413 41414 41415 41416 41417 41418 41419 41420 41421 41422 41423 41424 41425 41426 41427 41428 41429 41430 41431 41432 41433 41434 41435 41436 41437 41438 41439 41440 41441 41442 41443 41444 41445 41446 41447 41448 41449 41450 41451 41452 41453 41454 41455 41456 41457 41458 41459 41460 41461 41462 41463 41464 41465 41466 41467 41468 41469 41470 41471 41472 41473 41474 41475 41476 41477 41478 41479 41480 41481 41482 41483 41484 41485 41486 41487 41488 41489 41490 41491 41492 41493 41494 41495 41496 41497 41498 41499 41500 41501 41502 41503 41504 41505 41506 41507 41508 41509 41510 41511 41512 41513 41514 41515 41516 41517 41518 41519 41520 41521 41522 41523 41524 41525 41526 41527 41528 41529 41530 41531 41532 41533 41534 41535 41536 41537 41538 41539 41540 41541 41542 41543 41544 41545 41546 41547 41548 41549 41550 41551 41552 41553 41554 41555 41556 41557 41558 41559 41560 41561 41562 41563 41564 41565 41566 41567 41568 41569 41570 41571 41572 41573 41574 41575 41576 41577 41578 41579 41580 41581 41582 41583 41584 41585 41586 41587 41588 41589 41590 41591 41592 41593 41594 41595 41596 41597 41598 41599 41600 41601 41602 41603 41604 41605 41606 41607 41608 41609 41610 41611 41612 41613 41614 41615 41616 41617 41618 41619 41620 41621 41622 41623 41624 41625 41626 41627 41628 41629 41630 41631 41632 41633 41634 41635 41636 41637 41638 41639 41640 41641 41642 41643 41644 41645 41646 41647 41648 41649 41650 41651 41652 41653 41654 41655 41656 41657 41658 41659 41660 41661 41662 41663 41664 41665 41666 41667 41668 41669 41670 41671 41672 41673 41674 41675 41676 41677 41678 41679 41680 41681 41682 41683 41684 41685 41686 41687 41688 41689 41690 41691 41692 41693 41694 41695 41696 41697 41698 41699 41700 41701 41702 41703 41704 41705 41706 41707 41708 41709 41710 41711 41712 41713 41714 41715 41716 41717 41718 41719 41720 41721 41722 41723 41724 41725 41726 41727 41728 41729 41730 41731 41732 41733 41734 41735 41736 41737 41738 41739 41740 41741 41742 41743 41744 41745 41746 41747 41748 41749 41750 41751 41752 41753 41754 41755 41756 41757 41758 41759 41760 41761 41762 41763 41764 41765 41766 41767 41768 41769 41770 41771 41772 41773 41774 41775 41776 41777 41778 41779 41780 41781 41782 41783 41784 41785 41786 41787 41788 41789 41790 41791 41792 41793 41794 41795 41796 41797 41798 41799 41800 41801 41802 41803 41804 41805 41806 41807 41808 41809 41810 41811 41812 41813 41814 41815 41816 41817 41818 41819 41820 41821 41822 41823 41824 41825 41826 41827 41828 41829 41830 41831 41832 41833 41834 41835 41836 41837 41838 41839 41840 41841 41842 41843 41844 41845 41846 41847 41848 41849 41850 41851 41852 41853 41854 41855 41856 41857 41858 41859 41860 41861 41862 41863 41864 41865 41866 41867 41868 41869 41870 41871 41872 41873 41874 41875 41876 41877 41878 41879 41880 41881 41882 41883 41884 41885 41886 41887 41888 41889 41890 41891 41892 41893 41894 41895 41896 41897 41898 41899 41900 41901 41902 41903 41904 41905 41906 41907 41908 41909 41910 41911 41912 41913 41914 41915 41916 41917 41918 41919 41920 41921 41922 41923 41924 41925 41926 41927 41928 41929 41930 41931 41932 41933 41934 41935 41936 41937 41938 41939 41940 41941 41942 41943 41944 41945 41946 41947 41948 41949 41950 41951 41952 41953 41954 41955 41956 41957 41958 41959 41960 41961 41962 41963 41964 41965 41966 41967 41968 41969 41970 41971 41972 41973 41974 41975 41976 41977 41978 41979 41980 41981 41982 41983 41984 41985 41986 41987 41988 41989 41990 41991 41992 41993 41994 41995 41996 41997 41998 41999 42000 42001 42002 42003 42004 42005 42006 42007 42008 42009 42010 42011 42012 42013 42014 42015 42016 42017 42018 42019 42020 42021 42022 42023 42024 42025 42026 42027 42028 42029 42030 42031 42032 42033 42034 42035 42036 42037 42038 42039 42040 42041 42042 42043 42044 42045 42046 42047 42048 42049 42050 42051 42052 42053 42054 42055 42056 42057 42058 42059 42060 42061 42062 42063 42064 42065 42066 42067 42068 42069 42070 42071 42072 42073 42074 42075 42076 42077 42078 42079 42080 42081 42082 42083 42084 42085 42086 42087 42088 42089 42090 42091 42092 42093 42094 42095 42096 42097 42098 42099 42100 42101 42102 42103 42104 42105 42106 42107 42108 42109 42110 42111 42112 42113 42114 42115 42116 42117 42118 42119 42120 42121 42122 42123 42124 42125 42126 42127 42128 42129 42130 42131 42132 42133 42134 42135 42136 42137 42138 42139 42140 42141 42142 42143 42144 42145 42146 42147 42148 42149 42150 42151 42152 42153 42154 42155 42156 42157 42158 42159 42160 42161 42162 42163 42164 42165 42166 42167 42168 42169 42170 42171 42172 42173 42174 42175 42176 42177 42178 42179 42180 42181 42182 42183 42184 42185 42186 42187 42188 42189 42190 42191 42192 42193 42194 42195 42196 42197 42198 42199 42200 42201 42202 42203 42204 42205 42206 42207 42208 42209 42210 42211 42212 42213 42214 42215 42216 42217 42218 42219 42220 42221 42222 42223 42224 42225 42226 42227 42228 42229 42230 42231 42232 42233 42234 42235 42236 42237 42238 42239 42240 42241 42242 42243 42244 42245 42246 42247 42248 42249 42250 42251 42252 42253 42254 42255 42256 42257 42258 42259 42260 42261 42262 42263 42264 42265 42266 42267 42268 42269 42270 42271 42272 42273 42274 42275 42276 42277 42278 42279 42280 42281 42282 42283 42284 42285 42286 42287 42288 42289 42290 42291 42292 42293 42294 42295 42296 42297 42298 42299 42300 42301 42302 42303 42304 42305 42306 42307 42308 42309 42310 42311 42312 42313 42314 42315 42316 42317 42318 42319 42320 42321 42322 42323 42324 42325 42326 42327 42328 42329 42330 42331 42332 42333 42334 42335 42336 42337 42338 42339 42340 42341 42342 42343 42344 42345 42346 42347 42348 42349 42350 42351 42352 42353 42354 42355 42356 42357 42358 42359 42360 42361 42362 42363 42364 42365 42366 42367 42368 42369 42370 42371 42372 42373 42374 42375 42376 42377 42378 42379 42380 42381 42382 42383 42384 42385 42386 42387 42388 42389 42390 42391 42392 42393 42394 42395 42396 42397 42398 42399 42400 42401 42402 42403 42404 42405 42406 42407 42408 42409 42410 42411 42412 42413 42414 42415 42416 42417 42418 42419 42420 42421 42422 42423 42424 42425 42426 42427 42428 42429 42430 42431 42432 42433 42434 42435 42436 42437 42438 42439 42440 42441 42442 42443 42444 42445 42446 42447 42448 42449 42450 42451 42452 42453 42454 42455 42456 42457 42458 42459 42460 42461 42462 42463 42464 42465 42466 42467 42468 42469 42470 42471 42472 42473 42474 42475 42476 42477 42478 42479 42480 42481 42482 42483 42484 42485 42486 42487 42488 42489 42490 42491 42492 42493 42494 42495 42496 42497 42498 42499 42500 42501 42502 42503 42504 42505 42506 42507 42508 42509 42510 42511 42512 42513 42514 42515 42516 42517 42518 42519 42520 42521 42522 42523 42524 42525 42526 42527 42528 42529 42530 42531 42532 42533 42534 42535 42536 42537 42538 42539 42540 42541 42542 42543 42544 42545 42546 42547 42548 42549 42550 42551 42552 42553 42554 42555 42556 42557 42558 42559 42560 42561 42562 42563 42564 42565 42566 42567 42568 42569 42570 42571 42572 42573 42574 42575 42576 42577 42578 42579 42580 42581 42582 42583 42584 42585 42586 42587 42588 42589 42590 42591 42592 42593 42594 42595 42596 42597 42598 42599 42600 42601 42602 42603 42604 42605 42606 42607 42608 42609 42610 42611 42612 42613 42614 42615 42616 42617 42618 42619 42620 42621 42622 42623 42624 42625 42626 42627 42628 42629 42630 42631 42632 42633 42634 42635 42636 42637 42638 42639 42640 42641 42642 42643 42644 42645 42646 42647 42648 42649 42650 42651 42652 42653 42654 42655 42656 42657 42658 42659 42660 42661 42662 42663 42664 42665 42666 42667 42668 42669 42670 42671 42672 42673 42674 42675 42676 42677 42678 42679 42680 42681 42682 42683 42684 42685 42686 42687 42688 42689 42690 42691 42692 42693 42694 42695 42696 42697 42698 42699 42700 42701 42702 42703 42704 42705 42706 42707 42708 42709 42710 42711 42712 42713 42714 42715 42716 42717 42718 42719 42720 42721 42722 42723 42724 42725 42726 42727 42728 42729 42730 42731 42732 42733 42734 42735 42736 42737 42738 42739 42740 42741 42742 42743 42744 42745 42746 42747 42748 42749 42750 42751 42752 42753 42754 42755 42756 42757 42758 42759 42760 42761 42762 42763 42764 42765 42766 42767 42768 42769 42770 42771 42772 42773 42774 42775 42776 42777 42778 42779 42780 42781 42782 42783 42784 42785 42786 42787 42788 42789 42790 42791 42792 42793 42794 42795 42796 42797 42798 42799 42800 42801 42802 42803 42804 42805 42806 42807 42808 42809 42810 42811 42812 42813 42814 42815 42816 42817 42818 42819 42820 42821 42822 42823 42824 42825 42826 42827 42828 42829 42830 42831 42832 42833 42834 42835 42836 42837 42838 42839 42840 42841 42842 42843 42844 42845 42846 42847 42848 42849 42850 42851 42852 42853 42854 42855 42856 42857 42858 42859 42860 42861 42862 42863 42864 42865 42866 42867 42868 42869 42870 42871 42872 42873 42874 42875 42876 42877 42878 42879 42880 42881 42882 42883 42884 42885 42886 42887 42888 42889 42890 42891 42892 42893 42894 42895 42896 42897 42898 42899 42900 42901 42902 42903 42904 42905 42906 42907 42908 42909 42910 42911 42912 42913 42914 42915 42916 42917 42918 42919 42920 42921 42922 42923 42924 42925 42926 42927 42928 42929 42930 42931 42932 42933 42934 42935 42936 42937 42938 42939 42940 42941 42942 42943 42944 42945 42946 42947 42948 42949 42950 42951 42952 42953 42954 42955 42956 42957 42958 42959 42960 42961 42962 42963 42964 42965 42966 42967 42968 42969 42970 42971 42972 42973 42974 42975 42976 42977 42978 42979 42980 42981 42982 42983 42984 42985 42986 42987 42988 42989 42990 42991 42992 42993 42994 42995 42996 42997 42998 42999 43000 43001 43002 43003 43004 43005 43006 43007 43008 43009 43010 43011 43012 43013 43014 43015 43016 43017 43018 43019 43020 43021 43022 43023 43024 43025 43026 43027 43028 43029 43030 43031 43032 43033 43034 43035 43036 43037 43038 43039 43040 43041 43042 43043 43044 43045 43046 43047 43048 43049 43050 43051 43052 43053 43054 43055 43056 43057 43058 43059 43060 43061 43062 43063 43064 43065 43066 43067 43068 43069 43070 43071 43072 43073 43074 43075 43076 43077 43078 43079 43080 43081 43082 43083 43084 43085 43086 43087 43088 43089 43090 43091 43092 43093 43094 43095 43096 43097 43098 43099 43100 43101 43102 43103 43104 43105 43106 43107 43108 43109 43110 43111 43112 43113 43114 43115 43116 43117 43118 43119 43120 43121 43122 43123 43124 43125 43126 43127 43128 43129 43130 43131 43132 43133 43134 43135 43136 43137 43138 43139 43140 43141 43142 43143 43144 43145 43146 43147 43148 43149 43150 43151 43152 43153 43154 43155 43156 43157 43158 43159 43160 43161 43162 43163 43164 43165 43166 43167 43168 43169 43170 43171 43172 43173 43174 43175 43176 43177 43178 43179 43180 43181 43182 43183 43184 43185 43186 43187 43188 43189 43190 43191 43192 43193 43194 43195 43196 43197 43198 43199 43200 43201 43202 43203 43204 43205 43206 43207 43208 43209 43210 43211 43212 43213 43214 43215 43216 43217 43218 43219 43220 43221 43222 43223 43224 43225 43226 43227 43228 43229 43230 43231 43232 43233 43234 43235 43236 43237 43238 43239 43240 43241 43242 43243 43244 43245 43246 43247 43248 43249 43250 43251 43252 43253 43254 43255 43256 43257 43258 43259 43260 43261 43262 43263 43264 43265 43266 43267 43268 43269 43270 43271 43272 43273 43274 43275 43276 43277 43278 43279 43280 43281 43282 43283 43284 43285 43286 43287 43288 43289 43290 43291 43292 43293 43294 43295 43296 43297 43298 43299 43300 43301 43302 43303 43304 43305 43306 43307 43308 43309 43310 43311 43312 43313 43314 43315 43316 43317 43318 43319 43320 43321 43322 43323 43324 43325 43326 43327 43328 43329 43330 43331 43332 43333 43334 43335 43336 43337 43338 43339 43340 43341 43342 43343 43344 43345 43346 43347 43348 43349 43350 43351 43352 43353 43354 43355 43356 43357 43358 43359 43360 43361 43362 43363 43364 43365 43366 43367 43368 43369 43370 43371 43372 43373 43374 43375 43376 43377 43378 43379 43380 43381 43382 43383 43384 43385 43386 43387 43388 43389 43390 43391 43392 43393 43394 43395 43396 43397 43398 43399 43400 43401 43402 43403 43404 43405 43406 43407 43408 43409 43410 43411 43412 43413 43414 43415 43416 43417 43418 43419 43420 43421 43422 43423 43424 43425 43426 43427 43428 43429 43430 43431 43432 43433 43434 43435 43436 43437 43438 43439 43440 43441 43442 43443 43444 43445 43446 43447 43448 43449 43450 43451 43452 43453 43454 43455 43456 43457 43458 43459 43460 43461 43462 43463 43464 43465 43466 43467 43468 43469 43470 43471 43472 43473 43474 43475 43476 43477 43478 43479 43480 43481 43482 43483 43484 43485 43486 43487 43488 43489 43490 43491 43492 43493 43494 43495 43496 43497 43498 43499 43500 43501 43502 43503 43504 43505 43506 43507 43508 43509 43510 43511 43512 43513 43514 43515 43516 43517 43518 43519 43520 43521 43522 43523 43524 43525 43526 43527 43528 43529 43530 43531 43532 43533 43534 43535 43536 43537 43538 43539 43540 43541 43542 43543 43544 43545 43546 43547 43548 43549 43550 43551 43552 43553 43554 43555 43556 43557 43558 43559 43560 43561 43562 43563 43564 43565 43566 43567 43568 43569 43570 43571 43572 43573 43574 43575 43576 43577 43578 43579 43580 43581 43582 43583 43584 43585 43586 43587 43588 43589 43590 43591 43592 43593 43594 43595 43596 43597 43598 43599 43600 43601 43602 43603 43604 43605 43606 43607 43608 43609 43610 43611 43612 43613 43614 43615 43616 43617 43618 43619 43620 43621 43622 43623 43624 43625 43626 43627 43628 43629 43630 43631 43632 43633 43634 43635 43636 43637 43638 43639 43640 43641 43642 43643 43644 43645 43646 43647 43648 43649 43650 43651 43652 43653 43654 43655 43656 43657 43658 43659 43660 43661 43662 43663 43664 43665 43666 43667 43668 43669 43670 43671 43672 43673 43674 43675 43676 43677 43678 43679 43680 43681 43682 43683 43684 43685 43686 43687 43688 43689 43690 43691 43692 43693 43694 43695 43696 43697 43698 43699 43700 43701 43702 43703 43704 43705 43706 43707 43708 43709 43710 43711 43712 43713 43714 43715 43716 43717 43718 43719 43720 43721 43722 43723 43724 43725 43726 43727 43728 43729 43730 43731 43732 43733 43734 43735 43736 43737 43738 43739 43740 43741 43742 43743 43744 43745 43746 43747 43748 43749 43750 43751 43752 43753 43754 43755 43756 43757 43758 43759 43760 43761 43762 43763 43764 43765 43766 43767 43768 43769 43770 43771 43772 43773 43774 43775 43776 43777 43778 43779 43780 43781 43782 43783 43784 43785 43786 43787 43788 43789 43790 43791 43792 43793 43794 43795 43796 43797 43798 43799 43800 43801 43802 43803 43804 43805 43806 43807 43808 43809 43810 43811 43812 43813 43814 43815 43816 43817 43818 43819 43820 43821 43822 43823 43824 43825 43826 43827 43828 43829 43830 43831 43832 43833 43834 43835 43836 43837 43838 43839 43840 43841 43842 43843 43844 43845 43846 43847 43848 43849 43850 43851 43852 43853 43854 43855 43856 43857 43858 43859 43860 43861 43862 43863 43864 43865 43866 43867 43868 43869 43870 43871 43872 43873 43874 43875 43876 43877 43878 43879 43880 43881 43882 43883 43884 43885 43886 43887 43888 43889 43890 43891 43892 43893 43894 43895 43896 43897 43898 43899 43900 43901 43902 43903 43904 43905 43906 43907 43908 43909 43910 43911 43912 43913 43914 43915 43916 43917 43918 43919 43920 43921 43922 43923 43924 43925 43926 43927 43928 43929 43930 43931 43932 43933 43934 43935 43936 43937 43938 43939 43940 43941 43942 43943 43944 43945 43946 43947 43948 43949 43950 43951 43952 43953 43954 43955 43956 43957 43958 43959 43960 43961 43962 43963 43964 43965 43966 43967 43968 43969 43970 43971 43972 43973 43974 43975 43976 43977 43978 43979 43980 43981 43982 43983 43984 43985 43986 43987 43988 43989 43990 43991 43992 43993 43994 43995 43996 43997 43998 43999 44000 44001 44002 44003 44004 44005 44006 44007 44008 44009 44010 44011 44012 44013 44014 44015 44016 44017 44018 44019 44020 44021 44022 44023 44024 44025 44026 44027 44028 44029 44030 44031 44032 44033 44034 44035 44036 44037 44038 44039 44040 44041 44042 44043 44044 44045 44046 44047 44048 44049 44050 44051 44052 44053 44054 44055 44056 44057 44058 44059 44060 44061 44062 44063 44064 44065 44066 44067 44068 44069 44070 44071 44072 44073 44074 44075 44076 44077 44078 44079 44080 44081 44082 44083 44084 44085 44086 44087 44088 44089 44090 44091 44092 44093 44094 44095 44096 44097 44098 44099 44100 44101 44102 44103 44104 44105 44106 44107 44108 44109 44110 44111 44112 44113 44114 44115 44116 44117 44118 44119 44120 44121 44122 44123 44124 44125 44126 44127 44128 44129 44130 44131 44132 44133 44134 44135 44136 44137 44138 44139 44140 44141 44142 44143 44144 44145 44146 44147 44148 44149 44150 44151 44152 44153 44154 44155 44156 44157 44158 44159 44160 44161 44162 44163 44164 44165 44166 44167 44168 44169 44170 44171 44172 44173 44174 44175 44176 44177 44178 44179 44180 44181 44182 44183 44184 44185 44186 44187 44188 44189 44190 44191 44192 44193 44194 44195 44196 44197 44198 44199 44200 44201 44202 44203 44204 44205 44206 44207 44208 44209 44210 44211 44212 44213 44214 44215 44216 44217 44218 44219 44220 44221 44222 44223 44224 44225 44226 44227 44228 44229 44230 44231 44232 44233 44234 44235 44236 44237 44238 44239 44240 44241 44242 44243 44244 44245 44246 44247 44248 44249 44250 44251 44252 44253 44254 44255 44256 44257 44258 44259 44260 44261 44262 44263 44264 44265 44266 44267 44268 44269 44270 44271 44272 44273 44274 44275 44276 44277 44278 44279 44280 44281 44282 44283 44284 44285 44286 44287 44288 44289 44290 44291 44292 44293 44294 44295 44296 44297 44298 44299 44300 44301 44302 44303 44304 44305 44306 44307 44308 44309 44310 44311 44312 44313 44314 44315 44316 44317 44318 44319 44320 44321 44322 44323 44324 44325 44326 44327 44328 44329 44330 44331 44332 44333 44334 44335 44336 44337 44338 44339 44340 44341 44342 44343 44344 44345 44346 44347 44348 44349 44350 44351 44352 44353 44354 44355 44356 44357 44358 44359 44360 44361 44362 44363 44364 44365 44366 44367 44368 44369 44370 44371 44372 44373 44374 44375 44376 44377 44378 44379 44380 44381 44382 44383 44384 44385 44386 44387 44388 44389 44390 44391 44392 44393 44394 44395 44396 44397 44398 44399 44400 44401 44402 44403 44404 44405 44406 44407 44408 44409 44410 44411 44412 44413 44414 44415 44416 44417 44418 44419 44420 44421 44422 44423 44424 44425 44426 44427 44428 44429 44430 44431 44432 44433 44434 44435 44436 44437 44438 44439 44440 44441 44442 44443 44444 44445 44446 44447 44448 44449 44450 44451 44452 44453 44454 44455 44456 44457 44458 44459 44460 44461 44462 44463 44464 44465 44466 44467 44468 44469 44470 44471 44472 44473 44474 44475 44476 44477 44478 44479 44480 44481 44482 44483 44484 44485 44486 44487 44488 44489 44490 44491 44492 44493 44494 44495 44496 44497 44498 44499 44500 44501 44502 44503 44504 44505 44506 44507 44508 44509 44510 44511 44512 44513 44514 44515 44516 44517 44518 44519 44520 44521 44522 44523 44524 44525 44526 44527 44528 44529 44530 44531 44532 44533 44534 44535 44536 44537 44538 44539 44540 44541 44542 44543 44544 44545 44546 44547 44548 44549 44550 44551 44552 44553 44554 44555 44556 44557 44558 44559 44560 44561 44562 44563 44564 44565 44566 44567 44568 44569 44570 44571 44572 44573 44574 44575 44576 44577 44578 44579 44580 44581 44582 44583 44584 44585 44586 44587 44588 44589 44590 44591 44592 44593 44594 44595 44596 44597 44598 44599 44600 44601 44602 44603 44604 44605 44606 44607 44608 44609 44610 44611 44612 44613 44614 44615 44616 44617 44618 44619 44620 44621 44622 44623 44624 44625 44626 44627 44628 44629 44630 44631 44632 44633 44634 44635 44636 44637 44638 44639 44640 44641 44642 44643 44644 44645 44646 44647 44648 44649 44650 44651 44652 44653 44654 44655 44656 44657 44658 44659 44660 44661 44662 44663 44664 44665 44666 44667 44668 44669 44670 44671 44672 44673 44674 44675 44676 44677 44678 44679 44680 44681 44682 44683 44684 44685 44686 44687 44688 44689 44690 44691 44692 44693 44694 44695 44696 44697 44698 44699 44700 44701 44702 44703 44704 44705 44706 44707 44708 44709 44710 44711 44712 44713 44714 44715 44716 44717 44718 44719 44720 44721 44722 44723 44724 44725 44726 44727 44728 44729 44730 44731 44732 44733 44734 44735 44736 44737 44738 44739 44740 44741 44742 44743 44744 44745 44746 44747 44748 44749 44750 44751 44752 44753 44754 44755 44756 44757 44758 44759 44760 44761 44762 44763 44764 44765 44766 44767 44768 44769 44770 44771 44772 44773 44774 44775 44776 44777 44778 44779 44780 44781 44782 44783 44784 44785 44786 44787 44788 44789 44790 44791 44792 44793 44794 44795 44796 44797 44798 44799 44800 44801 44802 44803 44804 44805 44806 44807 44808 44809 44810 44811 44812 44813 44814 44815 44816 44817 44818 44819 44820 44821 44822 44823 44824 44825 44826 44827 44828 44829 44830 44831 44832 44833 44834 44835 44836 44837 44838 44839 44840 44841 44842 44843 44844 44845 44846 44847 44848 44849 44850 44851 44852 44853 44854 44855 44856 44857 44858 44859 44860 44861 44862 44863 44864 44865 44866 44867 44868 44869 44870 44871 44872 44873 44874 44875 44876 44877 44878 44879 44880 44881 44882 44883 44884 44885 44886 44887 44888 44889 44890 44891 44892 44893 44894 44895 44896 44897 44898 44899 44900 44901 44902 44903 44904 44905 44906 44907 44908 44909 44910 44911 44912 44913 44914 44915 44916 44917 44918 44919 44920 44921 44922 44923 44924 44925 44926 44927 44928 44929 44930 44931 44932 44933 44934 44935 44936 44937 44938 44939 44940 44941 44942 44943 44944 44945 44946 44947 44948 44949 44950 44951 44952 44953 44954 44955 44956 44957 44958 44959 44960 44961 44962 44963 44964 44965 44966 44967 44968 44969 44970 44971 44972 44973 44974 44975 44976 44977 44978 44979 44980 44981 44982 44983 44984 44985 44986 44987 44988 44989 44990 44991 44992 44993 44994 44995 44996 44997 44998 44999 45000 45001 45002 45003 45004 45005 45006 45007 45008 45009 45010 45011 45012 45013 45014 45015 45016 45017 45018 45019 45020 45021 45022 45023 45024 45025 45026 45027 45028 45029 45030 45031 45032 45033 45034 45035 45036 45037 45038 45039 45040 45041 45042 45043 45044 45045 45046 45047 45048 45049 45050 45051 45052 45053 45054 45055 45056 45057 45058 45059 45060 45061 45062 45063 45064 45065 45066 45067 45068 45069 45070 45071 45072 45073 45074 45075 45076 45077 45078 45079 45080 45081 45082 45083 45084 45085 45086 45087 45088 45089 45090 45091 45092 45093 45094 45095 45096 45097 45098 45099 45100 45101 45102 45103 45104 45105 45106 45107 45108 45109 45110 45111 45112 45113 45114 45115 45116 45117 45118 45119 45120 45121 45122 45123 45124 45125 45126 45127 45128 45129 45130 45131 45132 45133 45134 45135 45136 45137 45138 45139 45140 45141 45142 45143 45144 45145 45146 45147 45148 45149 45150 45151 45152 45153 45154 45155 45156 45157 45158 45159 45160 45161 45162 45163 45164 45165 45166 45167 45168 45169 45170 45171 45172 45173 45174 45175 45176 45177 45178 45179 45180 45181 45182 45183 45184 45185 45186 45187 45188 45189 45190 45191 45192 45193 45194 45195 45196 45197 45198 45199 45200 45201 45202 45203 45204 45205 45206 45207 45208 45209 45210 45211 45212 45213 45214 45215 45216 45217 45218 45219 45220 45221 45222 45223 45224 45225 45226 45227 45228 45229 45230 45231 45232 45233 45234 45235 45236 45237 45238 45239 45240 45241 45242 45243 45244 45245 45246 45247 45248 45249 45250 45251 45252 45253 45254 45255 45256 45257 45258 45259 45260 45261 45262 45263 45264 45265 45266 45267 45268 45269 45270 45271 45272 45273 45274 45275 45276 45277 45278 45279 45280 45281 45282 45283 45284 45285 45286 45287 45288 45289 45290 45291 45292 45293 45294 45295 45296 45297 45298 45299 45300 45301 45302 45303 45304 45305 45306 45307 45308 45309 45310 45311 45312 45313 45314 45315 45316 45317 45318 45319 45320 45321 45322 45323 45324 45325 45326 45327 45328 45329 45330 45331 45332 45333 45334 45335 45336 45337 45338 45339 45340 45341 45342 45343 45344 45345 45346 45347 45348 45349 45350 45351 45352 45353 45354 45355 45356 45357 45358 45359 45360 45361 45362 45363 45364 45365 45366 45367 45368 45369 45370 45371 45372 45373 45374 45375 45376 45377 45378 45379 45380 45381 45382 45383 45384 45385 45386 45387 45388 45389 45390 45391 45392 45393 45394 45395 45396 45397 45398 45399 45400 45401 45402 45403 45404 45405 45406 45407 45408 45409 45410 45411 45412 45413 45414 45415 45416 45417 45418 45419 45420 45421 45422 45423 45424 45425 45426 45427 45428 45429 45430 45431 45432 45433 45434 45435 45436 45437 45438 45439 45440 45441 45442 45443 45444 45445 45446 45447 45448 45449 45450 45451 45452 45453 45454 45455 45456 45457 45458 45459 45460 45461 45462 45463 45464 45465 45466 45467 45468 45469 45470 45471 45472 45473 45474 45475 45476 45477 45478 45479 45480 45481 45482 45483 45484 45485 45486 45487 45488 45489 45490 45491 45492 45493 45494 45495 45496 45497 45498 45499 45500 45501 45502 45503 45504 45505 45506 45507 45508 45509 45510 45511 45512 45513 45514 45515 45516 45517 45518 45519 45520 45521 45522 45523 45524 45525 45526 45527 45528 45529 45530 45531 45532 45533 45534 45535 45536 45537 45538 45539 45540 45541 45542 45543 45544 45545 45546 45547 45548 45549 45550 45551 45552 45553 45554 45555 45556 45557 45558 45559 45560 45561 45562 45563 45564 45565 45566 45567 45568 45569 45570 45571 45572 45573 45574 45575 45576 45577 45578 45579 45580 45581 45582 45583 45584 45585 45586 45587 45588 45589 45590 45591 45592 45593 45594 45595 45596 45597 45598 45599 45600 45601 45602 45603 45604 45605 45606 45607 45608 45609 45610 45611 45612 45613 45614 45615 45616 45617 45618 45619 45620 45621 45622 45623 45624 45625 45626 45627 45628 45629 45630 45631 45632 45633 45634 45635 45636 45637 45638 45639 45640 45641 45642 45643 45644 45645 45646 45647 45648 45649 45650 45651 45652 45653 45654 45655 45656 45657 45658 45659 45660 45661 45662 45663 45664 45665 45666 45667 45668 45669 45670 45671 45672 45673 45674 45675 45676 45677 45678 45679 45680 45681 45682 45683 45684 45685 45686 45687 45688 45689 45690 45691 45692 45693 45694 45695 45696 45697 45698 45699 45700 45701 45702 45703 45704 45705 45706 45707 45708 45709 45710 45711 45712 45713 45714 45715 45716 45717 45718 45719 45720 45721 45722 45723 45724 45725 45726 45727 45728 45729 45730 45731 45732 45733 45734 45735 45736 45737 45738 45739 45740 45741 45742 45743 45744 45745 45746 45747 45748 45749 45750 45751 45752 45753 45754 45755 45756 45757 45758 45759 45760 45761 45762 45763 45764 45765 45766 45767 45768 45769 45770 45771 45772 45773 45774 45775 45776 45777 45778 45779 45780 45781 45782 45783 45784 45785 45786 45787 45788 45789 45790 45791 45792 45793 45794 45795 45796 45797 45798 45799 45800 45801 45802 45803 45804 45805 45806 45807 45808 45809 45810 45811 45812 45813 45814 45815 45816 45817 45818 45819 45820 45821 45822 45823 45824 45825 45826 45827 45828 45829 45830 45831 45832 45833 45834 45835 45836 45837 45838 45839 45840 45841 45842 45843 45844 45845 45846 45847 45848 45849 45850 45851 45852 45853 45854 45855 45856 45857 45858 45859 45860 45861 45862 45863 45864 45865 45866 45867 45868 45869 45870 45871 45872 45873 45874 45875 45876 45877 45878 45879 45880 45881 45882 45883 45884 45885 45886 45887 45888 45889 45890 45891 45892 45893 45894 45895 45896 45897 45898 45899 45900 45901 45902 45903 45904 45905 45906 45907 45908 45909 45910 45911 45912 45913 45914 45915 45916 45917 45918 45919 45920 45921 45922 45923 45924 45925 45926 45927 45928 45929 45930 45931 45932 45933 45934 45935 45936 45937 45938 45939 45940 45941 45942 45943 45944 45945 45946 45947 45948 45949 45950 45951 45952 45953 45954 45955 45956 45957 45958 45959 45960 45961 45962 45963 45964 45965 45966 45967 45968 45969 45970 45971 45972 45973 45974 45975 45976 45977 45978 45979 45980 45981 45982 45983 45984 45985 45986 45987 45988 45989 45990 45991 45992 45993 45994 45995 45996 45997 45998 45999 46000 46001 46002 46003 46004 46005 46006 46007 46008 46009 46010 46011 46012 46013 46014 46015 46016 46017 46018 46019 46020 46021 46022 46023 46024 46025 46026 46027 46028 46029 46030 46031 46032 46033 46034 46035 46036 46037 46038 46039 46040 46041 46042 46043 46044 46045 46046 46047 46048 46049 46050 46051 46052 46053 46054 46055 46056 46057 46058 46059 46060 46061 46062 46063 46064 46065 46066 46067 46068 46069 46070 46071 46072 46073 46074 46075 46076 46077 46078 46079 46080 46081 46082 46083 46084 46085 46086 46087 46088 46089 46090 46091 46092 46093 46094 46095 46096 46097 46098 46099 46100 46101 46102 46103 46104 46105 46106 46107 46108 46109 46110 46111 46112 46113 46114 46115 46116 46117 46118 46119 46120 46121 46122 46123 46124 46125 46126 46127 46128 46129 46130 46131 46132 46133 46134 46135 46136 46137 46138 46139 46140 46141 46142 46143 46144 46145 46146 46147 46148 46149 46150 46151 46152 46153 46154 46155 46156 46157 46158 46159 46160 46161 46162 46163 46164 46165 46166 46167 46168 46169 46170 46171 46172 46173 46174 46175 46176 46177 46178 46179 46180 46181 46182 46183 46184 46185 46186 46187 46188 46189 46190 46191 46192 46193 46194 46195 46196 46197 46198 46199 46200 46201 46202 46203 46204 46205 46206 46207 46208 46209 46210 46211 46212 46213 46214 46215 46216 46217 46218 46219 46220 46221 46222 46223 46224 46225 46226 46227 46228 46229 46230 46231 46232 46233 46234 46235 46236 46237 46238 46239 46240 46241 46242 46243 46244 46245 46246 46247 46248 46249 46250 46251 46252 46253 46254 46255 46256 46257 46258 46259 46260 46261 46262 46263 46264 46265 46266 46267 46268 46269 46270 46271 46272 46273 46274 46275 46276 46277 46278 46279 46280 46281 46282 46283 46284 46285 46286 46287 46288 46289 46290 46291 46292 46293 46294 46295 46296 46297 46298 46299 46300 46301 46302 46303 46304 46305 46306 46307 46308 46309 46310 46311 46312 46313 46314 46315 46316 46317 46318 46319 46320 46321 46322 46323 46324 46325 46326 46327 46328 46329 46330 46331 46332 46333 46334 46335 46336 46337 46338 46339 46340 46341 46342 46343 46344 46345 46346 46347 46348 46349 46350 46351 46352 46353 46354 46355 46356 46357 46358 46359 46360 46361 46362 46363 46364 46365 46366 46367 46368 46369 46370 46371 46372 46373 46374 46375 46376 46377 46378 46379 46380 46381 46382 46383 46384 46385 46386 46387 46388 46389 46390 46391 46392 46393 46394 46395 46396 46397 46398 46399 46400 46401 46402 46403 46404 46405 46406 46407 46408 46409 46410 46411 46412 46413 46414 46415 46416 46417 46418 46419 46420 46421 46422 46423 46424 46425 46426 46427 46428 46429 46430 46431 46432 46433 46434 46435 46436 46437 46438 46439 46440 46441 46442 46443 46444 46445 46446 46447 46448 46449 46450 46451 46452 46453 46454 46455 46456 46457 46458 46459 46460 46461 46462 46463 46464 46465 46466 46467 46468 46469 46470 46471 46472 46473 46474 46475 46476 46477 46478 46479 46480 46481 46482 46483 46484 46485 46486 46487 46488 46489 46490 46491 46492 46493 46494 46495 46496 46497 46498 46499 46500 46501 46502 46503 46504 46505 46506 46507 46508 46509 46510 46511 46512 46513 46514 46515 46516 46517 46518 46519 46520 46521 46522 46523 46524 46525 46526 46527 46528 46529 46530 46531 46532 46533 46534 46535 46536 46537 46538 46539 46540 46541 46542 46543 46544 46545 46546 46547 46548 46549 46550 46551 46552 46553 46554 46555 46556 46557 46558 46559 46560 46561 46562 46563 46564 46565 46566 46567 46568 46569 46570 46571 46572 46573 46574 46575 46576 46577 46578 46579 46580 46581 46582 46583 46584 46585 46586 46587 46588 46589 46590 46591 46592 46593 46594 46595 46596 46597 46598 46599 46600 46601 46602 46603 46604 46605 46606 46607 46608 46609 46610 46611 46612 46613 46614 46615 46616 46617 46618 46619 46620 46621 46622 46623 46624 46625 46626 46627 46628 46629 46630 46631 46632 46633 46634 46635 46636 46637 46638 46639 46640 46641 46642 46643 46644 46645 46646 46647 46648 46649 46650 46651 46652 46653 46654 46655 46656 46657 46658 46659 46660 46661 46662 46663 46664 46665 46666 46667 46668 46669 46670 46671 46672 46673 46674 46675 46676 46677 46678 46679 46680 46681 46682 46683 46684 46685 46686 46687 46688 46689 46690 46691 46692 46693 46694 46695 46696 46697 46698 46699 46700 46701 46702 46703 46704 46705 46706 46707 46708 46709 46710 46711 46712 46713 46714 46715 46716 46717 46718 46719 46720 46721 46722 46723 46724 46725 46726 46727 46728 46729 46730 46731 46732 46733 46734 46735 46736 46737 46738 46739 46740 46741 46742 46743 46744 46745 46746 46747 46748 46749 46750 46751 46752 46753 46754 46755 46756 46757 46758 46759 46760 46761 46762 46763 46764 46765 46766 46767 46768 46769 46770 46771 46772 46773 46774 46775 46776 46777 46778 46779 46780 46781 46782 46783 46784 46785 46786 46787 46788 46789 46790 46791 46792 46793 46794 46795 46796 46797 46798 46799 46800 46801 46802 46803 46804 46805 46806 46807 46808 46809 46810 46811 46812 46813 46814 46815 46816 46817 46818 46819 46820 46821 46822 46823 46824 46825 46826 46827 46828 46829 46830 46831 46832 46833 46834 46835 46836 46837 46838 46839 46840 46841 46842 46843 46844 46845 46846 46847 46848 46849 46850 46851 46852 46853 46854 46855 46856 46857 46858 46859 46860 46861 46862 46863 46864 46865 46866 46867 46868 46869 46870 46871 46872 46873 46874 46875 46876 46877 46878 46879 46880 46881 46882 46883 46884 46885 46886 46887 46888 46889 46890 46891 46892 46893 46894 46895 46896 46897 46898 46899 46900 46901 46902 46903 46904 46905 46906 46907 46908 46909 46910 46911 46912 46913 46914 46915 46916 46917 46918 46919 46920 46921 46922 46923 46924 46925 46926 46927 46928 46929 46930 46931 46932 46933 46934 46935 46936 46937 46938 46939 46940 46941 46942 46943 46944 46945 46946 46947 46948 46949 46950 46951 46952 46953 46954 46955 46956 46957 46958 46959 46960 46961 46962 46963 46964 46965 46966 46967 46968 46969 46970 46971 46972 46973 46974 46975 46976 46977 46978 46979 46980 46981 46982 46983 46984 46985 46986 46987 46988 46989 46990 46991 46992 46993 46994 46995 46996 46997 46998 46999 47000 47001 47002 47003 47004 47005 47006 47007 47008 47009 47010 47011 47012 47013 47014 47015 47016 47017 47018 47019 47020 47021 47022 47023 47024 47025 47026 47027 47028 47029 47030 47031 47032 47033 47034 47035 47036 47037 47038 47039 47040 47041 47042 47043 47044 47045 47046 47047 47048 47049 47050 47051 47052 47053 47054 47055 47056 47057 47058 47059 47060 47061 47062 47063 47064 47065 47066 47067 47068 47069 47070 47071 47072 47073 47074 47075 47076 47077 47078 47079 47080 47081 47082 47083 47084 47085 47086 47087 47088 47089 47090 47091 47092 47093 47094 47095 47096 47097 47098 47099 47100 47101 47102 47103 47104 47105 47106 47107 47108 47109 47110 47111 47112 47113 47114 47115 47116 47117 47118 47119 47120 47121 47122 47123 47124 47125 47126 47127 47128 47129 47130 47131 47132 47133 47134 47135 47136 47137 47138 47139 47140 47141 47142 47143 47144 47145 47146 47147 47148 47149 47150 47151 47152 47153 47154 47155 47156 47157 47158 47159 47160 47161 47162 47163 47164 47165 47166 47167 47168 47169 47170 47171 47172 47173 47174 47175 47176 47177 47178 47179 47180 47181 47182 47183 47184 47185 47186 47187 47188 47189 47190 47191 47192 47193 47194 47195 47196 47197 47198 47199 47200 47201 47202 47203 47204 47205 47206 47207 47208 47209 47210 47211 47212 47213 47214 47215 47216 47217 47218 47219 47220 47221 47222 47223 47224 47225 47226 47227 47228 47229 47230 47231 47232 47233 47234 47235 47236 47237 47238 47239 47240 47241 47242 47243 47244 47245 47246 47247 47248 47249 47250 47251 47252 47253 47254 47255 47256 47257 47258 47259 47260 47261 47262 47263 47264 47265 47266 47267 47268 47269 47270 47271 47272 47273 47274 47275 47276 47277 47278 47279 47280 47281 47282 47283 47284 47285 47286 47287 47288 47289 47290 47291 47292 47293 47294 47295 47296 47297 47298 47299 47300 47301 47302 47303 47304 47305 47306 47307 47308 47309 47310 47311 47312 47313 47314 47315 47316 47317 47318 47319 47320 47321 47322 47323 47324 47325 47326 47327 47328 47329 47330 47331 47332 47333 47334 47335 47336 47337 47338 47339 47340 47341 47342 47343 47344 47345 47346 47347 47348 47349 47350 47351 47352 47353 47354 47355 47356 47357 47358 47359 47360 47361 47362 47363 47364 47365 47366 47367 47368 47369 47370 47371 47372 47373 47374 47375 47376 47377 47378 47379 47380 47381 47382 47383 47384 47385 47386 47387 47388 47389 47390 47391 47392 47393 47394 47395 47396 47397 47398 47399 47400 47401 47402 47403 47404 47405 47406 47407 47408 47409 47410 47411 47412 47413 47414 47415 47416 47417 47418 47419 47420 47421 47422 47423 47424 47425 47426 47427 47428 47429 47430 47431 47432 47433 47434 47435 47436 47437 47438 47439 47440 47441 47442 47443 47444 47445 47446 47447 47448 47449 47450 47451 47452 47453 47454 47455 47456 47457 47458 47459 47460 47461 47462 47463 47464 47465 47466 47467 47468 47469 47470 47471 47472 47473 47474 47475 47476 47477 47478 47479 47480 47481 47482 47483 47484 47485 47486 47487 47488 47489 47490 47491 47492 47493 47494 47495 47496 47497 47498 47499 47500 47501 47502 47503 47504 47505 47506 47507 47508 47509 47510 47511 47512 47513 47514 47515 47516 47517 47518 47519 47520 47521 47522 47523 47524 47525 47526 47527 47528 47529 47530 47531 47532 47533 47534 47535 47536 47537 47538 47539 47540 47541 47542 47543 47544 47545 47546 47547 47548 47549 47550 47551 47552 47553 47554 47555 47556 47557 47558 47559 47560 47561 47562 47563 47564 47565 47566 47567 47568 47569 47570 47571 47572 47573 47574 47575 47576 47577 47578 47579 47580 47581 47582 47583 47584 47585 47586 47587 47588 47589 47590 47591 47592 47593 47594 47595 47596 47597 47598 47599 47600 47601 47602 47603 47604 47605 47606 47607 47608 47609 47610 47611 47612 47613 47614 47615 47616 47617 47618 47619 47620 47621 47622 47623 47624 47625 47626 47627 47628 47629 47630 47631 47632 47633 47634 47635 47636 47637 47638 47639 47640 47641 47642 47643 47644 47645 47646 47647 47648 47649 47650 47651 47652 47653 47654 47655 47656 47657 47658 47659 47660 47661 47662 47663 47664 47665 47666 47667 47668 47669 47670 47671 47672 47673 47674 47675 47676 47677 47678 47679 47680 47681 47682 47683 47684 47685 47686 47687 47688 47689 47690 47691 47692 47693 47694 47695 47696 47697 47698 47699 47700 47701 47702 47703 47704 47705 47706 47707 47708 47709 47710 47711 47712 47713 47714 47715 47716 47717 47718 47719 47720 47721 47722 47723 47724 47725 47726 47727 47728 47729 47730 47731 47732 47733 47734 47735 47736 47737 47738 47739 47740 47741 47742 47743 47744 47745 47746 47747 47748 47749 47750 47751 47752 47753 47754 47755 47756 47757 47758 47759 47760 47761 47762 47763 47764 47765 47766 47767 47768 47769 47770 47771 47772 47773 47774 47775 47776 47777 47778 47779 47780 47781 47782 47783 47784 47785 47786 47787 47788 47789 47790 47791 47792 47793 47794 47795 47796 47797 47798 47799 47800 47801 47802 47803 47804 47805 47806 47807 47808 47809 47810 47811 47812 47813 47814 47815 47816 47817 47818 47819 47820 47821 47822 47823 47824 47825 47826 47827 47828 47829 47830 47831 47832 47833 47834 47835 47836 47837 47838 47839 47840 47841 47842 47843 47844 47845 47846 47847 47848 47849 47850 47851 47852 47853 47854 47855 47856 47857 47858 47859 47860 47861 47862 47863 47864 47865 47866 47867 47868 47869 47870 47871 47872 47873 47874 47875 47876 47877 47878 47879 47880 47881 47882 47883 47884 47885 47886 47887 47888 47889 47890 47891 47892 47893 47894 47895 47896 47897 47898 47899 47900 47901 47902 47903 47904 47905 47906 47907 47908 47909 47910 47911 47912 47913 47914 47915 47916 47917 47918 47919 47920 47921 47922 47923 47924 47925 47926 47927 47928 47929 47930 47931 47932 47933 47934 47935 47936 47937 47938 47939 47940 47941 47942 47943 47944 47945 47946 47947 47948 47949 47950 47951 47952 47953 47954 47955 47956 47957 47958 47959 47960 47961 47962 47963 47964 47965 47966 47967 47968 47969 47970 47971 47972 47973 47974 47975 47976 47977 47978 47979 47980 47981 47982 47983 47984 47985 47986 47987 47988 47989 47990 47991 47992 47993 47994 47995 47996 47997 47998 47999 48000 48001 48002 48003 48004 48005 48006 48007 48008 48009 48010 48011 48012 48013 48014 48015 48016 48017 48018 48019 48020 48021 48022 48023 48024 48025 48026 48027 48028 48029 48030 48031 48032 48033 48034 48035 48036 48037 48038 48039 48040 48041 48042 48043 48044 48045 48046 48047 48048 48049 48050 48051 48052 48053 48054 48055 48056 48057 48058 48059 48060 48061 48062 48063 48064 48065 48066 48067 48068 48069 48070 48071 48072 48073 48074 48075 48076 48077 48078 48079 48080 48081 48082 48083 48084 48085 48086 48087 48088 48089 48090 48091 48092 48093 48094 48095 48096 48097 48098 48099 48100 48101 48102 48103 48104 48105 48106 48107 48108 48109 48110 48111 48112 48113 48114 48115 48116 48117 48118 48119 48120 48121 48122 48123 48124 48125 48126 48127 48128 48129 48130 48131 48132 48133 48134 48135 48136 48137 48138 48139 48140 48141 48142 48143 48144 48145 48146 48147 48148 48149 48150 48151 48152 48153 48154 48155 48156 48157 48158 48159 48160 48161 48162 48163 48164 48165 48166 48167 48168 48169 48170 48171 48172 48173 48174 48175 48176 48177 48178 48179 48180 48181 48182 48183 48184 48185 48186 48187 48188 48189 48190 48191 48192 48193 48194 48195 48196 48197 48198 48199 48200 48201 48202 48203 48204 48205 48206 48207 48208 48209 48210 48211 48212 48213 48214 48215 48216 48217 48218 48219 48220 48221 48222 48223 48224 48225 48226 48227 48228 48229 48230 48231 48232 48233 48234 48235 48236 48237 48238 48239 48240 48241 48242 48243 48244 48245 48246 48247 48248 48249 48250 48251 48252 48253 48254 48255 48256 48257 48258 48259 48260 48261 48262 48263 48264 48265 48266 48267 48268 48269 48270 48271 48272 48273 48274 48275 48276 48277 48278 48279 48280 48281 48282 48283 48284 48285 48286 48287 48288 48289 48290 48291 48292 48293 48294 48295 48296 48297 48298 48299 48300 48301 48302 48303 48304 48305 48306 48307 48308 48309 48310 48311 48312 48313 48314 48315 48316 48317 48318 48319 48320 48321 48322 48323 48324 48325 48326 48327 48328 48329 48330 48331 48332 48333 48334 48335 48336 48337 48338 48339 48340 48341 48342 48343 48344 48345 48346 48347 48348 48349 48350 48351 48352 48353 48354 48355 48356 48357 48358 48359 48360 48361 48362 48363 48364 48365 48366 48367 48368 48369 48370 48371 48372 48373 48374 48375 48376 48377 48378 48379 48380 48381 48382 48383 48384 48385 48386 48387 48388 48389 48390 48391 48392 48393 48394 48395 48396 48397 48398 48399 48400 48401 48402 48403 48404 48405 48406 48407 48408 48409 48410 48411 48412 48413 48414 48415 48416 48417 48418 48419 48420 48421 48422 48423 48424 48425 48426 48427 48428 48429 48430 48431 48432 48433 48434 48435 48436 48437 48438 48439 48440 48441 48442 48443 48444 48445 48446 48447 48448 48449 48450 48451 48452 48453 48454 48455 48456 48457 48458 48459 48460 48461 48462 48463 48464 48465 48466 48467 48468 48469 48470 48471 48472 48473 48474 48475 48476 48477 48478 48479 48480 48481 48482 48483 48484 48485 48486 48487 48488 48489 48490 48491 48492 48493 48494 48495 48496 48497 48498 48499 48500 48501 48502 48503 48504 48505 48506 48507 48508 48509 48510 48511 48512 48513 48514 48515 48516 48517 48518 48519 48520 48521 48522 48523 48524 48525 48526 48527 48528 48529 48530 48531 48532 48533 48534 48535 48536 48537 48538 48539 48540 48541 48542 48543 48544 48545 48546 48547 48548 48549 48550 48551 48552 48553 48554 48555 48556 48557 48558 48559 48560 48561 48562 48563 48564 48565 48566 48567 48568 48569 48570 48571 48572 48573 48574 48575 48576 48577 48578 48579 48580 48581 48582 48583 48584 48585 48586 48587 48588 48589 48590 48591 48592 48593 48594 48595 48596 48597 48598 48599 48600 48601 48602 48603 48604 48605 48606 48607 48608 48609 48610 48611 48612 48613 48614 48615 48616 48617 48618 48619 48620 48621 48622 48623 48624 48625 48626 48627 48628 48629 48630 48631 48632 48633 48634 48635 48636 48637 48638 48639 48640 48641 48642 48643 48644 48645 48646 48647 48648 48649 48650 48651 48652 48653 48654 48655 48656 48657 48658 48659 48660 48661 48662 48663 48664 48665 48666 48667 48668 48669 48670 48671 48672 48673 48674 48675 48676 48677 48678 48679 48680 48681 48682 48683 48684 48685 48686 48687 48688 48689 48690 48691 48692 48693 48694 48695 48696 48697 48698 48699 48700 48701 48702 48703 48704 48705 48706 48707 48708 48709 48710 48711 48712 48713 48714 48715 48716 48717 48718 48719 48720 48721 48722 48723 48724 48725 48726 48727 48728 48729 48730 48731 48732 48733 48734 48735 48736 48737 48738 48739 48740 48741 48742 48743 48744 48745 48746 48747 48748 48749 48750 48751 48752 48753 48754 48755 48756 48757 48758 48759 48760 48761 48762 48763 48764 48765 48766 48767 48768 48769 48770 48771 48772 48773 48774 48775 48776 48777 48778 48779 48780 48781 48782 48783 48784 48785 48786 48787 48788 48789 48790 48791 48792 48793 48794 48795 48796 48797 48798 48799 48800 48801 48802 48803 48804 48805 48806 48807 48808 48809 48810 48811 48812 48813 48814 48815 48816 48817 48818 48819 48820 48821 48822 48823 48824 48825 48826 48827 48828 48829 48830 48831 48832 48833 48834 48835 48836 48837 48838 48839 48840 48841 48842 48843 48844 48845 48846 48847 48848 48849 48850 48851 48852 48853 48854 48855 48856 48857 48858 48859 48860 48861 48862 48863 48864 48865 48866 48867 48868 48869 48870 48871 48872 48873 48874 48875 48876 48877 48878 48879 48880 48881 48882 48883 48884 48885 48886 48887 48888 48889 48890 48891 48892 48893 48894 48895 48896 48897 48898 48899 48900 48901 48902 48903 48904 48905 48906 48907 48908 48909 48910 48911 48912 48913 48914 48915 48916 48917 48918 48919 48920 48921 48922 48923 48924 48925 48926 48927 48928 48929 48930 48931 48932 48933 48934 48935 48936 48937 48938 48939 48940 48941 48942 48943 48944 48945 48946 48947 48948 48949 48950 48951 48952 48953 48954 48955 48956 48957 48958 48959 48960 48961 48962 48963 48964 48965 48966 48967 48968 48969 48970 48971 48972 48973 48974 48975 48976 48977 48978 48979 48980 48981 48982 48983 48984 48985 48986 48987 48988 48989 48990 48991 48992 48993 48994 48995 48996 48997 48998 48999 49000 49001 49002 49003 49004 49005 49006 49007 49008 49009 49010 49011 49012 49013 49014 49015 49016 49017 49018 49019 49020 49021 49022 49023 49024 49025 49026 49027 49028 49029 49030 49031 49032 49033 49034 49035 49036 49037 49038 49039 49040 49041 49042 49043 49044 49045 49046 49047 49048 49049 49050 49051 49052 49053 49054 49055 49056 49057 49058 49059 49060 49061 49062 49063 49064 49065 49066 49067 49068 49069 49070 49071 49072 49073 49074 49075 49076 49077 49078 49079 49080 49081 49082 49083 49084 49085 49086 49087 49088 49089 49090 49091 49092 49093 49094 49095 49096 49097 49098 49099 49100 49101 49102 49103 49104 49105 49106 49107 49108 49109 49110 49111 49112 49113 49114 49115 49116 49117 49118 49119 49120 49121 49122 49123 49124 49125 49126 49127 49128 49129 49130 49131 49132 49133 49134 49135 49136 49137 49138 49139 49140 49141 49142 49143 49144 49145 49146 49147 49148 49149 49150 49151 49152 49153 49154 49155 49156 49157 49158 49159 49160 49161 49162 49163 49164 49165 49166 49167 49168 49169 49170 49171 49172 49173 49174 49175 49176 49177 49178 49179 49180 49181 49182 49183 49184 49185 49186 49187 49188 49189 49190 49191 49192 49193 49194 49195 49196 49197 49198 49199 49200 49201 49202 49203 49204 49205 49206 49207 49208 49209 49210 49211 49212 49213 49214 49215 49216 49217 49218 49219 49220 49221 49222 49223 49224 49225 49226 49227 49228 49229 49230 49231 49232 49233 49234 49235 49236 49237 49238 49239 49240 49241 49242 49243 49244 49245 49246 49247 49248 49249 49250 49251 49252 49253 49254 49255 49256 49257 49258 49259 49260 49261 49262 49263 49264 49265 49266 49267 49268 49269 49270 49271 49272 49273 49274 49275 49276 49277 49278 49279 49280 49281 49282 49283 49284 49285 49286 49287 49288 49289 49290 49291 49292 49293 49294 49295 49296 49297 49298 49299 49300 49301 49302 49303 49304 49305 49306 49307 49308 49309 49310 49311 49312 49313 49314 49315 49316 49317 49318 49319 49320 49321 49322 49323 49324 49325 49326 49327 49328 49329 49330 49331 49332 49333 49334 49335 49336 49337 49338 49339 49340 49341 49342 49343 49344 49345 49346 49347 49348 49349 49350 49351 49352 49353 49354 49355 49356 49357 49358 49359 49360 49361 49362 49363 49364 49365 49366 49367 49368 49369 49370 49371 49372 49373 49374 49375 49376 49377 49378 49379 49380 49381 49382 49383 49384 49385 49386 49387 49388 49389 49390 49391 49392 49393 49394 49395 49396 49397 49398 49399 49400 49401 49402 49403 49404 49405 49406 49407 49408 49409 49410 49411 49412 49413 49414 49415 49416 49417 49418 49419 49420 49421 49422 49423 49424 49425 49426 49427 49428 49429 49430 49431 49432 49433 49434 49435 49436 49437 49438 49439 49440 49441 49442 49443 49444 49445 49446 49447 49448 49449 49450 49451 49452 49453 49454 49455 49456 49457 49458 49459 49460 49461 49462 49463 49464 49465 49466 49467 49468 49469 49470 49471 49472 49473 49474 49475 49476 49477 49478 49479 49480 49481 49482 49483 49484 49485 49486 49487 49488 49489 49490 49491 49492 49493 49494 49495 49496 49497 49498 49499 49500 49501 49502 49503 49504 49505 49506 49507 49508 49509 49510 49511 49512 49513 49514 49515 49516 49517 49518 49519 49520 49521 49522 49523 49524 49525 49526 49527 49528 49529 49530 49531 49532 49533 49534 49535 49536 49537 49538 49539 49540 49541 49542 49543 49544 49545 49546 49547 49548 49549 49550 49551 49552 49553 49554 49555 49556 49557 49558 49559 49560 49561 49562 49563 49564 49565 49566 49567 49568 49569 49570 49571 49572 49573 49574 49575 49576 49577 49578 49579 49580 49581 49582 49583 49584 49585 49586 49587 49588 49589 49590 49591 49592 49593 49594 49595 49596 49597 49598 49599 49600 49601 49602 49603 49604 49605 49606 49607 49608 49609 49610 49611 49612 49613 49614 49615 49616 49617 49618 49619 49620 49621 49622 49623 49624 49625 49626 49627 49628 49629 49630 49631 49632 49633 49634 49635 49636 49637 49638 49639 49640 49641 49642 49643 49644 49645 49646 49647 49648 49649 49650 49651 49652 49653 49654 49655 49656 49657 49658 49659 49660 49661 49662 49663 49664 49665 49666 49667 49668 49669 49670 49671 49672 49673 49674 49675 49676 49677 49678 49679 49680 49681 49682 49683 49684 49685 49686 49687 49688 49689 49690 49691 49692 49693 49694 49695 49696 49697 49698 49699 49700 49701 49702 49703 49704 49705 49706 49707 49708 49709 49710 49711 49712 49713 49714 49715 49716 49717 49718 49719 49720 49721 49722 49723 49724 49725 49726 49727 49728 49729 49730 49731 49732 49733 49734 49735 49736 49737 49738 49739 49740 49741 49742 49743 49744 49745 49746 49747 49748 49749 49750 49751 49752 49753 49754 49755 49756 49757 49758 49759 49760 49761 49762 49763 49764 49765 49766 49767 49768 49769 49770 49771 49772 49773 49774 49775 49776 49777 49778 49779 49780 49781 49782 49783 49784 49785 49786 49787 49788 49789 49790 49791 49792 49793 49794 49795 49796 49797 49798 49799 49800 49801 49802 49803 49804 49805 49806 49807 49808 49809 49810 49811 49812 49813 49814 49815 49816 49817 49818 49819 49820 49821 49822 49823 49824 49825 49826 49827 49828 49829 49830 49831 49832 49833 49834 49835 49836 49837 49838 49839 49840 49841 49842 49843 49844 49845 49846 49847 49848 49849 49850 49851 49852 49853 49854 49855 49856 49857 49858 49859 49860 49861 49862 49863 49864 49865 49866 49867 49868 49869 49870 49871 49872 49873 49874 49875 49876 49877 49878 49879 49880 49881 49882 49883 49884 49885 49886 49887 49888 49889 49890 49891 49892 49893 49894 49895 49896 49897 49898 49899 49900 49901 49902 49903 49904 49905 49906 49907 49908 49909 49910 49911 49912 49913 49914 49915 49916 49917 49918 49919 49920 49921 49922 49923 49924 49925 49926 49927 49928 49929 49930 49931 49932 49933 49934 49935 49936 49937 49938 49939 49940 49941 49942 49943 49944 49945 49946 49947 49948 49949 49950 49951 49952 49953 49954 49955 49956 49957 49958 49959 49960 49961 49962 49963 49964 49965 49966 49967 49968 49969 49970 49971 49972 49973 49974 49975 49976 49977 49978 49979 49980 49981 49982 49983 49984 49985 49986 49987 49988 49989 49990 49991 49992 49993 49994 49995 49996 49997 49998 49999 50000 50001 50002 50003 50004 50005 50006 50007 50008 50009 50010 50011 50012 50013 50014 50015 50016 50017 50018 50019 50020 50021 50022 50023 50024 50025 50026 50027 50028 50029 50030 50031 50032 50033 50034 50035 50036 50037 50038 50039 50040 50041 50042 50043 50044 50045 50046 50047 50048 50049 50050 50051 50052 50053 50054 50055 50056 50057 50058 50059 50060 50061 50062 50063 50064 50065 50066 50067 50068 50069 50070 50071 50072 50073 50074 50075 50076 50077 50078 50079 50080 50081 50082 50083 50084 50085 50086 50087 50088 50089 50090 50091 50092 50093 50094 50095 50096 50097 50098 50099 50100 50101 50102 50103 50104 50105 50106 50107 50108 50109 50110 50111 50112 50113 50114 50115 50116 50117 50118 50119 50120 50121 50122 50123 50124 50125 50126 50127 50128 50129 50130 50131 50132 50133 50134 50135 50136 50137 50138 50139 50140 50141 50142 50143 50144 50145 50146 50147 50148 50149 50150 50151 50152 50153 50154 50155 50156 50157 50158 50159 50160 50161 50162 50163 50164 50165 50166 50167 50168 50169 50170 50171 50172 50173 50174 50175 50176 50177 50178 50179 50180 50181 50182 50183 50184 50185 50186 50187 50188 50189 50190 50191 50192 50193 50194 50195 50196 50197 50198 50199 50200 50201 50202 50203 50204 50205 50206 50207 50208 50209 50210 50211 50212 50213 50214 50215 50216 50217 50218 50219 50220 50221 50222 50223 50224 50225 50226 50227 50228 50229 50230 50231 50232 50233 50234 50235 50236 50237 50238 50239 50240 50241 50242 50243 50244 50245 50246 50247 50248 50249 50250 50251 50252 50253 50254 50255 50256 50257 50258 50259 50260 50261 50262 50263 50264 50265 50266 50267 50268 50269 50270 50271 50272 50273 50274 50275 50276 50277 50278 50279 50280 50281 50282 50283 50284 50285 50286 50287 50288 50289 50290 50291 50292 50293 50294 50295 50296 50297 50298 50299 50300 50301 50302 50303 50304 50305 50306 50307 50308 50309 50310 50311 50312 50313 50314 50315 50316 50317 50318 50319 50320 50321 50322 50323 50324 50325 50326 50327 50328 50329 50330 50331 50332 50333 50334 50335 50336 50337 50338 50339 50340 50341 50342 50343 50344 50345 50346 50347 50348 50349 50350 50351 50352 50353 50354 50355 50356 50357 50358 50359 50360 50361 50362 50363 50364 50365 50366 50367 50368 50369 50370 50371 50372 50373 50374 50375 50376 50377 50378 50379 50380 50381 50382 50383 50384 50385 50386 50387 50388 50389 50390 50391 50392 50393 50394 50395 50396 50397 50398 50399 50400 50401 50402 50403 50404 50405 50406 50407 50408 50409 50410 50411 50412 50413 50414 50415 50416 50417 50418 50419 50420 50421 50422 50423 50424 50425 50426 50427 50428 50429 50430 50431 50432 50433 50434 50435 50436 50437 50438 50439 50440 50441 50442 50443 50444 50445 50446 50447 50448 50449 50450 50451 50452 50453 50454 50455 50456 50457 50458 50459 50460 50461 50462 50463 50464 50465 50466 50467 50468 50469 50470 50471 50472 50473 50474 50475 50476 50477 50478 50479 50480 50481 50482 50483 50484 50485 50486 50487 50488 50489 50490 50491 50492 50493 50494 50495 50496 50497 50498 50499 50500 50501 50502 50503 50504 50505 50506 50507 50508 50509 50510 50511 50512 50513 50514 50515 50516 50517 50518 50519 50520 50521 50522 50523 50524 50525 50526 50527 50528 50529 50530 50531 50532 50533 50534 50535 50536 50537 50538 50539 50540 50541 50542 50543 50544 50545 50546 50547 50548 50549 50550 50551 50552 50553 50554 50555 50556 50557 50558 50559 50560 50561 50562 50563 50564 50565 50566 50567 50568 50569 50570 50571 50572 50573 50574 50575 50576 50577 50578 50579 50580 50581 50582 50583 50584 50585 50586 50587 50588 50589 50590 50591 50592 50593 50594 50595 50596 50597 50598 50599 50600 50601 50602 50603 50604 50605 50606 50607 50608 50609 50610 50611 50612 50613 50614 50615 50616 50617 50618 50619 50620 50621 50622 50623 50624 50625 50626 50627 50628 50629 50630 50631 50632 50633 50634 50635 50636 50637 50638 50639 50640 50641 50642 50643 50644 50645 50646 50647 50648 50649 50650 50651 50652 50653 50654 50655 50656 50657 50658 50659 50660 50661 50662 50663 50664 50665 50666 50667 50668 50669 50670 50671 50672 50673 50674 50675 50676 50677 50678 50679 50680 50681 50682 50683 50684 50685 50686 50687 50688 50689 50690 50691 50692 50693 50694 50695 50696 50697 50698 50699 50700 50701 50702 50703 50704 50705 50706 50707 50708 50709 50710 50711 50712 50713 50714 50715 50716 50717 50718 50719 50720 50721 50722 50723 50724 50725 50726 50727 50728 50729 50730 50731 50732 50733 50734 50735 50736 50737 50738 50739 50740 50741 50742 50743 50744 50745 50746 50747 50748 50749 50750 50751 50752 50753 50754 50755 50756 50757 50758 50759 50760 50761 50762 50763 50764 50765 50766 50767 50768 50769 50770 50771 50772 50773 50774 50775 50776 50777 50778 50779 50780 50781 50782 50783 50784 50785 50786 50787 50788 50789 50790 50791 50792 50793 50794 50795 50796 50797 50798 50799 50800 50801 50802 50803 50804 50805 50806 50807 50808 50809 50810 50811 50812 50813 50814 50815 50816 50817 50818 50819 50820 50821 50822 50823 50824 50825 50826 50827 50828 50829 50830 50831 50832 50833 50834 50835 50836 50837 50838 50839 50840 50841 50842 50843 50844 50845 50846 50847 50848 50849 50850 50851 50852 50853 50854 50855 50856 50857 50858 50859 50860 50861 50862 50863 50864 50865 50866 50867 50868 50869 50870 50871 50872 50873 50874 50875 50876 50877 50878 50879 50880 50881 50882 50883 50884 50885 50886 50887 50888 50889 50890 50891 50892 50893 50894 50895 50896 50897 50898 50899 50900 50901 50902 50903 50904 50905 50906 50907 50908 50909 50910 50911 50912 50913 50914 50915 50916 50917 50918 50919 50920 50921 50922 50923 50924 50925 50926 50927 50928 50929 50930 50931 50932 50933 50934 50935 50936 50937 50938 50939 50940 50941 50942 50943 50944 50945 50946 50947 50948 50949 50950 50951 50952 50953 50954 50955 50956 50957 50958 50959 50960 50961 50962 50963 50964 50965 50966 50967 50968 50969 50970 50971 50972 50973 50974 50975 50976 50977 50978 50979 50980 50981 50982 50983 50984 50985 50986 50987 50988 50989 50990 50991 50992 50993 50994 50995 50996 50997 50998 50999 51000 51001 51002 51003 51004 51005 51006 51007 51008 51009 51010 51011 51012 51013 51014 51015 51016 51017 51018 51019 51020 51021 51022 51023 51024 51025 51026 51027 51028 51029 51030 51031 51032 51033 51034 51035 51036 51037 51038 51039 51040 51041 51042 51043 51044 51045 51046 51047 51048 51049 51050 51051 51052 51053 51054 51055 51056 51057 51058 51059 51060 51061 51062 51063 51064 51065 51066 51067 51068 51069 51070 51071 51072 51073 51074 51075 51076 51077 51078 51079 51080 51081 51082 51083 51084 51085 51086 51087 51088 51089 51090 51091 51092 51093 51094 51095 51096 51097 51098 51099 51100 51101 51102 51103 51104 51105 51106 51107 51108 51109 51110 51111 51112 51113 51114 51115 51116 51117 51118 51119 51120 51121 51122 51123 51124 51125 51126 51127 51128 51129 51130 51131 51132 51133 51134 51135 51136 51137 51138 51139 51140 51141 51142 51143 51144 51145 51146 51147 51148 51149 51150 51151 51152 51153 51154 51155 51156 51157 51158 51159 51160 51161 51162 51163 51164 51165 51166 51167 51168 51169 51170 51171 51172 51173 51174 51175 51176 51177 51178 51179 51180 51181 51182 51183 51184 51185 51186 51187 51188 51189 51190 51191 51192 51193 51194 51195 51196 51197 51198 51199 51200 51201 51202 51203 51204 51205 51206 51207 51208 51209 51210 51211 51212 51213 51214 51215 51216 51217 51218 51219 51220 51221 51222 51223 51224 51225 51226 51227 51228 51229 51230 51231 51232 51233 51234 51235 51236 51237 51238 51239 51240 51241 51242 51243 51244 51245 51246 51247 51248 51249 51250 51251 51252 51253 51254 51255 51256 51257 51258 51259 51260 51261 51262 51263 51264 51265 51266 51267 51268 51269 51270 51271 51272 51273 51274 51275 51276 51277 51278 51279 51280 51281 51282 51283 51284 51285 51286 51287 51288 51289 51290 51291 51292 51293 51294 51295 51296 51297 51298 51299 51300 51301 51302 51303 51304 51305 51306 51307 51308 51309 51310 51311 51312 51313 51314 51315 51316 51317 51318 51319 51320 51321 51322 51323 51324 51325 51326 51327 51328 51329 51330 51331 51332 51333 51334 51335 51336 51337 51338 51339 51340 51341 51342 51343 51344 51345 51346 51347 51348 51349 51350 51351 51352 51353 51354 51355 51356 51357 51358 51359 51360 51361 51362 51363 51364 51365 51366 51367 51368 51369 51370 51371 51372 51373 51374 51375 51376 51377 51378 51379 51380 51381 51382 51383 51384 51385 51386 51387 51388 51389 51390 51391 51392 51393 51394 51395 51396 51397 51398 51399 51400 51401 51402 51403 51404 51405 51406 51407 51408 51409 51410 51411 51412 51413 51414 51415 51416 51417 51418 51419 51420 51421 51422 51423 51424 51425 51426 51427 51428 51429 51430 51431 51432 51433 51434 51435 51436 51437 51438 51439 51440 51441 51442 51443 51444 51445 51446 51447 51448 51449 51450 51451 51452 51453 51454 51455 51456 51457 51458 51459 51460 51461 51462 51463 51464 51465 51466 51467 51468 51469 51470 51471 51472 51473 51474 51475 51476 51477 51478 51479 51480 51481 51482 51483 51484 51485 51486 51487 51488 51489 51490 51491 51492 51493 51494 51495 51496 51497 51498 51499 51500 51501 51502 51503 51504 51505 51506 51507 51508 51509 51510 51511 51512 51513 51514 51515 51516 51517 51518 51519 51520 51521 51522 51523 51524 51525 51526 51527 51528 51529 51530 51531 51532 51533 51534 51535 51536 51537 51538 51539 51540 51541 51542 51543 51544 51545 51546 51547 51548 51549 51550 51551 51552 51553 51554 51555 51556 51557 51558 51559 51560 51561 51562 51563 51564 51565 51566 51567 51568 51569 51570 51571 51572 51573 51574 51575 51576 51577 51578 51579 51580 51581 51582 51583 51584 51585 51586 51587 51588 51589 51590 51591 51592 51593 51594 51595 51596 51597 51598 51599 51600 51601 51602 51603 51604 51605 51606 51607 51608 51609 51610 51611 51612 51613 51614 51615 51616 51617 51618 51619 51620 51621 51622 51623 51624 51625 51626 51627 51628 51629 51630 51631 51632 51633 51634 51635 51636 51637 51638 51639 51640 51641 51642 51643 51644 51645 51646 51647 51648 51649 51650 51651 51652 51653 51654 51655 51656 51657 51658 51659 51660 51661 51662 51663 51664 51665 51666 51667 51668 51669 51670 51671 51672 51673 51674 51675 51676 51677 51678 51679 51680 51681 51682 51683 51684 51685 51686 51687 51688 51689 51690 51691 51692 51693 51694 51695 51696 51697 51698 51699 51700 51701 51702 51703 51704 51705 51706 51707 51708 51709 51710 51711 51712 51713 51714 51715 51716 51717 51718 51719 51720 51721 51722 51723 51724 51725 51726 51727 51728 51729 51730 51731 51732 51733 51734 51735 51736 51737 51738 51739 51740 51741 51742 51743 51744 51745 51746 51747 51748 51749 51750 51751 51752 51753 51754 51755 51756 51757 51758 51759 51760 51761 51762 51763 51764 51765 51766 51767 51768 51769 51770 51771 51772 51773 51774 51775 51776 51777 51778 51779 51780 51781 51782 51783 51784 51785 51786 51787 51788 51789 51790 51791 51792 51793 51794 51795 51796 51797 51798 51799 51800 51801 51802 51803 51804 51805 51806 51807 51808 51809 51810 51811 51812 51813 51814 51815 51816 51817 51818 51819 51820 51821 51822 51823 51824 51825 51826 51827 51828 51829 51830 51831 51832 51833 51834 51835 51836 51837 51838 51839 51840 51841 51842 51843 51844 51845 51846 51847 51848 51849 51850 51851 51852 51853 51854 51855 51856 51857 51858 51859 51860 51861 51862 51863 51864 51865 51866 51867 51868 51869 51870 51871 51872 51873 51874 51875 51876 51877 51878 51879 51880 51881 51882 51883 51884 51885 51886 51887 51888 51889 51890 51891 51892 51893 51894 51895 51896 51897 51898 51899 51900 51901 51902 51903 51904 51905 51906 51907 51908 51909 51910 51911 51912 51913 51914 51915 51916 51917 51918 51919 51920 51921 51922 51923 51924 51925 51926 51927 51928 51929 51930 51931 51932 51933 51934 51935 51936 51937 51938 51939 51940 51941 51942 51943 51944 51945 51946 51947 51948 51949 51950 51951 51952 51953 51954 51955 51956 51957 51958 51959 51960 51961 51962 51963 51964 51965 51966 51967 51968 51969 51970 51971 51972 51973 51974 51975 51976 51977 51978 51979 51980 51981 51982 51983 51984 51985 51986 51987 51988 51989 51990 51991 51992 51993 51994 51995 51996 51997 51998 51999 52000 52001 52002 52003 52004 52005 52006 52007 52008 52009 52010 52011 52012 52013 52014 52015 52016 52017 52018 52019 52020 52021 52022 52023 52024 52025 52026 52027 52028 52029 52030 52031 52032 52033 52034 52035 52036 52037 52038 52039 52040 52041 52042 52043 52044 52045 52046 52047 52048 52049 52050 52051 52052 52053 52054 52055 52056 52057 52058 52059 52060 52061 52062 52063 52064 52065 52066 52067 52068 52069 52070 52071 52072 52073 52074 52075 52076 52077 52078 52079 52080 52081 52082 52083 52084 52085 52086 52087 52088 52089 52090 52091 52092 52093 52094 52095 52096 52097 52098 52099 52100 52101 52102 52103 52104 52105 52106 52107 52108 52109 52110 52111 52112 52113 52114 52115 52116 52117 52118 52119 52120 52121 52122 52123 52124 52125 52126 52127 52128 52129 52130 52131 52132 52133 52134 52135 52136 52137 52138 52139 52140 52141 52142 52143 52144 52145 52146 52147 52148 52149 52150 52151 52152 52153 52154 52155 52156 52157 52158 52159 52160 52161 52162 52163 52164 52165 52166 52167 52168 52169 52170 52171 52172 52173 52174 52175 52176 52177 52178 52179 52180 52181 52182 52183 52184 52185 52186 52187 52188 52189 52190 52191 52192 52193 52194 52195 52196 52197 52198 52199 52200 52201 52202 52203 52204 52205 52206 52207 52208 52209 52210 52211 52212 52213 52214 52215 52216 52217 52218 52219 52220 52221 52222 52223 52224 52225 52226 52227 52228 52229 52230 52231 52232 52233 52234 52235 52236 52237 52238 52239 52240 52241 52242 52243 52244 52245 52246 52247 52248 52249 52250 52251 52252 52253 52254 52255 52256 52257 52258 52259 52260 52261 52262 52263 52264 52265 52266 52267 52268 52269 52270 52271 52272 52273 52274 52275 52276 52277 52278 52279 52280 52281 52282 52283 52284 52285 52286 52287 52288 52289 52290 52291 52292 52293 52294 52295 52296 52297 52298 52299 52300 52301 52302 52303 52304 52305 52306 52307 52308 52309 52310 52311 52312 52313 52314 52315 52316 52317 52318 52319 52320 52321 52322 52323 52324 52325 52326 52327 52328 52329 52330 52331 52332 52333 52334 52335 52336 52337 52338 52339 52340 52341 52342 52343 52344 52345 52346 52347 52348 52349 52350 52351 52352 52353 52354 52355 52356 52357 52358 52359 52360 52361 52362 52363 52364 52365 52366 52367 52368 52369 52370 52371 52372 52373 52374 52375 52376 52377 52378 52379 52380 52381 52382 52383 52384 52385 52386 52387 52388 52389 52390 52391 52392 52393 52394 52395 52396 52397 52398 52399 52400 52401 52402 52403 52404 52405 52406 52407 52408 52409 52410 52411 52412 52413 52414 52415 52416 52417 52418 52419 52420 52421 52422 52423 52424 52425 52426 52427 52428 52429 52430 52431 52432 52433 52434 52435 52436 52437 52438 52439 52440 52441 52442 52443 52444 52445 52446 52447 52448 52449 52450 52451 52452 52453 52454 52455 52456 52457 52458 52459 52460 52461 52462 52463 52464 52465 52466 52467 52468 52469 52470 52471 52472 52473 52474 52475 52476 52477 52478 52479 52480 52481 52482 52483 52484 52485 52486 52487 52488 52489 52490 52491 52492 52493 52494 52495 52496 52497 52498 52499 52500 52501 52502 52503 52504 52505 52506 52507 52508 52509 52510 52511 52512 52513 52514 52515 52516 52517 52518 52519 52520 52521 52522 52523 52524 52525 52526 52527 52528 52529 52530 52531 52532 52533 52534 52535 52536 52537 52538 52539 52540 52541 52542 52543 52544 52545 52546 52547 52548 52549 52550 52551 52552 52553 52554 52555 52556 52557 52558 52559 52560 52561 52562 52563 52564 52565 52566 52567 52568 52569 52570 52571 52572 52573 52574 52575 52576 52577 52578 52579 52580 52581 52582 52583 52584 52585 52586 52587 52588 52589 52590 52591 52592 52593 52594 52595 52596 52597 52598 52599 52600 52601 52602 52603 52604 52605 52606 52607 52608 52609 52610 52611 52612 52613 52614 52615 52616 52617 52618 52619 52620 52621 52622 52623 52624 52625 52626 52627 52628 52629 52630 52631 52632 52633 52634 52635 52636 52637 52638 52639 52640 52641 52642 52643 52644 52645 52646 52647 52648 52649 52650 52651 52652 52653 52654 52655 52656 52657 52658 52659 52660 52661 52662 52663 52664 52665 52666 52667 52668 52669 52670 52671 52672 52673 52674 52675 52676 52677 52678 52679 52680 52681 52682 52683 52684 52685 52686 52687 52688 52689 52690 52691 52692 52693 52694 52695 52696 52697 52698 52699 52700 52701 52702 52703 52704 52705 52706 52707 52708 52709 52710 52711 52712 52713 52714 52715 52716 52717 52718 52719 52720 52721 52722 52723 52724 52725 52726 52727 52728 52729 52730 52731 52732 52733 52734 52735 52736 52737 52738 52739 52740 52741 52742 52743 52744 52745 52746 52747 52748 52749 52750 52751 52752 52753 52754 52755 52756 52757 52758 52759 52760 52761 52762 52763 52764 52765 52766 52767 52768 52769 52770 52771 52772 52773 52774 52775 52776 52777 52778 52779 52780 52781 52782 52783 52784 52785 52786 52787 52788 52789 52790 52791 52792 52793 52794 52795 52796 52797 52798 52799 52800 52801 52802 52803 52804 52805 52806 52807 52808 52809 52810 52811 52812 52813 52814 52815 52816 52817 52818 52819 52820 52821 52822 52823 52824 52825 52826 52827 52828 52829 52830 52831 52832 52833 52834 52835 52836 52837 52838 52839 52840 52841 52842 52843 52844 52845 52846 52847 52848 52849 52850 52851 52852 52853 52854 52855 52856 52857 52858 52859 52860 52861 52862 52863 52864 52865 52866 52867 52868 52869 52870 52871 52872 52873 52874 52875 52876 52877 52878 52879 52880 52881 52882 52883 52884 52885 52886 52887 52888 52889 52890 52891 52892 52893 52894 52895 52896 52897 52898 52899 52900 52901 52902 52903 52904 52905 52906 52907 52908 52909 52910 52911 52912 52913 52914 52915 52916 52917 52918 52919 52920 52921 52922 52923 52924 52925 52926 52927 52928 52929 52930 52931 52932 52933 52934 52935 52936 52937 52938 52939 52940 52941 52942 52943 52944 52945 52946 52947 52948 52949 52950 52951 52952 52953 52954 52955 52956 52957 52958 52959 52960 52961 52962 52963 52964 52965 52966 52967 52968 52969 52970 52971 52972 52973 52974 52975 52976 52977 52978 52979 52980 52981 52982 52983 52984 52985 52986 52987 52988 52989 52990 52991 52992 52993 52994 52995 52996 52997 52998 52999 53000 53001 53002 53003 53004 53005 53006 53007 53008 53009 53010 53011 53012 53013 53014 53015 53016 53017 53018 53019 53020 53021 53022 53023 53024 53025 53026 53027 53028 53029 53030 53031 53032 53033 53034 53035 53036 53037 53038 53039 53040 53041 53042 53043 53044 53045 53046 53047 53048 53049 53050 53051 53052 53053 53054 53055 53056 53057 53058 53059 53060 53061 53062 53063 53064 53065 53066 53067 53068 53069 53070 53071 53072 53073 53074 53075 53076 53077 53078 53079 53080 53081 53082 53083 53084 53085 53086 53087 53088 53089 53090 53091 53092 53093 53094 53095 53096 53097 53098 53099 53100 53101 53102 53103 53104 53105 53106 53107 53108 53109 53110 53111 53112 53113 53114 53115 53116 53117 53118 53119 53120 53121 53122 53123 53124 53125 53126 53127 53128 53129 53130 53131 53132 53133 53134 53135 53136 53137 53138 53139 53140 53141 53142 53143 53144 53145 53146 53147 53148 53149 53150 53151 53152 53153 53154 53155 53156 53157 53158 53159 53160 53161 53162 53163 53164 53165 53166 53167 53168 53169 53170 53171 53172 53173 53174 53175 53176 53177 53178 53179 53180 53181 53182 53183 53184 53185 53186 53187 53188 53189 53190 53191 53192 53193 53194 53195 53196 53197 53198 53199 53200 53201 53202 53203 53204 53205 53206 53207 53208 53209 53210 53211 53212 53213 53214 53215 53216 53217 53218 53219 53220 53221 53222 53223 53224 53225 53226 53227 53228 53229 53230 53231 53232 53233 53234 53235 53236 53237 53238 53239 53240 53241 53242 53243 53244 53245 53246 53247 53248 53249 53250 53251 53252 53253 53254 53255 53256 53257 53258 53259 53260 53261 53262 53263 53264 53265 53266 53267 53268 53269 53270 53271 53272 53273 53274 53275 53276 53277 53278 53279 53280 53281 53282 53283 53284 53285 53286 53287 53288 53289 53290 53291 53292 53293 53294 53295 53296 53297 53298 53299 53300 53301 53302 53303 53304 53305 53306 53307 53308 53309 53310 53311 53312 53313 53314 53315 53316 53317 53318 53319 53320 53321 53322 53323 53324 53325 53326 53327 53328 53329 53330 53331 53332 53333 53334 53335 53336 53337 53338 53339 53340 53341 53342 53343 53344 53345 53346 53347 53348 53349 53350 53351 53352 53353 53354 53355 53356 53357 53358 53359 53360 53361 53362 53363 53364 53365 53366 53367 53368 53369 53370 53371 53372 53373 53374 53375 53376 53377 53378 53379 53380 53381 53382 53383 53384 53385 53386 53387 53388 53389 53390 53391 53392 53393 53394 53395 53396 53397 53398 53399 53400 53401 53402 53403 53404 53405 53406 53407 53408 53409 53410 53411 53412 53413 53414 53415 53416 53417 53418 53419 53420 53421 53422 53423 53424 53425 53426 53427 53428 53429 53430 53431 53432 53433 53434 53435 53436 53437 53438 53439 53440 53441 53442 53443 53444 53445 53446 53447 53448 53449 53450 53451 53452 53453 53454 53455 53456 53457 53458 53459 53460 53461 53462 53463 53464 53465 53466 53467 53468 53469 53470 53471 53472 53473 53474 53475 53476 53477 53478 53479 53480 53481 53482 53483 53484 53485 53486 53487 53488 53489 53490 53491 53492 53493 53494 53495 53496 53497 53498 53499 53500 53501 53502 53503 53504 53505 53506 53507 53508 53509 53510 53511 53512 53513 53514 53515 53516 53517 53518 53519 53520 53521 53522 53523 53524 53525 53526 53527 53528 53529 53530 53531 53532 53533 53534 53535 53536 53537 53538 53539 53540 53541 53542 53543 53544 53545 53546 53547 53548 53549 53550 53551 53552 53553 53554 53555 53556 53557 53558 53559 53560 53561 53562 53563 53564 53565 53566 53567 53568 53569 53570 53571 53572 53573 53574 53575 53576 53577 53578 53579 53580 53581 53582 53583 53584 53585 53586 53587 53588 53589 53590 53591 53592 53593 53594 53595 53596 53597 53598 53599 53600 53601 53602 53603 53604 53605 53606 53607 53608 53609 53610 53611 53612 53613 53614 53615 53616 53617 53618 53619 53620 53621 53622 53623 53624 53625 53626 53627 53628 53629 53630 53631 53632 53633 53634 53635 53636 53637 53638 53639 53640 53641 53642 53643 53644 53645 53646 53647 53648 53649 53650 53651 53652 53653 53654 53655 53656 53657 53658 53659 53660 53661 53662 53663 53664 53665 53666 53667 53668 53669 53670 53671 53672 53673 53674 53675 53676 53677 53678 53679 53680 53681 53682 53683 53684 53685 53686 53687 53688 53689 53690 53691 53692 53693 53694 53695 53696 53697 53698 53699 53700 53701 53702 53703 53704 53705 53706 53707 53708 53709 53710 53711 53712 53713 53714 53715 53716 53717 53718 53719 53720 53721 53722 53723 53724 53725 53726 53727 53728 53729 53730 53731 53732 53733 53734 53735 53736 53737 53738 53739 53740 53741 53742 53743 53744 53745 53746 53747 53748 53749 53750 53751 53752 53753 53754 53755 53756 53757 53758 53759 53760 53761 53762 53763 53764 53765 53766 53767 53768 53769 53770 53771 53772 53773 53774 53775 53776 53777 53778 53779 53780 53781 53782 53783 53784 53785 53786 53787 53788 53789 53790 53791 53792 53793 53794 53795 53796 53797 53798 53799 53800 53801 53802 53803 53804 53805 53806 53807 53808 53809 53810 53811 53812 53813 53814 53815 53816 53817 53818 53819 53820 53821 53822 53823 53824 53825 53826 53827 53828 53829 53830 53831 53832 53833 53834 53835 53836 53837 53838 53839 53840 53841 53842 53843 53844 53845 53846 53847 53848 53849 53850 53851 53852 53853 53854 53855 53856 53857 53858 53859 53860 53861 53862 53863 53864 53865 53866 53867 53868 53869 53870 53871 53872 53873 53874 53875 53876 53877 53878 53879 53880 53881 53882 53883 53884 53885 53886 53887 53888 53889 53890 53891 53892 53893 53894 53895 53896 53897 53898 53899 53900 53901 53902 53903 53904 53905 53906 53907 53908 53909 53910 53911 53912 53913 53914 53915 53916 53917 53918 53919 53920 53921 53922 53923 53924 53925 53926 53927 53928 53929 53930 53931 53932 53933 53934 53935 53936 53937 53938 53939 53940 53941 53942 53943 53944 53945 53946 53947 53948 53949 53950 53951 53952 53953 53954 53955 53956 53957 53958 53959 53960 53961 53962 53963 53964 53965 53966 53967 53968 53969 53970 53971 53972 53973 53974 53975 53976 53977 53978 53979 53980 53981 53982 53983 53984 53985 53986 53987 53988 53989 53990 53991 53992 53993 53994 53995 53996 53997 53998 53999 54000 54001 54002 54003 54004 54005 54006 54007 54008 54009 54010 54011 54012 54013 54014 54015 54016 54017 54018 54019 54020 54021 54022 54023 54024 54025 54026 54027 54028 54029 54030 54031 54032 54033 54034 54035 54036 54037 54038 54039 54040 54041 54042 54043 54044 54045 54046 54047 54048 54049 54050 54051 54052 54053 54054 54055 54056 54057 54058 54059 54060 54061 54062 54063 54064 54065 54066 54067 54068 54069 54070 54071 54072 54073 54074 54075 54076 54077 54078 54079 54080 54081 54082 54083 54084 54085 54086 54087 54088 54089 54090 54091 54092 54093 54094 54095 54096 54097 54098 54099 54100 54101 54102 54103 54104 54105 54106 54107 54108 54109 54110 54111 54112 54113 54114 54115 54116 54117 54118 54119 54120 54121 54122 54123 54124 54125 54126 54127 54128 54129 54130 54131 54132 54133 54134 54135 54136 54137 54138 54139 54140 54141 54142 54143 54144 54145 54146 54147 54148 54149 54150 54151 54152 54153 54154 54155 54156 54157 54158 54159 54160 54161 54162 54163 54164 54165 54166 54167 54168 54169 54170 54171 54172 54173 54174 54175 54176 54177 54178 54179 54180 54181 54182 54183 54184 54185 54186 54187 54188 54189 54190 54191 54192 54193 54194 54195 54196 54197 54198 54199 54200 54201 54202 54203 54204 54205 54206 54207 54208 54209 54210 54211 54212 54213 54214 54215 54216 54217 54218 54219 54220 54221 54222 54223 54224 54225 54226 54227 54228 54229 54230 54231 54232 54233 54234 54235 54236 54237 54238 54239 54240 54241 54242 54243 54244 54245 54246 54247 54248 54249 54250 54251 54252 54253 54254 54255 54256 54257 54258 54259 54260 54261 54262 54263 54264 54265 54266 54267 54268 54269 54270 54271 54272 54273 54274 54275 54276 54277 54278 54279 54280 54281 54282 54283 54284 54285 54286 54287 54288 54289 54290 54291 54292 54293 54294 54295 54296 54297 54298 54299 54300 54301 54302 54303 54304 54305 54306 54307 54308 54309 54310 54311 54312 54313 54314 54315 54316 54317 54318 54319 54320 54321 54322 54323 54324 54325 54326 54327 54328 54329 54330 54331 54332 54333 54334 54335 54336 54337 54338 54339 54340 54341 54342 54343 54344 54345 54346 54347 54348 54349 54350 54351 54352 54353 54354 54355 54356 54357 54358 54359 54360 54361 54362 54363 54364 54365 54366 54367 54368 54369 54370 54371 54372 54373 54374 54375 54376 54377 54378 54379 54380 54381 54382 54383 54384 54385 54386 54387 54388 54389 54390 54391 54392 54393 54394 54395 54396 54397 54398 54399 54400 54401 54402 54403 54404 54405 54406 54407 54408 54409 54410 54411 54412 54413 54414 54415 54416 54417 54418 54419 54420 54421 54422 54423 54424 54425 54426 54427 54428 54429 54430 54431 54432 54433 54434 54435 54436 54437 54438 54439 54440 54441 54442 54443 54444 54445 54446 54447 54448 54449 54450 54451 54452 54453 54454 54455 54456 54457 54458 54459 54460 54461 54462 54463 54464 54465 54466 54467 54468 54469 54470 54471 54472 54473 54474 54475 54476 54477 54478 54479 54480 54481 54482 54483 54484 54485 54486 54487 54488 54489 54490 54491 54492 54493 54494 54495 54496 54497 54498 54499 54500 54501 54502 54503 54504 54505 54506 54507 54508 54509 54510 54511 54512 54513 54514 54515 54516 54517 54518 54519 54520 54521 54522 54523 54524 54525 54526 54527 54528 54529 54530 54531 54532 54533 54534 54535 54536 54537 54538 54539 54540 54541 54542 54543 54544 54545 54546 54547 54548 54549 54550 54551 54552 54553 54554 54555 54556 54557 54558 54559 54560 54561 54562 54563 54564 54565 54566 54567 54568 54569 54570 54571 54572 54573 54574 54575 54576 54577 54578 54579 54580 54581 54582 54583 54584 54585 54586 54587 54588 54589 54590 54591 54592 54593 54594 54595 54596 54597 54598 54599 54600 54601 54602 54603 54604 54605 54606 54607 54608 54609 54610 54611 54612 54613 54614 54615 54616 54617 54618 54619 54620 54621 54622 54623 54624 54625 54626 54627 54628 54629 54630 54631 54632 54633 54634 54635 54636 54637 54638 54639 54640 54641 54642 54643 54644 54645 54646 54647 54648 54649 54650 54651 54652 54653 54654 54655 54656 54657 54658 54659 54660 54661 54662 54663 54664 54665 54666 54667 54668 54669 54670 54671 54672 54673 54674 54675 54676 54677 54678 54679 54680 54681 54682 54683 54684 54685 54686 54687 54688 54689 54690 54691 54692 54693 54694 54695 54696 54697 54698 54699 54700 54701 54702 54703 54704 54705 54706 54707 54708 54709 54710 54711 54712 54713 54714 54715 54716 54717 54718 54719 54720 54721 54722 54723 54724 54725 54726 54727 54728 54729 54730 54731 54732 54733 54734 54735 54736 54737 54738 54739 54740 54741 54742 54743 54744 54745 54746 54747 54748 54749 54750 54751 54752 54753 54754 54755 54756 54757 54758 54759 54760 54761 54762 54763 54764 54765 54766 54767 54768 54769 54770 54771 54772 54773 54774 54775 54776 54777 54778 54779 54780 54781 54782 54783 54784 54785 54786 54787 54788 54789 54790 54791 54792 54793 54794 54795 54796 54797 54798 54799 54800 54801 54802 54803 54804 54805 54806 54807 54808 54809 54810 54811 54812 54813 54814 54815 54816 54817 54818 54819 54820 54821 54822 54823 54824 54825 54826 54827 54828 54829 54830 54831 54832 54833 54834 54835 54836 54837 54838 54839 54840 54841 54842 54843 54844 54845 54846 54847 54848 54849 54850 54851 54852 54853 54854 54855 54856 54857 54858 54859 54860 54861 54862 54863 54864 54865 54866 54867 54868 54869 54870 54871 54872 54873 54874 54875 54876 54877 54878 54879 54880 54881 54882 54883 54884 54885 54886 54887 54888 54889 54890 54891 54892 54893 54894 54895 54896 54897 54898 54899 54900 54901 54902 54903 54904 54905 54906 54907 54908 54909 54910 54911 54912 54913 54914 54915 54916 54917 54918 54919 54920 54921 54922 54923 54924 54925 54926 54927 54928 54929 54930 54931 54932 54933 54934 54935 54936 54937 54938 54939 54940 54941 54942 54943 54944 54945 54946 54947 54948 54949 54950 54951 54952 54953 54954 54955 54956 54957 54958 54959 54960 54961 54962 54963 54964 54965 54966 54967 54968 54969 54970 54971 54972 54973 54974 54975 54976 54977 54978 54979 54980 54981 54982 54983 54984 54985 54986 54987 54988 54989 54990 54991 54992 54993 54994 54995 54996 54997 54998 54999 55000 55001 55002 55003 55004 55005 55006 55007 55008 55009 55010 55011 55012 55013 55014 55015 55016 55017 55018 55019 55020 55021 55022 55023 55024 55025 55026 55027 55028 55029 55030 55031 55032 55033 55034 55035 55036 55037 55038 55039 55040 55041 55042 55043 55044 55045 55046 55047 55048 55049 55050 55051 55052 55053 55054 55055 55056 55057 55058 55059 55060 55061 55062 55063 55064 55065 55066 55067 55068 55069 55070 55071 55072 55073 55074 55075 55076 55077 55078 55079 55080 55081 55082 55083 55084 55085 55086 55087 55088 55089 55090 55091 55092 55093 55094 55095 55096 55097 55098 55099 55100 55101 55102 55103 55104 55105 55106 55107 55108 55109 55110 55111 55112 55113 55114 55115 55116 55117 55118 55119 55120 55121 55122 55123 55124 55125 55126 55127 55128 55129 55130 55131 55132 55133 55134 55135 55136 55137 55138 55139 55140 55141 55142 55143 55144 55145 55146 55147 55148 55149 55150 55151 55152 55153 55154 55155 55156 55157 55158 55159 55160 55161 55162 55163 55164 55165 55166 55167 55168 55169 55170 55171 55172 55173 55174 55175 55176 55177 55178 55179 55180 55181 55182 55183 55184 55185 55186 55187 55188 55189 55190 55191 55192 55193 55194 55195 55196 55197 55198 55199 55200 55201 55202 55203 55204 55205 55206 55207 55208 55209 55210 55211 55212 55213 55214 55215 55216 55217 55218 55219 55220 55221 55222 55223 55224 55225 55226 55227 55228 55229 55230 55231 55232 55233 55234 55235 55236 55237 55238 55239 55240 55241 55242 55243 55244 55245 55246 55247 55248 55249 55250 55251 55252 55253 55254 55255 55256 55257 55258 55259 55260 55261 55262 55263 55264 55265 55266 55267 55268 55269 55270 55271 55272 55273 55274 55275 55276 55277 55278 55279 55280 55281 55282 55283 55284 55285 55286 55287 55288 55289 55290 55291 55292 55293 55294 55295 55296 55297 55298 55299 55300 55301 55302 55303 55304 55305 55306 55307 55308 55309 55310 55311 55312 55313 55314 55315 55316 55317 55318 55319 55320 55321 55322 55323 55324 55325 55326 55327 55328 55329 55330 55331 55332 55333 55334 55335 55336 55337 55338 55339 55340 55341 55342 55343 55344 55345 55346 55347 55348 55349 55350 55351 55352 55353 55354 55355 55356 55357 55358 55359 55360 55361 55362 55363 55364 55365 55366 55367 55368 55369 55370 55371 55372 55373 55374 55375 55376 55377 55378 55379 55380 55381 55382 55383 55384 55385 55386 55387 55388 55389 55390 55391 55392 55393 55394 55395 55396 55397 55398 55399 55400 55401 55402 55403 55404 55405 55406 55407 55408 55409 55410 55411 55412 55413 55414 55415 55416 55417 55418 55419 55420 55421 55422 55423 55424 55425 55426 55427 55428 55429 55430 55431 55432 55433 55434 55435 55436 55437 55438 55439 55440 55441 55442 55443 55444 55445 55446 55447 55448 55449 55450 55451 55452 55453 55454 55455 55456 55457 55458 55459 55460 55461 55462 55463 55464 55465 55466 55467 55468 55469 55470 55471 55472 55473 55474 55475 55476 55477 55478 55479 55480 55481 55482 55483 55484 55485 55486 55487 55488 55489 55490 55491 55492 55493 55494 55495 55496 55497 55498 55499 55500 55501 55502 55503 55504 55505 55506 55507 55508 55509 55510 55511 55512 55513 55514 55515 55516 55517 55518 55519 55520 55521 55522 55523 55524 55525 55526 55527 55528 55529 55530 55531 55532 55533 55534 55535 55536 55537 55538 55539 55540 55541 55542 55543 55544 55545 55546 55547 55548 55549 55550 55551 55552 55553 55554 55555 55556 55557 55558 55559 55560 55561 55562 55563 55564 55565 55566 55567 55568 55569 55570 55571 55572 55573 55574 55575 55576 55577 55578 55579 55580 55581 55582 55583 55584 55585 55586 55587 55588 55589 55590 55591 55592 55593 55594 55595 55596 55597 55598 55599 55600 55601 55602 55603 55604 55605 55606 55607 55608 55609 55610 55611 55612 55613 55614 55615 55616 55617 55618 55619 55620 55621 55622 55623 55624 55625 55626 55627 55628 55629 55630 55631 55632 55633 55634 55635 55636 55637 55638 55639 55640 55641 55642 55643 55644 55645 55646 55647 55648 55649 55650 55651 55652 55653 55654 55655 55656 55657 55658 55659 55660 55661 55662 55663 55664 55665 55666 55667 55668 55669 55670 55671 55672 55673 55674 55675 55676 55677 55678 55679 55680 55681 55682 55683 55684 55685 55686 55687 55688 55689 55690 55691 55692 55693 55694 55695 55696 55697 55698 55699 55700 55701 55702 55703 55704 55705 55706 55707 55708 55709 55710 55711 55712 55713 55714 55715 55716 55717 55718 55719 55720 55721 55722 55723 55724 55725 55726 55727 55728 55729 55730 55731 55732 55733 55734 55735 55736 55737 55738 55739 55740 55741 55742 55743 55744 55745 55746 55747 55748 55749 55750 55751 55752 55753 55754 55755 55756 55757 55758 55759 55760 55761 55762 55763 55764 55765 55766 55767 55768 55769 55770 55771 55772 55773 55774 55775 55776 55777 55778 55779 55780 55781 55782 55783 55784 55785 55786 55787 55788 55789 55790 55791 55792 55793 55794 55795 55796 55797 55798 55799 55800 55801 55802 55803 55804 55805 55806 55807 55808 55809 55810 55811 55812 55813 55814 55815 55816 55817 55818 55819 55820 55821 55822 55823 55824 55825 55826 55827 55828 55829 55830 55831 55832 55833 55834 55835 55836 55837 55838 55839 55840 55841 55842 55843 55844 55845 55846 55847 55848 55849 55850 55851 55852 55853 55854 55855 55856 55857 55858 55859 55860 55861 55862 55863 55864 55865 55866 55867 55868 55869 55870 55871 55872 55873 55874 55875 55876 55877 55878 55879 55880 55881 55882 55883 55884 55885 55886 55887 55888 55889 55890 55891 55892 55893 55894 55895 55896 55897 55898 55899 55900 55901 55902 55903 55904 55905 55906 55907 55908 55909 55910 55911 55912 55913 55914 55915 55916 55917 55918 55919 55920 55921 55922 55923 55924 55925 55926 55927 55928 55929 55930 55931 55932 55933 55934 55935 55936 55937 55938 55939 55940 55941 55942 55943 55944 55945 55946 55947 55948 55949 55950 55951 55952 55953 55954 55955 55956 55957 55958 55959 55960 55961 55962 55963 55964 55965 55966 55967 55968 55969 55970 55971 55972 55973 55974 55975 55976 55977 55978 55979 55980 55981 55982 55983 55984 55985 55986 55987 55988 55989 55990 55991 55992 55993 55994 55995 55996 55997 55998 55999 56000 56001 56002 56003 56004 56005 56006 56007 56008 56009 56010 56011 56012 56013 56014 56015 56016 56017 56018 56019 56020 56021 56022 56023 56024 56025 56026 56027 56028 56029 56030 56031 56032 56033 56034 56035 56036 56037 56038 56039 56040 56041 56042 56043 56044 56045 56046 56047 56048 56049 56050 56051 56052 56053 56054 56055 56056 56057 56058 56059 56060 56061 56062 56063 56064 56065 56066 56067 56068 56069 56070 56071 56072 56073 56074 56075 56076 56077 56078 56079 56080 56081 56082 56083 56084 56085 56086 56087 56088 56089 56090 56091 56092 56093 56094 56095 56096 56097 56098 56099 56100 56101 56102 56103 56104 56105 56106 56107 56108 56109 56110 56111 56112 56113 56114 56115 56116 56117 56118 56119 56120 56121 56122 56123 56124 56125 56126 56127 56128 56129 56130 56131 56132 56133 56134 56135 56136 56137 56138 56139 56140 56141 56142 56143 56144 56145 56146 56147 56148 56149 56150 56151 56152 56153 56154 56155 56156 56157 56158 56159 56160 56161 56162 56163 56164 56165 56166 56167 56168 56169 56170 56171 56172 56173 56174 56175 56176 56177 56178 56179 56180 56181 56182 56183 56184 56185 56186 56187 56188 56189 56190 56191 56192 56193 56194 56195 56196 56197 56198 56199 56200 56201 56202 56203 56204 56205 56206 56207 56208 56209 56210 56211 56212 56213 56214 56215 56216 56217 56218 56219 56220 56221 56222 56223 56224 56225 56226 56227 56228 56229 56230 56231 56232 56233 56234 56235 56236 56237 56238 56239 56240 56241 56242 56243 56244 56245 56246 56247 56248 56249 56250 56251 56252 56253 56254 56255 56256 56257 56258 56259 56260 56261 56262 56263 56264 56265 56266 56267 56268 56269 56270 56271 56272 56273 56274 56275 56276 56277 56278 56279 56280 56281 56282 56283 56284 56285 56286 56287 56288 56289 56290 56291 56292 56293 56294 56295 56296 56297 56298 56299 56300 56301 56302 56303 56304 56305 56306 56307 56308 56309 56310 56311 56312 56313 56314 56315 56316 56317 56318 56319 56320 56321 56322 56323 56324 56325 56326 56327 56328 56329 56330 56331 56332 56333 56334 56335 56336 56337 56338 56339 56340 56341 56342 56343 56344 56345 56346 56347 56348 56349 56350 56351 56352 56353 56354 56355 56356 56357 56358 56359 56360 56361 56362 56363 56364 56365 56366 56367 56368 56369 56370 56371 56372 56373 56374 56375 56376 56377 56378 56379 56380 56381 56382 56383 56384 56385 56386 56387 56388 56389 56390 56391 56392 56393 56394 56395 56396 56397 56398 56399 56400 56401 56402 56403 56404 56405 56406 56407 56408 56409 56410 56411 56412 56413 56414 56415 56416 56417 56418 56419 56420 56421 56422 56423 56424 56425 56426 56427 56428 56429 56430 56431 56432 56433 56434 56435 56436 56437 56438 56439 56440 56441 56442 56443 56444 56445 56446 56447 56448 56449 56450 56451 56452 56453 56454 56455 56456 56457 56458 56459 56460 56461 56462 56463 56464 56465 56466 56467 56468 56469 56470 56471 56472 56473 56474 56475 56476 56477 56478 56479 56480 56481 56482 56483 56484 56485 56486 56487 56488 56489 56490 56491 56492 56493 56494 56495 56496 56497 56498 56499 56500 56501 56502 56503 56504 56505 56506 56507 56508 56509 56510 56511 56512 56513 56514 56515 56516 56517 56518 56519 56520 56521 56522 56523 56524 56525 56526 56527 56528 56529 56530 56531 56532 56533 56534 56535 56536 56537 56538 56539 56540 56541 56542 56543 56544 56545 56546 56547 56548 56549 56550 56551 56552 56553 56554 56555 56556 56557 56558 56559 56560 56561 56562 56563 56564 56565 56566 56567 56568 56569 56570 56571 56572 56573 56574 56575 56576 56577 56578 56579 56580 56581 56582 56583 56584 56585 56586 56587 56588 56589 56590 56591 56592 56593 56594 56595 56596 56597 56598 56599 56600 56601 56602 56603 56604 56605 56606 56607 56608 56609 56610 56611 56612 56613 56614 56615 56616 56617 56618 56619 56620 56621 56622 56623 56624 56625 56626 56627 56628 56629 56630 56631 56632 56633 56634 56635 56636 56637 56638 56639 56640 56641 56642 56643 56644 56645 56646 56647 56648 56649 56650 56651 56652 56653 56654 56655 56656 56657 56658 56659 56660 56661 56662 56663 56664 56665 56666 56667 56668 56669 56670 56671 56672 56673 56674 56675 56676 56677 56678 56679 56680 56681 56682 56683 56684 56685 56686 56687 56688 56689 56690 56691 56692 56693 56694 56695 56696 56697 56698 56699 56700 56701 56702 56703 56704 56705 56706 56707 56708 56709 56710 56711 56712 56713 56714 56715 56716 56717 56718 56719 56720 56721 56722 56723 56724 56725 56726 56727 56728 56729 56730 56731 56732 56733 56734 56735 56736 56737 56738 56739 56740 56741 56742 56743 56744 56745 56746 56747 56748 56749 56750 56751 56752 56753 56754 56755 56756 56757 56758 56759 56760 56761 56762 56763 56764 56765 56766 56767 56768 56769 56770 56771 56772 56773 56774 56775 56776 56777 56778 56779 56780 56781 56782 56783 56784 56785 56786 56787 56788 56789 56790 56791 56792 56793 56794 56795 56796 56797 56798 56799 56800 56801 56802 56803 56804 56805 56806 56807 56808 56809 56810 56811 56812 56813 56814 56815 56816 56817 56818 56819 56820 56821 56822 56823 56824 56825 56826 56827 56828 56829 56830 56831 56832 56833 56834 56835 56836 56837 56838 56839 56840 56841 56842 56843 56844 56845 56846 56847 56848 56849 56850 56851 56852 56853 56854 56855 56856 56857 56858 56859 56860 56861 56862 56863 56864 56865 56866 56867 56868 56869 56870 56871 56872 56873 56874 56875 56876 56877 56878 56879 56880 56881 56882 56883 56884 56885 56886 56887 56888 56889 56890 56891 56892 56893 56894 56895 56896 56897 56898 56899 56900 56901 56902 56903 56904 56905 56906 56907 56908 56909 56910 56911 56912 56913 56914 56915 56916 56917 56918 56919 56920 56921 56922 56923 56924 56925 56926 56927 56928 56929 56930 56931 56932 56933 56934 56935 56936 56937 56938 56939 56940 56941 56942 56943 56944 56945 56946 56947 56948 56949 56950 56951 56952 56953 56954 56955 56956 56957 56958 56959 56960 56961 56962 56963 56964 56965 56966 56967 56968 56969 56970 56971 56972 56973 56974 56975 56976 56977 56978 56979 56980 56981 56982 56983 56984 56985 56986 56987 56988 56989 56990 56991 56992 56993 56994 56995 56996 56997 56998 56999 57000 57001 57002 57003 57004 57005 57006 57007 57008 57009 57010 57011 57012 57013 57014 57015 57016 57017 57018 57019 57020 57021 57022 57023 57024 57025 57026 57027 57028 57029 57030 57031 57032 57033 57034 57035 57036 57037 57038 57039 57040 57041 57042 57043 57044 57045 57046 57047 57048 57049 57050 57051 57052 57053 57054 57055 57056 57057 57058 57059 57060 57061 57062 57063 57064 57065 57066 57067 57068 57069 57070 57071 57072 57073 57074 57075 57076 57077 57078 57079 57080 57081 57082 57083 57084 57085 57086 57087 57088 57089 57090 57091 57092 57093 57094 57095 57096 57097 57098 57099 57100 57101 57102 57103 57104 57105 57106 57107 57108 57109 57110 57111 57112 57113 57114 57115 57116 57117 57118 57119 57120 57121 57122 57123 57124 57125 57126 57127 57128 57129 57130 57131 57132 57133 57134 57135 57136 57137 57138 57139 57140 57141 57142 57143 57144 57145 57146 57147 57148 57149 57150 57151 57152 57153 57154 57155 57156 57157 57158 57159 57160 57161 57162 57163 57164 57165 57166 57167 57168 57169 57170 57171 57172 57173 57174 57175 57176 57177 57178 57179 57180 57181 57182 57183 57184 57185 57186 57187 57188 57189 57190 57191 57192 57193 57194 57195 57196 57197 57198 57199 57200 57201 57202 57203 57204 57205 57206 57207 57208 57209 57210 57211 57212 57213 57214 57215 57216 57217 57218 57219 57220 57221 57222 57223 57224 57225 57226 57227 57228 57229 57230 57231 57232 57233 57234 57235 57236 57237 57238 57239 57240 57241 57242 57243 57244 57245 57246 57247 57248 57249 57250 57251 57252 57253 57254 57255 57256 57257 57258 57259 57260 57261 57262 57263 57264 57265 57266 57267 57268 57269 57270 57271 57272 57273 57274 57275 57276 57277 57278 57279 57280 57281 57282 57283 57284 57285 57286 57287 57288 57289 57290 57291 57292 57293 57294 57295 57296 57297 57298 57299 57300 57301 57302 57303 57304 57305 57306 57307 57308 57309 57310 57311 57312 57313 57314 57315 57316 57317 57318 57319 57320 57321 57322 57323 57324 57325 57326 57327 57328 57329 57330 57331 57332 57333 57334 57335 57336 57337 57338 57339 57340 57341 57342 57343 57344 57345 57346 57347 57348 57349 57350 57351 57352 57353 57354 57355 57356 57357 57358 57359 57360 57361 57362 57363 57364 57365 57366 57367 57368 57369 57370 57371 57372 57373 57374 57375 57376 57377 57378 57379 57380 57381 57382 57383 57384 57385 57386 57387 57388 57389 57390 57391 57392 57393 57394 57395 57396 57397 57398 57399 57400 57401 57402 57403 57404 57405 57406 57407 57408 57409 57410 57411 57412 57413 57414 57415 57416 57417 57418 57419 57420 57421 57422 57423 57424 57425 57426 57427 57428 57429 57430 57431 57432 57433 57434 57435 57436 57437 57438 57439 57440 57441 57442 57443 57444 57445 57446 57447 57448 57449 57450 57451 57452 57453 57454 57455 57456 57457 57458 57459 57460 57461 57462 57463 57464 57465 57466 57467 57468 57469 57470 57471 57472 57473 57474 57475 57476 57477 57478 57479 57480 57481 57482 57483 57484 57485 57486 57487 57488 57489 57490 57491 57492 57493 57494 57495 57496 57497 57498 57499 57500 57501 57502 57503 57504 57505 57506 57507 57508 57509 57510 57511 57512 57513 57514 57515 57516 57517 57518 57519 57520 57521 57522 57523 57524 57525 57526 57527 57528 57529 57530 57531 57532 57533 57534 57535 57536 57537 57538 57539 57540 57541 57542 57543 57544 57545 57546 57547 57548 57549 57550 57551 57552 57553 57554 57555 57556 57557 57558 57559 57560 57561 57562 57563 57564 57565 57566 57567 57568 57569 57570 57571 57572 57573 57574 57575 57576 57577 57578 57579 57580 57581 57582 57583 57584 57585 57586 57587 57588 57589 57590 57591 57592 57593 57594 57595 57596 57597 57598 57599 57600 57601 57602 57603 57604 57605 57606 57607 57608 57609 57610 57611 57612 57613 57614 57615 57616 57617 57618 57619 57620 57621 57622 57623 57624 57625 57626 57627 57628 57629 57630 57631 57632 57633 57634 57635 57636 57637 57638 57639 57640 57641 57642 57643 57644 57645 57646 57647 57648 57649 57650 57651 57652 57653 57654 57655 57656 57657 57658 57659 57660 57661 57662 57663 57664 57665 57666 57667 57668 57669 57670 57671 57672 57673 57674 57675 57676 57677 57678 57679 57680 57681 57682 57683 57684 57685 57686 57687 57688 57689 57690 57691 57692 57693 57694 57695 57696 57697 57698 57699 57700 57701 57702 57703 57704 57705 57706 57707 57708 57709 57710 57711 57712 57713 57714 57715 57716 57717 57718 57719 57720 57721 57722 57723 57724 57725 57726 57727 57728 57729 57730 57731 57732 57733 57734 57735 57736 57737 57738 57739 57740 57741 57742 57743 57744 57745 57746 57747 57748 57749 57750 57751 57752 57753 57754 57755 57756 57757 57758 57759 57760 57761 57762 57763 57764 57765 57766 57767 57768 57769 57770 57771 57772 57773 57774 57775 57776 57777 57778 57779 57780 57781 57782 57783 57784 57785 57786 57787 57788 57789 57790 57791 57792 57793 57794 57795 57796 57797 57798 57799 57800 57801 57802 57803 57804 57805 57806 57807 57808 57809 57810 57811 57812 57813 57814 57815 57816 57817 57818 57819 57820 57821 57822 57823 57824 57825 57826 57827 57828 57829 57830 57831 57832 57833 57834 57835 57836 57837 57838 57839 57840 57841 57842 57843 57844 57845 57846 57847 57848 57849 57850 57851 57852 57853 57854 57855 57856 57857 57858 57859 57860 57861 57862 57863 57864 57865 57866 57867 57868 57869 57870 57871 57872 57873 57874 57875 57876 57877 57878 57879 57880 57881 57882 57883 57884 57885 57886 57887 57888 57889 57890 57891 57892 57893 57894 57895 57896 57897 57898 57899 57900 57901 57902 57903 57904 57905 57906 57907 57908 57909 57910 57911 57912 57913
|
Description: import v8z s390 branch matching v8 version (at 7b8220e2)
- adapt https://github.com/nodejs/node/commit/aa575b87 to s390 code
- add https://github.com/andrewlow/v8z/commit/32c72578
- add https://github.com/andrewlow/v8z/commit/2bfe125e
- add https://github.com/andrewlow/v8z/commit/81ae0258
- add https://github.com/andrewlow/v8z/commit/b190e113
- add https://github.com/andrewlow/v8z/commit/36f32bd2
- add https://github.com/andrewlow/v8z/commit/26fa059d
- add https://github.com/ibmruntimes/v8z/commit/13de3831
- add https://github.com/ibmruntimes/v8z/commit/389fbc90
- add https://github.com/ibmruntimes/v8z/commit/b5455060
Forwarded: not-needed
Last-Update: 2016-06-23
Origin: https://github.com/ibmruntimes/v8z/tree/4.5-s390
---
deps/v8/Makefile | 4 +-
deps/v8/build/standalone.gypi | 10 +-
deps/v8/build/toolchain.gypi | 49 +-
deps/v8/src/assembler.cc | 18 +
deps/v8/src/assembler.h | 6 +
deps/v8/src/base/atomicops.h | 2 +
deps/v8/src/base/atomicops_internals_s390_gcc.h | 166 +
deps/v8/src/base/build_config.h | 23 +-
deps/v8/src/base/macros.h | 6 +
deps/v8/src/base/platform/platform-posix.cc | 15 +
deps/v8/src/code-stubs.h | 17 +-
deps/v8/src/codegen.h | 2 +
deps/v8/src/compiler/instruction-codes.h | 2 +
deps/v8/src/frames-inl.h | 2 +
deps/v8/src/full-codegen.h | 13 +
deps/v8/src/gdb-jit.cc | 23 +-
deps/v8/src/globals.h | 12 +-
deps/v8/src/heap/heap.cc | 4 +
deps/v8/src/hydrogen-instructions.cc | 2 +
deps/v8/src/hydrogen.cc | 2 +
deps/v8/src/ic/s390/OWNERS | 3 +
deps/v8/src/ic/s390/access-compiler-s390.cc | 46 +
deps/v8/src/ic/s390/handler-compiler-s390.cc | 785 +++
deps/v8/src/ic/s390/ic-compiler-s390.cc | 135 +
deps/v8/src/ic/s390/ic-s390.cc | 954 ++++
deps/v8/src/ic/s390/stub-cache-s390.cc | 189 +
deps/v8/src/isolate.cc | 2 +-
deps/v8/src/jsregexp.cc | 5 +
deps/v8/src/lithium-allocator-inl.h | 2 +
deps/v8/src/lithium-codegen.cc | 3 +
deps/v8/src/lithium-inl.h | 2 +
deps/v8/src/lithium.cc | 3 +
deps/v8/src/log.cc | 2 +
deps/v8/src/macro-assembler.h | 7 +
deps/v8/src/objects.h | 2 +
deps/v8/src/regexp-macro-assembler.h | 1 +
deps/v8/src/s390/assembler-s390-inl.h | 691 +++
deps/v8/src/s390/assembler-s390.cc | 3492 +++++++++++++
deps/v8/src/s390/assembler-s390.h | 1692 ++++++
deps/v8/src/s390/builtins-s390.cc | 1932 +++++++
deps/v8/src/s390/code-stubs-s390.cc | 5685 ++++++++++++++++++++
deps/v8/src/s390/code-stubs-s390.h | 500 ++
deps/v8/src/s390/codegen-s390.cc | 703 +++
deps/v8/src/s390/codegen-s390.h | 47 +
deps/v8/src/s390/constants-s390.cc | 91 +
deps/v8/src/s390/constants-s390.h | 1715 ++++++
deps/v8/src/s390/cpu-s390.cc | 35 +
deps/v8/src/s390/debug-s390.cc | 281 +
deps/v8/src/s390/deoptimizer-s390.cc | 358 ++
deps/v8/src/s390/disasm-s390.cc | 976 ++++
deps/v8/src/s390/frames-s390.cc | 39 +
deps/v8/src/s390/frames-s390.h | 155 +
deps/v8/src/s390/full-codegen-s390.cc | 5581 ++++++++++++++++++++
deps/v8/src/s390/interface-descriptors-s390.cc | 343 ++
deps/v8/src/s390/lithium-codegen-s390.cc | 6350 +++++++++++++++++++++++
deps/v8/src/s390/lithium-codegen-s390.h | 373 ++
deps/v8/src/s390/lithium-gap-resolver-s390.cc | 288 +
deps/v8/src/s390/lithium-gap-resolver-s390.h | 64 +
deps/v8/src/s390/lithium-s390.cc | 2648 ++++++++++
deps/v8/src/s390/lithium-s390.h | 2773 ++++++++++
deps/v8/src/s390/macro-assembler-s390.cc | 5668 ++++++++++++++++++++
deps/v8/src/s390/macro-assembler-s390.h | 1815 +++++++
deps/v8/src/s390/regexp-macro-assembler-s390.cc | 1289 +++++
deps/v8/src/s390/regexp-macro-assembler-s390.h | 221 +
deps/v8/src/s390/simulator-s390.cc | 4694 +++++++++++++++++
deps/v8/src/s390/simulator-s390.h | 463 ++
deps/v8/src/sampler.cc | 6 +
deps/v8/src/simulator.h | 2 +
deps/v8/src/snapshot/serialize.cc | 4 +-
deps/v8/src/utils.h | 4 +-
deps/v8/tools/gyp/v8.gyp | 43 +
deps/v8/tools/run-deopt-fuzzer.py | 2 +
deps/v8/tools/run-tests.py | 2 +
deps/v8/tools/testrunner/local/statusfile.py | 2 +-
deps/v8/tools/testrunner/local/utils.py | 2 +
75 files changed, 53521 insertions(+), 27 deletions(-)
create mode 100644 deps/v8/src/base/atomicops_internals_s390_gcc.h
create mode 100644 deps/v8/src/ic/s390/OWNERS
create mode 100644 deps/v8/src/ic/s390/access-compiler-s390.cc
create mode 100644 deps/v8/src/ic/s390/handler-compiler-s390.cc
create mode 100644 deps/v8/src/ic/s390/ic-compiler-s390.cc
create mode 100644 deps/v8/src/ic/s390/ic-s390.cc
create mode 100644 deps/v8/src/ic/s390/stub-cache-s390.cc
create mode 100644 deps/v8/src/s390/assembler-s390-inl.h
create mode 100644 deps/v8/src/s390/assembler-s390.cc
create mode 100644 deps/v8/src/s390/assembler-s390.h
create mode 100644 deps/v8/src/s390/builtins-s390.cc
create mode 100644 deps/v8/src/s390/code-stubs-s390.cc
create mode 100644 deps/v8/src/s390/code-stubs-s390.h
create mode 100644 deps/v8/src/s390/codegen-s390.cc
create mode 100644 deps/v8/src/s390/codegen-s390.h
create mode 100644 deps/v8/src/s390/constants-s390.cc
create mode 100644 deps/v8/src/s390/constants-s390.h
create mode 100644 deps/v8/src/s390/cpu-s390.cc
create mode 100644 deps/v8/src/s390/debug-s390.cc
create mode 100644 deps/v8/src/s390/deoptimizer-s390.cc
create mode 100644 deps/v8/src/s390/disasm-s390.cc
create mode 100644 deps/v8/src/s390/frames-s390.cc
create mode 100644 deps/v8/src/s390/frames-s390.h
create mode 100644 deps/v8/src/s390/full-codegen-s390.cc
create mode 100644 deps/v8/src/s390/interface-descriptors-s390.cc
create mode 100644 deps/v8/src/s390/lithium-codegen-s390.cc
create mode 100644 deps/v8/src/s390/lithium-codegen-s390.h
create mode 100644 deps/v8/src/s390/lithium-gap-resolver-s390.cc
create mode 100644 deps/v8/src/s390/lithium-gap-resolver-s390.h
create mode 100644 deps/v8/src/s390/lithium-s390.cc
create mode 100644 deps/v8/src/s390/lithium-s390.h
create mode 100644 deps/v8/src/s390/macro-assembler-s390.cc
create mode 100644 deps/v8/src/s390/macro-assembler-s390.h
create mode 100644 deps/v8/src/s390/regexp-macro-assembler-s390.cc
create mode 100644 deps/v8/src/s390/regexp-macro-assembler-s390.h
create mode 100644 deps/v8/src/s390/simulator-s390.cc
create mode 100644 deps/v8/src/s390/simulator-s390.h
--- a/deps/v8/Makefile
+++ b/deps/v8/Makefile
@@ -236,8 +236,8 @@
# Architectures and modes to be compiled. Consider these to be internal
# variables, don't override them (use the targets instead).
-ARCHES = ia32 x64 x32 arm arm64 mips mipsel mips64el x87 ppc ppc64
-DEFAULT_ARCHES = ia32 x64 arm
+ARCHES = ia32 x64 x32 arm arm64 mips mipsel mips64el x87 ppc ppc64 s390 s390x
+DEFAULT_ARCHES = ia32 x64 arm s390 s390x
MODES = release debug optdebug
DEFAULT_MODES = release debug
ANDROID_ARCHES = android_ia32 android_x64 android_arm android_arm64 \
--- a/deps/v8/build/standalone.gypi
+++ b/deps/v8/build/standalone.gypi
@@ -179,8 +179,9 @@
}],
],
}],
- ['(v8_target_arch=="ia32" or v8_target_arch=="x64" or v8_target_arch=="x87") and \
- (OS=="linux" or OS=="mac")', {
+ ['((v8_target_arch=="ia32" or v8_target_arch=="x64" or v8_target_arch=="x87") and \
+ (OS=="linux" or OS=="mac")) or \
+ ((v8_target_arch == "s390" or v8_target_arch == "s390x") and OS=="linux")', {
'v8_enable_gdbjit%': 1,
}, {
'v8_enable_gdbjit%': 0,
@@ -191,6 +192,11 @@
}, {
'clang%': 0,
}],
+ ['host_arch!="ppc" and host_arch!="ppc64" and host_arch!="ppc64le" and host_arch!="s390" and host_arch!="s390x"', {
+ 'host_clang%': '1',
+ }, {
+ 'host_clang%': '0',
+ }],
['asan==1 or lsan==1 or msan==1 or tsan==1', {
'clang%': 1,
'use_allocator%': 'none',
--- a/deps/v8/build/toolchain.gypi
+++ b/deps/v8/build/toolchain.gypi
@@ -136,6 +136,7 @@
'conditions': [
['host_arch=="ia32" or host_arch=="x64" or \
host_arch=="ppc" or host_arch=="ppc64" or \
+ host_arch=="s390" or host_arch=="s390x" or \
clang==1', {
'variables': {
'host_cxx_is_biarch%': 1,
@@ -146,8 +147,8 @@
},
}],
['target_arch=="ia32" or target_arch=="x64" or target_arch=="x87" or \
- target_arch=="ppc" or target_arch=="ppc64" or \
- clang==1', {
+ target_arch=="ppc" or target_arch=="ppc64" or target_arch=="s390" or \
+ target_arch=="s390x" or clang==1', {
'variables': {
'target_cxx_is_biarch%': 1,
},
@@ -296,6 +297,23 @@
'V8_TARGET_ARCH_ARM64',
],
}],
+ ['v8_target_arch=="s390" or v8_target_arch=="s390x"', {
+ 'defines': [
+ 'V8_TARGET_ARCH_S390',
+ ],
+ 'conditions': [
+ ['v8_target_arch=="s390x"', {
+ 'defines': [
+ 'V8_TARGET_ARCH_S390X',
+ ],
+ }],
+ ['v8_host_byteorder=="little"', {
+ 'defines': [
+ 'V8_TARGET_ARCH_S390_LE',
+ ],
+ }],
+ ],
+ }], # s390
['v8_target_arch=="ppc" or v8_target_arch=="ppc64"', {
'defines': [
'V8_TARGET_ARCH_PPC',
@@ -907,13 +925,21 @@
or OS=="netbsd" or OS=="mac" or OS=="android" or OS=="qnx") and \
(v8_target_arch=="arm" or v8_target_arch=="ia32" or \
v8_target_arch=="x87" or v8_target_arch=="mips" or \
- v8_target_arch=="mipsel" or v8_target_arch=="ppc")', {
+ v8_target_arch=="mipsel" or v8_target_arch=="ppc" or \
+ v8_target_arch=="s390")', {
'target_conditions': [
['_toolset=="host"', {
'conditions': [
['host_cxx_is_biarch==1', {
- 'cflags': [ '-m32' ],
- 'ldflags': [ '-m32' ]
+ 'conditions': [
+ ['host_arch=="s390" or host_arch=="s390x"', {
+ 'cflags': [ '-m31' ],
+ 'ldflags': [ '-m31' ]
+ },{
+ 'cflags': [ '-m32' ],
+ 'ldflags': [ '-m32' ]
+ }],
+ ],
}],
],
'xcode_settings': {
@@ -923,8 +949,15 @@
['_toolset=="target"', {
'conditions': [
['target_cxx_is_biarch==1 and nacl_target_arch!="nacl_x64"', {
- 'cflags': [ '-m32' ],
- 'ldflags': [ '-m32' ],
+ 'conditions': [
+ ['host_arch=="s390" or host_arch=="s390x"', {
+ 'cflags': [ '-m31' ],
+ 'ldflags': [ '-m31' ]
+ },{
+ 'cflags': [ '-m32' ],
+ 'ldflags': [ '-m32' ],
+ }],
+ ],
}],
],
'xcode_settings': {
@@ -935,7 +968,7 @@
}],
['(OS=="linux" or OS=="android") and \
(v8_target_arch=="x64" or v8_target_arch=="arm64" or \
- v8_target_arch=="ppc64")', {
+ v8_target_arch=="ppc64" or v8_target_arch=="s390x")', {
'target_conditions': [
['_toolset=="host"', {
'conditions': [
--- a/deps/v8/src/assembler.cc
+++ b/deps/v8/src/assembler.cc
@@ -65,6 +65,8 @@
#include "src/arm64/assembler-arm64-inl.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/assembler-arm-inl.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "s390/assembler-s390-inl.h"
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/assembler-ppc-inl.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
@@ -87,6 +89,8 @@
#include "src/arm64/regexp-macro-assembler-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/regexp-macro-assembler-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "s390/regexp-macro-assembler-s390.h"
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/regexp-macro-assembler-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
@@ -1032,13 +1036,25 @@
ExternalReference::ExternalReference(Runtime::FunctionId id,
Isolate* isolate)
+#if V8_TARGET_ARCH_S390X
+ : address_(Redirect(isolate, Runtime::FunctionForId(id)->entry,
+ (Runtime::FunctionForId(id)->result_size == 2) ?
+ BUILTIN_OBJECTPAIR_CALL : BUILTIN_CALL)) {}
+#else
: address_(Redirect(isolate, Runtime::FunctionForId(id)->entry)) {}
+#endif
ExternalReference::ExternalReference(const Runtime::Function* f,
Isolate* isolate)
+#if V8_TARGET_ARCH_S390X
+ : address_(Redirect(isolate, f->entry,
+ ((f->result_size == 2) ?
+ BUILTIN_OBJECTPAIR_CALL : BUILTIN_CALL))) {}
+#else
: address_(Redirect(isolate, f->entry)) {}
+#endif
ExternalReference ExternalReference::isolate_address(Isolate* isolate) {
return ExternalReference(isolate);
@@ -1331,6 +1347,8 @@
function = FUNCTION_ADDR(RegExpMacroAssemblerARM64::CheckStackGuardState);
#elif V8_TARGET_ARCH_ARM
function = FUNCTION_ADDR(RegExpMacroAssemblerARM::CheckStackGuardState);
+#elif V8_TARGET_ARCH_S390
+ function = FUNCTION_ADDR(RegExpMacroAssemblerS390::CheckStackGuardState);
#elif V8_TARGET_ARCH_PPC
function = FUNCTION_ADDR(RegExpMacroAssemblerPPC::CheckStackGuardState);
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/assembler.h
+++ b/deps/v8/src/assembler.h
@@ -380,6 +380,7 @@
INTERNAL_REFERENCE, // An address inside the same function.
// Encoded internal reference, used only on MIPS, MIPS64 and PPC.
+ // TODO(Tara): Check if this is required for s390
INTERNAL_REFERENCE_ENCODED,
// Marks constant and veneer pools. Only used on ARM and ARM64.
@@ -799,6 +800,11 @@
// Object* f(v8::internal::Arguments).
BUILTIN_CALL, // default
+#if V8_TARGET_ARCH_S390X || V8_TARGET_ARCH_PPC64
+ // Builtin call returning object pair.
+ // ObjectPair* f(v8::internal::Arguments).
+ BUILTIN_OBJECTPAIR_CALL,
+#endif
// Builtin that takes float arguments and returns an int.
// int f(double, double).
BUILTIN_COMPARE_CALL,
--- a/deps/v8/src/base/atomicops.h
+++ b/deps/v8/src/base/atomicops.h
@@ -148,6 +148,8 @@
#include "src/base/atomicops_internals_arm64_gcc.h"
#elif defined(__GNUC__) && V8_HOST_ARCH_ARM
#include "src/base/atomicops_internals_arm_gcc.h"
+#elif defined(__GNUC__) && V8_HOST_ARCH_S390
+#include "src/base/atomicops_internals_s390_gcc.h"
#elif defined(__GNUC__) && V8_HOST_ARCH_PPC
#include "src/base/atomicops_internals_ppc_gcc.h"
#elif defined(__GNUC__) && (V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64)
--- /dev/null
+++ b/deps/v8/src/base/atomicops_internals_s390_gcc.h
@@ -0,0 +1,166 @@
+// Copyright 2014 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+// This file is an internal atomic implementation, use atomicops.h instead.
+//
+
+#ifndef V8_ATOMICOPS_INTERNALS_S390_H_
+#define V8_ATOMICOPS_INTERNALS_S390_H_
+
+namespace v8 {
+namespace base {
+
+inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
+ Atomic32 old_value,
+ Atomic32 new_value) {
+ return(__sync_val_compare_and_swap( ptr, old_value, new_value));
+}
+
+inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
+ Atomic32 new_value) {
+ Atomic32 old_value;
+ do {
+ old_value = *ptr;
+ } while (__sync_bool_compare_and_swap(ptr, old_value, new_value) == false);
+ return old_value;
+}
+
+inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
+ Atomic32 increment) {
+ return Barrier_AtomicIncrement(ptr, increment);
+}
+
+inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
+ Atomic32 increment) {
+ return __sync_add_and_fetch(ptr, increment);
+}
+
+inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
+ Atomic32 old_value,
+ Atomic32 new_value) {
+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+}
+
+inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
+ Atomic32 old_value,
+ Atomic32 new_value) {
+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+}
+
+inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) {
+ *ptr = value;
+}
+
+inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
+ *ptr = value;
+}
+
+inline void MemoryBarrier() {
+ // gcc built-in
+ __sync_synchronize();
+ // __asm__ __volatile__("sync" : : : "memory");
+}
+
+inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
+ *ptr = value;
+ MemoryBarrier();
+}
+
+inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
+ MemoryBarrier();
+ *ptr = value;
+}
+
+inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) {
+ return *ptr;
+}
+
+inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
+ return *ptr;
+}
+
+inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
+ Atomic32 value = *ptr;
+ MemoryBarrier();
+ return value;
+}
+
+inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
+ MemoryBarrier();
+ return *ptr;
+}
+
+#ifdef V8_TARGET_ARCH_S390X
+inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
+ Atomic64 old_value,
+ Atomic64 new_value) {
+ return(__sync_val_compare_and_swap( ptr, old_value, new_value));
+}
+
+inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
+ Atomic64 new_value) {
+ Atomic64 old_value;
+ do {
+ old_value = *ptr;
+ } while (__sync_bool_compare_and_swap(ptr, old_value, new_value) == false);
+ return old_value;
+}
+
+inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
+ Atomic64 increment) {
+ return Barrier_AtomicIncrement(ptr, increment);
+}
+
+inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
+ Atomic64 increment) {
+ return __sync_add_and_fetch(ptr, increment);
+}
+
+
+inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
+ Atomic64 old_value,
+ Atomic64 new_value) {
+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+}
+
+inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
+ Atomic64 old_value,
+ Atomic64 new_value) {
+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
+}
+
+inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
+ *ptr = value;
+}
+
+inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
+ *ptr = value;
+ MemoryBarrier();
+}
+
+inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
+ MemoryBarrier();
+ *ptr = value;
+}
+
+inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
+ return *ptr;
+}
+
+inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
+ Atomic64 value = *ptr;
+ MemoryBarrier();
+ return value;
+}
+
+inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
+ MemoryBarrier();
+ return *ptr;
+}
+
+#endif
+
+} } // namespace v8::base
+
+#endif // V8_ATOMICOPS_INTERNALS_S390_H_
--- a/deps/v8/src/base/build_config.h
+++ b/deps/v8/src/base/build_config.h
@@ -55,6 +55,13 @@
#else
#define V8_HOST_ARCH_32_BIT 1
#endif
+#elif defined(__s390__) || defined(__s390x__)
+#define V8_HOST_ARCH_S390 1
+#if defined(__s390x__)
+#define V8_HOST_ARCH_64_BIT 1
+#else
+#define V8_HOST_ARCH_32_BIT 1
+#endif
#else
#error "Host architecture was not detected as supported by v8"
#endif
@@ -72,9 +79,9 @@
// Target architecture detection. This may be set externally. If not, detect
// in the same way as the host architecture, that is, target the native
// environment as presented by the compiler.
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_X87 && \
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_X87 && \
!V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS && \
- !V8_TARGET_ARCH_MIPS64 && !V8_TARGET_ARCH_PPC
+ !V8_TARGET_ARCH_MIPS64 && !V8_TARGET_ARCH_PPC && !V8_TARGET_ARCH_S390
#if defined(_M_X64) || defined(__x86_64__)
#define V8_TARGET_ARCH_X64 1
#elif defined(_M_IX86) || defined(__i386__)
@@ -117,6 +124,12 @@
#else
#define V8_TARGET_ARCH_32_BIT 1
#endif
+#elif V8_TARGET_ARCH_S390
+#if V8_TARGET_ARCH_S390X
+#define V8_TARGET_ARCH_64_BIT 1
+#else
+#define V8_TARGET_ARCH_32_BIT 1
+#endif
#elif V8_TARGET_ARCH_X87
#define V8_TARGET_ARCH_32_BIT 1
#else
@@ -171,6 +184,12 @@
#define V8_TARGET_LITTLE_ENDIAN 1
#elif V8_TARGET_ARCH_PPC_BE
#define V8_TARGET_BIG_ENDIAN 1
+#elif V8_TARGET_ARCH_S390
+#if V8_TARGET_ARCH_S390_LE
+#define V8_TARGET_LITTLE_ENDIAN 1
+#else
+#define V8_TARGET_BIG_ENDIAN 1
+#endif
#else
#error Unknown target architecture endianness
#endif
--- a/deps/v8/src/base/macros.h
+++ b/deps/v8/src/base/macros.h
@@ -354,6 +354,12 @@
#endif
#endif
+#if V8_HOST_ARCH_S390 && !V8_HOST_ARCH_64_BIT
+# define V8_SIZET_PREFIX "z"
+#else
+# define V8_SIZET_PREFIX ""
+#endif
+
#define V8PRIxPTR V8_PTR_PREFIX "x"
#define V8PRIdPTR V8_PTR_PREFIX "d"
#define V8PRIuPTR V8_PTR_PREFIX "u"
--- a/deps/v8/src/base/platform/platform-posix.cc
+++ b/deps/v8/src/base/platform/platform-posix.cc
@@ -81,6 +81,8 @@
return 8;
#elif V8_TARGET_ARCH_MIPS
return 8;
+#elif V8_TARGET_ARCH_S390
+ return 8;
#else
// Otherwise we just assume 16 byte alignment, i.e.:
// - With gcc 4.4 the tree vectorization optimizer can generate code
@@ -171,6 +173,15 @@
// the hint address to 46 bits to give the kernel a fighting chance of
// fulfilling our placement request.
raw_addr &= V8_UINT64_C(0x3ffffffff000);
+#elif V8_TARGET_ARCH_S390X
+ // Linux on Z uses bits 22-32 for Region Indexing, which translates to 42 bits
+ // of virtual addressing. Truncate to 40 bits to allow kernel chance to
+ // fulfill request.
+ raw_addr &= V8_UINT64_C(0xfffffff000);
+#elif V8_TARGET_ARCH_S390
+ // 31 bits of virtual addressing. Truncate to 29 bits to allow kernel chance
+ // to fulfill request.
+ raw_addr &= 0x1ffff000;
#elif V8_TARGET_ARCH_PPC64
#if V8_OS_AIX
// AIX: 64 bits of virtual addressing, but we limit address range to:
@@ -242,6 +253,9 @@
asm("break");
#elif V8_HOST_ARCH_MIPS64
asm("break");
+#elif V8_HOST_ARCH_S390
+ // Software breakpoint instruction is 0x0001
+ asm volatile(".word 0x0001");
#elif V8_HOST_ARCH_PPC
asm("twge 2,2");
#elif V8_HOST_ARCH_IA32
--- a/deps/v8/src/code-stubs.h
+++ b/deps/v8/src/code-stubs.h
@@ -128,6 +128,14 @@
#endif
// List of code stubs only used on PPC platforms.
+#ifdef V8_TARGET_ARCH_S390
+#define CODE_STUB_LIST_S390(V) \
+ V(DirectCEntry) \
+ V(StoreRegistersState) \
+ V(RestoreRegistersState)
+#else
+#define CODE_STUB_LIST_S390(V)
+#endif
#ifdef V8_TARGET_ARCH_PPC
#define CODE_STUB_LIST_PPC(V) \
V(DirectCEntry) \
@@ -158,7 +166,8 @@
CODE_STUB_LIST_ARM(V) \
CODE_STUB_LIST_ARM64(V) \
CODE_STUB_LIST_PPC(V) \
- CODE_STUB_LIST_MIPS(V)
+ CODE_STUB_LIST_MIPS(V) \
+ CODE_STUB_LIST_S390(V)
static const int kHasReturnedMinusZeroSentinel = 1;
@@ -571,6 +580,8 @@
#include "src/arm64/code-stubs-arm64.h"
#elif V8_TARGET_ARCH_ARM
#include "src/arm/code-stubs-arm.h"
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/code-stubs-s390.h"
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/code-stubs-ppc.h"
#elif V8_TARGET_ARCH_MIPS
@@ -1723,7 +1734,7 @@
: PlatformCodeStub(isolate) {
minor_key_ = SaveDoublesBits::encode(save_doubles == kSaveFPRegs);
DCHECK(result_size == 1 || result_size == 2);
-#if _WIN64 || V8_TARGET_ARCH_PPC
+#if _WIN64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_S390
minor_key_ = ResultSizeBits::update(minor_key_, result_size);
#endif // _WIN64
}
@@ -1736,7 +1747,7 @@
private:
bool save_doubles() const { return SaveDoublesBits::decode(minor_key_); }
-#if _WIN64 || V8_TARGET_ARCH_PPC
+#if _WIN64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_S390
int result_size() const { return ResultSizeBits::decode(minor_key_); }
#endif // _WIN64
--- a/deps/v8/src/codegen.h
+++ b/deps/v8/src/codegen.h
@@ -52,6 +52,8 @@
#include "src/arm64/codegen-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/codegen-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/codegen-s390.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/codegen-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/compiler/instruction-codes.h
+++ b/deps/v8/src/compiler/instruction-codes.h
@@ -21,6 +21,8 @@
#include "src/compiler/x64/instruction-codes-x64.h"
#elif V8_TARGET_ARCH_PPC
#include "src/compiler/ppc/instruction-codes-ppc.h"
+#elif V8_TARGET_ARCH_S390
+#include "src/compiler/s390/instruction-codes-s390.h"
#elif V8_TARGET_ARCH_X87
#include "src/compiler/x87/instruction-codes-x87.h"
#else
--- a/deps/v8/src/frames-inl.h
+++ b/deps/v8/src/frames-inl.h
@@ -17,6 +17,8 @@
#include "src/arm64/frames-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/frames-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/frames-s390.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/frames-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/full-codegen.h
+++ b/deps/v8/src/full-codegen.h
@@ -84,6 +84,12 @@
#elif V8_TARGET_ARCH_ARM64
// TODO(all): Copied ARM value. Check this is sensible for ARM64.
static const int kCodeSizeMultiplier = 149;
+#elif V8_TARGET_ARCH_S390X
+// TODO(all): Copied ARM value. Check this is sensible for S390X.
+ static const int kCodeSizeMultiplier = 142;
+#elif V8_TARGET_ARCH_S390
+// TODO(all): Copied ARM value. Check this is sensible for S390.
+ static const int kCodeSizeMultiplier = 142;
#elif V8_TARGET_ARCH_PPC64
static const int kCodeSizeMultiplier = 200;
#elif V8_TARGET_ARCH_PPC
@@ -320,6 +326,13 @@
Label* if_true,
Label* if_false,
Label* fall_through);
+#elif V8_TARGET_ARCH_S390
+ // TODO(joransiu): Remove CRegister
+ void Split(Condition cc,
+ Label* if_true,
+ Label* if_false,
+ Label* fall_through,
+ CRegister cr = cr7);
#elif V8_TARGET_ARCH_MIPS64
void Split(Condition cc,
Register lhs,
--- a/deps/v8/src/gdb-jit.cc
+++ b/deps/v8/src/gdb-jit.cc
@@ -655,6 +655,12 @@
#elif V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_64_BIT
const uint8_t ident[16] =
{ 0x7f, 'E', 'L', 'F', 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+#elif defined(V8_TARGET_ARCH_S390) && V8_TARGET_ARCH_32_BIT
+ const uint8_t ident[16] =
+ { 0x7f, 'E', 'L', 'F', 1, 2, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0};
+#elif defined(V8_TARGET_ARCH_S390X)
+ const uint8_t ident[16] =
+ { 0x7f, 'E', 'L', 'F', 2, 2, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0};
#else
#error Unsupported target architecture.
#endif
@@ -671,6 +677,11 @@
// Set to EM_ARM, defined as 40, in "ARM ELF File Format" at
// infocenter.arm.com/help/topic/com.arm.doc.dui0101a/DUI0101A_Elf.pdf
header->machine = 40;
+#elif V8_TARGET_ARCH_S390
+ // Processor identification value is 22 as defined in the System Z ABI,
+ // under Object Files, ELF Header:
+ // http://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_zSeries.html#AEN1597
+ header->machine = 22;
#else
#error Unsupported target architecture.
#endif
@@ -763,7 +774,8 @@
return static_cast<Binding>(info >> 4);
}
#if (V8_TARGET_ARCH_IA32 || V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X87 || \
- (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_32_BIT))
+ (V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_32_BIT) || \
+ (V8_TARGET_ARCH_S390 && V8_TARGET_ARCH_32_BIT))
struct SerializedLayout {
SerializedLayout(uint32_t name,
uintptr_t value,
@@ -786,7 +798,8 @@
uint8_t other;
uint16_t section;
};
-#elif V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_64_BIT
+#elif V8_TARGET_ARCH_X64 && V8_TARGET_ARCH_64_BIT || \
+ V8_TARGET_ARCH_S390X
struct SerializedLayout {
SerializedLayout(uint32_t name,
uintptr_t value,
@@ -1064,6 +1077,10 @@
DW_OP_reg5 = 0x55,
DW_OP_reg6 = 0x56,
DW_OP_reg7 = 0x57,
+ DW_OP_reg8 = 0x58,
+ DW_OP_reg9 = 0x59,
+ DW_OP_reg10 = 0x5a,
+ DW_OP_reg11 = 0x5b,
DW_OP_fbreg = 0x91 // 1 param: SLEB128 offset
};
@@ -1109,6 +1126,8 @@
UNIMPLEMENTED();
#elif V8_TARGET_ARCH_MIPS64
UNIMPLEMENTED();
+#elif V8_TARGET_ARCH_S390
+ w->Write<uint8_t>(DW_OP_reg11); // The frame pointer's here on s390
#else
#error Unsupported target architecture.
#endif
--- a/deps/v8/src/globals.h
+++ b/deps/v8/src/globals.h
@@ -32,11 +32,12 @@
#if V8_TARGET_ARCH_IA32 || (V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_32_BIT) || \
V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \
- V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_X87
+ V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_X87 || \
+ V8_TARGET_ARCH_S390
#define V8_TURBOFAN_BACKEND 1
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS64 || \
- V8_TARGET_ARCH_PPC64
+ V8_TARGET_ARCH_PPC64 || V8_TARGET_ARCH_S390X
// 64-bit TurboFan backends support 64-bit integer arithmetic.
#define V8_TURBOFAN_BACKEND_64 1
#else
@@ -73,6 +74,9 @@
#if (V8_TARGET_ARCH_ARM && !V8_HOST_ARCH_ARM)
#define USE_SIMULATOR 1
#endif
+#if (V8_TARGET_ARCH_S390 && !V8_HOST_ARCH_S390)
+#define USE_SIMULATOR 1
+#endif
#if (V8_TARGET_ARCH_PPC && !V8_HOST_ARCH_PPC)
#define USE_SIMULATOR 1
#endif
@@ -760,6 +764,10 @@
FPR_GPR_MOV,
LWSYNC,
ISELECT,
+ // S390
+ DISTINCT_OPS,
+ GENERAL_INSTR_EXT,
+ FLOATING_POINT_EXT,
NUMBER_OF_CPU_FEATURES
};
--- a/deps/v8/src/heap/heap.cc
+++ b/deps/v8/src/heap/heap.cc
@@ -38,6 +38,10 @@
#include "src/regexp-macro-assembler.h" // NOLINT
#include "src/ppc/regexp-macro-assembler-ppc.h" // NOLINT
#endif
+#if V8_TARGET_ARCH_S390 && !V8_INTERPRETED_REGEXP
+#include "src/regexp-macro-assembler.h" // NOLINT
+#include "src/s390/regexp-macro-assembler-s390.h" // NOLINT
+#endif
#if V8_TARGET_ARCH_ARM && !V8_INTERPRETED_REGEXP
#include "src/regexp-macro-assembler.h" // NOLINT
#include "src/arm/regexp-macro-assembler-arm.h" // NOLINT
--- a/deps/v8/src/hydrogen-instructions.cc
+++ b/deps/v8/src/hydrogen-instructions.cc
@@ -18,6 +18,8 @@
#include "src/arm64/lithium-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/lithium-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/lithium-s390.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/lithium-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/hydrogen.cc
+++ b/deps/v8/src/hydrogen.cc
@@ -51,6 +51,8 @@
#include "src/arm64/lithium-codegen-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/lithium-codegen-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/lithium-codegen-s390.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/lithium-codegen-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
--- /dev/null
+++ b/deps/v8/src/ic/s390/OWNERS
@@ -0,0 +1,3 @@
+joransiu@ca.ibm.com
+mbrandy@us.ibm.com
+michael_dawson@ca.ibm.com
--- /dev/null
+++ b/deps/v8/src/ic/s390/access-compiler-s390.cc
@@ -0,0 +1,46 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/ic/access-compiler.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+
+
+void PropertyAccessCompiler::GenerateTailCall(MacroAssembler* masm,
+ Handle<Code> code) {
+ __ Jump(code, RelocInfo::CODE_TARGET);
+}
+
+
+Register* PropertyAccessCompiler::load_calling_convention() {
+ // receiver, name, scratch1, scratch2, scratch3, scratch4.
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register name = LoadDescriptor::NameRegister();
+ static Register registers[] = {receiver, name, r5, r2, r6, r7};
+ return registers;
+}
+
+
+Register* PropertyAccessCompiler::store_calling_convention() {
+ // receiver, name, scratch1, scratch2, scratch3.
+ Register receiver = StoreDescriptor::ReceiverRegister();
+ Register name = StoreDescriptor::NameRegister();
+ DCHECK(r5.is(ElementTransitionAndStoreDescriptor::MapRegister()));
+ static Register registers[] = {receiver, name, r5, r6, r7};
+ return registers;
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/ic/s390/handler-compiler-s390.cc
@@ -0,0 +1,785 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/ic/call-optimization.h"
+#include "src/ic/handler-compiler.h"
+#include "src/ic/ic.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+
+
+void NamedLoadHandlerCompiler::GenerateLoadViaGetter(
+ MacroAssembler* masm, Handle<Map> map, Register receiver, Register holder,
+ int accessor_index, int expected_arguments, Register scratch) {
+ // ----------- S t a t e -------------
+ // -- r2 : receiver
+ // -- r4 : name
+ // -- lr : return address
+ // -----------------------------------
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ if (accessor_index >= 0) {
+ DCHECK(!holder.is(scratch));
+ DCHECK(!receiver.is(scratch));
+ // Call the JavaScript getter with the receiver on the stack.
+ if (map->IsJSGlobalObjectMap()) {
+ // Swap in the global receiver.
+ __ LoadP(scratch,
+ FieldMemOperand(receiver, JSGlobalObject::kGlobalProxyOffset));
+ receiver = scratch;
+ }
+ __ Push(receiver);
+ ParameterCount actual(0);
+ ParameterCount expected(expected_arguments);
+ __ LoadAccessor(r3, holder, accessor_index, ACCESSOR_GETTER);
+ __ InvokeFunction(r3, expected, actual, CALL_FUNCTION, NullCallWrapper());
+ } else {
+ // If we generate a global code snippet for deoptimization only, remember
+ // the place to continue after deoptimization.
+ masm->isolate()->heap()->SetGetterStubDeoptPCOffset(masm->pc_offset());
+ }
+
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ }
+ __ Ret();
+}
+
+
+void NamedStoreHandlerCompiler::GenerateStoreViaSetter(
+ MacroAssembler* masm, Handle<Map> map, Register receiver, Register holder,
+ int accessor_index, int expected_arguments, Register scratch) {
+ // ----------- S t a t e -------------
+ // -- lr : return address
+ // -----------------------------------
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Save value register, so we can restore it later.
+ __ Push(value());
+
+ if (accessor_index >= 0) {
+ DCHECK(!holder.is(scratch));
+ DCHECK(!receiver.is(scratch));
+ DCHECK(!value().is(scratch));
+ // Call the JavaScript setter with receiver and value on the stack.
+ if (map->IsJSGlobalObjectMap()) {
+ // Swap in the global receiver.
+ __ LoadP(scratch,
+ FieldMemOperand(receiver, JSGlobalObject::kGlobalProxyOffset));
+ receiver = scratch;
+ }
+ __ Push(receiver, value());
+ ParameterCount actual(1);
+ ParameterCount expected(expected_arguments);
+ __ LoadAccessor(r3, holder, accessor_index, ACCESSOR_SETTER);
+ __ InvokeFunction(r3, expected, actual, CALL_FUNCTION, NullCallWrapper());
+ } else {
+ // If we generate a global code snippet for deoptimization only, remember
+ // the place to continue after deoptimization.
+ masm->isolate()->heap()->SetSetterStubDeoptPCOffset(masm->pc_offset());
+ }
+
+ // We have to return the passed value, not the return value of the setter.
+ __ Pop(r2);
+
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ }
+ __ Ret();
+}
+
+
+void PropertyHandlerCompiler::PushVectorAndSlot(Register vector,
+ Register slot) {
+ MacroAssembler* masm = this->masm();
+ __ Push(vector, slot);
+}
+
+
+void PropertyHandlerCompiler::PopVectorAndSlot(Register vector, Register slot) {
+ MacroAssembler* masm = this->masm();
+ __ Pop(vector, slot);
+}
+
+
+void PropertyHandlerCompiler::DiscardVectorAndSlot() {
+ MacroAssembler* masm = this->masm();
+ // Remove vector and slot.
+ __ la(sp, MemOperand(sp, 2 * kPointerSize));
+}
+
+
+void PropertyHandlerCompiler::GenerateDictionaryNegativeLookup(
+ MacroAssembler* masm, Label* miss_label, Register receiver,
+ Handle<Name> name, Register scratch0, Register scratch1) {
+ DCHECK(name->IsUniqueName());
+ DCHECK(!receiver.is(scratch0));
+ Counters* counters = masm->isolate()->counters();
+ __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1);
+ __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1);
+
+ Label done;
+
+ const int kInterceptorOrAccessCheckNeededMask =
+ (1 << Map::kHasNamedInterceptor) | (1 << Map::kIsAccessCheckNeeded);
+
+ // Bail out if the receiver has a named interceptor or requires access checks.
+ Register map = scratch1;
+ __ LoadP(map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ LoadlB(scratch0, FieldMemOperand(map, Map::kBitFieldOffset));
+ __ AndP(r0, scratch0, Operand(kInterceptorOrAccessCheckNeededMask));
+ __ bne(miss_label);
+
+ // Check that receiver is a JSObject.
+ // TODO(joransiu): Merge into SI compare
+ __ LoadlB(scratch0, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ __ CmpP(scratch0, Operand(FIRST_SPEC_OBJECT_TYPE));
+ __ blt(miss_label);
+
+ // Load properties array.
+ Register properties = scratch0;
+ __ LoadP(properties, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+ // Check that the properties array is a dictionary.
+ __ LoadP(map, FieldMemOperand(properties, HeapObject::kMapOffset));
+ __ CompareRoot(map, Heap::kHashTableMapRootIndex);
+ __ bne(miss_label);
+
+ // Restore the temporarily used register.
+ __ LoadP(properties, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+
+
+ NameDictionaryLookupStub::GenerateNegativeLookup(
+ masm, miss_label, &done, receiver, properties, name, scratch1);
+ __ bind(&done);
+ __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1);
+}
+
+
+void NamedLoadHandlerCompiler::GenerateDirectLoadGlobalFunctionPrototype(
+ MacroAssembler* masm, int index, Register result, Label* miss) {
+ const int offset = Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX);
+ __ LoadP(result, MemOperand(cp, offset));
+ __ LoadP(result, FieldMemOperand(result, GlobalObject::kNativeContextOffset));
+ __ LoadP(result, MemOperand(result, Context::SlotOffset(index)));
+ // Load its initial map. The global functions all have initial maps.
+ __ LoadP(result,
+ FieldMemOperand(result, JSFunction::kPrototypeOrInitialMapOffset));
+ // Load the prototype from the initial map.
+ __ LoadP(result, FieldMemOperand(result, Map::kPrototypeOffset));
+}
+
+
+void NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(
+ MacroAssembler* masm, Register receiver, Register scratch1,
+ Register scratch2, Label* miss_label) {
+ __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label);
+ __ LoadRR(r2, scratch1);
+ __ Ret();
+}
+
+
+// Generate code to check that a global property cell is empty. Create
+// the property cell at compilation time if no cell exists for the
+// property.
+void PropertyHandlerCompiler::GenerateCheckPropertyCell(
+ MacroAssembler* masm, Handle<JSGlobalObject> global, Handle<Name> name,
+ Register scratch, Label* miss) {
+ Handle<PropertyCell> cell = JSGlobalObject::EnsurePropertyCell(global, name);
+ DCHECK(cell->value()->IsTheHole());
+ Handle<WeakCell> weak_cell = masm->isolate()->factory()->NewWeakCell(cell);
+ __ LoadWeakValue(scratch, weak_cell, miss);
+ __ LoadP(scratch, FieldMemOperand(scratch, PropertyCell::kValueOffset));
+ __ CompareRoot(scratch, Heap::kTheHoleValueRootIndex);
+ __ bne(miss);
+}
+
+
+static void PushInterceptorArguments(MacroAssembler* masm, Register receiver,
+ Register holder, Register name,
+ Handle<JSObject> holder_obj) {
+ STATIC_ASSERT(NamedLoadHandlerCompiler::kInterceptorArgsNameIndex == 0);
+ STATIC_ASSERT(NamedLoadHandlerCompiler::kInterceptorArgsThisIndex == 1);
+ STATIC_ASSERT(NamedLoadHandlerCompiler::kInterceptorArgsHolderIndex == 2);
+ STATIC_ASSERT(NamedLoadHandlerCompiler::kInterceptorArgsLength == 3);
+ __ Push(name);
+ __ Push(receiver);
+ __ Push(holder);
+}
+
+
+static void CompileCallLoadPropertyWithInterceptor(
+ MacroAssembler* masm, Register receiver, Register holder, Register name,
+ Handle<JSObject> holder_obj, IC::UtilityId id) {
+ PushInterceptorArguments(masm, receiver, holder, name, holder_obj);
+ __ CallExternalReference(ExternalReference(IC_Utility(id), masm->isolate()),
+ NamedLoadHandlerCompiler::kInterceptorArgsLength);
+}
+
+
+// Generate call to api function.
+void PropertyHandlerCompiler::GenerateApiAccessorCall(
+ MacroAssembler* masm, const CallOptimization& optimization,
+ Handle<Map> receiver_map, Register receiver, Register scratch_in,
+ bool is_store, Register store_parameter, Register accessor_holder,
+ int accessor_index) {
+ DCHECK(!accessor_holder.is(scratch_in));
+ DCHECK(!receiver.is(scratch_in));
+ __ Push(receiver);
+ // Write the arguments to stack frame.
+ if (is_store) {
+ DCHECK(!receiver.is(store_parameter));
+ DCHECK(!scratch_in.is(store_parameter));
+ __ Push(store_parameter);
+ }
+ DCHECK(optimization.is_simple_api_call());
+
+ // Abi for CallApiFunctionStub.
+ Register callee = r2;
+ Register data = r6;
+ Register holder = r4;
+ Register api_function_address = r3;
+
+ // Put callee in place.
+ __ LoadAccessor(callee, accessor_holder, accessor_index,
+ is_store ? ACCESSOR_SETTER : ACCESSOR_GETTER);
+
+ // Put holder in place.
+ CallOptimization::HolderLookup holder_lookup;
+ int holder_depth = 0;
+ optimization.LookupHolderOfExpectedType(receiver_map, &holder_lookup,
+ &holder_depth);
+ switch (holder_lookup) {
+ case CallOptimization::kHolderIsReceiver:
+ __ Move(holder, receiver);
+ break;
+ case CallOptimization::kHolderFound:
+ __ LoadP(holder, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ LoadP(holder, FieldMemOperand(holder, Map::kPrototypeOffset));
+ for (int i = 1; i < holder_depth; i++) {
+ __ LoadP(holder, FieldMemOperand(holder, HeapObject::kMapOffset));
+ __ LoadP(holder, FieldMemOperand(holder, Map::kPrototypeOffset));
+ }
+ break;
+ case CallOptimization::kHolderNotFound:
+ UNREACHABLE();
+ break;
+ }
+
+ Isolate* isolate = masm->isolate();
+ Handle<CallHandlerInfo> api_call_info = optimization.api_call_info();
+ bool call_data_undefined = false;
+ // Put call data in place.
+ if (api_call_info->data()->IsUndefined()) {
+ call_data_undefined = true;
+ __ LoadRoot(data, Heap::kUndefinedValueRootIndex);
+ } else {
+ __ LoadP(data,
+ FieldMemOperand(callee, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(data,
+ FieldMemOperand(data, SharedFunctionInfo::kFunctionDataOffset));
+ __ LoadP(data,
+ FieldMemOperand(data, FunctionTemplateInfo::kCallCodeOffset));
+ __ LoadP(data, FieldMemOperand(data, CallHandlerInfo::kDataOffset));
+ }
+
+ // Put api_function_address in place.
+ Address function_address = v8::ToCData<Address>(api_call_info->callback());
+ ApiFunction fun(function_address);
+ ExternalReference::Type type = ExternalReference::DIRECT_API_CALL;
+ ExternalReference ref = ExternalReference(&fun, type, masm->isolate());
+ __ mov(api_function_address, Operand(ref));
+
+ // Jump to stub.
+ CallApiAccessorStub stub(isolate, is_store, call_data_undefined);
+ __ TailCallStub(&stub);
+}
+
+
+void NamedStoreHandlerCompiler::GenerateSlow(MacroAssembler* masm) {
+ // Push receiver, key and value for runtime call.
+ __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
+ StoreDescriptor::ValueRegister());
+
+ // The slow case calls into the runtime to complete the store without causing
+ // an IC miss that would otherwise cause a transition to the generic stub.
+ ExternalReference ref =
+ ExternalReference(IC_Utility(IC::kStoreIC_Slow), masm->isolate());
+ __ TailCallExternalReference(ref, 3, 1);
+}
+
+
+void ElementHandlerCompiler::GenerateStoreSlow(MacroAssembler* masm) {
+ // Push receiver, key and value for runtime call.
+ __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
+ StoreDescriptor::ValueRegister());
+
+ // The slow case calls into the runtime to complete the store without causing
+ // an IC miss that would otherwise cause a transition to the generic stub.
+ ExternalReference ref =
+ ExternalReference(IC_Utility(IC::kKeyedStoreIC_Slow), masm->isolate());
+ __ TailCallExternalReference(ref, 3, 1);
+}
+
+
+#undef __
+#define __ ACCESS_MASM(masm())
+
+
+void NamedStoreHandlerCompiler::GenerateRestoreName(Label* label,
+ Handle<Name> name) {
+ if (!label->is_unused()) {
+ __ bind(label);
+ __ mov(this->name(), Operand(name));
+ }
+}
+
+
+void NamedStoreHandlerCompiler::GenerateRestoreName(Handle<Name> name) {
+ __ mov(this->name(), Operand(name));
+}
+
+
+void NamedStoreHandlerCompiler::GenerateRestoreMap(Handle<Map> transition,
+ Register scratch,
+ Label* miss) {
+ Handle<WeakCell> cell = Map::WeakCellForMap(transition);
+ Register map_reg = StoreTransitionDescriptor::MapRegister();
+ DCHECK(!map_reg.is(scratch));
+ __ LoadWeakValue(map_reg, cell, miss);
+ if (transition->CanBeDeprecated()) {
+ __ LoadlW(scratch, FieldMemOperand(map_reg, Map::kBitField3Offset));
+ __ DecodeField<Map::Deprecated>(r0, scratch);
+ __ bne(miss);
+ }
+}
+
+
+void NamedStoreHandlerCompiler::GenerateConstantCheck(Register map_reg,
+ int descriptor,
+ Register value_reg,
+ Register scratch,
+ Label* miss_label) {
+ DCHECK(!map_reg.is(scratch));
+ DCHECK(!map_reg.is(value_reg));
+ DCHECK(!value_reg.is(scratch));
+ __ LoadInstanceDescriptors(map_reg, scratch);
+ __ CmpP(value_reg, FieldMemOperand(
+ scratch, DescriptorArray::GetValueOffset(descriptor)));
+ __ bne(miss_label);
+}
+
+
+void NamedStoreHandlerCompiler::GenerateFieldTypeChecks(HeapType* field_type,
+ Register value_reg,
+ Label* miss_label) {
+ Register map_reg = scratch1();
+ Register scratch = scratch2();
+ DCHECK(!value_reg.is(map_reg));
+ DCHECK(!value_reg.is(scratch));
+ __ JumpIfSmi(value_reg, miss_label);
+ HeapType::Iterator<Map> it = field_type->Classes();
+ if (!it.Done()) {
+ __ LoadP(map_reg, FieldMemOperand(value_reg, HeapObject::kMapOffset));
+ Label do_store;
+ while (true) {
+ __ CmpWeakValue(map_reg, Map::WeakCellForMap(it.Current()), scratch);
+ it.Advance();
+ if (it.Done()) {
+ __ bne(miss_label);
+ break;
+ }
+ __ beq(&do_store);
+ }
+ __ bind(&do_store);
+ }
+}
+
+
+Register PropertyHandlerCompiler::CheckPrototypes(
+ Register object_reg, Register holder_reg, Register scratch1,
+ Register scratch2, Handle<Name> name, Label* miss, PrototypeCheckType check,
+ ReturnHolder return_what) {
+ Handle<Map> receiver_map = map();
+
+ // Make sure there's no overlap between holder and object registers.
+ DCHECK(!scratch1.is(object_reg) && !scratch1.is(holder_reg));
+ DCHECK(!scratch2.is(object_reg) && !scratch2.is(holder_reg) &&
+ !scratch2.is(scratch1));
+
+ if (FLAG_eliminate_prototype_chain_checks) {
+ Handle<Cell> validity_cell =
+ Map::GetOrCreatePrototypeChainValidityCell(receiver_map, isolate());
+ if (!validity_cell.is_null()) {
+ DCHECK_EQ(Smi::FromInt(Map::kPrototypeChainValid),
+ validity_cell->value());
+ __ mov(scratch1, Operand(validity_cell));
+ __ LoadP(scratch1, FieldMemOperand(scratch1, Cell::kValueOffset));
+ __ CmpSmiLiteral(scratch1, Smi::FromInt(Map::kPrototypeChainValid), r0);
+ __ bne(miss);
+ }
+
+ // The prototype chain of primitives (and their JSValue wrappers) depends
+ // on the native context, which can't be guarded by validity cells.
+ // |object_reg| holds the native context specific prototype in this case;
+ // we need to check its map.
+ if (check == CHECK_ALL_MAPS) {
+ __ LoadP(scratch1, FieldMemOperand(object_reg, HeapObject::kMapOffset));
+ Handle<WeakCell> cell = Map::WeakCellForMap(receiver_map);
+ __ CmpWeakValue(scratch1, cell, scratch2);
+ __ b(ne, miss);
+ }
+ }
+
+ // Keep track of the current object in register reg.
+ Register reg = object_reg;
+ int depth = 0;
+
+ Handle<JSObject> current = Handle<JSObject>::null();
+ if (receiver_map->IsJSGlobalObjectMap()) {
+ current = isolate()->global_object();
+ }
+ // Check access rights to the global object. This has to happen after
+ // the map check so that we know that the object is actually a global
+ // object.
+ // This allows us to install generated handlers for accesses to the
+ // global proxy (as opposed to using slow ICs). See corresponding code
+ // in LookupForRead().
+ if (receiver_map->IsJSGlobalProxyMap()) {
+ __ CheckAccessGlobalProxy(reg, scratch2, miss);
+ }
+
+ Handle<JSObject> prototype = Handle<JSObject>::null();
+ Handle<Map> current_map = receiver_map;
+ Handle<Map> holder_map(holder()->map());
+ // Traverse the prototype chain and check the maps in the prototype chain for
+ // fast and global objects or do negative lookup for normal objects.
+ while (!current_map.is_identical_to(holder_map)) {
+ ++depth;
+
+ // Only global objects and objects that do not require access
+ // checks are allowed in stubs.
+ DCHECK(current_map->IsJSGlobalProxyMap() ||
+ !current_map->is_access_check_needed());
+
+ prototype = handle(JSObject::cast(current_map->prototype()));
+ if (current_map->is_dictionary_map() &&
+ !current_map->IsJSGlobalObjectMap()) {
+ DCHECK(!current_map->IsJSGlobalProxyMap()); // Proxy maps are fast.
+ if (!name->IsUniqueName()) {
+ DCHECK(name->IsString());
+ name = factory()->InternalizeString(Handle<String>::cast(name));
+ }
+ DCHECK(current.is_null() ||
+ current->property_dictionary()->FindEntry(name) ==
+ NameDictionary::kNotFound);
+
+ if (FLAG_eliminate_prototype_chain_checks && depth > 1) {
+ // TODO(jkummerow): Cache and re-use weak cell.
+ __ LoadWeakValue(reg, isolate()->factory()->NewWeakCell(current), miss);
+ }
+ GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1,
+ scratch2);
+ if (!FLAG_eliminate_prototype_chain_checks) {
+ __ LoadP(scratch1, FieldMemOperand(reg, HeapObject::kMapOffset));
+ __ LoadP(holder_reg, FieldMemOperand(scratch1, Map::kPrototypeOffset));
+ }
+ } else {
+ Register map_reg = scratch1;
+ if (!FLAG_eliminate_prototype_chain_checks) {
+ __ LoadP(map_reg, FieldMemOperand(reg, HeapObject::kMapOffset));
+ }
+ if (current_map->IsJSGlobalObjectMap()) {
+ GenerateCheckPropertyCell(masm(), Handle<JSGlobalObject>::cast(current),
+ name, scratch2, miss);
+ } else if (!FLAG_eliminate_prototype_chain_checks &&
+ (depth != 1 || check == CHECK_ALL_MAPS)) {
+ Handle<WeakCell> cell = Map::WeakCellForMap(current_map);
+ __ CmpWeakValue(map_reg, cell, scratch2);
+ __ bne(miss);
+ }
+ if (!FLAG_eliminate_prototype_chain_checks) {
+ __ LoadP(holder_reg, FieldMemOperand(map_reg, Map::kPrototypeOffset));
+ }
+ }
+
+ reg = holder_reg; // From now on the object will be in holder_reg.
+ // Go to the next object in the prototype chain.
+ current = prototype;
+ current_map = handle(current->map());
+ }
+
+ DCHECK(!current_map->IsJSGlobalProxyMap());
+
+ // Log the check depth.
+ LOG(isolate(), IntEvent("check-maps-depth", depth + 1));
+
+ if (!FLAG_eliminate_prototype_chain_checks &&
+ (depth != 0 || check == CHECK_ALL_MAPS)) {
+ // Check the holder map.
+ __ LoadP(scratch1, FieldMemOperand(reg, HeapObject::kMapOffset));
+ Handle<WeakCell> cell = Map::WeakCellForMap(current_map);
+ __ CmpWeakValue(scratch1, cell, scratch2);
+ __ bne(miss);
+ }
+
+ bool return_holder = return_what == RETURN_HOLDER;
+ if (FLAG_eliminate_prototype_chain_checks && return_holder && depth != 0) {
+ __ LoadWeakValue(reg, isolate()->factory()->NewWeakCell(current), miss);
+ }
+
+ // Return the register containing the holder.
+ return return_holder ? reg : no_reg;
+}
+
+
+void NamedLoadHandlerCompiler::FrontendFooter(Handle<Name> name, Label* miss) {
+ if (!miss->is_unused()) {
+ Label success;
+ __ b(&success);
+ __ bind(miss);
+ if (IC::ICUseVector(kind())) {
+ DCHECK(kind() == Code::LOAD_IC);
+ PopVectorAndSlot();
+ }
+ TailCallBuiltin(masm(), MissBuiltin(kind()));
+ __ bind(&success);
+ }
+}
+
+
+void NamedStoreHandlerCompiler::FrontendFooter(Handle<Name> name, Label* miss) {
+ if (!miss->is_unused()) {
+ Label success;
+ __ b(&success);
+ GenerateRestoreName(miss, name);
+ TailCallBuiltin(masm(), MissBuiltin(kind()));
+ __ bind(&success);
+ }
+}
+
+
+void NamedLoadHandlerCompiler::GenerateLoadConstant(Handle<Object> value) {
+ // Return the constant value.
+ __ Move(r2, value);
+ __ Ret();
+}
+
+
+void NamedLoadHandlerCompiler::GenerateLoadCallback(
+ Register reg, Handle<ExecutableAccessorInfo> callback) {
+ // Build AccessorInfo::args_ list on the stack and push property name below
+ // the exit frame to make GC aware of them and store pointers to them.
+ STATIC_ASSERT(PropertyCallbackArguments::kHolderIndex == 0);
+ STATIC_ASSERT(PropertyCallbackArguments::kIsolateIndex == 1);
+ STATIC_ASSERT(PropertyCallbackArguments::kReturnValueDefaultValueIndex == 2);
+ STATIC_ASSERT(PropertyCallbackArguments::kReturnValueOffset == 3);
+ STATIC_ASSERT(PropertyCallbackArguments::kDataIndex == 4);
+ STATIC_ASSERT(PropertyCallbackArguments::kThisIndex == 5);
+ STATIC_ASSERT(PropertyCallbackArguments::kArgsLength == 6);
+ DCHECK(!scratch2().is(reg));
+ DCHECK(!scratch3().is(reg));
+ DCHECK(!scratch4().is(reg));
+ __ Push(receiver());
+ // Push data from ExecutableAccessorInfo.
+ Handle<Object> data(callback->data(), isolate());
+ if (data->IsUndefined() || data->IsSmi()) {
+ __ Move(scratch3(), data);
+ } else {
+ Handle<WeakCell> cell =
+ isolate()->factory()->NewWeakCell(Handle<HeapObject>::cast(data));
+ // The callback is alive if this instruction is executed,
+ // so the weak cell is not cleared and points to data.
+ __ GetWeakValue(scratch3(), cell);
+ }
+ __ Push(scratch3());
+ __ LoadRoot(scratch3(), Heap::kUndefinedValueRootIndex);
+ __ LoadRR(scratch4(), scratch3());
+ __ Push(scratch3(), scratch4());
+ __ mov(scratch4(), Operand(ExternalReference::isolate_address(isolate())));
+ __ Push(scratch4(), reg);
+ __ Push(name());
+
+ // Abi for CallApiGetter
+ Register getter_address_reg = ApiGetterDescriptor::function_address();
+
+ Address getter_address = v8::ToCData<Address>(callback->getter());
+ ApiFunction fun(getter_address);
+ ExternalReference::Type type = ExternalReference::DIRECT_GETTER_CALL;
+ ExternalReference ref = ExternalReference(&fun, type, isolate());
+ __ mov(getter_address_reg, Operand(ref));
+
+ CallApiGetterStub stub(isolate());
+ __ TailCallStub(&stub);
+}
+
+
+void NamedLoadHandlerCompiler::GenerateLoadInterceptorWithFollowup(
+ LookupIterator* it, Register holder_reg) {
+ DCHECK(holder()->HasNamedInterceptor());
+ DCHECK(!holder()->GetNamedInterceptor()->getter()->IsUndefined());
+
+ // Compile the interceptor call, followed by inline code to load the
+ // property from further up the prototype chain if the call fails.
+ // Check that the maps haven't changed.
+ DCHECK(holder_reg.is(receiver()) || holder_reg.is(scratch1()));
+
+ // Preserve the receiver register explicitly whenever it is different from the
+ // holder and it is needed should the interceptor return without any result.
+ // The ACCESSOR case needs the receiver to be passed into C++ code, the FIELD
+ // case might cause a miss during the prototype check.
+ bool must_perform_prototype_check =
+ !holder().is_identical_to(it->GetHolder<JSObject>());
+ bool must_preserve_receiver_reg =
+ !receiver().is(holder_reg) &&
+ (it->state() == LookupIterator::ACCESSOR || must_perform_prototype_check);
+
+ // Save necessary data before invoking an interceptor.
+ // Requires a frame to make GC aware of pushed pointers.
+ {
+ FrameScope frame_scope(masm(), StackFrame::INTERNAL);
+ if (must_preserve_receiver_reg) {
+ __ Push(receiver(), holder_reg, this->name());
+ } else {
+ __ Push(holder_reg, this->name());
+ }
+ InterceptorVectorSlotPush(holder_reg);
+ // Invoke an interceptor. Note: map checks from receiver to
+ // interceptor's holder has been compiled before (see a caller
+ // of this method.)
+ CompileCallLoadPropertyWithInterceptor(
+ masm(), receiver(), holder_reg, this->name(), holder(),
+ IC::kLoadPropertyWithInterceptorOnly);
+
+ // Check if interceptor provided a value for property. If it's
+ // the case, return immediately.
+ Label interceptor_failed;
+ __ CompareRoot(r2, Heap::kNoInterceptorResultSentinelRootIndex);
+ __ beq(&interceptor_failed, Label::kNear);
+ frame_scope.GenerateLeaveFrame();
+ __ Ret();
+
+ __ bind(&interceptor_failed);
+ InterceptorVectorSlotPop(holder_reg);
+ __ Pop(this->name());
+ __ Pop(holder_reg);
+ if (must_preserve_receiver_reg) {
+ __ Pop(receiver());
+ }
+ // Leave the internal frame.
+ }
+
+ GenerateLoadPostInterceptor(it, holder_reg);
+}
+
+
+void NamedLoadHandlerCompiler::GenerateLoadInterceptor(Register holder_reg) {
+ // Call the runtime system to load the interceptor.
+ DCHECK(holder()->HasNamedInterceptor());
+ DCHECK(!holder()->GetNamedInterceptor()->getter()->IsUndefined());
+ PushInterceptorArguments(masm(), receiver(), holder_reg, this->name(),
+ holder());
+
+ ExternalReference ref = ExternalReference(
+ IC_Utility(IC::kLoadPropertyWithInterceptor), isolate());
+ __ TailCallExternalReference(
+ ref, NamedLoadHandlerCompiler::kInterceptorArgsLength, 1);
+}
+
+
+Handle<Code> NamedStoreHandlerCompiler::CompileStoreCallback(
+ Handle<JSObject> object, Handle<Name> name,
+ Handle<ExecutableAccessorInfo> callback) {
+ Register holder_reg = Frontend(name);
+
+ __ Push(receiver(), holder_reg); // receiver
+
+ // If the callback cannot leak, then push the callback directly,
+ // otherwise wrap it in a weak cell.
+ if (callback->data()->IsUndefined() || callback->data()->IsSmi()) {
+ __ mov(ip, Operand(callback));
+ } else {
+ Handle<WeakCell> cell = isolate()->factory()->NewWeakCell(callback);
+ __ mov(ip, Operand(cell));
+ }
+ __ Push(ip);
+ __ mov(ip, Operand(name));
+ __ Push(ip, value());
+
+ // Do tail-call to the runtime system.
+ ExternalReference store_callback_property =
+ ExternalReference(IC_Utility(IC::kStoreCallbackProperty), isolate());
+ __ TailCallExternalReference(store_callback_property, 5, 1);
+
+ // Return the generated code.
+ return GetCode(kind(), Code::FAST, name);
+}
+
+
+Handle<Code> NamedStoreHandlerCompiler::CompileStoreInterceptor(
+ Handle<Name> name) {
+ __ Push(receiver(), this->name(), value());
+
+ // Do tail-call to the runtime system.
+ ExternalReference store_ic_property = ExternalReference(
+ IC_Utility(IC::kStorePropertyWithInterceptor), isolate());
+ __ TailCallExternalReference(store_ic_property, 3, 1);
+
+ // Return the generated code.
+ return GetCode(kind(), Code::FAST, name);
+}
+
+
+Register NamedStoreHandlerCompiler::value() {
+ return StoreDescriptor::ValueRegister();
+}
+
+
+Handle<Code> NamedLoadHandlerCompiler::CompileLoadGlobal(
+ Handle<PropertyCell> cell, Handle<Name> name, bool is_configurable) {
+ Label miss;
+ if (IC::ICUseVector(kind())) {
+ PushVectorAndSlot();
+ }
+ FrontendHeader(receiver(), name, &miss, DONT_RETURN_ANYTHING);
+
+ // Get the value from the cell.
+ Register result = StoreDescriptor::ValueRegister();
+ Handle<WeakCell> weak_cell = factory()->NewWeakCell(cell);
+ __ LoadWeakValue(result, weak_cell, &miss);
+ __ LoadP(result, FieldMemOperand(result, PropertyCell::kValueOffset));
+
+ // Check for deleted property if property can actually be deleted.
+ if (is_configurable) {
+ __ CompareRoot(result, Heap::kTheHoleValueRootIndex);
+ __ beq(&miss);
+ }
+
+ Counters* counters = isolate()->counters();
+ __ IncrementCounter(counters->named_load_global_stub(), 1, r3, r5);
+ if (IC::ICUseVector(kind())) {
+ DiscardVectorAndSlot();
+ }
+ __ Ret();
+
+ FrontendFooter(name, &miss);
+
+ // Return the generated code.
+ return GetCode(kind(), Code::NORMAL, name);
+}
+
+
+#undef __
+}
+} // namespace v8::internal
+
+#endif // V8_TARGET_ARCH_ARM
--- /dev/null
+++ b/deps/v8/src/ic/s390/ic-compiler-s390.cc
@@ -0,0 +1,135 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/ic/ic.h"
+#include "src/ic/ic-compiler.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+
+
+void PropertyICCompiler::GenerateRuntimeSetProperty(
+ MacroAssembler* masm, LanguageMode language_mode) {
+ __ mov(r0, Operand(Smi::FromInt(language_mode)));
+ __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
+ StoreDescriptor::ValueRegister(), r0);
+
+ // Do tail-call to runtime routine.
+ __ TailCallRuntime(Runtime::kSetProperty, 4, 1);
+}
+
+
+#undef __
+#define __ ACCESS_MASM(masm())
+
+
+Handle<Code> PropertyICCompiler::CompilePolymorphic(MapHandleList* maps,
+ CodeHandleList* handlers,
+ Handle<Name> name,
+ Code::StubType type,
+ IcCheckType check) {
+ Label miss;
+
+ if (check == PROPERTY &&
+ (kind() == Code::KEYED_LOAD_IC || kind() == Code::KEYED_STORE_IC)) {
+ // In case we are compiling an IC for dictionary loads or stores, just
+ // check whether the name is unique.
+ if (name.is_identical_to(isolate()->factory()->normal_ic_symbol())) {
+ // Keyed loads with dictionaries shouldn't be here, they go generic.
+ // The DCHECK is to protect assumptions when --vector-ics is on.
+ DCHECK(kind() != Code::KEYED_LOAD_IC);
+ Register tmp = scratch1();
+ __ JumpIfSmi(this->name(), &miss);
+ __ LoadP(tmp, FieldMemOperand(this->name(), HeapObject::kMapOffset));
+ __ LoadlB(tmp, FieldMemOperand(tmp, Map::kInstanceTypeOffset));
+ __ JumpIfNotUniqueNameInstanceType(tmp, &miss);
+ } else {
+ __ CmpP(this->name(), Operand(name));
+ __ bne(&miss);
+ }
+ }
+
+ Label number_case;
+ Label* smi_target = IncludesNumberMap(maps) ? &number_case : &miss;
+ __ JumpIfSmi(receiver(), smi_target);
+
+ // Polymorphic keyed stores may use the map register
+ Register map_reg = scratch1();
+ DCHECK(kind() != Code::KEYED_STORE_IC ||
+ map_reg.is(ElementTransitionAndStoreDescriptor::MapRegister()));
+
+ int receiver_count = maps->length();
+ int number_of_handled_maps = 0;
+ __ LoadP(map_reg, FieldMemOperand(receiver(), HeapObject::kMapOffset));
+ for (int current = 0; current < receiver_count; ++current) {
+ Handle<Map> map = maps->at(current);
+ if (!map->is_deprecated()) {
+ number_of_handled_maps++;
+ Handle<WeakCell> cell = Map::WeakCellForMap(map);
+ __ CmpWeakValue(map_reg, cell, scratch2());
+ Label next;
+ __ bne(&next);
+ if (map->instance_type() == HEAP_NUMBER_TYPE) {
+ DCHECK(!number_case.is_unused());
+ __ bind(&number_case);
+ }
+ __ Jump(handlers->at(current), RelocInfo::CODE_TARGET);
+ __ bind(&next);
+ }
+ }
+ DCHECK(number_of_handled_maps != 0);
+
+ __ bind(&miss);
+ TailCallBuiltin(masm(), MissBuiltin(kind()));
+
+ // Return the generated code.
+ InlineCacheState state =
+ number_of_handled_maps > 1 ? POLYMORPHIC : MONOMORPHIC;
+ return GetCode(kind(), type, name, state);
+}
+
+
+Handle<Code> PropertyICCompiler::CompileKeyedStorePolymorphic(
+ MapHandleList* receiver_maps, CodeHandleList* handler_stubs,
+ MapHandleList* transitioned_maps) {
+ Label miss;
+ __ JumpIfSmi(receiver(), &miss);
+
+ int receiver_count = receiver_maps->length();
+ Register map_reg = scratch1();
+ __ LoadP(map_reg, FieldMemOperand(receiver(), HeapObject::kMapOffset));
+ for (int i = 0; i < receiver_count; ++i) {
+ Handle<WeakCell> cell = Map::WeakCellForMap(receiver_maps->at(i));
+ __ CmpWeakValue(map_reg, cell, scratch2());
+ if (transitioned_maps->at(i).is_null()) {
+ __ Jump(handler_stubs->at(i), RelocInfo::CODE_TARGET, eq);
+ } else {
+ Label next_map;
+ __ bne(&next_map);
+ Handle<WeakCell> cell = Map::WeakCellForMap(transitioned_maps->at(i));
+ __ LoadWeakValue(transition_map(), cell, &miss);
+ __ Jump(handler_stubs->at(i), RelocInfo::CODE_TARGET, al);
+ __ bind(&next_map);
+ }
+ }
+
+ __ bind(&miss);
+ TailCallBuiltin(masm(), MissBuiltin(kind()));
+
+ // Return the generated code.
+ return GetCode(kind(), Code::NORMAL, factory()->empty_string(), POLYMORPHIC);
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/ic/s390/ic-s390.cc
@@ -0,0 +1,954 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/codegen.h"
+#include "src/ic/ic.h"
+#include "src/ic/ic-compiler.h"
+#include "src/ic/stub-cache.h"
+
+namespace v8 {
+namespace internal {
+
+
+// ----------------------------------------------------------------------------
+// Static IC stub generators.
+//
+
+#define __ ACCESS_MASM(masm)
+
+
+static void GenerateGlobalInstanceTypeCheck(MacroAssembler* masm, Register type,
+ Label* global_object) {
+ // Register usage:
+ // type: holds the receiver instance type on entry.
+ __ CmpP(type, Operand(JS_GLOBAL_OBJECT_TYPE));
+ __ beq(global_object);
+ __ CmpP(type, Operand(JS_BUILTINS_OBJECT_TYPE));
+ __ beq(global_object);
+ __ CmpP(type, Operand(JS_GLOBAL_PROXY_TYPE));
+ __ beq(global_object);
+}
+
+
+// Helper function used from LoadIC GenerateNormal.
+//
+// elements: Property dictionary. It is not clobbered if a jump to the miss
+// label is done.
+// name: Property name. It is not clobbered if a jump to the miss label is
+// done
+// result: Register for the result. It is only updated if a jump to the miss
+// label is not done. Can be the same as elements or name clobbering
+// one of these in the case of not jumping to the miss label.
+// The two scratch registers need to be different from elements, name and
+// result.
+// The generated code assumes that the receiver has slow properties,
+// is not a global object and does not have interceptors.
+static void GenerateDictionaryLoad(MacroAssembler* masm, Label* miss,
+ Register elements, Register name,
+ Register result, Register scratch1,
+ Register scratch2) {
+ // Main use of the scratch registers.
+ // scratch1: Used as temporary and to hold the capacity of the property
+ // dictionary.
+ // scratch2: Used as temporary.
+ Label done;
+
+ // Probe the dictionary.
+ NameDictionaryLookupStub::GeneratePositiveLookup(masm, miss, &done, elements,
+ name, scratch1, scratch2);
+
+ // If probing finds an entry check that the value is a normal
+ // property.
+ __ bind(&done); // scratch2 == elements + 4 * index
+ const int kElementsStartOffset =
+ NameDictionary::kHeaderSize +
+ NameDictionary::kElementsStartIndex * kPointerSize;
+ const int kDetailsOffset = kElementsStartOffset + 2 * kPointerSize;
+ __ LoadP(scratch1, FieldMemOperand(scratch2, kDetailsOffset));
+ __ LoadRR(r0, scratch2);
+ __ LoadSmiLiteral(scratch2, Smi::FromInt(PropertyDetails::TypeField::kMask));
+ __ AndP(scratch2, scratch1/*, SetRC*/);
+ // Should be okay to remove RC
+ __ bne(miss /*, cr0*/);
+ __ LoadRR(scratch2, r0);
+
+ // Get the value at the masked, scaled index and return.
+ __ LoadP(result,
+ FieldMemOperand(scratch2, kElementsStartOffset + 1 * kPointerSize));
+}
+
+
+// Helper function used from StoreIC::GenerateNormal.
+//
+// elements: Property dictionary. It is not clobbered if a jump to the miss
+// label is done.
+// name: Property name. It is not clobbered if a jump to the miss label is
+// done
+// value: The value to store.
+// The two scratch registers need to be different from elements, name and
+// result.
+// The generated code assumes that the receiver has slow properties,
+// is not a global object and does not have interceptors.
+static void GenerateDictionaryStore(MacroAssembler* masm, Label* miss,
+ Register elements, Register name,
+ Register value, Register scratch1,
+ Register scratch2) {
+ // Main use of the scratch registers.
+ // scratch1: Used as temporary and to hold the capacity of the property
+ // dictionary.
+ // scratch2: Used as temporary.
+ Label done;
+
+ // Probe the dictionary.
+ NameDictionaryLookupStub::GeneratePositiveLookup(masm, miss, &done, elements,
+ name, scratch1, scratch2);
+
+ // If probing finds an entry in the dictionary check that the value
+ // is a normal property that is not read only.
+ __ bind(&done); // scratch2 == elements + 4 * index
+ const int kElementsStartOffset =
+ NameDictionary::kHeaderSize +
+ NameDictionary::kElementsStartIndex * kPointerSize;
+ const int kDetailsOffset = kElementsStartOffset + 2 * kPointerSize;
+ int kTypeAndReadOnlyMask =
+ PropertyDetails::TypeField::kMask |
+ PropertyDetails::AttributesField::encode(READ_ONLY);
+ __ LoadP(scratch1, FieldMemOperand(scratch2, kDetailsOffset));
+ __ LoadRR(r0, scratch2);
+ __ LoadSmiLiteral(scratch2, Smi::FromInt(kTypeAndReadOnlyMask));
+ __ AndP(scratch2, scratch1/*, SetRC*/); // Should be OK to remove RC
+ __ bne(miss /*, cr0*/);
+ __ LoadRR(scratch2, r0);
+
+ // Store the value at the masked, scaled index and return.
+ const int kValueOffset = kElementsStartOffset + kPointerSize;
+ __ AddP(scratch2, Operand(kValueOffset - kHeapObjectTag));
+ __ StoreP(value, MemOperand(scratch2));
+
+ // Update the write barrier. Make sure not to clobber the value.
+ __ LoadRR(scratch1, value);
+ __ RecordWrite(elements, scratch2, scratch1, kLRHasNotBeenSaved,
+ kDontSaveFPRegs);
+}
+
+
+// Checks the receiver for special cases (value type, slow case bits).
+// Falls through for regular JS object.
+static void GenerateKeyedLoadReceiverCheck(MacroAssembler* masm,
+ Register receiver, Register map,
+ Register scratch,
+ int interceptor_bit, Label* slow) {
+ // Check that the object isn't a smi.
+ __ JumpIfSmi(receiver, slow);
+ // Get the map of the receiver.
+ __ LoadP(map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ // Check bit field.
+ __ LoadlB(scratch, FieldMemOperand(map, Map::kBitFieldOffset));
+ DCHECK(((1 << Map::kIsAccessCheckNeeded) | (1 << interceptor_bit)) < 0x8000);
+ __ mov(r0,
+ Operand((1 << Map::kIsAccessCheckNeeded) | (1 << interceptor_bit)));
+ __ AndP(r0, scratch);
+ __ bne(slow /*, cr0*/);
+ // Check that the object is some kind of JS object EXCEPT JS Value type.
+ // In the case that the object is a value-wrapper object,
+ // we enter the runtime system to make sure that indexing into string
+ // objects work as intended.
+ DCHECK(JS_OBJECT_TYPE > JS_VALUE_TYPE);
+ __ LoadlB(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ __ CmpP(scratch, Operand(JS_OBJECT_TYPE));
+ __ blt(slow);
+}
+
+
+// Loads an indexed element from a fast case array.
+static void GenerateFastArrayLoad(MacroAssembler* masm, Register receiver,
+ Register key, Register elements,
+ Register scratch1, Register scratch2,
+ Register result, Label* slow,
+ LanguageMode language_mode) {
+ // Register use:
+ //
+ // receiver - holds the receiver on entry.
+ // Unchanged unless 'result' is the same register.
+ //
+ // key - holds the smi key on entry.
+ // Unchanged unless 'result' is the same register.
+ //
+ // result - holds the result on exit if the load succeeded.
+ // Allowed to be the the same as 'receiver' or 'key'.
+ // Unchanged on bailout so 'receiver' and 'key' can be safely
+ // used by further computation.
+ //
+ // Scratch registers:
+ //
+ // elements - holds the elements of the receiver and its protoypes.
+ //
+ // scratch1 - used to hold elements length, bit fields, base addresses.
+ //
+ // scratch2 - used to hold maps, prototypes, and the loaded value.
+ Label check_prototypes, check_next_prototype;
+ Label done, in_bounds, absent;
+
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ AssertFastElements(elements);
+
+ // Check that the key (index) is within bounds.
+ __ LoadP(scratch1, FieldMemOperand(elements, FixedArray::kLengthOffset));
+ __ CmpLogicalP(key, scratch1);
+ __ blt(&in_bounds, Label::kNear);
+ // Out-of-bounds. Check the prototype chain to see if we can just return
+ // 'undefined'.
+ __ CmpP(key, Operand::Zero());
+ __ blt(slow); // Negative keys can't take the fast OOB path.
+ __ bind(&check_prototypes);
+ __ LoadP(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ bind(&check_next_prototype);
+ __ LoadP(scratch2, FieldMemOperand(scratch2, Map::kPrototypeOffset));
+ // scratch2: current prototype
+ __ CompareRoot(scratch2, Heap::kNullValueRootIndex);
+ __ beq(&absent, Label::kNear);
+ __ LoadP(elements, FieldMemOperand(scratch2, JSObject::kElementsOffset));
+ __ LoadP(scratch2, FieldMemOperand(scratch2, HeapObject::kMapOffset));
+ // elements: elements of current prototype
+ // scratch2: map of current prototype
+ __ CompareInstanceType(scratch2, scratch1, JS_OBJECT_TYPE);
+ __ blt(slow);
+ __ LoadlB(scratch1, FieldMemOperand(scratch2, Map::kBitFieldOffset));
+ __ AndP(r0, scratch1, Operand((1 << Map::kIsAccessCheckNeeded) |
+ (1 << Map::kHasIndexedInterceptor)));
+ __ bne(slow);
+ __ CompareRoot(elements, Heap::kEmptyFixedArrayRootIndex);
+ __ bne(slow);
+ __ jmp(&check_next_prototype);
+
+ __ bind(&absent);
+ if (is_strong(language_mode)) {
+ // Strong mode accesses must throw in this case, so call the runtime.
+ __ jmp(slow);
+ } else {
+ __ LoadRoot(result, Heap::kUndefinedValueRootIndex);
+ __ jmp(&done);
+ }
+
+ __ bind(&in_bounds);
+ // Fast case: Do the load.
+ __ AddP(scratch1, elements,
+ Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ // The key is a smi.
+ __ SmiToPtrArrayOffset(scratch2, key);
+ __ LoadP(scratch2, MemOperand(scratch2, scratch1));
+ __ CompareRoot(scratch2, Heap::kTheHoleValueRootIndex);
+ // In case the loaded value is the_hole we have to check the prototype chain.
+ __ beq(&check_prototypes);
+ __ LoadRR(result, scratch2);
+ __ bind(&done);
+}
+
+
+// Checks whether a key is an array index string or a unique name.
+// Falls through if a key is a unique name.
+static void GenerateKeyNameCheck(MacroAssembler* masm, Register key,
+ Register map, Register hash,
+ Label* index_string, Label* not_unique) {
+ // The key is not a smi.
+ Label unique;
+ // Is it a name?
+ __ CompareObjectType(key, map, hash, LAST_UNIQUE_NAME_TYPE);
+ __ bgt(not_unique);
+ STATIC_ASSERT(LAST_UNIQUE_NAME_TYPE == FIRST_NONSTRING_TYPE);
+ __ beq(&unique, Label::kNear);
+
+ // Is the string an array index, with cached numeric value?
+ __ LoadlW(hash, FieldMemOperand(key, Name::kHashFieldOffset));
+ __ mov(r7, Operand(Name::kContainsCachedArrayIndexMask));
+ __ AndP(r0, hash, r7);
+ __ beq(index_string);
+
+ // Is the string internalized? We know it's a string, so a single
+ // bit test is enough.
+ // map: key map
+ __ LoadlB(hash, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ STATIC_ASSERT(kInternalizedTag == 0);
+ __ tmll(hash, Operand(kIsNotInternalizedMask));
+ __ bne(not_unique);
+
+ __ bind(&unique);
+}
+
+
+void LoadIC::GenerateNormal(MacroAssembler* masm, LanguageMode language_mode) {
+ Register dictionary = r2;
+ DCHECK(!dictionary.is(LoadDescriptor::ReceiverRegister()));
+ DCHECK(!dictionary.is(LoadDescriptor::NameRegister()));
+
+ Label slow;
+
+ __ LoadP(dictionary, FieldMemOperand(LoadDescriptor::ReceiverRegister(),
+ JSObject::kPropertiesOffset));
+ GenerateDictionaryLoad(masm, &slow, dictionary,
+ LoadDescriptor::NameRegister(), r2, r5, r6);
+ __ Ret();
+
+ // Dictionary load failed, go slow (but don't miss).
+ __ bind(&slow);
+ GenerateRuntimeGetProperty(masm, language_mode);
+}
+
+
+// A register that isn't one of the parameters to the load ic.
+static const Register LoadIC_TempRegister() { return r5; }
+
+
+static void LoadIC_PushArgs(MacroAssembler* masm) {
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register name = LoadDescriptor::NameRegister();
+ Register slot = LoadDescriptor::SlotRegister();
+ Register vector = LoadWithVectorDescriptor::VectorRegister();
+
+ __ Push(receiver, name, slot, vector);
+}
+
+
+void LoadIC::GenerateMiss(MacroAssembler* masm) {
+ // The return address is in lr.
+ Isolate* isolate = masm->isolate();
+
+ DCHECK(!AreAliased(r6, r7, LoadWithVectorDescriptor::SlotRegister(),
+ LoadWithVectorDescriptor::VectorRegister()));
+ __ IncrementCounter(isolate->counters()->load_miss(), 1, r6, r7);
+
+ LoadIC_PushArgs(masm);
+
+ // Perform tail call to the entry.
+ ExternalReference ref = ExternalReference(IC_Utility(kLoadIC_Miss), isolate);
+ int arg_count = 4;
+ __ TailCallExternalReference(ref, arg_count, 1);
+}
+
+
+void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm,
+ LanguageMode language_mode) {
+ // The return address is in lr.
+
+ __ LoadRR(LoadIC_TempRegister(), LoadDescriptor::ReceiverRegister());
+ __ Push(LoadIC_TempRegister(), LoadDescriptor::NameRegister());
+
+ // Do tail-call to runtime routine.
+ __ TailCallRuntime(is_strong(language_mode) ? Runtime::kGetPropertyStrong
+ : Runtime::kGetProperty,
+ 2, 1);
+}
+
+
+void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) {
+ // The return address is in lr.
+ Isolate* isolate = masm->isolate();
+
+ DCHECK(!AreAliased(r6, r7, LoadWithVectorDescriptor::SlotRegister(),
+ LoadWithVectorDescriptor::VectorRegister()));
+ __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, r6, r7);
+
+ LoadIC_PushArgs(masm);
+
+ // Perform tail call to the entry.
+ ExternalReference ref =
+ ExternalReference(IC_Utility(kKeyedLoadIC_Miss), isolate);
+ int arg_count = 4;
+ __ TailCallExternalReference(ref, arg_count, 1);
+}
+
+
+void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm,
+ LanguageMode language_mode) {
+ // The return address is in lr.
+
+ __ Push(LoadDescriptor::ReceiverRegister(), LoadDescriptor::NameRegister());
+
+ // Do tail-call to runtime routine.
+ __ TailCallRuntime(is_strong(language_mode) ? Runtime::kKeyedGetPropertyStrong
+ : Runtime::kKeyedGetProperty,
+ 2, 1);
+}
+
+
+void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm,
+ LanguageMode language_mode) {
+ // The return address is in lr.
+ Label slow, check_name, index_smi, index_name, property_array_property;
+ Label probe_dictionary, check_number_dictionary;
+
+ Register key = LoadDescriptor::NameRegister();
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ DCHECK(key.is(r4));
+ DCHECK(receiver.is(r3));
+
+ Isolate* isolate = masm->isolate();
+
+ // Check that the key is a smi.
+ __ JumpIfNotSmi(key, &check_name);
+ __ bind(&index_smi);
+ // Now the key is known to be a smi. This place is also jumped to from below
+ // where a numeric string is converted to a smi.
+
+ GenerateKeyedLoadReceiverCheck(masm, receiver, r2, r5,
+ Map::kHasIndexedInterceptor, &slow);
+
+ // Check the receiver's map to see if it has fast elements.
+ __ CheckFastElements(r2, r5, &check_number_dictionary);
+
+ GenerateFastArrayLoad(masm, receiver, key, r2, r5, r6, r2, &slow,
+ language_mode);
+ __ IncrementCounter(isolate->counters()->keyed_load_generic_smi(), 1, r6, r5);
+ __ Ret();
+
+ __ bind(&check_number_dictionary);
+ __ LoadP(r6, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ LoadP(r5, FieldMemOperand(r6, JSObject::kMapOffset));
+
+ // Check whether the elements is a number dictionary.
+ // r5: elements map
+ // r6: elements
+ __ CompareRoot(r5, Heap::kHashTableMapRootIndex);
+ __ bne(&slow, Label::kNear);
+ __ SmiUntag(r2, key);
+ __ LoadFromNumberDictionary(&slow, r6, key, r2, r2, r5, r7);
+ __ Ret();
+
+ // Slow case, key and receiver still in r2 and r3.
+ __ bind(&slow);
+ __ IncrementCounter(isolate->counters()->keyed_load_generic_slow(), 1, r6,
+ r5);
+ GenerateRuntimeGetProperty(masm, language_mode);
+
+ __ bind(&check_name);
+ GenerateKeyNameCheck(masm, key, r2, r5, &index_name, &slow);
+
+ GenerateKeyedLoadReceiverCheck(masm, receiver, r2, r5,
+ Map::kHasNamedInterceptor, &slow);
+
+ // If the receiver is a fast-case object, check the stub cache. Otherwise
+ // probe the dictionary.
+ __ LoadP(r5, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+ __ LoadP(r6, FieldMemOperand(r5, HeapObject::kMapOffset));
+ __ CompareRoot(r6, Heap::kHashTableMapRootIndex);
+ __ beq(&probe_dictionary);
+
+
+ // The handlers in the stub cache expect a vector and slot. Since we won't
+ // change the IC from any downstream misses, a dummy vector can be used.
+ Register vector = LoadWithVectorDescriptor::VectorRegister();
+ Register slot = LoadWithVectorDescriptor::SlotRegister();
+ DCHECK(!AreAliased(vector, slot, r6, r7, r8, r9));
+ Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
+ masm->isolate()->factory()->keyed_load_dummy_vector());
+ int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
+ __ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex);
+ __ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
+
+ Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
+ Code::ComputeHandlerFlags(Code::LOAD_IC));
+ masm->isolate()->stub_cache()->GenerateProbe(
+ masm, Code::KEYED_LOAD_IC, flags, false, receiver, key, r6, r7, r8, r9);
+ // Cache miss.
+ GenerateMiss(masm);
+
+ // Do a quick inline probe of the receiver's dictionary, if it
+ // exists.
+ __ bind(&probe_dictionary);
+ // r5: elements
+ __ LoadP(r2, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ LoadlB(r2, FieldMemOperand(r2, Map::kInstanceTypeOffset));
+ GenerateGlobalInstanceTypeCheck(masm, r2, &slow);
+ // Load the property to r2.
+ GenerateDictionaryLoad(masm, &slow, r5, key, r2, r7, r6);
+ __ IncrementCounter(isolate->counters()->keyed_load_generic_symbol(), 1, r6,
+ r5);
+ __ Ret();
+
+ __ bind(&index_name);
+ __ IndexFromHash(r5, key);
+ // Now jump to the place where smi keys are handled.
+ __ b(&index_smi);
+}
+
+
+void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
+ // Push receiver, key and value for runtime call.
+ __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
+ StoreDescriptor::ValueRegister());
+
+ ExternalReference ref =
+ ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
+ __ TailCallExternalReference(ref, 3, 1);
+}
+
+
+static void KeyedStoreGenerateMegamorphicHelper(
+ MacroAssembler* masm, Label* fast_object, Label* fast_double, Label* slow,
+ KeyedStoreCheckMap check_map, KeyedStoreIncrementLength increment_length,
+ Register value, Register key, Register receiver, Register receiver_map,
+ Register elements_map, Register elements) {
+ Label transition_smi_elements;
+ Label finish_object_store, non_double_value, transition_double_elements;
+ Label fast_double_without_map_check;
+
+ // Fast case: Do the store, could be either Object or double.
+ __ bind(fast_object);
+ Register scratch_value = r6;
+ Register address = r7;
+ if (check_map == kCheckMap) {
+ __ LoadP(elements_map, FieldMemOperand(elements, HeapObject::kMapOffset));
+ __ CmpP(elements_map,
+ Operand(masm->isolate()->factory()->fixed_array_map()));
+ __ bne(fast_double);
+ }
+
+ // HOLECHECK: guards "A[i] = V"
+ // We have to go to the runtime if the current value is the hole because
+ // there may be a callback on the element
+ Label holecheck_passed1;
+ // @TODO(joransiu) : Fold AddP into memref of LoadP
+ __ AddP(address, elements, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ SmiToPtrArrayOffset(scratch_value, key);
+ __ LoadP(scratch_value, MemOperand(address, scratch_value));
+ __ CmpP(scratch_value, Operand(masm->isolate()->factory()->the_hole_value()));
+ __ bne(&holecheck_passed1, Label::kNear);
+ __ JumpIfDictionaryInPrototypeChain(receiver, elements_map, scratch_value,
+ slow);
+
+ __ bind(&holecheck_passed1);
+
+ // Smi stores don't require further checks.
+ Label non_smi_value;
+ __ JumpIfNotSmi(value, &non_smi_value);
+
+ if (increment_length == kIncrementLength) {
+ // Add 1 to receiver->length.
+ __ AddSmiLiteral(scratch_value, key, Smi::FromInt(1), r0);
+ __ StoreP(scratch_value, FieldMemOperand(receiver, JSArray::kLengthOffset));
+ }
+ // It's irrelevant whether array is smi-only or not when writing a smi.
+ __ AddP(address, elements, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ SmiToPtrArrayOffset(scratch_value, key);
+ __ StoreP(value, MemOperand(address, scratch_value));
+ __ Ret();
+
+ __ bind(&non_smi_value);
+ // Escape to elements kind transition case.
+ __ CheckFastObjectElements(receiver_map, scratch_value,
+ &transition_smi_elements);
+
+ // Fast elements array, store the value to the elements backing store.
+ __ bind(&finish_object_store);
+ if (increment_length == kIncrementLength) {
+ // Add 1 to receiver->length.
+ __ AddSmiLiteral(scratch_value, key, Smi::FromInt(1), r0);
+ __ StoreP(scratch_value, FieldMemOperand(receiver, JSArray::kLengthOffset));
+ }
+ __ AddP(address, elements, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ SmiToPtrArrayOffset(scratch_value, key);
+ __ StoreP(value, MemOperand(address, scratch_value));
+ __ la(address, MemOperand(address, scratch_value));
+ // Update write barrier for the elements array address.
+ __ LoadRR(scratch_value, value); // Preserve the value which is returned.
+ __ RecordWrite(elements, address, scratch_value, kLRHasNotBeenSaved,
+ kDontSaveFPRegs, EMIT_REMEMBERED_SET, OMIT_SMI_CHECK);
+ __ Ret();
+
+ __ bind(fast_double);
+ if (check_map == kCheckMap) {
+ // Check for fast double array case. If this fails, call through to the
+ // runtime.
+ __ CompareRoot(elements_map, Heap::kFixedDoubleArrayMapRootIndex);
+ __ bne(slow);
+ }
+
+ // HOLECHECK: guards "A[i] double hole?"
+ // We have to see if the double version of the hole is present. If so
+ // go to the runtime.
+ // @TODO(joransiu) : Fold AddP Operand into LoadlW
+ __ AddP(address, elements,
+ Operand((FixedDoubleArray::kHeaderSize + Register::kExponentOffset -
+ kHeapObjectTag)));
+ __ SmiToDoubleArrayOffset(scratch_value, key);
+ __ LoadlW(scratch_value, MemOperand(address, scratch_value));
+ __ CmpP(scratch_value, Operand(kHoleNanUpper32));
+ __ bne(&fast_double_without_map_check, Label::kNear);
+ __ JumpIfDictionaryInPrototypeChain(receiver, elements_map, scratch_value,
+ slow);
+
+ __ bind(&fast_double_without_map_check);
+ __ StoreNumberToDoubleElements(value, key, elements, r5, d0,
+ &transition_double_elements);
+ if (increment_length == kIncrementLength) {
+ // Add 1 to receiver->length.
+ __ AddSmiLiteral(scratch_value, key, Smi::FromInt(1), r0);
+ __ StoreP(scratch_value, FieldMemOperand(receiver, JSArray::kLengthOffset));
+ }
+ __ Ret();
+
+ __ bind(&transition_smi_elements);
+ // Transition the array appropriately depending on the value type.
+ __ LoadP(r6, FieldMemOperand(value, HeapObject::kMapOffset));
+ __ CompareRoot(r6, Heap::kHeapNumberMapRootIndex);
+ __ bne(&non_double_value);
+
+ // Value is a double. Transition FAST_SMI_ELEMENTS ->
+ // FAST_DOUBLE_ELEMENTS and complete the store.
+ __ LoadTransitionedArrayMapConditional(
+ FAST_SMI_ELEMENTS, FAST_DOUBLE_ELEMENTS, receiver_map, r6, slow);
+ AllocationSiteMode mode =
+
+ AllocationSite::GetMode(FAST_SMI_ELEMENTS, FAST_DOUBLE_ELEMENTS);
+ ElementsTransitionGenerator::GenerateSmiToDouble(masm, receiver, key, value,
+ receiver_map, mode, slow);
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ b(&fast_double_without_map_check);
+
+ __ bind(&non_double_value);
+ // Value is not a double, FAST_SMI_ELEMENTS -> FAST_ELEMENTS
+ __ LoadTransitionedArrayMapConditional(FAST_SMI_ELEMENTS, FAST_ELEMENTS,
+ receiver_map, r6, slow);
+ mode = AllocationSite::GetMode(FAST_SMI_ELEMENTS, FAST_ELEMENTS);
+ ElementsTransitionGenerator::GenerateMapChangeElementsTransition(
+ masm, receiver, key, value, receiver_map, mode, slow);
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ b(&finish_object_store);
+
+ __ bind(&transition_double_elements);
+ // Elements are FAST_DOUBLE_ELEMENTS, but value is an Object that's not a
+ // HeapNumber. Make sure that the receiver is a Array with FAST_ELEMENTS and
+ // transition array from FAST_DOUBLE_ELEMENTS to FAST_ELEMENTS
+ __ LoadTransitionedArrayMapConditional(FAST_DOUBLE_ELEMENTS, FAST_ELEMENTS,
+ receiver_map, r6, slow);
+ mode = AllocationSite::GetMode(FAST_DOUBLE_ELEMENTS, FAST_ELEMENTS);
+ ElementsTransitionGenerator::GenerateDoubleToObject(
+ masm, receiver, key, value, receiver_map, mode, slow);
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ b(&finish_object_store);
+}
+
+
+void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm,
+ LanguageMode language_mode) {
+ // ---------- S t a t e --------------
+ // -- r2 : value
+ // -- r3 : key
+ // -- r4 : receiver
+ // -- lr : return address
+ // -----------------------------------
+ Label slow, fast_object, fast_object_grow;
+ Label fast_double, fast_double_grow;
+ Label array, extra, check_if_double_array, maybe_name_key, miss;
+
+ // Register usage.
+ Register value = StoreDescriptor::ValueRegister();
+ Register key = StoreDescriptor::NameRegister();
+ Register receiver = StoreDescriptor::ReceiverRegister();
+ DCHECK(receiver.is(r3));
+ DCHECK(key.is(r4));
+ DCHECK(value.is(r2));
+ Register receiver_map = r5;
+ Register elements_map = r8;
+ Register elements = r9; // Elements array of the receiver.
+ // r6 and r7 are used as general scratch registers.
+
+ // Check that the key is a smi.
+ __ JumpIfNotSmi(key, &maybe_name_key);
+ // Check that the object isn't a smi.
+ __ JumpIfSmi(receiver, &slow);
+ // Get the map of the object.
+ __ LoadP(receiver_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ // Check that the receiver does not require access checks and is not observed.
+ // The generic stub does not perform map checks or handle observed objects.
+ __ LoadlB(ip, FieldMemOperand(receiver_map, Map::kBitFieldOffset));
+ __ AndP(r0, ip,
+ Operand(1 << Map::kIsAccessCheckNeeded | 1 << Map::kIsObserved));
+ __ bne(&slow, Label::kNear);
+ // Check if the object is a JS array or not.
+ __ LoadlB(r6, FieldMemOperand(receiver_map, Map::kInstanceTypeOffset));
+ __ CmpP(r6, Operand(JS_ARRAY_TYPE));
+ __ beq(&array);
+ // Check that the object is some kind of JSObject.
+ __ CmpP(r6, Operand(FIRST_JS_OBJECT_TYPE));
+ __ blt(&slow, Label::kNear);
+
+ // Object case: Check key against length in the elements array.
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ // Check array bounds. Both the key and the length of FixedArray are smis.
+ __ CmpLogicalP(key, FieldMemOperand(elements, FixedArray::kLengthOffset));
+ __ blt(&fast_object);
+
+ // Slow case, handle jump to runtime.
+ __ bind(&slow);
+ // Entry registers are intact.
+ // r2: value.
+ // r3: key.
+ // r4: receiver.
+ PropertyICCompiler::GenerateRuntimeSetProperty(masm, language_mode);
+ // Never returns to here.
+
+ __ bind(&maybe_name_key);
+ __ LoadP(r6, FieldMemOperand(key, HeapObject::kMapOffset));
+ __ LoadlB(r6, FieldMemOperand(r6, Map::kInstanceTypeOffset));
+ __ JumpIfNotUniqueNameInstanceType(r6, &slow);
+
+ if (FLAG_vector_stores) {
+ // The handlers in the stub cache expect a vector and slot. Since we won't
+ // change the IC from any downstream misses, a dummy vector can be used.
+ Register vector = VectorStoreICDescriptor::VectorRegister();
+ Register slot = VectorStoreICDescriptor::SlotRegister();
+ DCHECK(!AreAliased(vector, slot, r5, r6, r7, r8));
+ Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
+ masm->isolate()->factory()->keyed_store_dummy_vector());
+ int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
+ __ LoadRoot(vector, Heap::kKeyedStoreDummyVectorRootIndex);
+ __ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
+ }
+
+ Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
+ Code::ComputeHandlerFlags(Code::STORE_IC));
+ masm->isolate()->stub_cache()->GenerateProbe(
+ masm, Code::STORE_IC, flags, false, receiver, key, r5, r6, r7, r8);
+ // Cache miss.
+ __ b(&miss);
+
+ // Extra capacity case: Check if there is extra capacity to
+ // perform the store and update the length. Used for adding one
+ // element to the array by writing to array[array.length].
+ __ bind(&extra);
+ // Condition code from comparing key and array length is still available.
+ __ bne(&slow); // Only support writing to writing to array[array.length].
+ // Check for room in the elements backing store.
+ // Both the key and the length of FixedArray are smis.
+ __ CmpLogicalP(key, FieldMemOperand(elements, FixedArray::kLengthOffset));
+ __ bge(&slow);
+ __ LoadP(elements_map, FieldMemOperand(elements, HeapObject::kMapOffset));
+ __ CmpP(elements_map, Operand(masm->isolate()->factory()->fixed_array_map()));
+ __ bne(&check_if_double_array, Label::kNear);
+ __ b(&fast_object_grow);
+
+ __ bind(&check_if_double_array);
+ __ CmpP(elements_map,
+ Operand(masm->isolate()->factory()->fixed_double_array_map()));
+ __ bne(&slow);
+ __ b(&fast_double_grow);
+
+ // Array case: Get the length and the elements array from the JS
+ // array. Check that the array is in fast mode (and writable); if it
+ // is the length is always a smi.
+ __ bind(&array);
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+
+ // Check the key against the length in the array.
+ __ CmpLogicalP(key, FieldMemOperand(receiver, JSArray::kLengthOffset));
+ __ bge(&extra);
+
+ KeyedStoreGenerateMegamorphicHelper(
+ masm, &fast_object, &fast_double, &slow, kCheckMap, kDontIncrementLength,
+ value, key, receiver, receiver_map, elements_map, elements);
+ KeyedStoreGenerateMegamorphicHelper(masm, &fast_object_grow,
+ &fast_double_grow, &slow, kDontCheckMap,
+ kIncrementLength, value, key, receiver,
+ receiver_map, elements_map, elements);
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
+ Register receiver = StoreDescriptor::ReceiverRegister();
+ Register name = StoreDescriptor::NameRegister();
+ DCHECK(receiver.is(r3));
+ DCHECK(name.is(r4));
+ DCHECK(StoreDescriptor::ValueRegister().is(r2));
+
+ // Get the receiver from the stack and probe the stub cache.
+ Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
+ Code::ComputeHandlerFlags(Code::STORE_IC));
+
+ masm->isolate()->stub_cache()->GenerateProbe(
+ masm, Code::STORE_IC, flags, false, receiver, name, r5, r6, r7, r8);
+
+ // Cache miss: Jump to runtime.
+ GenerateMiss(masm);
+}
+
+
+void StoreIC::GenerateMiss(MacroAssembler* masm) {
+ __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
+ StoreDescriptor::ValueRegister());
+
+ // Perform tail call to the entry.
+ ExternalReference ref =
+ ExternalReference(IC_Utility(kStoreIC_Miss), masm->isolate());
+ __ TailCallExternalReference(ref, 3, 1);
+}
+
+
+void StoreIC::GenerateNormal(MacroAssembler* masm) {
+ Label miss;
+ Register receiver = StoreDescriptor::ReceiverRegister();
+ Register name = StoreDescriptor::NameRegister();
+ Register value = StoreDescriptor::ValueRegister();
+ Register dictionary = r5;
+ DCHECK(receiver.is(r3));
+ DCHECK(name.is(r4));
+ DCHECK(value.is(r2));
+
+ __ LoadP(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+
+ GenerateDictionaryStore(masm, &miss, dictionary, name, value, r6, r7);
+ Counters* counters = masm->isolate()->counters();
+ __ IncrementCounter(counters->store_normal_hit(), 1, r6, r7);
+ __ Ret();
+
+ __ bind(&miss);
+ __ IncrementCounter(counters->store_normal_miss(), 1, r6, r7);
+ GenerateMiss(masm);
+}
+
+
+#undef __
+
+
+Condition CompareIC::ComputeCondition(Token::Value op) {
+ switch (op) {
+ case Token::EQ_STRICT:
+ case Token::EQ:
+ return eq;
+ case Token::LT:
+ return lt;
+ case Token::GT:
+ return gt;
+ case Token::LTE:
+ return le;
+ case Token::GTE:
+ return ge;
+ default:
+ UNREACHABLE();
+ return kNoCondition;
+ }
+}
+
+
+bool CompareIC::HasInlinedSmiCode(Address address) {
+ // The address of the instruction following the call.
+ Address cmp_instruction_address =
+ Assembler::return_address_from_call_start(address);
+
+ // If the instruction following the call is not a CHI, nothing
+ // was inlined.
+ return (Instruction::S390OpcodeValue(cmp_instruction_address) == CHI);
+}
+
+
+//
+// This code is paired with the JumpPatchSite class in full-codegen-s390.cc
+//
+void PatchInlinedSmiCode(Address address, InlinedSmiCheck check) {
+ Address cmp_instruction_address =
+ Assembler::return_address_from_call_start(address);
+
+ // If the instruction following the call is not a cmp rx, #yyy, nothing
+ // was inlined.
+ Instr instr = Assembler::instr_at(cmp_instruction_address);
+ if (Instruction::S390OpcodeValue(cmp_instruction_address) != CHI) {
+ return;
+ }
+
+ if (Instruction::S390OpcodeValue(address) != BRASL) {
+ return;
+ }
+ // The delta to the start of the map check instruction and the
+ // condition code uses at the patched jump.
+ int delta = instr & 0x0000ffff;
+
+ // If the delta is 0 the instruction is cmp r0, #0 which also signals that
+ // nothing was inlined.
+ if (delta == 0) {
+ return;
+ }
+
+ if (FLAG_trace_ic) {
+ PrintF("[ patching ic at %p, cmp=%p, delta=%d\n", address,
+ cmp_instruction_address, delta);
+ }
+
+ // Expected sequence to enable by changing the following
+ // CR/CGR Rx, Rx // 2 / 4 bytes
+ // LR R0, R0 // 2 bytes // 31-bit only!
+ // BRC/BRCL // 4 / 6 bytes
+ // into
+ // TMLL Rx, XXX // 4 bytes
+ // BRC/BRCL // 4 / 6 bytes
+ // And vice versa to disable.
+
+ // The following constant is the size of the CR/CGR + LR + LR
+ const int kPatchAreaSizeNoBranch = 4;
+ Address patch_address = cmp_instruction_address - delta;
+ Address branch_address = patch_address + kPatchAreaSizeNoBranch;
+
+ Instr instr_at_patch = Assembler::instr_at(patch_address);
+ SixByteInstr branch_instr = Assembler::instr_at(branch_address);
+
+ // This is patching a conditional "jump if not smi/jump if smi" site.
+ // Enabling by changing from
+ // cmp cr0, rx, rx
+ // to
+ // rlwinm(r0, value, 0, 31, 31, SetRC);
+ // bc(label, BT/BF, 2)
+ // and vice-versa to be disabled again.
+ size_t patch_size = 0;
+ if (Instruction::S390OpcodeValue(branch_address) == BRC) {
+ patch_size = kPatchAreaSizeNoBranch + 4;
+ } else if (Instruction::S390OpcodeValue(branch_address) == BRCL) {
+ patch_size = kPatchAreaSizeNoBranch + 6;
+ } else {
+ DCHECK(false);
+ }
+ CodePatcher patcher(patch_address, patch_size);
+ Register reg;
+ reg.code_ = instr_at_patch & 0xf;
+ if (check == ENABLE_INLINED_SMI_CHECK) {
+ // DCHECK(Assembler::IsCmpRegister(instr_at_patch));
+ // DCHECK_EQ(Assembler::GetRA(instr_at_patch).code(),
+ // Assembler::GetRB(instr_at_patch).code());
+ patcher.masm()->TestIfSmi(reg);
+ } else {
+ // Emit the Nop to make bigger place for patching
+ // (replaced by lr + nill)
+ DCHECK(check == DISABLE_INLINED_SMI_CHECK);
+ patcher.masm()->CmpP(reg, reg);
+#ifndef V8_TARGET_ARCH_S390X
+ patcher.masm()->nop();
+#endif
+ }
+
+ Condition cc = al;
+ if (Instruction::S390OpcodeValue(branch_address) == BRC) {
+ cc = static_cast<Condition>((branch_instr & 0x00f00000) >> 20);
+ DCHECK((cc == ne) || (cc == eq));
+ cc = (cc == ne) ? eq : ne;
+ patcher.masm()->brc(cc, Operand((branch_instr & 0xffff) << 1));
+ } else if (Instruction::S390OpcodeValue(branch_address) == BRCL) {
+ cc = static_cast<Condition>(
+ (branch_instr & (static_cast<uint64_t>(0x00f0) << 32)) >> 36);
+ DCHECK((cc == ne) || (cc == eq));
+ cc = (cc == ne) ? eq : ne;
+ patcher.masm()->brcl(cc, Operand((branch_instr & 0xffffffff) << 1));
+ } else {
+ DCHECK(false);
+ }
+}
+
+
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/ic/s390/stub-cache-s390.cc
@@ -0,0 +1,189 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/codegen.h"
+#include "src/ic/ic.h"
+#include "src/ic/stub-cache.h"
+#include "src/interface-descriptors.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+
+
+static void ProbeTable(Isolate* isolate, MacroAssembler* masm,
+ Code::Kind ic_kind, Code::Flags flags, bool leave_frame,
+ StubCache::Table table, Register receiver, Register name,
+ // Number of the cache entry, not scaled.
+ Register offset, Register scratch, Register scratch2,
+ Register offset_scratch) {
+ ExternalReference key_offset(isolate->stub_cache()->key_reference(table));
+ ExternalReference value_offset(isolate->stub_cache()->value_reference(table));
+ ExternalReference map_offset(isolate->stub_cache()->map_reference(table));
+
+ uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address());
+ uintptr_t value_off_addr =
+ reinterpret_cast<uintptr_t>(value_offset.address());
+ uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address());
+
+ // Check the relative positions of the address fields.
+ DCHECK(value_off_addr > key_off_addr);
+ DCHECK((value_off_addr - key_off_addr) % 4 == 0);
+ DCHECK((value_off_addr - key_off_addr) < (256 * 4));
+ DCHECK(map_off_addr > key_off_addr);
+ DCHECK((map_off_addr - key_off_addr) % 4 == 0);
+ DCHECK((map_off_addr - key_off_addr) < (256 * 4));
+
+ Label miss;
+ Register base_addr = scratch;
+ scratch = no_reg;
+
+ // Multiply by 3 because there are 3 fields per entry (name, code, map).
+ __ ShiftLeftP(offset_scratch, offset, Operand(1));
+ __ AddP(offset_scratch, offset, offset_scratch);
+
+ // Calculate the base address of the entry.
+ __ mov(base_addr, Operand(key_offset));
+#if V8_TARGET_ARCH_S390X
+ DCHECK(kPointerSizeLog2 > StubCache::kCacheIndexShift);
+ __ ShiftLeftP(offset_scratch, offset_scratch,
+ Operand(kPointerSizeLog2 - StubCache::kCacheIndexShift));
+#else
+ DCHECK(kPointerSizeLog2 == StubCache::kCacheIndexShift);
+#endif
+ __ AddP(base_addr, base_addr, offset_scratch);
+
+ // Check that the key in the entry matches the name.
+ __ CmpP(name, MemOperand(base_addr, 0));
+ __ bne(&miss, Label::kNear);
+
+ // Check the map matches.
+ __ LoadP(ip, MemOperand(base_addr, map_off_addr - key_off_addr));
+ __ CmpP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ bne(&miss, Label::kNear);
+
+ // Get the code entry from the cache.
+ Register code = scratch2;
+ scratch2 = no_reg;
+ __ LoadP(code, MemOperand(base_addr, value_off_addr - key_off_addr));
+
+ // Check that the flags match what we're looking for.
+ Register flags_reg = base_addr;
+ base_addr = no_reg;
+ __ LoadlW(flags_reg, FieldMemOperand(code, Code::kFlagsOffset));
+
+ DCHECK(!r0.is(flags_reg));
+ __ AndP(flags_reg, flags_reg, Operand(~Code::kFlagsNotUsedInLookup));
+ __ CmpLogicalP(flags_reg, Operand(flags));
+ __ bne(&miss, Label::kNear);
+
+#ifdef DEBUG
+ if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) {
+ __ b(&miss, Label::kNear);
+ } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
+ __ b(&miss, Label::kNear);
+ }
+#endif
+
+ if (leave_frame) __ LeaveFrame(StackFrame::INTERNAL);
+
+ // Jump to the first instruction in the code stub.
+ // TODO(joransiu): Combine into indirect branch
+ __ la(code, MemOperand(code, Code::kHeaderSize - kHeapObjectTag));
+ __ b(code);
+
+ // Miss: fall through.
+ __ bind(&miss);
+}
+
+
+void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind,
+ Code::Flags flags, bool leave_frame,
+ Register receiver, Register name,
+ Register scratch, Register extra, Register extra2,
+ Register extra3) {
+ Isolate* isolate = masm->isolate();
+ Label miss;
+
+#if V8_TARGET_ARCH_S390X
+ // Make sure that code is valid. The multiplying code relies on the
+ // entry size being 24.
+ DCHECK(sizeof(Entry) == 24);
+#else
+ // Make sure that code is valid. The multiplying code relies on the
+ // entry size being 12.
+ DCHECK(sizeof(Entry) == 12);
+#endif
+
+ // Make sure the flags does not name a specific type.
+ DCHECK(Code::ExtractTypeFromFlags(flags) == 0);
+
+ // Make sure that there are no register conflicts.
+ DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3));
+
+ // Check scratch, extra and extra2 registers are valid.
+ DCHECK(!scratch.is(no_reg));
+ DCHECK(!extra.is(no_reg));
+ DCHECK(!extra2.is(no_reg));
+ DCHECK(!extra3.is(no_reg));
+
+#ifdef DEBUG
+ // If vector-based ics are in use, ensure that scratch, extra, extra2 and
+ // extra3 don't conflict with the vector and slot registers, which need
+ // to be preserved for a handler call or miss.
+ if (IC::ICUseVector(ic_kind)) {
+ Register vector = LoadWithVectorDescriptor::VectorRegister();
+ Register slot = LoadWithVectorDescriptor::SlotRegister();
+ DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
+ }
+#endif
+
+ Counters* counters = masm->isolate()->counters();
+ __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2,
+ extra3);
+
+ // Check that the receiver isn't a smi.
+ __ JumpIfSmi(receiver, &miss);
+
+ // Get the map of the receiver and compute the hash.
+ __ LoadlW(scratch, FieldMemOperand(name, Name::kHashFieldOffset));
+ __ LoadP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ AddP(scratch, scratch, ip);
+ __ XorP(scratch, scratch, Operand(flags));
+ // The mask omits the last two bits because they are not part of the hash.
+ __ AndP(scratch, scratch,
+ Operand((kPrimaryTableSize - 1) << kCacheIndexShift));
+
+ // Probe the primary table.
+ ProbeTable(isolate, masm, ic_kind, flags, leave_frame, kPrimary, receiver,
+ name, scratch, extra, extra2, extra3);
+
+ // Primary miss: Compute hash for secondary probe.
+ __ SubP(scratch, scratch, name);
+ __ AddP(scratch, scratch, Operand(flags));
+ __ AndP(scratch, scratch,
+ Operand((kSecondaryTableSize - 1) << kCacheIndexShift));
+
+ // Probe the secondary table.
+ ProbeTable(isolate, masm, ic_kind, flags, leave_frame, kSecondary, receiver,
+ name, scratch, extra, extra2, extra3);
+
+ // Cache miss: Fall-through and let caller handle the miss by
+ // entering the runtime system.
+ __ bind(&miss);
+ __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2,
+ extra3);
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- a/deps/v8/src/isolate.cc
+++ b/deps/v8/src/isolate.cc
@@ -2147,7 +2147,7 @@
// Initialize other runtime facilities
#if defined(USE_SIMULATOR)
#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \
- V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC
+ V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_S390
Simulator::Initialize(this);
#endif
#endif
--- a/deps/v8/src/jsregexp.cc
+++ b/deps/v8/src/jsregexp.cc
@@ -40,6 +40,8 @@
#include "src/mips64/regexp-macro-assembler-mips64.h" // NOLINT
#elif V8_TARGET_ARCH_X87
#include "src/x87/regexp-macro-assembler-x87.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/regexp-macro-assembler-s390.h" // NOLINT
#else
#error Unsupported target architecture.
#endif
@@ -6350,6 +6352,9 @@
#elif V8_TARGET_ARCH_ARM64
RegExpMacroAssemblerARM64 macro_assembler(isolate, zone, mode,
(data->capture_count + 1) * 2);
+#elif V8_TARGET_ARCH_S390
+ RegExpMacroAssemblerS390 macro_assembler(isolate, zone, mode,
+ (data->capture_count + 1) * 2);
#elif V8_TARGET_ARCH_PPC
RegExpMacroAssemblerPPC macro_assembler(isolate, zone, mode,
(data->capture_count + 1) * 2);
--- a/deps/v8/src/lithium-allocator-inl.h
+++ b/deps/v8/src/lithium-allocator-inl.h
@@ -15,6 +15,8 @@
#include "src/arm64/lithium-arm64.h" // NOLINT
#elif V8_TARGET_ARCH_ARM
#include "src/arm/lithium-arm.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/lithium-s390.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/lithium-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/lithium-codegen.cc
+++ b/deps/v8/src/lithium-codegen.cc
@@ -32,6 +32,9 @@
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/lithium-ppc.h" // NOLINT
#include "src/ppc/lithium-codegen-ppc.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/lithium-s390.h" // NOLINT
+#include "src/s390/lithium-codegen-s390.h" // NOLINT
#else
#error Unsupported target architecture.
#endif
--- a/deps/v8/src/lithium-inl.h
+++ b/deps/v8/src/lithium-inl.h
@@ -23,6 +23,8 @@
#include "src/ppc/lithium-ppc.h" // NOLINT
#elif V8_TARGET_ARCH_X87
#include "src/x87/lithium-x87.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/lithium-s390.h" // NOLINT
#else
#error "Unknown architecture."
#endif
--- a/deps/v8/src/lithium.cc
+++ b/deps/v8/src/lithium.cc
@@ -32,6 +32,9 @@
#elif V8_TARGET_ARCH_X87
#include "src/x87/lithium-x87.h" // NOLINT
#include "src/x87/lithium-codegen-x87.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "s390/lithium-s390.h" // NOLINT
+#include "s390/lithium-codegen-s390.h" // NOLINT
#else
#error "Unknown architecture."
#endif
--- a/deps/v8/src/log.cc
+++ b/deps/v8/src/log.cc
@@ -402,6 +402,8 @@
const char arch[] = "x32";
#elif V8_TARGET_ARCH_ARM
const char arch[] = "arm";
+#elif V8_TARGET_ARCH_S390
+ const char arch[] = "s390";
#elif V8_TARGET_ARCH_PPC
const char arch[] = "ppc";
#elif V8_TARGET_ARCH_MIPS
--- a/deps/v8/src/macro-assembler.h
+++ b/deps/v8/src/macro-assembler.h
@@ -69,6 +69,13 @@
#include "src/ppc/assembler-ppc-inl.h"
#include "src/code.h" // NOLINT, must be after assembler_*.h
#include "src/ppc/macro-assembler-ppc.h"
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/constants-s390.h"
+#include "src/assembler.h" // NOLINT
+#include "src/s390/assembler-s390.h" // NOLINT
+#include "src/s390/assembler-s390-inl.h"
+#include "src/code.h" // NOLINT,must be after assembler_*.h
+#include "src/s390/macro-assembler-s390.h"
#elif V8_TARGET_ARCH_MIPS
#include "src/mips/constants-mips.h"
#include "src/assembler.h" // NOLINT
--- a/deps/v8/src/objects.h
+++ b/deps/v8/src/objects.h
@@ -33,6 +33,8 @@
#include "src/mips64/constants-mips64.h" // NOLINT
#elif V8_TARGET_ARCH_PPC
#include "src/ppc/constants-ppc.h" // NOLINT
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/constants-s390.h" // NOLINT
#endif
--- a/deps/v8/src/regexp-macro-assembler.h
+++ b/deps/v8/src/regexp-macro-assembler.h
@@ -32,6 +32,7 @@
kARMImplementation,
kARM64Implementation,
kMIPSImplementation,
+ kS390Implementation,
kPPCImplementation,
kX64Implementation,
kX87Implementation,
--- /dev/null
+++ b/deps/v8/src/s390/assembler-s390-inl.h
@@ -0,0 +1,691 @@
+// Copyright (c) 1994-2006 Sun Microsystems Inc.
+// All Rights Reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistribution in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the
+// distribution.
+//
+// - Neither the name of Sun Microsystems or the names of contributors may
+// be used to endorse or promote products derived from this software without
+// specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+// OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// The original source code covered by the above license above has been modified
+// significantly by Google Inc.
+// Copyright 2012 the V8 project authors. All rights reserved.
+
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+
+#ifndef V8_S390_ASSEMBLER_S390_INL_H_
+#define V8_S390_ASSEMBLER_S390_INL_H_
+
+#include "src/s390/assembler-s390.h"
+
+#include "src/assembler.h"
+#include "src/debug.h"
+
+
+namespace v8 {
+namespace internal {
+
+
+bool CpuFeatures::SupportsCrankshaft() { return true; }
+
+
+// The modes possibly affected by apply must be in kApplyMask.
+void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
+ // Might need to re-implement this once we have BRASL
+ // absolute code pointer inside code object moves with the code object.
+ if (IsInternalReference(rmode_)) {
+ // Jump table entry
+ Address target = Memory::Address_at(pc_);
+ Memory::Address_at(pc_) = target + delta;
+ } else if (IsCodeTarget(rmode_)) {
+ bool flush_icache = icache_flush_mode != SKIP_ICACHE_FLUSH;
+ SixByteInstr instr = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc_));
+ int32_t dis = static_cast<int32_t>(instr & 0xFFFFFFFF) * 2 // halfwords
+ - static_cast<int32_t>(delta);
+ instr >>= 32;
+ instr <<= 32;
+ instr |= static_cast<uint32_t>(dis/2);
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(pc_), instr);
+ if (flush_icache) CpuFeatures::FlushICache(pc_, 6);
+ } else {
+ // mov sequence
+ DCHECK(IsInternalReferenceEncoded(rmode_));
+ Address target = Assembler::target_address_at(pc_, host_);
+ Assembler::set_target_address_at(pc_, host_, target + delta,
+ icache_flush_mode);
+ }
+}
+
+
+Address RelocInfo::target_internal_reference() {
+ if (IsInternalReference(rmode_)) {
+ // Jump table entry
+ return Memory::Address_at(pc_);
+ } else {
+ // mov sequence
+ DCHECK(IsInternalReferenceEncoded(rmode_));
+ return Assembler::target_address_at(pc_, host_);
+ }
+}
+
+
+Address RelocInfo::target_internal_reference_address() {
+ DCHECK(IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
+ return reinterpret_cast<Address>(pc_);
+}
+
+
+Address RelocInfo::target_address() {
+ DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
+ return Assembler::target_address_at(pc_, host_);
+}
+
+
+Address RelocInfo::target_address_address() {
+ DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) ||
+ rmode_ == EMBEDDED_OBJECT || rmode_ == EXTERNAL_REFERENCE);
+
+ // Read the address of the word containing the target_address in an
+ // instruction stream.
+ // The only architecture-independent user of this function is the serializer.
+ // The serializer uses it to find out how many raw bytes of instruction to
+ // output before the next target.
+ // For an instruction like LIS/ORI where the target bits are mixed into the
+ // instruction bits, the size of the target will be zero, indicating that the
+ // serializer should not step forward in memory after a target is resolved
+ // and written.
+ return reinterpret_cast<Address>(pc_);
+}
+
+
+Address RelocInfo::constant_pool_entry_address() {
+ UNREACHABLE();
+ return NULL;
+}
+
+
+int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; }
+
+
+void RelocInfo::set_target_address(Address target,
+ WriteBarrierMode write_barrier_mode,
+ ICacheFlushMode icache_flush_mode) {
+ DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
+ Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
+ if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
+ IsCodeTarget(rmode_)) {
+ Object* target_code = Code::GetCodeFromTargetAddress(target);
+ host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
+ host(), this, HeapObject::cast(target_code));
+ }
+}
+
+
+Address Assembler::break_address_from_return_address(Address pc) {
+ return target_address_from_return_address(pc);
+}
+
+
+Address Assembler::target_address_from_return_address(Address pc) {
+ // Returns the address of the call target from the return address that will
+ // be returned to after a call.
+ // Sequence is:
+ // BRASL r14, RI
+ return pc - kCallTargetAddressOffset;
+}
+
+
+Address Assembler::return_address_from_call_start(Address pc) {
+ // Sequence is:
+ // BRASL r14, RI
+ return pc + kCallTargetAddressOffset;
+}
+
+
+Handle<Object> Assembler::code_target_object_handle_at(Address pc) {
+ SixByteInstr instr = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc));
+ int index = instr & 0xFFFFFFFF;
+ return code_targets_[index];
+}
+
+
+Object* RelocInfo::target_object() {
+ DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
+ return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
+}
+
+
+Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
+ DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
+ if (rmode_ == EMBEDDED_OBJECT) {
+ return Handle<Object>(
+ reinterpret_cast<Object**>(Assembler::target_address_at(pc_, host_)));
+ } else {
+ return origin->code_target_object_handle_at(pc_);
+ }
+}
+
+
+void RelocInfo::set_target_object(Object* target,
+ WriteBarrierMode write_barrier_mode,
+ ICacheFlushMode icache_flush_mode) {
+ DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
+ Assembler::set_target_address_at(
+ pc_, host_, reinterpret_cast<Address>(target), icache_flush_mode);
+ if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
+ target->IsHeapObject()) {
+ host()->GetHeap()->incremental_marking()->RecordWrite(
+ host(), &Memory::Object_at(pc_), HeapObject::cast(target));
+ }
+}
+
+
+Address RelocInfo::target_external_reference() {
+ DCHECK(rmode_ == EXTERNAL_REFERENCE);
+ return Assembler::target_address_at(pc_, host_);
+}
+
+
+Address RelocInfo::target_runtime_entry(Assembler* origin) {
+ DCHECK(IsRuntimeEntry(rmode_));
+ return target_address();
+}
+
+
+void RelocInfo::set_target_runtime_entry(Address target,
+ WriteBarrierMode write_barrier_mode,
+ ICacheFlushMode icache_flush_mode) {
+ DCHECK(IsRuntimeEntry(rmode_));
+ if (target_address() != target)
+ set_target_address(target, write_barrier_mode, icache_flush_mode);
+}
+
+
+Handle<Cell> RelocInfo::target_cell_handle() {
+ DCHECK(rmode_ == RelocInfo::CELL);
+ Address address = Memory::Address_at(pc_);
+ return Handle<Cell>(reinterpret_cast<Cell**>(address));
+}
+
+
+Cell* RelocInfo::target_cell() {
+ DCHECK(rmode_ == RelocInfo::CELL);
+ return Cell::FromValueAddress(Memory::Address_at(pc_));
+}
+
+
+void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode,
+ ICacheFlushMode icache_flush_mode) {
+ DCHECK(rmode_ == RelocInfo::CELL);
+ Address address = cell->address() + Cell::kValueOffset;
+ Memory::Address_at(pc_) = address;
+ if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
+ // TODO(1550) We are passing NULL as a slot because cell can never be on
+ // evacuation candidate.
+ host()->GetHeap()->incremental_marking()->RecordWrite(host(), NULL, cell);
+ }
+}
+
+#if V8_TARGET_ARCH_S390X
+ // NOP(2byte) + PUSH + MOV + BASR =
+ // NOP + LAY + STG + IIHF + IILF + BASR
+static const int kCodeAgingSequenceLength = 28;
+static const int kCodeAgingTargetDelta = 14; // Jump past NOP + PUSH to IIHF
+ // LAY + 4 * STG + LA
+static const int kNoCodeAgeSequenceLength = 34;
+#else
+#if (V8_HOST_ARCH_S390)
+// NOP + NILH + LAY + ST + IILF + BASR
+static const int kCodeAgingSequenceLength = 24;
+static const int kCodeAgingTargetDelta = 16; // Jump past NOP to IILF
+// NILH + LAY + 4 * ST + LA
+static const int kNoCodeAgeSequenceLength = 30;
+#else
+// NOP + LAY + ST + IILF + BASR
+static const int kCodeAgingSequenceLength = 20;
+static const int kCodeAgingTargetDelta = 12; // Jump past NOP to IILF
+// LAY + 4 * ST + LA
+static const int kNoCodeAgeSequenceLength = 26;
+#endif
+#endif
+
+Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
+ UNREACHABLE(); // This should never be reached on S390.
+ return Handle<Object>();
+}
+
+
+Code* RelocInfo::code_age_stub() {
+ DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
+ return Code::GetCodeFromTargetAddress(
+ Assembler::target_address_at(pc_ + kCodeAgingTargetDelta, host_));
+}
+
+
+void RelocInfo::set_code_age_stub(Code* stub,
+ ICacheFlushMode icache_flush_mode) {
+ DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
+ Assembler::set_target_address_at(pc_ + kCodeAgingTargetDelta, host_,
+ stub->instruction_start(),
+ icache_flush_mode);
+}
+
+
+Address RelocInfo::call_address() {
+ DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
+ (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
+ // The pc_ offset of 0 assumes patched return sequence per
+ // BreakLocation::SetDebugBreakAtReturn(), or debug break
+ // slot per BreakLocation::SetDebugBreakAtSlot().
+ return Assembler::target_address_at(pc_, host_);
+}
+
+
+void RelocInfo::set_call_address(Address target) {
+ DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
+ (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
+ Assembler::set_target_address_at(pc_, host_, target);
+ if (host() != NULL) {
+ Object* target_code = Code::GetCodeFromTargetAddress(target);
+ host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
+ host(), this, HeapObject::cast(target_code));
+ }
+}
+
+
+Object* RelocInfo::call_object() { return *call_object_address(); }
+
+
+void RelocInfo::set_call_object(Object* target) {
+ *call_object_address() = target;
+}
+
+
+Object** RelocInfo::call_object_address() {
+ DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
+ (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
+ return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
+}
+
+
+void RelocInfo::WipeOut() {
+ DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
+ IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) ||
+ IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
+ if (IsInternalReference(rmode_)) {
+ // Jump table entry
+ Memory::Address_at(pc_) = NULL;
+ } else if (IsInternalReferenceEncoded(rmode_)) {
+ // mov sequence
+ // Currently used only by deserializer, no need to flush.
+ Assembler::set_target_address_at(pc_, host_, NULL, SKIP_ICACHE_FLUSH);
+ } else {
+ Assembler::set_target_address_at(pc_, host_, NULL);
+ }
+}
+
+
+bool RelocInfo::IsPatchedReturnSequence() {
+ //
+ // The patched return sequence is defined by
+ // BreakLocation::SetDebugBreakAtReturn()
+ // FIXED_SEQUENCE
+
+ bool patched_return = true;
+#if V8_TARGET_ARCH_S390X
+ Opcode instr0 =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_));
+ Opcode instr1 =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_+6));
+ Opcode basr =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_ + 12));
+ Opcode bkpt =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_ + 14));
+ patched_return = (IIHF == instr0);
+#else
+ Opcode instr1 =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_));
+ Opcode basr =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_ + 6));
+ Opcode bkpt =
+ Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc_ + 8));
+#endif
+ patched_return =
+ patched_return && (IILF == instr1) && (BASR == basr) && (BKPT == bkpt);
+
+ return patched_return;
+}
+
+
+bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
+ SixByteInstr current_instr = Assembler::instr_at(pc_);
+ return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
+}
+
+
+void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
+ RelocInfo::Mode mode = rmode();
+ if (mode == RelocInfo::EMBEDDED_OBJECT) {
+ visitor->VisitEmbeddedPointer(this);
+ } else if (RelocInfo::IsCodeTarget(mode)) {
+ visitor->VisitCodeTarget(this);
+ } else if (mode == RelocInfo::CELL) {
+ visitor->VisitCell(this);
+ } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
+ visitor->VisitExternalReference(this);
+ } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
+ mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
+ visitor->VisitInternalReference(this);
+ } else if (RelocInfo::IsCodeAgeSequence(mode)) {
+ visitor->VisitCodeAgeSequence(this);
+ } else if (((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
+ (RelocInfo::IsDebugBreakSlot(mode) &&
+ IsPatchedDebugBreakSlotSequence())) &&
+ isolate->debug()->has_break_points()) {
+ visitor->VisitDebugTarget(this);
+ } else if (IsRuntimeEntry(mode)) {
+ visitor->VisitRuntimeEntry(this);
+ }
+}
+
+
+template <typename StaticVisitor>
+void RelocInfo::Visit(Heap* heap) {
+ RelocInfo::Mode mode = rmode();
+ if (mode == RelocInfo::EMBEDDED_OBJECT) {
+ StaticVisitor::VisitEmbeddedPointer(heap, this);
+ } else if (RelocInfo::IsCodeTarget(mode)) {
+ StaticVisitor::VisitCodeTarget(heap, this);
+ } else if (mode == RelocInfo::CELL) {
+ StaticVisitor::VisitCell(heap, this);
+ } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
+ StaticVisitor::VisitExternalReference(this);
+ } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
+ mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
+ StaticVisitor::VisitInternalReference(this);
+ } else if (RelocInfo::IsCodeAgeSequence(mode)) {
+ StaticVisitor::VisitCodeAgeSequence(heap, this);
+ } else if (heap->isolate()->debug()->has_break_points() &&
+ ((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
+ (RelocInfo::IsDebugBreakSlot(mode) &&
+ IsPatchedDebugBreakSlotSequence()))) {
+ StaticVisitor::VisitDebugTarget(heap, this);
+ } else if (IsRuntimeEntry(mode)) {
+ StaticVisitor::VisitRuntimeEntry(this);
+ }
+}
+
+// Operand constructors
+Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
+ rm_ = no_reg;
+ imm_ = immediate;
+ rmode_ = rmode;
+}
+
+Operand::Operand(const ExternalReference& f) {
+ rm_ = no_reg;
+ imm_ = reinterpret_cast<intptr_t>(f.address());
+ rmode_ = RelocInfo::EXTERNAL_REFERENCE;
+}
+
+Operand::Operand(Smi* value) {
+ rm_ = no_reg;
+ imm_ = reinterpret_cast<intptr_t>(value);
+ rmode_ = kRelocInfo_NONEPTR;
+}
+
+Operand::Operand(Register rm) {
+ rm_ = rm;
+ rmode_ = kRelocInfo_NONEPTR; // S390 -why doesn't ARM do this?
+}
+
+void Assembler::CheckBuffer() {
+ if (buffer_space() <= kGap) {
+ GrowBuffer();
+ }
+}
+
+void Assembler::CheckTrampolinePoolQuick() {
+ if (pc_offset() >= next_buffer_check_) {
+ CheckTrampolinePool();
+ }
+}
+int32_t Assembler::emit_code_target(Handle<Code> target,
+ RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id) {
+ DCHECK(RelocInfo::IsCodeTarget(rmode));
+ if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
+ SetRecordedAstId(ast_id);
+ RecordRelocInfo(RelocInfo::CODE_TARGET_WITH_ID);
+ } else {
+ RecordRelocInfo(rmode);
+ }
+
+ int current = code_targets_.length();
+ if (current > 0 && code_targets_.last().is_identical_to(target)) {
+ // Optimization if we keep jumping to the same code target.
+ current--;
+ } else {
+ code_targets_.Add(target);
+ }
+ return current;
+}
+
+// S390 specific emitting helpers
+void Assembler::emit2bytes(uint16_t x) {
+ CheckBuffer();
+#if V8_TARGET_LITTLE_ENDIAN
+ // We need to emit instructions in big endian format as disassembler /
+ // simulator require the first byte of the instruction in order to decode
+ // the instruction length. Swap the bytes.
+ x = ((x & 0x00FF) << 8) | ((x & 0xFF00) >> 8);
+#endif
+ *reinterpret_cast<uint16_t*>(pc_) = x;
+ pc_ += 2;
+ CheckTrampolinePoolQuick();
+}
+
+void Assembler::emit4bytes(uint32_t x) {
+ CheckBuffer();
+#if V8_TARGET_LITTLE_ENDIAN
+ // We need to emit instructions in big endian format as disassembler /
+ // simulator require the first byte of the instruction in order to decode
+ // the instruction length. Swap the bytes.
+ x = ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8) |
+ ((x & 0x00FF0000) >> 8) | ((x & 0xFF000000) >> 24);
+#endif
+ *reinterpret_cast<uint32_t*>(pc_) = x;
+ pc_ += 4;
+ CheckTrampolinePoolQuick();
+}
+
+void Assembler::emit6bytes(uint64_t x) {
+ CheckBuffer();
+#if V8_TARGET_LITTLE_ENDIAN
+ // We need to emit instructions in big endian format as disassembler /
+ // simulator require the first byte of the instruction in order to decode
+ // the instruction length. Swap the bytes.
+ x = (static_cast<uint64_t>(x & 0xFF) << 40) |
+ (static_cast<uint64_t>((x >> 8) & 0xFF) << 32) |
+ (static_cast<uint64_t>((x >> 16) & 0xFF) << 24) |
+ (static_cast<uint64_t>((x >> 24) & 0xFF) << 16) |
+ (static_cast<uint64_t>((x >> 32) & 0xFF) << 8) |
+ (static_cast<uint64_t>((x >> 40) & 0xFF));
+ x |= (*reinterpret_cast<uint64_t*>(pc_) >> 48) << 48;
+#else
+ // We need to pad two bytes of zeros in order to get the 6-bytes
+ // stored from low address.
+ x = x << 16;
+ x |= *reinterpret_cast<uint64_t*>(pc_) & 0xFFFF;
+#endif
+ // It is safe to store 8-bytes, as CheckBuffer() guarantees we have kGap
+ // space left over.
+ *reinterpret_cast<uint64_t*>(pc_) = x;
+ pc_ += 6;
+}
+// end of S390 specific emitting helpers
+
+bool Operand::is_reg() const { return rm_.is_valid(); }
+
+
+// Fetch the 32bit value from the FIXED_SEQUENCE IIHF / IILF
+Address Assembler::target_address_at(Address pc, Address constant_pool) {
+ // S390 Instruction!
+ // We want to check for instructions generated by Asm::mov()
+ Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc));
+ SixByteInstr instr_1 = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc));
+
+ if (BRASL == op1 || BRCL == op1) {
+ int32_t dis = static_cast<int32_t>(instr_1 & 0xFFFFFFFF) * 2;
+ return reinterpret_cast<Address>(reinterpret_cast<uint64_t>(pc) + dis);
+ }
+
+#if V8_TARGET_ARCH_S390X
+ int instr1_length = Instruction::InstructionLength(
+ reinterpret_cast<const byte*>(pc));
+ Opcode op2 = Instruction::S390OpcodeValue(
+ reinterpret_cast<const byte*>(pc + instr1_length));
+ SixByteInstr instr_2 = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc + instr1_length));
+ // IIHF for hi_32, IILF for lo_32
+ if (IIHF == op1 && IILF == op2) {
+ return reinterpret_cast<Address>(((instr_1 & 0xFFFFFFFF) << 32) |
+ ((instr_2 & 0xFFFFFFFF)));
+ }
+#else
+ // IILF loads 32-bits
+ if (IILF == op1 || CFI == op1) {
+ return reinterpret_cast<Address>((instr_1 & 0xFFFFFFFF));
+ }
+#endif
+
+ UNIMPLEMENTED();
+ return (Address)0;
+}
+
+// This sets the branch destination (which gets loaded at the call address).
+// This is for calls and branches within generated code. The serializer
+// has already deserialized the mov instructions etc.
+// There is a FIXED_SEQUENCE assumption here
+void Assembler::deserialization_set_special_target_at(
+ Address instruction_payload, Code* code, Address target) {
+ set_target_address_at(instruction_payload, code, target);
+}
+
+
+void Assembler::deserialization_set_target_internal_reference_at(
+ Address pc, Address target, RelocInfo::Mode mode) {
+ if (RelocInfo::IsInternalReferenceEncoded(mode)) {
+ Code* code = NULL;
+ set_target_address_at(pc, code, target, SKIP_ICACHE_FLUSH);
+ } else {
+ Memory::Address_at(pc) = target;
+ }
+}
+
+
+// This code assumes the FIXED_SEQUENCE of IIHF/IILF
+void Assembler::set_target_address_at(Address pc,
+ Address constant_pool,
+ Address target,
+ ICacheFlushMode icache_flush_mode) {
+ // S390 Instruction!
+ // We want to check for instructions generated by Asm::mov()
+ Opcode op1 = Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(pc));
+ SixByteInstr instr_1 = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc));
+ bool patched = false;
+
+ if (BRASL == op1 || BRCL == op1) {
+ instr_1 >>= 32; // Zero out the lower 32-bits
+ instr_1 <<= 32;
+ int32_t halfwords = (target - pc)/2; // number of halfwords
+ instr_1 |= static_cast<uint32_t>(halfwords);
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(pc), instr_1);
+ if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
+ CpuFeatures::FlushICache(pc, 6);
+ }
+ patched = true;
+ } else {
+#if V8_TARGET_ARCH_S390X
+ int instr1_length = Instruction::InstructionLength(
+ reinterpret_cast<const byte*>(pc));
+ Opcode op2 = Instruction::S390OpcodeValue(
+ reinterpret_cast<const byte*>(pc + instr1_length));
+ SixByteInstr instr_2 = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(pc + instr1_length));
+ // IIHF for hi_32, IILF for lo_32
+ if (IIHF == op1 && IILF == op2) {
+ // IIHF
+ instr_1 >>= 32; // Zero out the lower 32-bits
+ instr_1 <<= 32;
+ instr_1 |= reinterpret_cast<uint64_t>(target) >> 32;
+
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(pc), instr_1);
+
+ // IILF
+ instr_2 >>= 32;
+ instr_2 <<= 32;
+ instr_2 |= reinterpret_cast<uint64_t>(target) & 0xFFFFFFFF;
+
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(pc + instr1_length), instr_2);
+ if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
+ CpuFeatures::FlushICache(pc, 12);
+ }
+ patched = true;
+ }
+#else
+ // IILF loads 32-bits
+ if (IILF == op1 || CFI == op1) {
+ instr_1 >>= 32; // Zero out the lower 32-bits
+ instr_1 <<= 32;
+ instr_1 |= reinterpret_cast<uint32_t>(target);
+
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(pc), instr_1);
+ if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
+ CpuFeatures::FlushICache(pc, 6);
+ }
+ patched = true;
+ }
+#endif
+ }
+ if (!patched)
+ UNREACHABLE();
+}
+}
+} // namespace v8::internal
+
+#endif // V8_S390_ASSEMBLER_S390_INL_H_
--- /dev/null
+++ b/deps/v8/src/s390/assembler-s390.cc
@@ -0,0 +1,3492 @@
+// Copyright (c) 1994-2006 Sun Microsystems Inc.
+// All Rights Reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistribution in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the
+// distribution.
+//
+// - Neither the name of Sun Microsystems or the names of contributors may
+// be used to endorse or promote products derived from this software without
+// specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+// OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// The original source code covered by the above license above has been
+// modified significantly by Google Inc.
+// Copyright 2015 the V8 project authors. All rights reserved.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/base/bits.h"
+#include "src/base/cpu.h"
+#include "src/s390/assembler-s390-inl.h"
+
+#include "src/macro-assembler.h"
+
+namespace v8 {
+namespace internal {
+
+// Get the CPU features enabled by the build.
+static unsigned CpuFeaturesImpliedByCompiler() {
+ unsigned answer = 0;
+ return answer;
+}
+
+
+// This function uses types in elf.h
+static bool supportsSTFLE() {
+#if V8_HOST_ARCH_S390
+ static bool read_tried = false;
+ static uint32_t auxv_hwcap = 0;
+
+ if (!read_tried) {
+ // Open the AUXV (auxilliary vector) psuedo-file
+ int fd = open("/proc/self/auxv", O_RDONLY);
+
+ read_tried = true;
+ if (fd != -1) {
+#if V8_TARGET_ARCH_S390X
+ static Elf64_auxv_t buffer[16];
+ Elf64_auxv_t *auxv_element;
+#else
+ static Elf32_auxv_t buffer[16];
+ Elf32_auxv_t *auxv_element;
+#endif
+ int bytes_read = 0;
+ while (bytes_read >= 0) {
+ // Read a chunk of the AUXV
+ bytes_read = read(fd, buffer, sizeof(buffer));
+ // Locate and read the platform field of AUXV if it is in the chunk
+ for (auxv_element = buffer;
+ auxv_element+sizeof(auxv_element) <= buffer+bytes_read &&
+ auxv_element->a_type != AT_NULL;
+ auxv_element++) {
+ // We are looking for HWCAP entry in AUXV to search for STFLE support
+ if (auxv_element->a_type == AT_HWCAP) {
+ /* Note: Both auxv_hwcap and buffer are static */
+ auxv_hwcap = auxv_element->a_un.a_val;
+ goto done_reading;
+ }
+ }
+ }
+ done_reading:
+ close(fd);
+ }
+ }
+
+ // Did not find result
+ if (0 == auxv_hwcap) {
+ return false;
+ }
+
+ // HWCAP_S390_STFLE is defined to be 4 in include/asm/elf.h. Currently
+ // hardcoded in case that include file does not exist.
+ const uint32_t HWCAP_S390_STFLE = 4;
+ return (auxv_hwcap & HWCAP_S390_STFLE);
+#else
+ // STFLE is not available on non-s390 hosts
+ return false;
+#endif
+}
+
+
+void CpuFeatures::ProbeImpl(bool cross_compile) {
+ supported_ |= CpuFeaturesImpliedByCompiler();
+ cache_line_size_ = 256;
+
+ // Only use statically determined features for cross compile (snapshot).
+ if (cross_compile) return;
+
+#ifdef DEBUG
+ initialized_ = true;
+#endif
+
+ static bool performSTFLE = supportsSTFLE();
+
+ // Need to define host, as we are generating inlined S390 assembly to test
+ // for facilities.
+#if V8_HOST_ARCH_S390
+ if (performSTFLE) {
+ // STFLE D(B) requires:
+ // GPR0 to specify # of double words to update minus 1.
+ // i.e. GPR0 = 0 for 1 doubleword
+ // D(B) to specify to memory location to store the facilities bits
+ // The facilities we are checking for are:
+ // Bit 45 - Distinct Operands for instructions like ARK, SRK, etc.
+ // As such, we require only 1 double word
+ int64_t facilities[1];
+ facilities[0] = 0;
+ // LHI sets up GPR0
+ // STFLE is specified as .insn, as opcode is not recognized.
+ // We register the instructions kill r0 (LHI) and the CC (STFLE).
+ asm volatile("lhi 0,0\n"
+ ".insn s,0xb2b00000,%0\n"
+ : "=Q" (facilities) : : "cc", "r0");
+
+ // Test for Distinct Operands Facility - Bit 45
+ if (facilities[0] & (1lu << (63 - 45))) {
+ supported_ |= (1u << DISTINCT_OPS);
+ }
+ // Test for General Instruction Extension Facility - Bit 34
+ if (facilities[0] & (1lu << (63 - 34))) {
+ supported_ |= (1u << GENERAL_INSTR_EXT);
+ }
+ // Test for Floating Point Extension Facility - Bit 37
+ if (facilities[0] & (1lu << (63 - 37))) {
+ supported_ |= (1u << FLOATING_POINT_EXT);
+ }
+ }
+#else
+ // All distinct ops instructions can be simulated
+ supported_ |= (1u << DISTINCT_OPS);
+ // RISBG can be simulated
+ supported_ |= (1u << GENERAL_INSTR_EXT);
+
+ supported_ |= (1u << FLOATING_POINT_EXT);
+ USE(performSTFLE); // To avoid assert
+#endif
+ supported_ |= (1u << FPU);
+}
+
+
+void CpuFeatures::PrintTarget() {
+ const char* s390_arch = NULL;
+
+#if V8_TARGET_ARCH_S390X
+ s390_arch = "s390x";
+#else
+ s390_arch = "s390";
+#endif
+
+ printf("target %s\n", s390_arch);
+}
+
+
+void CpuFeatures::PrintFeatures() {
+ printf("FPU=%d\n", CpuFeatures::IsSupported(FPU));
+}
+
+
+Register ToRegister(int num) {
+ DCHECK(num >= 0 && num < kNumRegisters);
+ const Register kRegisters[] = {r0, r1, r2, r3, r4, r5, r6, r7,
+ r8, r9, r10, fp, ip, r13, r14, sp};
+ return kRegisters[num];
+}
+
+
+const char* DoubleRegister::AllocationIndexToString(int index) {
+ DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters);
+ const char* const names[] = {
+ "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10",
+ "d11", "d12", "d15"};
+ return names[index];
+}
+
+
+// -----------------------------------------------------------------------------
+// Implementation of RelocInfo
+
+const int RelocInfo::kApplyMask = RelocInfo::kCodeTargetMask |
+ 1 << RelocInfo::INTERNAL_REFERENCE |
+ 1 << RelocInfo::INTERNAL_REFERENCE_ENCODED;
+
+
+bool RelocInfo::IsCodedSpecially() {
+ // The deserializer needs to know whether a pointer is specially
+ // coded. Being specially coded on S390 means that it is an iihf/iilf
+ // instruction sequence, and that is always the case inside code
+ // objects.
+ return true;
+}
+
+
+bool RelocInfo::IsInConstantPool() {
+ return false;
+}
+
+
+// -----------------------------------------------------------------------------
+// Implementation of Operand and MemOperand
+// See assembler-s390-inl.h for inlined constructors
+
+Operand::Operand(Handle<Object> handle) {
+ AllowDeferredHandleDereference using_raw_address;
+ rm_ = no_reg;
+ // Verify all Objects referred by code are NOT in new space.
+ Object* obj = *handle;
+ if (obj->IsHeapObject()) {
+ DCHECK(!HeapObject::cast(obj)->GetHeap()->InNewSpace(obj));
+ imm_ = reinterpret_cast<intptr_t>(handle.location());
+ rmode_ = RelocInfo::EMBEDDED_OBJECT;
+ } else {
+ // no relocation needed
+ imm_ = reinterpret_cast<intptr_t>(obj);
+ rmode_ = kRelocInfo_NONEPTR;
+ }
+}
+
+
+MemOperand::MemOperand(Register rn, int32_t offset) {
+ baseRegister = rn;
+ indexRegister = r0;
+ offset_ = offset;
+}
+
+
+MemOperand::MemOperand(Register rx, Register rb, int32_t offset) {
+ baseRegister = rb;
+ indexRegister = rx;
+ offset_ = offset;
+}
+
+
+// -----------------------------------------------------------------------------
+// Specific instructions, constants, and masks.
+
+
+Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
+ : AssemblerBase(isolate, buffer, buffer_size),
+ recorded_ast_id_(TypeFeedbackId::None()),
+ code_targets_(100),
+ positions_recorder_(this) {
+ reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_);
+
+ no_trampoline_pool_before_ = 0;
+ trampoline_pool_blocked_nesting_ = 0;
+ // We leave space (kMaxBlockTrampolineSectionSize)
+ // for BlockTrampolinePoolScope buffer.
+ next_buffer_check_ =
+ FLAG_force_long_branches ? kMaxInt : kMaxCondBranchReach -
+ kMaxBlockTrampolineSectionSize;
+ internal_trampoline_exception_ = false;
+ last_bound_pos_ = 0;
+ trampoline_emitted_ = FLAG_force_long_branches;
+ unbound_labels_count_ = 0;
+ ClearRecordedAstId();
+ relocations_.reserve(128);
+}
+
+
+void Assembler::GetCode(CodeDesc* desc) {
+ EmitRelocations();
+
+ // Set up code descriptor.
+ desc->buffer = buffer_;
+ desc->buffer_size = buffer_size_;
+ desc->instr_size = pc_offset();
+ desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
+ desc->origin = this;
+}
+
+
+void Assembler::Align(int m) {
+ DCHECK(m >= 4 && base::bits::IsPowerOfTwo32(m));
+ // DCHECK((pc_offset() & (kInstrSize - 1)) == 0);
+ while ((pc_offset() & (m - 1)) != 0) {
+ nop(0);
+ }
+}
+
+
+void Assembler::CodeTargetAlign() { Align(8); }
+
+
+Condition Assembler::GetCondition(Instr instr) {
+ switch (instr & kCondMask) {
+ case BT:
+ return eq;
+ case BF:
+ return ne;
+ default:
+ UNIMPLEMENTED();
+ }
+ return al;
+}
+
+
+Register Assembler::GetRA(Instr instr) {
+ Register reg;
+ reg.code_ = Instruction::RAValue(instr);
+ return reg;
+}
+
+
+Register Assembler::GetRB(Instr instr) {
+ Register reg;
+ reg.code_ = Instruction::RBValue(instr);
+ return reg;
+}
+
+
+#if V8_TARGET_ARCH_S390X
+// This code assumes a FIXED_SEQUENCE for 64bit loads (iihf/iilf)
+bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) {
+ // Check the instructions are the iihf/iilf load into ip
+ return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9));
+}
+#else
+// This code assumes a FIXED_SEQUENCE for 32bit loads (iilf)
+bool Assembler::Is32BitLoadIntoIP(SixByteInstr instr) {
+ // Check the instruction is an iilf load into ip/r12.
+ return ((instr >> 32) == 0xC0C9);
+}
+#endif
+
+bool Assembler::IsCmpRegister(Instr instr) {
+ // @TODO Re-enable this properly
+ DCHECK(false);
+ return Instruction::S390OpcodeValue(reinterpret_cast<byte*>(&instr)) == CR;
+}
+
+
+// Labels refer to positions in the (to be) generated code.
+// There are bound, linked, and unused labels.
+//
+// Bound labels refer to known positions in the already
+// generated code. pos() is the position the label refers to.
+//
+// Linked labels refer to unknown positions in the code
+// to be generated; pos() is the position of the last
+// instruction using the label.
+
+// The link chain is terminated by a negative code position (must be aligned)
+const int kEndOfChain = -4;
+
+int Assembler::target_at(int pos) {
+ SixByteInstr instr = instr_at(pos);
+ // check which type of branch this is 16 or 26 bit offset
+ Opcode opcode = Instruction::S390OpcodeValue(buffer_ + pos);
+
+ if (BRC == opcode || BRCT == opcode || BRCTG == opcode) {
+ int16_t imm16 = SIGN_EXT_IMM16((instr & kImm16Mask));
+ imm16 <<= 1; // BRC immediate is in # of halfwords
+ if (imm16 == 0)
+ return kEndOfChain;
+ return pos + imm16;
+ } else if (LLILF == opcode || BRCL == opcode
+ || LARL == opcode || BRASL == opcode) {
+ int32_t imm32 = static_cast<int32_t>(
+ instr & (static_cast<uint64_t>(0xffffffff)));
+ imm32 <<= 1; // BRCL immediate is in # of halfwords
+ if (imm32 == 0)
+ return kEndOfChain;
+ return pos + imm32;
+ }
+
+ // Unknown condition
+ DCHECK(false);
+ return -1;
+}
+
+
+void Assembler::target_at_put(int pos, int target_pos) {
+ SixByteInstr instr = instr_at(pos);
+ Opcode opcode = Instruction::S390OpcodeValue(buffer_ + pos);
+
+ if (BRC == opcode || BRCT == opcode || BRCTG == opcode) {
+ int16_t imm16 = target_pos - pos;
+ instr &= (~0xffff);
+ DCHECK(is_int16(imm16));
+ instr_at_put<FourByteInstr>(pos, instr | (imm16 >> 1));
+ return;
+ } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) {
+ // BRCL / LARL
+ int32_t imm32 = target_pos - pos;
+ instr &= (~static_cast<uint64_t>(0xffffffff));
+ instr_at_put<SixByteInstr>(pos, instr | (imm32 >> 1));
+ return;
+ } else if (LLILF == opcode) {
+ DCHECK(target_pos == kEndOfChain || target_pos >= 0);
+ // Emitted label constant, not part of a branch.
+ // Make label relative to Code* of generated Code object.
+ int32_t imm32 = target_pos + (Code::kHeaderSize - kHeapObjectTag);
+ instr &= (~static_cast<uint64_t>(0xffffffff));
+ instr_at_put<SixByteInstr>(pos, instr | imm32);
+ return;
+ }
+ DCHECK(false);
+}
+
+
+int Assembler::max_reach_from(int pos) {
+ Opcode opcode = Instruction::S390OpcodeValue(buffer_ + pos);
+
+ // Check which type of instr. In theory, we can return
+ // the values below + 1, given offset is # of halfwords
+ if (BRC == opcode || BRCT == opcode || BRCTG == opcode) {
+ return 16;
+ } else if (LLILF == opcode || BRCL == opcode
+ || LARL == opcode || BRASL == opcode) {
+ return 31; // Using 31 as workaround instead of 32 as
+ // is_intn(x,32) doesn't work on 32-bit platforms.
+ // llilf: Emitted label constant, not part of
+ // a branch (regexp PushBacktrack).
+ }
+ DCHECK(false);
+ return 16;
+}
+
+
+void Assembler::bind_to(Label* L, int pos) {
+ DCHECK(0 <= pos && pos <= pc_offset()); // must have a valid binding position
+ // int32_t trampoline_pos = kInvalidSlotPos;
+ if (L->is_linked() && !trampoline_emitted_) {
+ unbound_labels_count_--;
+ next_buffer_check_ += kTrampolineSlotsSize;
+ }
+
+ while (L->is_linked()) {
+ int fixup_pos = L->pos();
+#ifdef DEBUG
+ int32_t offset = pos - fixup_pos;
+ int maxReach = max_reach_from(fixup_pos);
+#endif
+ next(L); // call next before overwriting link with target at fixup_pos
+ // if (is_intn(offset, maxReach) == false) {
+ // if (trampoline_pos == kInvalidSlotPos) {
+ // trampoline_pos = get_trampoline_entry();
+ // CHECK(trampoline_pos != kInvalidSlotPos);
+ // target_at_put(trampoline_pos, pos);
+ // }
+ // target_at_put(fixup_pos, trampoline_pos);
+ // } else {
+ DCHECK(is_intn(offset, maxReach));
+ target_at_put(fixup_pos, pos);
+ // }
+ }
+ L->bind_to(pos);
+
+ // Keep track of the last bound label so we don't eliminate any instructions
+ // before a bound label.
+ if (pos > last_bound_pos_) last_bound_pos_ = pos;
+}
+
+
+void Assembler::bind(Label* L) {
+ DCHECK(!L->is_bound()); // label can only be bound once
+ bind_to(L, pc_offset());
+}
+
+
+void Assembler::next(Label* L) {
+ DCHECK(L->is_linked());
+ int link = target_at(L->pos());
+ if (link == kEndOfChain) {
+ L->Unuse();
+ } else {
+ DCHECK(link >= 0);
+ L->link_to(link);
+ }
+}
+
+
+bool Assembler::is_near(Label* L, Condition cond) {
+ DCHECK(L->is_bound());
+ if (L->is_bound() == false) return false;
+
+ int maxReach = ((cond == al) ? 26 : 16);
+ int offset = L->pos() - pc_offset();
+
+ return is_intn(offset, maxReach);
+}
+
+
+// Returns the next free trampoline entry.
+int32_t Assembler::get_trampoline_entry() {
+ int32_t trampoline_entry = kInvalidSlotPos;
+
+ if (!internal_trampoline_exception_) {
+ trampoline_entry = trampoline_.take_slot();
+
+ if (kInvalidSlotPos == trampoline_entry) {
+ internal_trampoline_exception_ = true;
+ }
+ }
+ return trampoline_entry;
+}
+
+
+int Assembler::link(Label* L) {
+ int position;
+ if (L->is_bound()) {
+ position = L->pos();
+ } else {
+ if (L->is_linked()) {
+ position = L->pos(); // L's link
+ } else {
+ // was: target_pos = kEndOfChain;
+ // However, using self to mark the first reference
+ // should avoid most instances of branch offset overflow. See
+ // target_at() for where this is converted back to kEndOfChain.
+ position = pc_offset();
+ if (!trampoline_emitted_) {
+ unbound_labels_count_++;
+ next_buffer_check_ -= kTrampolineSlotsSize;
+ }
+ }
+ L->link_to(pc_offset());
+ }
+
+ return position;
+}
+
+
+void Assembler::load_label_offset(Register r1, Label* L) {
+ int target_pos;
+ int constant;
+ if (L->is_bound()) {
+ target_pos = L->pos();
+ constant = target_pos + (Code::kHeaderSize - kHeapObjectTag);
+ } else {
+ if (L->is_linked()) {
+ target_pos = L->pos(); // L's link
+ } else {
+ // was: target_pos = kEndOfChain;
+ // However, using branch to self to mark the first reference
+ // should avoid most instances of branch offset overflow. See
+ // target_at() for where this is converted back to kEndOfChain.
+ target_pos = pc_offset();
+ if (!trampoline_emitted_) {
+ unbound_labels_count_++;
+ next_buffer_check_ -= kTrampolineSlotsSize;
+ }
+ }
+ L->link_to(pc_offset());
+
+ constant = target_pos - pc_offset();
+ // DCHECK(is_int31(constant));
+ // instr_at_put(at_offset, constant);
+ }
+ llilf(r1, Operand(constant));
+}
+
+
+// Pseudo op - branch on condition
+void Assembler::branchOnCond(Condition c, int branch_offset, bool is_bound) {
+ int offset = branch_offset;
+ if (is_bound && is_int16(offset)) {
+ brc(c, Operand(offset & 0xFFFF)); // short jump
+ } else {
+ brcl(c, Operand(offset)); // long jump
+ }
+}
+
+
+// Branch On Count (32)
+void Assembler::brct(Register r1, const Operand& imm) {
+ // BRCT actually encodes # of halfwords, so divide by 2.
+ int16_t numHalfwords = static_cast<int16_t>(imm.immediate()) / 2;
+ Operand halfwordOp = Operand(numHalfwords);
+ halfwordOp.setBits(16);
+ ri_form(BRCT, r1, halfwordOp);
+}
+
+
+// Branch On Count (32)
+void Assembler::brctg(Register r1, const Operand& imm) {
+ // BRCTG actually encodes # of halfwords, so divide by 2.
+ int16_t numHalfwords = static_cast<int16_t>(imm.immediate()) / 2;
+ Operand halfwordOp = Operand(numHalfwords);
+ halfwordOp.setBits(16);
+ ri_form(BRCTG, r1, halfwordOp);
+}
+
+
+// Indirect Conditional Branch via register
+void Assembler::bcr(Condition m, Register target) {
+ rr_form(BCR, m, target);
+}
+
+
+// 32-bit Store Multiple - short displacement (12-bits unsigned)
+void Assembler::stm(Register r1, Register r2, const MemOperand& src) {
+ rs_form(STM, r1, r2, src.rb(), src.offset());
+}
+
+
+// 32-bit Store Multiple - long displacement (20-bits signed)
+void Assembler::stmy(Register r1, Register r2, const MemOperand& src) {
+ rsy_form(STMY, r1, r2, src.rb(), src.offset());
+}
+
+
+// 64-bit Store Multiple - long displacement (20-bits signed)
+void Assembler::stmg(Register r1, Register r2, const MemOperand& src) {
+ rsy_form(STMG, r1, r2, src.rb(), src.offset());
+}
+
+
+// Exception-generating instructions and debugging support.
+// Stops with a non-negative code less than kNumOfWatchedStops support
+// enabling/disabling and a counter feature. See simulator-s390.h .
+void Assembler::stop(const char* msg, Condition cond, int32_t code,
+ CRegister cr) {
+ if (cond != al) {
+ Label skip;
+ b(NegateCondition(cond), &skip, Label::kNear);
+ bkpt(0);
+ bind(&skip);
+ } else {
+ bkpt(0);
+ }
+}
+
+
+void Assembler::bkpt(uint32_t imm16) {
+ emit2bytes(0x0001);
+ // emit(0x7d821008);
+}
+
+
+// Pseudo instructions.
+void Assembler::nop(int type) {
+ switch (type) {
+ case 0:
+ lr(r0, r0);
+ break;
+ case DEBUG_BREAK_NOP:
+ // @TODO Need to come up with a better NOP break
+ oill(r3, Operand::Zero());
+ break;
+ default:
+ UNIMPLEMENTED();
+ }
+}
+
+
+// I format <insn> i
+// +--------+---------+
+// | OpCode | i |
+// +--------+---------+
+// 0 8 15
+//
+#define I_FORM_EMIT(name, op)\
+void Assembler::name(const Operand& i) {\
+ i_form(op, i);\
+}
+
+
+void Assembler::i_form(Opcode op, const Operand& i) {
+ DCHECK(is_uint8(i.imm_));
+ DCHECK(is_uint8(op));
+ emit2bytes(op << 8 | i.imm_);
+}
+
+
+// E format <insn>
+// +------------------+
+// | OpCode |
+// +------------------+
+// 0 15
+//
+#define E_FORM_EMIT(name, op)\
+void Assembler::name() {\
+ e_form(op);\
+}
+
+
+void Assembler::e_form(Opcode op) {
+ DCHECK(is_uint16(op));
+ emit2bytes(op);
+}
+
+
+// IE format: <insn> i1, i2
+// +--------+---------+--------+----+----+
+// | OpCode |////////| I1 | I2 |
+// +--------+---------+--------+----+----+
+// 0 8 16 24 28 31
+#define IE_FORM_EMIT(name, op)\
+void Assembler::name(const Operand& i1, const Operand& i2) {\
+ ie_form(op, i1, i2);\
+}
+
+
+void Assembler::ie_form(Opcode op, const Operand& i1, const Operand& i2) {
+ DCHECK(is_uint16(op));
+ DCHECK(is_uint4(i1.imm_));
+ DCHECK(is_uint4(i2.imm_));
+ emit4bytes((op << 16) |
+ ((i1.imm_ & 0xf) * B4) |
+ (i2.imm_ & 0xf));
+}
+
+
+// RR format: <insn> R1,R2
+// +--------+----+----+
+// | OpCode | R1 | R2 |
+// +--------+----+----+
+// 0 8 12 15
+#define RR_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Register r2) { \
+ rr_form(op, r1, r2); \
+}
+
+
+void Assembler::rr_form(Opcode op, Register r1, Register r2) {
+ DCHECK(is_uint8(op));
+ // DCHECK(is_uint4(r1.code()));
+ // DCHECK(is_uint4(r2.code()));
+ emit2bytes(op*B8 | r1.code()*B4 | r2.code());
+}
+
+
+void Assembler::rr_form(Opcode op,
+ DoubleRegister r1,
+ DoubleRegister r2) {
+ DCHECK(is_uint8(op));
+ // DCHECK(is_uint4(r1.code()));
+ // DCHECK(is_uint4(r2.code()));
+ emit2bytes(op*B8 | r1.code()*B4 | r2.code());
+}
+
+
+// RR2 format: <insn> M1,R2
+// +--------+----+----+
+// | OpCode | M1 | R2 |
+// +--------+----+----+
+// 0 8 12 15
+#define RR2_FORM_EMIT(name, op) \
+void Assembler::name(Condition m1, Register r2) { \
+ rr_form(op, m1, r2); \
+}
+
+
+void Assembler::rr_form(Opcode op, Condition m1, Register r2) {
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint4(m1));
+ // DCHECK(is_uint4(r2.code()));
+ emit2bytes(op*B8 | m1*B4 | r2.code());
+}
+
+
+// RX format: <insn> R1,D2(X2,B2)
+// +--------+----+----+----+-------------+
+// | OpCode | R1 | X2 | B2 | D2 |
+// +--------+----+----+----+-------------+
+// 0 8 12 16 20 31
+#define RX_FORM_EMIT(name, op) \
+void Assembler::name(Register r, const MemOperand& opnd) { \
+ name(r, opnd.getIndexRegister(), opnd.getBaseRegister(), \
+ opnd.getDisplacement());\
+}\
+void Assembler::name(Register r1, Register x2, \
+ Register b2, Disp d2) {\
+ rx_form(op, r1, x2, b2, d2);\
+}
+void Assembler::rx_form(Opcode op,
+ Register r1,
+ Register x2,
+ Register b2,
+ Disp d2) {
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint12(d2));
+ emit4bytes(op*B24 | r1.code()*B20 |
+ x2.code()*B16 | b2.code()*B12 | d2);
+}
+
+
+void Assembler::rx_form(Opcode op,
+ DoubleRegister r1,
+ Register x2,
+ Register b2,
+ Disp d2) {
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint12(d2));
+ emit4bytes(op*B24 | r1.code()*B20 |
+ x2.code()*B16 | b2.code()*B12 | d2);
+}
+
+
+// RI1 format: <insn> R1,I2
+// +--------+----+----+------------------+
+// | OpCode | R1 |OpCd| I2 |
+// +--------+----+----+------------------+
+// 0 8 12 16 31
+#define RI1_FORM_EMIT(name, op) \
+void Assembler::name(Register r, const Operand& i2) { \
+ ri_form(op, r, i2);\
+}
+
+
+void Assembler::ri_form(Opcode op, Register r1, const Operand& i2) {
+ DCHECK(is_uint12(op));
+ DCHECK(is_uint16(i2.imm_) || is_int16(i2.imm_));
+ emit4bytes((op & 0xFF0) * B20 |
+ r1.code() * B20 |
+ (op & 0xF) * B16 |
+ (i2.imm_ & 0xFFFF));
+}
+
+
+// RI2 format: <insn> M1,I2
+// +--------+----+----+------------------+
+// | OpCode | M1 |OpCd| I2 |
+// +--------+----+----+------------------+
+// 0 8 12 16 31
+#define RI2_FORM_EMIT(name, op) \
+void Assembler::name(Condition m, const Operand& i2) {\
+ ri_form(op, m, i2);\
+}
+
+
+void Assembler::ri_form(Opcode op, Condition m1, const Operand& i2) {
+ DCHECK(is_uint12(op));
+ DCHECK(is_uint4(m1));
+ DCHECK(is_uint16(i2.imm_));
+ emit4bytes((op & 0xFF0) * B20 |
+ m1 * B20 |
+ (op & 0xF) * B16 |
+ (i2.imm_ & 0xFFFF));
+}
+
+
+// RIE-f format: <insn> R1,R2,I3,I4,I5
+// +--------+----+----+------------------+--------+--------+
+// | OpCode | R1 | R2 | I3 | I4 | I5 | OpCode |
+// +--------+----+----+------------------+--------+--------+
+// 0 8 12 16 24 32 40 47
+void Assembler::rie_f_form(Opcode op, Register r1, Register r2,
+ const Operand &i3, const Operand& i4, const Operand& i5) {
+ DCHECK(is_uint16(op));
+ DCHECK(is_uint8(i3.imm_));
+ DCHECK(is_uint8(i4.imm_));
+ DCHECK(is_uint8(i5.imm_));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(r2.code())) * B32 |
+ (static_cast<uint64_t>(i3.imm_)) * B24 |
+ (static_cast<uint64_t>(i4.imm_)) * B16 |
+ (static_cast<uint64_t>(i5.imm_)) * B8 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RIE format: <insn> R1,R3,I2
+// +--------+----+----+------------------+--------+--------+
+// | OpCode | R1 | R3 | I2 |////////| OpCode |
+// +--------+----+----+------------------+--------+--------+
+// 0 8 12 16 32 40 47
+#define RIE_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Register r3, \
+ const Operand& i2) {\
+ rie_form(op, r1, r3, i2);\
+}
+
+
+void Assembler::rie_form(Opcode op, Register r1, Register r3,
+ const Operand& i2) {
+ DCHECK(is_uint16(op));
+ DCHECK(is_int16(i2.imm_));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(r3.code())) * B32 |
+ (static_cast<uint64_t>(i2.imm_ & 0xFFFF)) * B16 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RIL1 format: <insn> R1,I2
+// +--------+----+----+------------------------------------+
+// | OpCode | R1 |OpCd| I2 |
+// +--------+----+----+------------------------------------+
+// 0 8 12 16 47
+#define RIL1_FORM_EMIT(name, op) \
+void Assembler::name(Register r, const Operand& i2) {\
+ ril_form(op, r, i2);\
+}
+
+
+void Assembler::ril_form(Opcode op, Register r1, const Operand& i2) {
+ DCHECK(is_uint12(op));
+ // DCHECK(is_uint4(r1.code()));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF0)) * B36 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(op & 0x00F)) * B32 |
+ (static_cast<uint64_t>(i2.imm_) & 0xFFFFFFFF);
+ emit6bytes(code);
+}
+
+
+// RIL2 format: <insn> M1,I2
+// +--------+----+----+------------------------------------+
+// | OpCode | M1 |OpCd| I2 |
+// +--------+----+----+------------------------------------+
+// 0 8 12 16 47
+#define RIL2_FORM_EMIT(name, op) \
+void Assembler::name(Condition m1, const Operand& i2) {\
+ ril_form(op, m1, i2);\
+}
+
+
+void Assembler::ril_form(Opcode op, Condition m1, const Operand& i2) {
+ DCHECK(is_uint12(op));
+ DCHECK(is_uint4(m1));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF0)) * B36 |
+ (static_cast<uint64_t>(m1)) * B36 |
+ (static_cast<uint64_t>(op & 0x00F)) * B32 |
+ (static_cast<uint64_t>(i2.imm_ & 0xFFFFFFFF));
+ emit6bytes(code);
+}
+
+
+// RRE format: <insn> R1,R2
+// +------------------+--------+----+----+
+// | OpCode |////////| R1 | R2 |
+// +------------------+--------+----+----+
+// 0 16 24 28 31
+#define RRE_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Register r2) {\
+ rre_form(op, r1, r2);\
+}
+
+
+void Assembler::rre_form(Opcode op, Register r1, Register r2) {
+ DCHECK(is_uint16(op));
+ // DCHECK(is_uint4(r1.code()));
+ // DCHECK(is_uint4(r2.code()));
+ emit4bytes(op << 16 | r1.code()*B4 | r2.code());
+}
+
+
+void Assembler::rre_form(Opcode op, DoubleRegister r1,
+ DoubleRegister r2) {
+ DCHECK(is_uint16(op));
+ // DCHECK(is_uint4(r1.code()));
+ // DCHECK(is_uint4(r2.code()));
+ emit4bytes(op << 16 | r1.code()*B4 | r2.code());
+}
+
+
+// RRD format: <insn> R1,R3, R2
+// +------------------+----+----+----+----+
+// | OpCode | R1 |////| R3 | R2 |
+// +------------------+----+----+----+----+
+// 0 16 20 24 28 31
+#define RRD_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Register r3, \
+ Register r2) {\
+ rrd_form(op, r1, r3, r2);\
+}
+
+
+void Assembler::rrd_form(Opcode op, Register r1, Register r3, \
+ Register r2) {
+ emit4bytes(op << 16 | r1.code()*B12 | r3.code()*B4\
+ | r2.code());
+}
+
+
+// RS1 format: <insn> R1,R3,D2(B2)
+// +--------+----+----+----+-------------+
+// | OpCode | R1 | R3 | B2 | D2 |
+// +--------+----+----+----+-------------+
+// 0 8 12 16 20 31
+#define RS1_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Register r3, \
+ Register b2, Disp d2) {\
+ rs_form(op, r1, r3, b2, d2);\
+}\
+void Assembler::name(Register r1, Register r3, \
+ const MemOperand& opnd) {\
+ name(r1, r3, opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::rs_form(Opcode op,
+ Register r1,
+ Register r3,
+ Register b2,
+ const Disp d2) {
+ DCHECK(is_uint12(d2));
+ emit4bytes(op * B24 | r1.code() * B20 | r3.code() * B16 |
+ b2.code() * B12 | d2);
+}
+
+
+// RS2 format: <insn> R1,M3,D2(B2)
+// +--------+----+----+----+-------------+
+// | OpCode | R1 | M3 | B2 | D2 |
+// +--------+----+----+----+-------------+
+// 0 8 12 16 20 31
+#define RS2_FORM_EMIT(name, op) \
+void Assembler::name(Register r1, Condition m3, \
+ Register b2, Disp d2) {\
+ rs_form(op, r1, m3, b2, d2);\
+}\
+void Assembler::name(Register r1, Condition m3, \
+ const MemOperand& opnd) {\
+ name(r1, m3, opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::rs_form(Opcode op,
+ Register r1,
+ Condition m3,
+ Register b2,
+ const Disp d2) {
+ DCHECK(is_uint12(d2));
+ emit4bytes(op * B24 | r1.code() * B20 | m3 * B16 |
+ b2.code() * B12 | d2);
+}
+
+
+// RSI format: <insn> R1,R3,I2
+// +--------+----+----+------------------+
+// | OpCode | R1 | R3 | RI2 |
+// +--------+----+----+------------------+
+// 0 8 12 16 31
+#define RSI_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r3, const Operand& i2) {\
+ rsi_form(op, r1, r3, i2);\
+}
+
+
+void Assembler::rsi_form(Opcode op, Register r1,
+ Register r3, const Operand& i2) {
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint16(i2.imm_));
+ emit4bytes(op * B24 | r1.code() * B20 | r3.code() * B16 |
+ (i2.imm_ & 0xFFFF));
+}
+
+
+// RSL format: <insn> R1,R3,D2(B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | L1 | | B2 | D2 | | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+#define RSL_FORM_EMIT(name, op)\
+void Assembler::name(Length l1, Register b2, Disp d2) {\
+ rsl_form(op, l1, b2, d2);\
+}
+
+
+void Assembler::rsl_form(Opcode op, Length l1, Register b2, Disp d2) {
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(l1)) * B36 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2)) * B16 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RSY1 format: <insn> R1,R3,D2(B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+#define RSY1_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r3, Register b2, \
+ Disp d2) {\
+ rsy_form(op, r1, r3, b2, d2);\
+}\
+void Assembler::name(Register r1, Register r3, const MemOperand& opnd) {\
+ name(r1, r3, opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::rsy_form(Opcode op,
+ Register r1,
+ Register r3,
+ Register b2,
+ const Disp d2) {
+ DCHECK(is_int20(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(r3.code())) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(d2 & 0x0FF000)) >> 4 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RSY2 format: <insn> R1,M3,D2(B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | M3 | B2 | DL2 | DH2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+#define RSY2_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Condition m3, Register b2, \
+ Disp d2) {\
+ rsy_form(op, r1, m3, b2, d2);\
+}\
+void Assembler::name(Register r1, Condition m3, const MemOperand& opnd) {\
+ name(r1, m3, opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::rsy_form(Opcode op,
+ Register r1,
+ Condition m3,
+ Register b2,
+ const Disp d2) {
+ DCHECK(is_int20(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(m3)) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(d2 & 0x0FF000)) >> 4 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RXE format: <insn> R1,D2(X2,B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | X2 | B2 | D2 |////////| OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+#define RXE_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register x2, Register b2, \
+ Disp d2) {\
+ rxe_form(op, r1, x2, b2, d2);\
+}\
+void Assembler::name(Register r1, const MemOperand& opnd) {\
+ name(r1, opnd.getIndexRegister(), opnd.getBaseRegister(), \
+ opnd.getDisplacement());\
+}
+
+
+void Assembler::rxe_form(Opcode op, Register r1, Register x2, Register b2,
+ Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(x2.code())) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RXY format: <insn> R1,D2(X2,B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | X2 | B2 | DL2 | DH2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 36 40 47
+#define RXY_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register x2, Register b2, \
+ Disp d2) {\
+ rxy_form(op, r1, x2, b2, d2);\
+}\
+void Assembler::name(Register r1, const MemOperand& opnd) {\
+ name(r1, opnd.getIndexRegister(), opnd.getBaseRegister(), \
+ opnd.getDisplacement());\
+}
+
+
+void Assembler::rxy_form(Opcode op, Register r1, Register x2, Register b2,
+ Disp d2) {
+ DCHECK(is_int20(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(x2.code())) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(d2 & 0x0FF000)) >> 4 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+void Assembler::rxy_form(Opcode op, DoubleRegister r1,
+ Register x2, Register b2,
+ Disp d2) {
+ DCHECK(is_int20(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(x2.code())) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(d2 & 0x0FF000)) >> 4 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RRS format: <insn> R1,R2,M3,D4(B4)
+// +--------+----+----+----+-------------+----+---+--------+
+// | OpCode | R1 | R2 | B4 | D4 | M3 |///| OpCode |
+// +--------+----+----+----+-------------+----+---+--------+
+// 0 8 12 16 20 32 36 40 47
+#define RRS_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r2, Register b4, \
+ Disp d4, Condition m3) {\
+ rrs_form(op, r1, r2, b4, d4, m3);\
+}\
+void Assembler::name(Register r1, Register r2, Condition m3, \
+ const MemOperand& opnd) {\
+ name(r1, r2, opnd.getBaseRegister(), opnd.getDisplacement(), m3);\
+}
+
+
+void Assembler::rrs_form(Opcode op, Register r1, Register r2, Register b4,
+ Disp d4, Condition m3) {
+ DCHECK(is_uint12(d4));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(r2.code())) * B32 |
+ (static_cast<uint64_t>(b4.code())) * B28 |
+ (static_cast<uint64_t>(d4)) * B16 |
+ (static_cast<uint64_t>(m3)) << 12 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// RIS format: <insn> R1,I2,M3,D4(B4)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | M3 | B4 | D4 | I2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+#define RIS_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Condition m3, Register b4, \
+ Disp d4, const Operand& i2) {\
+ ris_form(op, r1, m3, b4, d4, i2);\
+}\
+void Assembler::name(Register r1, const Operand& i2, Condition m3, \
+ const MemOperand& opnd) {\
+ name(r1, m3, opnd.getBaseRegister(), opnd.getDisplacement(), i2);\
+}
+
+
+void Assembler::ris_form(Opcode op, Register r1, Condition m3, Register b4, \
+ Disp d4, const Operand& i2) {
+ DCHECK(is_uint12(d4));
+ DCHECK(is_uint16(op));
+ DCHECK(is_uint8(i2.imm_));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(m3)) * B32 |
+ (static_cast<uint64_t>(b4.code())) * B28 |
+ (static_cast<uint64_t>(d4)) * B16 |
+ (static_cast<uint64_t>(i2.imm_)) << 8 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// S format: <insn> D2(B2)
+// +------------------+----+-------------+
+// | OpCode | B2 | D2 |
+// +------------------+----+-------------+
+// 0 16 20 31
+#define S_FORM_EMIT(name, op)\
+void Assembler::name(Register b1, Disp d2) {\
+ s_form(op, b1, d2);\
+}\
+void Assembler::name(const MemOperand& opnd) {\
+ name(opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::s_form(Opcode op, Register b1, Disp d2) {
+ DCHECK(is_uint12(d2));
+ emit4bytes(op << 16 | b1.code()*B12 | d2);
+}
+
+
+// SI format: <insn> D1(B1),I2
+// +--------+---------+----+-------------+
+// | OpCode | I2 | B1 | D1 |
+// +--------+---------+----+-------------+
+// 0 8 16 20 31
+#define SI_FORM_EMIT(name, op)\
+void Assembler::name(const Operand& i2, Register b1, \
+ Disp d1) {\
+ si_form(op, i2, b1, d1);\
+}\
+void Assembler::name(const MemOperand& opnd, const Operand& i2) {\
+ name(i2, opnd.getBaseRegister(), opnd.getDisplacement()); \
+}
+
+
+void Assembler::si_form(Opcode op, const Operand& i2, Register b1,
+ Disp d1) {
+ emit4bytes((op & 0x00FF) << 24 | i2.imm_*B16 | b1.code()*B12 | d1);
+}
+
+
+// SIY format: <insn> D1(B1),I2
+// +--------+---------+----+-------------+--------+--------+
+// | OpCode | I2 | B1 | DL1 | DH1 | OpCode |
+// +--------+---------+----+-------------+--------+--------+
+// 0 8 16 20 32 36 40 47
+#define SIY_FORM_EMIT(name, op)\
+void Assembler::name(const Operand& i2, Register b1, \
+ Disp d1) {\
+ siy_form(op, i2, b1, d1);\
+}\
+void Assembler::name(const MemOperand& opnd, const Operand& i2) {\
+ name(i2, opnd.getBaseRegister(), opnd.getDisplacement());\
+}
+
+
+void Assembler::siy_form(Opcode op, const Operand& i2, Register b1, \
+ Disp d1) {
+ DCHECK(is_uint20(d1));
+ DCHECK(is_uint16(op));
+ DCHECK(is_uint8(i2.imm_));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(i2.imm_)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1 & 0x0FFF)) * B16 |
+ (static_cast<uint64_t>(d1 & 0x0FF000)) >> 4 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// SIL format: <insn> D1(B1),I2
+// +------------------+----+-------------+-----------------+
+// | OpCode | B1 | D1 | I2 |
+// +------------------+----+-------------+-----------------+
+// 0 16 20 32 47
+#define SIL_FORM_EMIT(name, op)\
+void Assembler::name(Register b1, Disp d1, \
+ const Operand& i2) {\
+ sil_form(op, b1, d1, i2);\
+}\
+void Assembler::name(const MemOperand& opnd, const Operand& i2) {\
+ name(opnd.getBaseRegister(), opnd.getDisplacement(), i2);\
+}
+
+
+void Assembler::sil_form(Opcode op, Register b1, Disp d1,
+ const Operand& i2) {
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint16(op));
+ DCHECK(is_uint16(i2.imm_));
+ uint64_t code = (static_cast<uint64_t>(op)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(i2.imm_));
+ emit6bytes(code);
+}
+
+
+// RXF format: <insn> R1,R3,D2(X2,B2)
+// +--------+----+----+----+-------------+----+---+--------+
+// | OpCode | R3 | X2 | B2 | D2 | R1 |///| OpCode |
+// +--------+----+----+----+-------------+----+---+--------+
+// 0 8 12 16 20 32 36 40 47
+#define RXF_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r3, Register b2, \
+ Register x2, Disp d2) {\
+ rxf_form(op, r1, r3, b2, x2, d2);\
+}\
+void Assembler::name(Register r1, Register r3, const MemOperand& opnd) {\
+ name(r1, r3, opnd.getBaseRegister(), opnd.getIndexRegister(), \
+ opnd.getDisplacement());\
+}
+
+
+void Assembler::rxf_form(Opcode op, Register r1, Register r3, Register b2, \
+ Register x2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF00)) * B32 |
+ (static_cast<uint64_t>(r3.code())) * B36 |
+ (static_cast<uint64_t>(x2.code())) * B32 |
+ (static_cast<uint64_t>(b2.code())) * B28 |
+ (static_cast<uint64_t>(d2)) * B16 |
+ (static_cast<uint64_t>(r1.code())) * B12 |
+ (static_cast<uint64_t>(op & 0x00FF));
+ emit6bytes(code);
+}
+
+
+// SS1 format: <insn> D1(L,B1),D2(B3)
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | L | B1 | D1 | B2 | D2 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SS1_FORM_EMIT(name, op)\
+void Assembler::name(Register b1, Disp d1, \
+ Register b2, Disp d2, Length l) {\
+ ss_form(op, l, b1, d1, b2, d2);\
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2, \
+ Length length) {\
+ name(opnd1.getBaseRegister(), \
+ opnd1.getDisplacement(), opnd2.getBaseRegister(), \
+ opnd2.getDisplacement(), length);\
+}
+
+
+void Assembler::ss_form(Opcode op, Length l, Register b1, Disp d1,
+ Register b2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint8(l));
+ uint64_t code = (static_cast<uint64_t>(op)) * B40 |
+ (static_cast<uint64_t>(l)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// SS2 format: <insn> D1(L1,B1), D2(L3,B3)
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | L1 | L2 | B1 | D1 | B2 | D2 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SS2_FORM_EMIT(name, op)\
+void Assembler::name(Register b1, \
+ Disp d1, Register b2, \
+ Disp d2, Length l1, Length l2) {\
+ ss_form(op, l1, l2, b1, d1, b2, d2);\
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2, \
+ Length length1, Length length2) {\
+ name(opnd1.getBaseRegister(), \
+ opnd1.getDisplacement(), opnd2.getBaseRegister(), \
+ opnd2.getDisplacement(), length1, length2);\
+}
+
+
+void Assembler::ss_form(Opcode op, Length l1, Length l2, Register b1,
+ Disp d1, Register b2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint4(l2));
+ DCHECK(is_uint4(l1));
+ uint64_t code = (static_cast<uint64_t>(op)) * B40 |
+ (static_cast<uint64_t>(l1)) * B36 |
+ (static_cast<uint64_t>(l2)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// SS3 format: <insn> D1(L1,B1), D2(I3,B2)
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | L1 | I3 | B1 | D1 | B2 | D2 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SS3_FORM_EMIT(name, op)\
+void Assembler::name(const Operand& i3, Register b1, \
+ Disp d1, Register b2, \
+ Disp d2, Length l1) {\
+ ss_form(op, l1, i3, b1, d1, b2, d2);\
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2, \
+ Length length) {\
+ DCHECK(false);\
+}
+void Assembler::ss_form(Opcode op, Length l1, const Operand& i3, Register b1,
+ Disp d1, Register b2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint8(op));
+ DCHECK(is_uint4(l1));
+ DCHECK(is_uint4(i3.imm_));
+ uint64_t code = (static_cast<uint64_t>(op)) * B40 |
+ (static_cast<uint64_t>(l1)) * B36 |
+ (static_cast<uint64_t>(i3.imm_)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// SS4 format: <insn> D1(R1,B1), D2(R3,B2)
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | R1 | R3 | B1 | D1 | B2 | D2 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SS4_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r3, Register b1, \
+ Disp d1, Register b2, \
+ Disp d2) {\
+ ss_form(op, r1, r3, b1, d1, b2, d2);\
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2) {\
+ DCHECK(false);\
+}
+void Assembler::ss_form(Opcode op, Register r1, Register r3, Register b1,
+ Disp d1, Register b2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint8(op));
+ uint64_t code = (static_cast<uint64_t>(op)) * B40 |
+ (static_cast<uint64_t>(r1.code())) * B36 |
+ (static_cast<uint64_t>(r3.code())) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// SS5 format: <insn> D1(R1,B1), D2(R3,B2)
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | R1 | R3 | B2 | D2 | B4 | D4 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SS5_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r3, Register b2, \
+ Disp d2, Register b4, \
+ Disp d4) {\
+ ss_form(op, r1, r3, b2, d2, b4, d4); /*SS5 use the same form as SS4*/ \
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2) {\
+ DCHECK(false);\
+}
+
+
+#define SS6_FORM_EMIT(name, op) SS1_FORM_EMIT(name, op)
+
+// SSE format: <insn> D1(B1),D2(B2)
+// +------------------+----+-------------+----+------------+
+// | OpCode | B1 | D1 | B2 | D2 |
+// +------------------+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SSE_FORM_EMIT(name, op)\
+void Assembler::name(Register b1, Disp d1, Register b2, \
+ Disp d2) {\
+ sse_form(op, b1, d1, b2, d2);\
+}\
+void Assembler::name(const MemOperand& opnd1, const MemOperand& opnd2) {\
+ name(opnd1.getBaseRegister(), opnd1.getDisplacement(), \
+ opnd2.getBaseRegister(), opnd2.getDisplacement());\
+}
+void Assembler::sse_form(Opcode op, Register b1, Disp d1, Register b2,
+ Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint16(op));
+ uint64_t code = (static_cast<uint64_t>(op)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// SSF format: <insn> R3, D1(B1),D2(B2),R3
+// +--------+----+----+----+-------------+----+------------+
+// | OpCode | R3 |OpCd| B1 | D1 | B2 | D2 |
+// +--------+----+----+----+-------------+----+------------+
+// 0 8 12 16 20 32 36 47
+#define SSF_FORM_EMIT(name, op)\
+void Assembler::name(Register r3, Register b1, Disp d1, \
+ Register b2, Disp d2) {\
+ ssf_form(op, r3, b1, d1, b2, d2);\
+}\
+void Assembler::name(Register r3, const MemOperand& opnd1, \
+ const MemOperand& opnd2) {\
+ name(r3, opnd1.getBaseRegister(), opnd1.getDisplacement(), \
+ opnd2.getBaseRegister(), opnd2.getDisplacement());\
+}
+
+
+void Assembler::ssf_form(Opcode op, Register r3, Register b1, Disp d1,
+ Register b2, Disp d2) {
+ DCHECK(is_uint12(d2));
+ DCHECK(is_uint12(d1));
+ DCHECK(is_uint12(op));
+ uint64_t code = (static_cast<uint64_t>(op & 0xFF0)) * B36 |
+ (static_cast<uint64_t>(r3.code())) * B36 |
+ (static_cast<uint64_t>(op & 0x00F)) * B32 |
+ (static_cast<uint64_t>(b1.code())) * B28 |
+ (static_cast<uint64_t>(d1)) * B16 |
+ (static_cast<uint64_t>(b2.code())) * B12 |
+ (static_cast<uint64_t>(d2));
+ emit6bytes(code);
+}
+
+
+// RRF1 format: <insn> R1,R2,R3
+// +------------------+----+----+----+----+
+// | OpCode | R3 | | R1 | R2 |
+// +------------------+----+----+----+----+
+// 0 16 20 24 28 31
+#define RRF1_FORM_EMIT(name, op)\
+void Assembler::name(Register r1, Register r2, Register r3) {\
+ rrf1_form(op << 16 | r3.code()*B12 | r1.code()*B4 | r2.code());\
+}
+
+
+void Assembler::rrf1_form(Opcode op, Register r1, Register r2, Register r3) {
+ uint32_t code = op << 16 | r3.code()*B12 | r1.code()*B4 | r2.code();
+ emit4bytes(code);
+}
+
+
+void Assembler::rrf1_form(uint32_t code) {
+ emit4bytes(code);
+}
+
+
+// RRF2 format: <insn> R1,R2,M3
+// +------------------+----+----+----+----+
+// | OpCode | M3 | | R1 | R2 |
+// +------------------+----+----+----+----+
+// 0 16 20 24 28 31
+#define RRF2_FORM_EMIT(name, op)\
+void Assembler::name(Condition m3, Register r1, Register r2) {\
+ rrf2_form(op << 16 |m3*B12 | r1.code()*B4 | r2.code());\
+}
+
+
+void Assembler::rrf2_form(uint32_t code) {
+ emit4bytes(code);
+}
+
+
+// RRF3 format: <insn> R1,R2,R3,M4
+// +------------------+----+----+----+----+
+// | OpCode | R3 | M4 | R1 | R2 |
+// +------------------+----+----+----+----+
+// 0 16 20 24 28 31
+#define RRF3_FORM_EMIT(name, op)\
+void Assembler::name(Register r3, Conition m4, Register r1, \
+ Register r2) {\
+ rrf3_form(op << 16 | r3.code()*B12 | m4*B8 | \
+ r1.code()*B4 | r2.code());\
+}
+
+
+void Assembler::rrf3_form(uint32_t code) {
+ emit4bytes(code);
+}
+
+
+// RRF-e format: <insn> R1,M3,R2,M4
+// +------------------+----+----+----+----+
+// | OpCode | M3 | M4 | R1 | R2 |
+// +------------------+----+----+----+----+
+// 0 16 20 24 28 31
+void Assembler::rrfe_form(Opcode op,
+ Condition m3,
+ Condition m4,
+ Register r1,
+ Register r2) {
+ uint32_t code = op << 16 | m3*B12 | m4*B8 | r1.code()*B4
+ | r2.code();
+ emit4bytes(code);
+}
+
+
+// end of S390 Instruction generation
+
+// start of S390 instruction
+RIL1_FORM_EMIT(afi, AFI)
+RXY_FORM_EMIT(agf, AGF)
+RIL1_FORM_EMIT(agfi, AGFI)
+RRE_FORM_EMIT(agfr, AGFR)
+RIL1_FORM_EMIT(algfi, ALGFI)
+SS2_FORM_EMIT(ap, AP)
+RX_FORM_EMIT(bal, BAL)
+RX_FORM_EMIT(bc, BC)
+RR_FORM_EMIT(bctr, BCTR)
+RXE_FORM_EMIT(ceb, CEB)
+RRE_FORM_EMIT(cefbr, CEFBR)
+RRF2_FORM_EMIT(cfebr, CFEBR)
+RIL1_FORM_EMIT(cgfi, CGFI)
+RX_FORM_EMIT(d, D)
+RXY_FORM_EMIT(dl, DL)
+RRE_FORM_EMIT(dlr, DLR)
+// SS2_FORM_EMIT(dp, DP)
+RRE_FORM_EMIT(dsgr, DSGR)
+SS1_FORM_EMIT(ed, ED)
+RX_FORM_EMIT(ex, EX)
+RRE_FORM_EMIT(flogr, FLOGR)
+RSY1_FORM_EMIT(lang, LANG)
+RIL1_FORM_EMIT(larl, LARL)
+RSY1_FORM_EMIT(lax, LAX)
+RRE_FORM_EMIT(lcgr, LCGR)
+RR_FORM_EMIT(lcr, LCR)
+RX_FORM_EMIT(le_z, LE)
+RXY_FORM_EMIT(ley, LEY)
+RXY_FORM_EMIT(lgf, LGF)
+RX_FORM_EMIT(lh, LH)
+RRE_FORM_EMIT(lhr, LHR)
+RXY_FORM_EMIT(lhy, LHY)
+RXY_FORM_EMIT(llgf, LLGF)
+RRE_FORM_EMIT(llgfr, LLGFR)
+RIL1_FORM_EMIT(llihf, LLIHF)
+RIL1_FORM_EMIT(llilf, LLILF)
+RRE_FORM_EMIT(lngr, LNGR)
+RR_FORM_EMIT(lnr, LNR)
+RSY1_FORM_EMIT(loc, LOC)
+RXY_FORM_EMIT(lrv, LRV)
+RXY_FORM_EMIT(lrvh, LRVH)
+RRE_FORM_EMIT(ltgfr, LTGFR)
+RX_FORM_EMIT(ms, MS)
+RIL1_FORM_EMIT(msfi, MSFI)
+RXY_FORM_EMIT(msg, MSG)
+RIL1_FORM_EMIT(msgfi, MSGFI)
+RRE_FORM_EMIT(msgr, MSGR)
+RRE_FORM_EMIT(msr, MSR)
+RXY_FORM_EMIT(msy, MSY)
+SS1_FORM_EMIT(mvn, MVN)
+RX_FORM_EMIT(n, N)
+SS1_FORM_EMIT(nc, NC)
+RXY_FORM_EMIT(ng, NG)
+SI_FORM_EMIT(ni, NI)
+RIL1_FORM_EMIT(nihf, NIHF)
+RIL1_FORM_EMIT(nilf, NILF)
+RI1_FORM_EMIT(nilh, NILH)
+RI1_FORM_EMIT(nill, NILL)
+RIL1_FORM_EMIT(oihf, OIHF)
+RIL1_FORM_EMIT(oilf, OILF)
+RI1_FORM_EMIT(oill, OILL)
+SS2_FORM_EMIT(pack, PACK)
+// RRE_FORM_EMIT(popcnt, POPCNT)
+// RSY1_FORM_EMIT(rll, RLL)
+// RSY1_FORM_EMIT(rllg, RLLG)
+S_FORM_EMIT(sal, SAL)
+RRE_FORM_EMIT(sar, SAR)
+RXY_FORM_EMIT(sgf, SGF)
+RRE_FORM_EMIT(sgfr, SGFR)
+RIL1_FORM_EMIT(slfi, SLFI)
+RXY_FORM_EMIT(slgf, SLGF)
+RIL1_FORM_EMIT(slgfi, SLGFI)
+RXY_FORM_EMIT(strv, STRV)
+I_FORM_EMIT(svc, SVC)
+RI1_FORM_EMIT(tmll, TMLL)
+RSL_FORM_EMIT(tp, TP)
+SS1_FORM_EMIT(tr, TR)
+S_FORM_EMIT(ts, TS)
+RX_FORM_EMIT(x, X)
+RXY_FORM_EMIT(xg, XG)
+RIL1_FORM_EMIT(xihf, XIHF)
+RIL1_FORM_EMIT(xilf, XILF)
+SS2_FORM_EMIT(zap, ZAP)
+
+// materialized assemblers
+// Add Register (32)
+void Assembler::ar(Register r1, Register r2) {
+ rr_form(AR, r1, r2);
+}
+
+
+// Add Register-Register-Register (32)
+void Assembler::ark(Register r1, Register r2, Register r3) {
+ rrf1_form(ARK, r1, r2, r3);
+}
+
+
+// Add Storage-Imm (32)
+void Assembler::asi(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.imm_));
+ DCHECK(is_int20(opnd.offset()));
+ siy_form(ASI, Operand(0xff & imm.imm_),
+ opnd.rb(), 0xfffff & opnd.offset());
+}
+
+
+// Add Storage-Imm (64)
+void Assembler::agsi(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.imm_));
+ DCHECK(is_int20(opnd.offset()));
+ siy_form(AGSI, Operand(0xff & imm.imm_),
+ opnd.rb(), 0xfffff & opnd.offset());
+}
+
+
+// Subtract Register (32)
+void Assembler::sr(Register r1, Register r2) {
+ rr_form(SR, r1, r2);
+}
+
+
+// Subtract Register-Register-Register (32)
+void Assembler::srk(Register r1, Register r2, Register r3) {
+ rrf1_form(SRK, r1, r2, r3);
+}
+
+
+// Multiply Register (64<32)
+void Assembler::mr_z(Register r1, Register r2) {
+ DCHECK(r1.code() % 2 == 0);
+ rr_form(MR, r1, r2);
+}
+
+
+// Multiply Logical Register (64<32)
+void Assembler::mlr(Register r1, Register r2) {
+ DCHECK(r1.code() % 2 == 0);
+ rre_form(MLR, r1, r2);
+}
+
+
+// Divide Register (32)
+void Assembler::dr(Register r1, Register r2) {
+ DCHECK(r1.code() % 2 == 0);
+ rr_form(DR, r1, r2);
+}
+
+
+// And Register (32)
+void Assembler::nr(Register r1, Register r2) {
+ rr_form(NR, r1, r2);
+}
+
+
+// And Register-Register-Register (32)
+void Assembler::nrk(Register r1, Register r2, Register r3) {
+ rrf1_form(NRK, r1, r2, r3);
+}
+
+
+// Or Register (32)
+void Assembler::or_z(Register r1, Register r2) {
+ rr_form(OR, r1, r2);
+}
+
+
+// Or Register-Register-Register (32)
+void Assembler::ork(Register r1, Register r2, Register r3) {
+ rrf1_form(ORK, r1, r2, r3);
+}
+
+
+// Xor Register (32)
+void Assembler::xr(Register r1, Register r2) {
+ rr_form(XR, r1, r2);
+}
+
+
+// Xor Register-Register-Register (32)
+void Assembler::xrk(Register r1, Register r2, Register r3) {
+ rrf1_form(XRK, r1, r2, r3);
+}
+
+
+// Add Register (64)
+void Assembler::agr(Register r1, Register r2) {
+ rre_form(AGR, r1, r2);
+}
+
+
+// Add Register-Register-Register (64)
+void Assembler::agrk(Register r1, Register r2, Register r3) {
+ rrf1_form(AGRK, r1, r2, r3);
+}
+
+
+// Subtract Register (64)
+void Assembler::sgr(Register r1, Register r2) {
+ rre_form(SGR, r1, r2);
+}
+
+
+// Subtract Register-Register-Register (64)
+void Assembler::sgrk(Register r1, Register r2, Register r3) {
+ rrf1_form(SGRK, r1, r2, r3);
+}
+
+
+// Multiply Register (128<64)
+void Assembler::mlgr(Register r1, Register r2) {
+ rre_form(MLGR, r1, r2);
+}
+
+
+// And Register (64)
+void Assembler::ngr(Register r1, Register r2) {
+ rre_form(NGR, r1, r2);
+}
+
+
+// And Register-Register-Register (64)
+void Assembler::ngrk(Register r1, Register r2, Register r3) {
+ rrf1_form(NGRK, r1, r2, r3);
+}
+
+
+// Or Register (64)
+void Assembler::ogr(Register r1, Register r2) {
+ rre_form(OGR, r1, r2);
+}
+
+
+// Or Register-Register-Register (64)
+void Assembler::ogrk(Register r1, Register r2, Register r3) {
+ rrf1_form(OGRK, r1, r2, r3);
+}
+
+
+// Xor Register (64)
+void Assembler::xgr(Register r1, Register r2) {
+ rre_form(XGR, r1, r2);
+}
+
+
+// Xor Register-Register-Register (64)
+void Assembler::xgrk(Register r1, Register r2, Register r3) {
+ rrf1_form(XGRK, r1, r2, r3);
+}
+
+
+// Add Register-Storage (32)
+void Assembler::a(Register r1, const MemOperand& opnd) {
+ rx_form(A, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Register-Storage (32)
+void Assembler::s(Register r1, const MemOperand& opnd) {
+ rx_form(S, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Multiply Register-Storage (64<32)
+void Assembler::m(Register r1, const MemOperand& opnd) {
+ rx_form(M, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Multiply Logical Register-Storage (64<32)
+void Assembler::ml(Register r1, const MemOperand& opnd) {
+ rxy_form(ML, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Or Register-Storage (32)
+void Assembler::o(Register r1, const MemOperand& opnd) {
+ rx_form(O, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Register-Storage (32)
+void Assembler::ay(Register r1, const MemOperand& opnd) {
+ rxy_form(AY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Register-Storage (32)
+void Assembler::sy(Register r1, const MemOperand& opnd) {
+ rxy_form(SY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// And Register-Storage (32)
+void Assembler::ny(Register r1, const MemOperand& opnd) {
+ rxy_form(NY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Or Register-Storage (32)
+void Assembler::oy(Register r1, const MemOperand& opnd) {
+ rxy_form(OY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// XOR Register-Storage (32)
+void Assembler::xy(Register r1, const MemOperand& opnd) {
+ rxy_form(XY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Register-Storage (64)
+void Assembler::ag(Register r1, const MemOperand& opnd) {
+ rxy_form(AG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Register-Storage (64)
+void Assembler::sg(Register r1, const MemOperand& opnd) {
+ rxy_form(SG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Or Register-Storage (64)
+void Assembler::og(Register r1, const MemOperand& opnd) {
+ rxy_form(OG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Multiply Logical Register-Storage (128<64)
+void Assembler::mlg(Register r1, const MemOperand& opnd) {
+ rxy_form(MLG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Register-Register (32)
+void Assembler::lr(Register r1, Register r2) {
+ rr_form(LR, r1, r2);
+}
+
+
+void Assembler::EnsureSpaceFor(int space_needed) {
+ if (buffer_space() <= (kGap + space_needed)) {
+ GrowBuffer(space_needed);
+ }
+}
+
+
+/*
+// TODO(JOHN): might not work
+void Assembler::mov_label_offset(Register dst, Label* label) {
+ if (label->is_bound()) {
+ int target = label->pos();
+ mov(dst, Operand(target + Code::kHeaderSize - kHeapObjectTag));
+ } else {
+ bool is_linked = label->is_linked();
+ // Emit the link to the label in the code stream followed by extra
+ // nop instructions.
+ DCHECK(dst.is(r3)); // target_at_put assumes r3 for now
+ int link = is_linked ? label->pos() - pc_offset(): 0;
+ label->link_to(pc_offset());
+
+ if (!is_linked && !trampoline_emitted_) {
+ unbound_labels_count_++;
+ next_buffer_check_ -= kTrampolineSlotsSize;
+ }
+
+ // When the label is bound, these instructions will be patched
+ // with a 2 instruction mov sequence that will load the
+ // destination register with the position of the label from the
+ // beginning of the code.
+ //
+ // When the label gets bound: target_at extracts the link and
+ // target_at_put patches the instructions.
+ BlockTrampolinePoolScope block_trampoline_pool(this);
+ emit(link);
+ nop();
+ }
+}
+*/
+
+// Load Register-Register (64)
+void Assembler::lgr(Register r1, Register r2) {
+ rre_form(LGR, r1, r2);
+}
+
+
+// Load Halfword Register-Storage (64)
+void Assembler::lgh(Register r1, const MemOperand& opnd) {
+ rxy_form(LGH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load halfword Register-Register (64)
+void Assembler::lghr(Register r1, Register r2) {
+ rre_form(LGHR, r1, r2);
+}
+
+
+// Load and Test Register-Storage (32)
+void Assembler::lt_z(Register r1, const MemOperand& opnd) {
+ rxy_form(LT, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load and Test Register-Storage (64)
+void Assembler::ltg(Register r1, const MemOperand& opnd) {
+ rxy_form(LTG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load and Test Register-Register (32)
+void Assembler::ltr(Register r1, Register r2) {
+ rr_form(LTR, r1, r2);
+}
+
+
+// Load and Test Register-Register (64)
+void Assembler::ltgr(Register r1, Register r2) {
+ rre_form(LTGR, r1, r2);
+}
+
+
+// Add Halfword Register-Storage (32)
+void Assembler::ah(Register r1, const MemOperand& opnd) {
+ rx_form(AH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Halfword Register-Storage (32)
+void Assembler::sh(Register r1, const MemOperand& opnd) {
+ rx_form(SH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Multiply Halfword Register-Storage (32)
+void Assembler::mh(Register r1, const MemOperand& opnd) {
+ rx_form(MH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Halfword Register-Storage (32)
+void Assembler::ahy(Register r1, const MemOperand& opnd) {
+ rxy_form(AHY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Halfword Register-Storage (32)
+void Assembler::shy(Register r1, const MemOperand& opnd) {
+ rxy_form(SHY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Halfword Immediate (32)
+void Assembler::ahi(Register r1, const Operand& i2) {
+ ri_form(AHI, r1, i2);
+}
+
+
+// Add Halfword Immediate (32)
+void Assembler::ahik(Register r1, Register r3, const Operand& i2) {
+ rie_form(AHIK, r1, r3, i2);
+}
+
+
+// Add Halfword Immediate (64)
+void Assembler::aghi(Register r1, const Operand& i2) {
+ ri_form(AGHI, r1, i2);
+}
+
+
+// Add Halfword Immediate (64)
+void Assembler::aghik(Register r1, Register r3, const Operand& i2) {
+ rie_form(AGHIK, r1, r3, i2);
+}
+
+
+// Add Logical Register-Storage (32)
+void Assembler::al_z(Register r1, const MemOperand& opnd) {
+ rx_form(AL, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Logical Register-Storage (32)
+void Assembler::aly(Register r1, const MemOperand& opnd) {
+ rxy_form(ALY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Logical (64)
+void Assembler::alg(Register r1, const MemOperand& opnd) {
+ rxy_form(ALG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Logical Register-Register (32)
+void Assembler::alr(Register r1, Register r2) {
+ rr_form(ALR, r1, r2);
+}
+
+
+// Add Logical Register-Register-Register (32)
+void Assembler::alrk(Register r1, Register r2, Register r3) {
+ rrf1_form(ALRK, r1, r2, r3);
+}
+
+
+// Add Logical Register-Register (64)
+void Assembler::algr(Register r1, Register r2) {
+ rre_form(ALGR, r1, r2);
+}
+
+
+// Add Logical Register-Register-Register (64)
+void Assembler::algrk(Register r1, Register r2, Register r3) {
+ rrf1_form(ALGRK, r1, r2, r3);
+}
+
+
+// Add Logical Immediate (32)
+void Assembler::alfi(Register r1, const Operand& opnd) {
+ ril_form(ALFI, r1, opnd);
+}
+
+
+// Subtract Logical Register-Storage (32)
+void Assembler::sl(Register r1, const MemOperand& opnd) {
+ rx_form(SL, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Logical Register-Storage (32)
+void Assembler::sly(Register r1, const MemOperand& opnd) {
+ rxy_form(SLY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Logical Register-Storage (64)
+void Assembler::slg(Register r1, const MemOperand& opnd) {
+ rxy_form(SLG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Logical Register-Register (32)
+void Assembler::slr(Register r1, Register r2) {
+ rr_form(SLR, r1, r2);
+}
+
+
+// Subtract Logical Register-Register-Register (32)
+void Assembler::slrk(Register r1, Register r2, Register r3) {
+ rrf1_form(SLRK, r1, r2, r3);
+}
+
+
+// Subtract Logical Register-Register (64)
+void Assembler::slgr(Register r1, Register r2) {
+ rre_form(SLGR, r1, r2);
+}
+
+
+// Subtract Logical Register-Register-Register (64)
+void Assembler::slgrk(Register r1, Register r2, Register r3) {
+ rrf1_form(SLGRK, r1, r2, r3);
+}
+
+
+// Multiply Halfword Immediate (32)
+void Assembler::mhi(Register r1, const Operand& opnd) {
+ ri_form(MHI, r1, opnd);
+}
+
+
+// Multiply Halfword Immediate (64)
+void Assembler::mghi(Register r1, const Operand& opnd) {
+ ri_form(MGHI, r1, opnd);
+}
+
+
+// Load (32)
+void Assembler::l(Register r1, const MemOperand& opnd) {
+ rx_form(L, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load (32)
+void Assembler::ly(Register r1, const MemOperand& opnd) {
+ rxy_form(LY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load (64)
+void Assembler::lg(Register r1, const MemOperand& opnd) {
+ rxy_form(LG, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Halfword Immediate (32)
+void Assembler::lhi(Register dst, const Operand& imm) {
+ ri_form(LHI, dst, imm);
+}
+
+
+// Load Halfword Immediate (64)
+void Assembler::lghi(Register r1, const Operand& i2) {
+ ri_form(LGHI, r1, i2);
+}
+
+
+// Load Logical halfword Register-Storage (32)
+void Assembler::llh(Register r1, const MemOperand& opnd) {
+ rxy_form(LLH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Logical halfword Register-Storage (64)
+void Assembler::llgh(Register r1, const MemOperand& opnd) {
+ rxy_form(LLGH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Logical Character (32) - loads a byte and zero ext.
+void Assembler::llc(Register r1, const MemOperand& opnd) {
+ rxy_form(LLC, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Logical Character (64) - loads a byte and zero ext.
+void Assembler::llgc(Register r1, const MemOperand& opnd) {
+ rxy_form(LLGC, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Address Register-Storage
+void Assembler::la(Register r1, const MemOperand& opnd) {
+ rx_form(LA, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Address Register-Storage
+void Assembler::lay(Register r1, const MemOperand& opnd) {
+ rxy_form(LAY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Byte Register-Storage (32)
+void Assembler::lb(Register r1, const MemOperand& opnd) {
+ rxy_form(LB, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Byte Register-Register (32)
+void Assembler::lbr(Register r1, Register r2) {
+ rre_form(LBR, r1, r2);
+}
+
+
+// Load Byte Register-Storage (64)
+void Assembler::lgb(Register r1, const MemOperand& opnd) {
+ rxy_form(LGB, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Byte Register-Register (64)
+void Assembler::lgbr(Register r1, Register r2) {
+ rre_form(LGBR, r1, r2);
+}
+
+
+// Load Logical halfword Register-Register (32)
+void Assembler::llhr(Register r1, Register r2) {
+ rre_form(LLHR, r1, r2);
+}
+
+
+// Load Logical halfword Register-Register (64)
+void Assembler::llghr(Register r1, Register r2) {
+ rre_form(LLGHR, r1, r2);
+}
+
+
+// Load 64<-32 sign extended
+void Assembler::lgfr(Register r1, Register r2) {
+ rre_form(LGFR, r1, r2);
+}
+
+
+// Rotate Left Single Logical (32)
+void Assembler::rll(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(RLL, r1, r3, opnd, 0);
+}
+
+
+// Rotate Left Single Logical (32)
+void Assembler::rll(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(RLL, r1, r3, r0, opnd.immediate());
+}
+
+
+// Rotate Left Single Logical (32)
+void Assembler::rll(Register r1, Register r3, Register r2,
+ const Operand& opnd) {
+ rsy_form(RLL, r1, r3, r2, opnd.immediate());
+}
+
+
+// Rotate Left Single Logical (64)
+void Assembler::rllg(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(RLLG, r1, r3, opnd, 0);
+}
+
+
+// Rotate Left Single Logical (64)
+void Assembler::rllg(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(RLLG, r1, r3, r0, opnd.immediate());
+}
+
+
+// Rotate Left Single Logical (64)
+void Assembler::rllg(Register r1, Register r3, Register r2,
+ const Operand& opnd) {
+ rsy_form(RLLG, r1, r3, r2, opnd.immediate());
+}
+
+
+// Shift Left Single Logical (32)
+void Assembler::sll(Register r1, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rs_form(SLL, r1, r0, opnd, 0);
+}
+
+
+// Shift Left Single Logical (32)
+void Assembler::sll(Register r1, const Operand& opnd) {
+ rs_form(SLL, r1, r0, r0, opnd.immediate());
+}
+
+
+// Shift Left Single Logical (32)
+void Assembler::sllk(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SLLK, r1, r3, opnd, 0);
+}
+
+
+// Shift Left Single Logical (32)
+void Assembler::sllk(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SLLK, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Left Single Logical (64)
+void Assembler::sllg(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SLLG, r1, r3, opnd, 0);
+}
+
+
+// Shift Left Single Logical (64)
+void Assembler::sllg(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SLLG, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Right Single Logical (32)
+void Assembler::srl(Register r1, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rs_form(SRL, r1, r0, opnd, 0);
+}
+
+
+// Shift Right Single Logical (32)
+void Assembler::srl(Register r1, const Operand& opnd) {
+ rs_form(SRL, r1, r0, r0, opnd.immediate());
+}
+
+
+// Shift Right Single Logical (32)
+void Assembler::srlk(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SRLK, r1, r3, opnd, 0);
+}
+
+
+// Shift Right Single Logical (32)
+void Assembler::srlk(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SRLK, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Right Single Logical (64)
+void Assembler::srlg(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SRLG, r1, r3, opnd, 0);
+}
+
+
+// Shift Right Single Logical (64)
+void Assembler::srlg(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SRLG, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Left Single (32)
+void Assembler::sla(Register r1, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rs_form(SLA, r1, r0, opnd, 0);
+}
+
+
+// Shift Left Single (32)
+void Assembler::sla(Register r1, const Operand& opnd) {
+ rs_form(SLA, r1, r0, r0, opnd.immediate());
+}
+
+
+// Shift Left Single (32)
+void Assembler::slak(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SLAK, r1, r3, opnd, 0);
+}
+
+
+// Shift Left Single (32)
+void Assembler::slak(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SLAK, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Left Single (64)
+void Assembler::slag(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SLAG, r1, r3, opnd, 0);
+}
+
+
+// Shift Left Single (64)
+void Assembler::slag(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SLAG, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Right Single (32)
+void Assembler::sra(Register r1, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rs_form(SRA, r1, r0, opnd, 0);
+}
+
+
+// Shift Right Single (32)
+void Assembler::sra(Register r1, const Operand& opnd) {
+ rs_form(SRA, r1, r0, r0, opnd.immediate());
+}
+
+
+// Shift Right Single (32)
+void Assembler::srak(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SRAK, r1, r3, opnd, 0);
+}
+
+
+// Shift Right Single (32)
+void Assembler::srak(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SRAK, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Right Single (64)
+void Assembler::srag(Register r1, Register r3, Register opnd) {
+ DCHECK(!opnd.is(r0));
+ rsy_form(SRAG, r1, r3, opnd, 0);
+}
+
+
+void Assembler::srag(Register r1, Register r3, const Operand& opnd) {
+ rsy_form(SRAG, r1, r3, r0, opnd.immediate());
+}
+
+
+// Shift Right Double
+void Assembler::srda(Register r1, const Operand& opnd) {
+ DCHECK(r1.code() % 2 == 0);
+ rs_form(SRDA, r1, r0, r0, opnd.immediate());
+}
+
+
+// Shift Right Double Logical
+void Assembler::srdl(Register r1, const Operand& opnd) {
+ DCHECK(r1.code() % 2 == 0);
+ rs_form(SRDL, r1, r0, r0, opnd.immediate());
+}
+
+
+// Rotate-And-Insert-Selected-Bits
+void Assembler::risbg(Register dst, Register src, const Operand& startBit,
+ const Operand& endBit, const Operand& shiftAmt,
+ bool zeroBits) {
+ // High tag the top bit of I4/EndBit to zero out any unselected bits
+ if (zeroBits)
+ rie_f_form(RISBG, dst, src, startBit, Operand(endBit.imm_ | 0x80),
+ shiftAmt);
+ else
+ rie_f_form(RISBG, dst, src, startBit, endBit, shiftAmt);
+}
+
+
+// Rotate-And-Insert-Selected-Bits
+void Assembler::risbgn(Register dst, Register src, const Operand& startBit,
+ const Operand& endBit, const Operand& shiftAmt,
+ bool zeroBits) {
+ // High tag the top bit of I4/EndBit to zero out any unselected bits
+ if (zeroBits)
+ rie_f_form(RISBGN, dst, src, startBit, Operand(endBit.imm_ | 0x80),
+ shiftAmt);
+ else
+ rie_f_form(RISBGN, dst, src, startBit, endBit, shiftAmt);
+}
+
+
+// Compare Halfword Immediate (32)
+void Assembler::chi(Register r1, const Operand& i2) {
+ ri_form(CHI, r1, i2);
+}
+
+
+// Compare Halfword Register-Storage (32)
+void Assembler::ch(Register r1, const MemOperand& opnd) {
+ rx_form(CH, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Halfword Register-Storage (32)
+void Assembler::chy(Register r1, const MemOperand& opnd) {
+ rxy_form(CHY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Halfword Immediate (64)
+void Assembler::cghi(Register r1, const Operand& i2) {
+ ri_form(CGHI, r1, i2);
+}
+
+
+// Compare Logical Immediate (64<32)
+void Assembler::clgfi(Register r1, const Operand& i2) {
+ ril_form(CLGFI, r1, i2);
+}
+
+
+// Compare Logical Immediate (32)
+void Assembler::clfi(Register r1, const Operand& i2) {
+ ril_form(CLFI, r1, i2);
+}
+
+
+// Compare Logical Register-Register (64)
+void Assembler::clgr(Register r1, Register r2) {
+ rre_form(CLGR, r1, r2);
+}
+
+
+// Compare Logical Register-Register (32)
+void Assembler::clr(Register r1, Register r2) {
+ rr_form(CLR, r1, r2);
+}
+
+
+// Compare Logical Register-Storage (32)
+void Assembler::cl(Register r, const MemOperand& opnd) {
+ rx_form(CL, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Logical Register-Storage (32)
+void Assembler::cly(Register r, const MemOperand& opnd) {
+ rxy_form(CLY, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Logical Register-Storage (64)
+void Assembler::clg(Register r, const MemOperand& opnd) {
+ rxy_form(CLG, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Register-Storage (32)
+void Assembler::c(Register r, const MemOperand& opnd) {
+ rx_form(C, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Register-Storage (32)
+void Assembler::cy(Register r, const MemOperand& opnd) {
+ rxy_form(CY, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Register-Storage (64)
+void Assembler::cg(Register r, const MemOperand& opnd) {
+ rxy_form(CG, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Register-Register (32)
+void Assembler::cr_z(Register r1, Register r2) {
+ rr_form(CR, r1, r2);
+}
+
+
+// Compare Register-Register (64)
+void Assembler::cgr(Register r1, Register r2) {
+ rre_form(CGR, r1, r2);
+}
+
+
+// Compare Immediate (64)
+void Assembler::cfi(Register r, const Operand& opnd) {
+ ril_form(CFI, r, opnd);
+}
+
+
+// Compare Immediate (Mem - Imm) (8)
+void Assembler::cli(const MemOperand& opnd, const Operand& imm) {
+ si_form(CLI, imm, opnd.rb(), opnd.offset());
+}
+
+
+// Compare Immediate (Mem - Imm) (8)
+void Assembler::cliy(const MemOperand& opnd, const Operand& imm) {
+ siy_form(CLIY, imm, opnd.rb(), opnd.offset());
+}
+
+
+// Test Under Mask (Mem - Imm) (8)
+void Assembler::tm(const MemOperand& opnd, const Operand& imm) {
+ si_form(TM, imm, opnd.rb(), opnd.offset());
+}
+
+
+// Test Under Mask (Mem - Imm) (8)
+void Assembler::tmy(const MemOperand& opnd, const Operand& imm) {
+ siy_form(TMY, imm, opnd.rb(), opnd.offset());
+}
+
+
+// Branch Relative and save (32)
+void Assembler::bras(Register r, const Operand& opnd) {
+ ri_form(BRAS, r, opnd);
+}
+
+
+// Branch Relative and save (64)
+void Assembler::brasl(Register r, const Operand& opnd) {
+ ril_form(BRASL, r, opnd);
+}
+
+
+// Branch relative on Condition (32)
+void Assembler::brc(Condition c, const Operand& opnd) {
+ // BRC actually encodes # of halfwords, so divide by 2.
+ int16_t numHalfwords = static_cast<int16_t>(opnd.immediate()) / 2;
+ Operand halfwordOp = Operand(numHalfwords);
+ halfwordOp.setBits(16);
+ ri_form(BRC, c, halfwordOp);
+}
+
+
+// Branch Relative on Condition (64)
+void Assembler::brcl(Condition c, const Operand& opnd, bool isCodeTarget) {
+ Operand halfwordOp = opnd;
+ // Operand for code targets will be index to code_targets_
+ if (!isCodeTarget) {
+ // BRCL actually encodes # of halfwords, so divide by 2.
+ int32_t numHalfwords = static_cast<int32_t>(opnd.immediate()) / 2;
+ halfwordOp = Operand(numHalfwords);
+ }
+ ril_form(BRCL, c, halfwordOp);
+}
+
+
+// Branch and Save
+void Assembler::basr(Register r1, Register r2) {
+ rr_form(BASR, r1, r2);
+}
+
+
+// Branch on Count (32)
+void Assembler::bct(Register r, const MemOperand& opnd) {
+ rx_form(BCT, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Branch on Count (64)
+void Assembler::bctg(Register r, const MemOperand& opnd) {
+ rxy_form(BCTG, r, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+void Assembler::call(Handle<Code> target,
+ RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id) {
+ positions_recorder()->WriteRecordedPositions();
+ EnsureSpace ensure_space(this);
+
+ int32_t target_index = emit_code_target(target, rmode, ast_id);
+ brasl(r14, Operand(target_index));
+}
+
+
+void Assembler::jump(Handle<Code> target,
+ RelocInfo::Mode rmode,
+ Condition cond) {
+ EnsureSpace ensure_space(this);
+
+ int32_t target_index = emit_code_target(target, rmode);
+ brcl(cond, Operand(target_index), true);
+}
+
+
+// Store (32)
+void Assembler::st(Register src, const MemOperand &dst) {
+ rx_form(ST, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Store (32)
+void Assembler::sty(Register src, const MemOperand& dst) {
+ rxy_form(STY, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Store Halfword
+void Assembler::sth(Register src, const MemOperand &dst) {
+ rx_form(STH, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Store Halfword
+void Assembler::sthy(Register src, const MemOperand &dst) {
+ rxy_form(STHY, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Store Character
+void Assembler::stc(Register src, const MemOperand &dst) {
+ rx_form(STC, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Store Character
+void Assembler::stcy(Register src, const MemOperand &dst) {
+ rxy_form(STCY, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// 32-bit Load Multiple - short displacement (12-bits unsigned)
+void Assembler::lm(Register r1, Register r2, const MemOperand& src) {
+ rs_form(LM, r1, r2, src.rb(), src.offset());
+}
+
+
+// 32-bit Load Multiple - long displacement (20-bits signed)
+void Assembler::lmy(Register r1, Register r2, const MemOperand& src) {
+ rsy_form(LMY, r1, r2, src.rb(), src.offset());
+}
+
+
+// 64-bit Load Multiple - long displacement (20-bits signed)
+void Assembler::lmg(Register r1, Register r2, const MemOperand& src) {
+ rsy_form(LMG, r1, r2, src.rb(), src.offset());
+}
+
+
+// Move charactor - mem to mem operation
+void Assembler::mvc(const MemOperand& opnd1, const MemOperand& opnd2,
+ uint32_t length) {
+ ss_form(MVC, length-1, opnd1.getBaseRegister(),
+ opnd1.getDisplacement(), opnd2.getBaseRegister(),
+ opnd2.getDisplacement());
+}
+
+
+// Compare logical - mem to mem operation
+void Assembler::clc(const MemOperand& opnd1, const MemOperand& opnd2,
+ Length length) {
+ ss_form(CLC, length-1, opnd1.getBaseRegister(),
+ opnd1.getDisplacement(), opnd2.getBaseRegister(),
+ opnd2.getDisplacement());
+}
+
+
+// Exclusive Or - mem to mem operation
+void Assembler::xc(const MemOperand& opnd1, const MemOperand& opnd2,
+ Length length) {
+ ss_form(XC, length-1, opnd1.getBaseRegister(),
+ opnd1.getDisplacement(), opnd2.getBaseRegister(),
+ opnd2.getDisplacement());
+}
+
+
+// Move integer (32)
+void Assembler::mvhi(const MemOperand& opnd1, const Operand& i2) {
+ sil_form(MVHI, opnd1.getBaseRegister(), opnd1.getDisplacement(), i2);
+}
+
+
+// Move integer (64)
+void Assembler::mvghi(const MemOperand& opnd1, const Operand& i2) {
+ sil_form(MVGHI, opnd1.getBaseRegister(), opnd1.getDisplacement(), i2);
+}
+
+
+// Store Register (64)
+void Assembler::stg(Register src, const MemOperand &dst) {
+ rxy_form(STG, src, dst.rx(), dst.rb(), dst.offset());
+}
+
+
+// Insert Character
+void Assembler::ic_z(Register r1, const MemOperand& opnd) {
+ rx_form(IC_z, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Insert Character
+void Assembler::icy(Register r1, const MemOperand& opnd) {
+ rxy_form(ICY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Insert Immediate (High)
+void Assembler::iihf(Register r1, const Operand& opnd) {
+ ril_form(IIHF, r1, opnd);
+}
+
+
+// Insert Immediate (low)
+void Assembler::iilf(Register r1, const Operand& opnd) {
+ ril_form(IILF, r1, opnd);
+}
+
+
+// Insert Immediate (high high)
+void Assembler::iihh(Register r1, const Operand& opnd) {
+ ri_form(IIHH, r1, opnd);
+}
+
+
+// Insert Immediate (high low)
+void Assembler::iihl(Register r1, const Operand& opnd) {
+ ri_form(IIHL, r1, opnd);
+}
+
+
+// Insert Immediate (low high)
+void Assembler::iilh(Register r1, const Operand& opnd) {
+ ri_form(IILH, r1, opnd);
+}
+
+
+// Insert Immediate (low low)
+void Assembler::iill(Register r1, const Operand& opnd) {
+ ri_form(IILL, r1, opnd);
+}
+
+
+// GPR <-> FPR Instructions
+
+// Load GR from FPR (64 <- L)
+void Assembler::lgdr(Register r1, DoubleRegister f2) {
+ rre_form(LGDR, r1, Register::from_code(f2.code()));
+}
+
+
+// Load FPR from FR (L <- 64)
+void Assembler::ldgr(DoubleRegister f1, Register r2) {
+ rre_form(LDGR, Register::from_code(f1.code()), r2);
+}
+
+
+// Floating point instructions
+//
+// Load zero Register (64)
+void Assembler::lzdr(DoubleRegister r1) {
+ rre_form(LZDR, Register::from_code(r1.code()),
+ Register::from_code(0));
+}
+
+
+// Add Register-Storage (LB)
+void Assembler::adb(DoubleRegister r1, const MemOperand& opnd) {
+ rxe_form(ADB,
+ Register::from_code(r1.code()),
+ opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Add Register-Register (LB)
+void Assembler::adbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(ADBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Compare Register-Storage (LB)
+void Assembler::cdb(DoubleRegister r1, const MemOperand& opnd) {
+ rx_form(CD, Register::from_code(r1.code()),
+ opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Compare Register-Register (LB)
+void Assembler::cdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(CDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Divide Register-Storage (LB)
+void Assembler::ddb(DoubleRegister r1, const MemOperand& opnd) {
+ rxe_form(DDB, Register::from_code(r1.code()),
+ opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Divide Register-Register (LB)
+void Assembler::ddbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(DDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Multiply Register-Storage (LB)
+void Assembler::mdb(DoubleRegister r1, const MemOperand& opnd) {
+ rxe_form(MDB, Register::from_code(r1.code()),
+ opnd.rb(), opnd.rx(), opnd.offset());
+}
+
+
+// Multiply Register-Register (LB)
+void Assembler::mdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(MDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Subtract Register-Storage (LB)
+void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) {
+ rxe_form(SDB, Register::from_code(r1.code()),
+ opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Subtract Register-Register (LB)
+void Assembler::sdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(SDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Square Root (LB)
+void Assembler::sqdb(DoubleRegister r1, const MemOperand& opnd) {
+ rxe_form(SQDB, Register::from_code(r1.code()),
+ opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Square Root Register-Register (LB)
+void Assembler::sqdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(SQDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Load Rounded (double -> float)
+void Assembler::ledbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(LEDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Load Lengthen (float -> double)
+void Assembler::ldebr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(LDEBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Load Complement Register-Register (LB)
+void Assembler::lcdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(LCDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Load Positive Register-Register (LB)
+void Assembler::lpdbr(DoubleRegister r1, DoubleRegister r2) {
+ rre_form(LPDBR,
+ Register::from_code(r1.code()),
+ Register::from_code(r2.code()));
+}
+
+
+// Store (L)
+void Assembler::std(DoubleRegister r1, const MemOperand& opnd) {
+ rx_form(STD, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Store (L)
+void Assembler::stdy(DoubleRegister r1, const MemOperand& opnd) {
+ rxy_form(STDY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Store (S)
+void Assembler::ste(DoubleRegister r1, const MemOperand& opnd) {
+ rx_form(STE, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Store (S)
+void Assembler::stey(DoubleRegister r1, const MemOperand& opnd) {
+ rxy_form(STEY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load (L)
+void Assembler::ld(DoubleRegister r1, const MemOperand& opnd) {
+ DCHECK(is_uint12(opnd.offset()));
+ rx_form(LD, r1, opnd.rx(), opnd.rb(), opnd.offset() & 0xfff);
+}
+
+
+// Load (L)
+void Assembler::ldy(DoubleRegister r1, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ rxy_form(LDY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load (S)
+void Assembler::le_z(DoubleRegister r1, const MemOperand& opnd) {
+ DCHECK(is_uint12(opnd.offset()));
+ rx_form(LE, r1, opnd.rx(), opnd.rb(), opnd.offset() & 0xfff);
+}
+
+
+// Load (S)
+void Assembler::ley(DoubleRegister r1, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ rxy_form(LEY, r1, opnd.rx(), opnd.rb(), opnd.offset());
+}
+
+
+// Load Register-Register (L)
+void Assembler::ldr(DoubleRegister r1, DoubleRegister r2) {
+ rr_form(LDR, r1, r2);
+}
+
+
+// Convert to Fixed point (64<-L)
+void Assembler::cgdbr(Condition m, Register r1, DoubleRegister r2) {
+ rrfe_form(CGDBR, m, Condition(0), r1, Register::from_code(r2.code()));
+}
+
+
+// Convert to Fixed point (32<-L)
+void Assembler::cfdbr(Condition m, Register r1, DoubleRegister r2) {
+ rrfe_form(CFDBR, m, Condition(0), r1, Register::from_code(r2.code()));
+}
+
+
+// Convert from Fixed point (L<-64)
+void Assembler::cdgbr(DoubleRegister r1, Register r2) {
+ rre_form(CDGBR, Register::from_code(r1.code()), r2);
+}
+
+
+// Convert from Fixed point (L<-32)
+void Assembler::cdfbr(DoubleRegister r1, Register r2) {
+ rre_form(CDFBR, Register::from_code(r1.code()), r2);
+}
+
+
+// TODO(AlanLi): check condition code
+// Convert to Fixed Logical (64<-L)
+void Assembler::clgdbr(Condition m3, Condition m4,
+ Register r1, DoubleRegister r2) {
+ rrfe_form(CLGDBR, Condition(0), Condition(0),
+ r1, Register::from_code(r2.code()));
+}
+
+
+// Convert to Fixed Logical (32<-L)
+void Assembler::clfdbr(Condition m3, Condition m4,
+ Register r1, DoubleRegister r2) {
+ rrfe_form(CLFDBR, Condition(0), Condition(0),
+ r1, Register::from_code(r2.code()));
+}
+
+
+// Convert from Fixed Logical (L<-64)
+void Assembler::cdlgbr(Condition m3, Condition m4,
+ DoubleRegister r1, Register r2) {
+ rrfe_form(CDLGBR, Condition(0), Condition(0),
+ Register::from_code(r1.code()), r2);
+}
+
+
+// Convert from Fixed Logical (L<-32)
+void Assembler::cdlfbr(Condition m3, Condition m4,
+ DoubleRegister r1, Register r2) {
+ rrfe_form(CDLFBR, Condition(0), Condition(0),
+ Register::from_code(r1.code()), r2);
+}
+
+
+// Convert from Fixed point (S<-32)
+void Assembler::cefbr(DoubleRegister r1, Register r2) {
+ rre_form(CEFBR, Register::from_code(r1.code()), r2);
+}
+
+
+// Convert to Fixed point (32<-S)
+void Assembler::cfebr(Register r1, DoubleRegister r2) {
+ rre_form(CFDBR, r1, Register::from_code(r2.code()));
+}
+
+
+// Load (L <- S)
+void Assembler::ldeb(DoubleRegister d1, const MemOperand& opnd) {
+ rxe_form(LDEB, Register::from_code(d1.code()), opnd.rx(), opnd.rb(),
+ opnd.offset());
+}
+
+
+// Load FP Integer
+void Assembler::fidbra(DoubleRegister d1, DoubleRegister d2, FIDBRA_MASK3 m3) {
+ rrf2_form(FIDBRA << 16 |
+ m3 * B12 |
+ d1.code() * B4 |
+ d2.code());
+}
+
+
+// Multiply and Add - MADBR R1, R3, R2
+// R1 = R3 * R2 + R1
+void Assembler::madbr(DoubleRegister d1, DoubleRegister d3, DoubleRegister d2) {
+ rrd_form(MADBR,
+ Register::from_code(d1.code()),
+ Register::from_code(d3.code()),
+ Register::from_code(d2.code()));
+}
+
+
+// Multiply and Subtract - MSDBR R1, R3, R2
+// R1 = R3 * R2 - R1
+void Assembler::msdbr(DoubleRegister d1, DoubleRegister d3, DoubleRegister d2) {
+ rrd_form(MSDBR,
+ Register::from_code(d1.code()),
+ Register::from_code(d3.code()),
+ Register::from_code(d2.code()));
+}
+
+
+// end of S390instructions
+
+
+bool Assembler::IsNop(SixByteInstr instr, int type) {
+ DCHECK((0 == type) || (DEBUG_BREAK_NOP == type));
+ if (DEBUG_BREAK_NOP == type) {
+ return (instr == 0xa53b0000); // oill r3, 0
+ }
+ return (instr == 0x1800); // lr r0,r0
+}
+
+
+void Assembler::GrowBuffer(int needed) {
+ if (!own_buffer_) FATAL("external code buffer is too small");
+
+ // Compute new buffer size.
+ CodeDesc desc; // the new buffer
+ if (buffer_size_ < 4*KB) {
+ desc.buffer_size = 4*KB;
+ } else if (buffer_size_ < 1*MB) {
+ desc.buffer_size = 2*buffer_size_;
+ } else {
+ desc.buffer_size = buffer_size_ + 1*MB;
+ }
+ int space = buffer_space() + (desc.buffer_size - buffer_size_);
+ if (space < needed) {
+ desc.buffer_size += needed - space;
+ }
+ CHECK_GT(desc.buffer_size, 0); // no overflow
+
+ // Set up new buffer.
+ desc.buffer = NewArray<byte>(desc.buffer_size);
+
+ desc.instr_size = pc_offset();
+ desc.reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
+
+ // Copy the data.
+ intptr_t pc_delta = desc.buffer - buffer_;
+ intptr_t rc_delta = (desc.buffer + desc.buffer_size) -
+ (buffer_ + buffer_size_);
+ memmove(desc.buffer, buffer_, desc.instr_size);
+ memmove(reloc_info_writer.pos() + rc_delta, reloc_info_writer.pos(),
+ desc.reloc_size);
+
+ // Switch buffers.
+ DeleteArray(buffer_);
+ buffer_ = desc.buffer;
+ buffer_size_ = desc.buffer_size;
+ pc_ += pc_delta;
+ reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
+ reloc_info_writer.last_pc() + pc_delta);
+
+ // None of our relocation types are pc relative pointing outside the code
+ // buffer nor pc absolute pointing inside the code buffer, so there is no need
+ // to relocate any emitted relocation entries.
+}
+
+
+void Assembler::db(uint8_t data) {
+ CheckBuffer();
+ *reinterpret_cast<uint8_t*>(pc_) = data;
+ pc_ += sizeof(uint8_t);
+}
+
+
+void Assembler::dd(uint32_t data) {
+ CheckBuffer();
+ *reinterpret_cast<uint32_t*>(pc_) = data;
+ pc_ += sizeof(uint32_t);
+}
+
+
+void Assembler::dq(uint64_t value) {
+ CheckBuffer();
+ *reinterpret_cast<uint64_t*>(pc_) = value;
+ pc_ += sizeof(uint64_t);
+}
+
+
+void Assembler::dp(uintptr_t data) {
+ CheckBuffer();
+ *reinterpret_cast<uintptr_t*>(pc_) = data;
+ pc_ += sizeof(uintptr_t);
+}
+
+
+void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
+ if (RelocInfo::IsNone(rmode) ||
+ // Don't record external references unless the heap will be serialized.
+ (rmode == RelocInfo::EXTERNAL_REFERENCE && !serializer_enabled() &&
+ !emit_debug_code())) {
+ return;
+ }
+ if (rmode == RelocInfo::CODE_TARGET_WITH_ID) {
+ data = RecordedAstId().ToInt();
+ ClearRecordedAstId();
+ }
+ DeferredRelocInfo rinfo(pc_offset(), rmode, data);
+ relocations_.push_back(rinfo);
+}
+
+
+void Assembler::emit_label_addr(Label* label) {
+ CheckBuffer();
+ RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
+ int position = link(label);
+ DCHECK(label->is_bound());
+ // Keep internal references relative until EmitRelocations.
+ dp(position);
+}
+
+
+void Assembler::EmitRelocations() {
+ EnsureSpaceFor(relocations_.size() * kMaxRelocSize);
+
+ for (std::vector<DeferredRelocInfo>::iterator it = relocations_.begin();
+ it != relocations_.end(); it++) {
+ RelocInfo::Mode rmode = it->rmode();
+ Address pc = buffer_ + it->position();
+ Code* code = NULL;
+ RelocInfo rinfo(pc, rmode, it->data(), code);
+
+ // Fix up internal references now that they are guaranteed to be bound.
+ if (RelocInfo::IsInternalReference(rmode)) {
+ // Jump table entry
+ intptr_t pos = reinterpret_cast<intptr_t>(Memory::Address_at(pc));
+ Memory::Address_at(pc) = buffer_ + pos;
+ } else if (RelocInfo::IsInternalReferenceEncoded(rmode)) {
+ // mov sequence
+ intptr_t pos =
+ reinterpret_cast<intptr_t>(target_address_at(pc, code));
+ set_target_address_at(pc, code, buffer_ + pos, SKIP_ICACHE_FLUSH);
+ }
+
+ reloc_info_writer.Write(&rinfo);
+ }
+
+ reloc_info_writer.Finish();
+}
+
+
+void Assembler::CheckTrampolinePool() {
+ // Some small sequences of instructions must not be broken up by the
+ // insertion of a trampoline pool; such sequences are protected by setting
+ // either trampoline_pool_blocked_nesting_ or no_trampoline_pool_before_,
+ // which are both checked here. Also, recursive calls to CheckTrampolinePool
+ // are blocked by trampoline_pool_blocked_nesting_.
+ if ((trampoline_pool_blocked_nesting_ > 0) ||
+ (pc_offset() < no_trampoline_pool_before_)) {
+ // Emission is currently blocked; make sure we try again as soon as
+ // possible.
+ if (trampoline_pool_blocked_nesting_ > 0) {
+ next_buffer_check_ = pc_offset() + kInstrSize;
+ } else {
+ next_buffer_check_ = no_trampoline_pool_before_;
+ }
+ return;
+ }
+
+ DCHECK(!trampoline_emitted_);
+ DCHECK(unbound_labels_count_ >= 0);
+ if (unbound_labels_count_ > 0) {
+ // First we emit jump, then we emit trampoline pool.
+ { BlockTrampolinePoolScope block_trampoline_pool(this);
+ Label after_pool;
+ b(&after_pool);
+
+ int pool_start = pc_offset();
+ for (int i = 0; i < unbound_labels_count_; i++) {
+ b(&after_pool);
+ }
+ bind(&after_pool);
+ trampoline_ = Trampoline(pool_start, unbound_labels_count_);
+
+ trampoline_emitted_ = true;
+ // As we are only going to emit trampoline once, we need to prevent any
+ // further emission.
+ next_buffer_check_ = kMaxInt;
+ }
+ } else {
+ // Number of branches to unbound label at this point is zero, so we can
+ // move next buffer check to maximum.
+ next_buffer_check_ = pc_offset() +
+ kMaxCondBranchReach - kMaxBlockTrampolineSectionSize;
+ }
+ return;
+}
+
+
+}
+} // namespace v8::internal
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/assembler-s390.h
@@ -0,0 +1,1692 @@
+// Copyright (c) 1994-2006 Sun Microsystems Inc.
+// All Rights Reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistribution in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the
+// distribution.
+//
+// - Neither the name of Sun Microsystems or the names of contributors may
+// be used to endorse or promote products derived from this software without
+// specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+// OF THE POSSIBILITY OF SUCH DAMAGE.
+
+// The original source code covered by the above license above has been
+// modified significantly by Google Inc.
+// Copyright 2015 the V8 project authors. All rights reserved.
+
+// A light-weight S390 Assembler
+// Generates user mode instructions for the S390 architecture
+
+#ifndef V8_S390_ASSEMBLER_S390_H_
+#define V8_S390_ASSEMBLER_S390_H_
+#include <stdio.h>
+#if V8_HOST_ARCH_S390
+// elf.h include is required for auxv check for STFLE facility used
+// for hardware detection, which is sensible only on s390 hosts.
+#include <elf.h>
+#endif
+
+#include <fcntl.h>
+#include <unistd.h>
+#include "src/assembler.h"
+#include "src/compiler.h"
+#include "src/s390/constants-s390.h"
+
+#define ABI_USES_FUNCTION_DESCRIPTORS 0
+
+#define ABI_PASSES_HANDLES_IN_REGS 1
+
+#define ABI_RETURNS_OBJECT_PAIRS_IN_REGS \
+ (!V8_HOST_ARCH_S390 || (V8_TARGET_LITTLE_ENDIAN))
+
+#define INSTR_AND_DATA_CACHE_COHERENCY LWSYNC
+
+namespace v8 {
+namespace internal {
+
+// CPU Registers.
+//
+// 1) We would prefer to use an enum, but enum values are assignment-
+// compatible with int, which has caused code-generation bugs.
+//
+// 2) We would prefer to use a class instead of a struct but we don't like
+// the register initialization to depend on the particular initialization
+// order (which appears to be different on OS X, Linux, and Windows for the
+// installed versions of C++ we tried). Using a struct permits C-style
+// "initialization". Also, the Register objects cannot be const as this
+// forces initialization stubs in MSVC, making us dependent on initialization
+// order.
+//
+// 3) By not using an enum, we are possibly preventing the compiler from
+// doing certain constant folds, which may significantly reduce the
+// code generated for some assembly instructions (because they boil down
+// to a few constants). If this is a problem, we could change the code
+// such that we use an enum in optimized mode, and the struct in debug
+// mode. This way we get the compile-time error checking in debug mode
+// and best performance in optimized code.
+
+// Core register
+struct Register {
+ static const int kNumRegisters = 16;
+ static const int kSizeInBytes = kPointerSize;
+
+#if V8_TARGET_LITTLE_ENDIAN
+ static const int kMantissaOffset = 0;
+ static const int kExponentOffset = 4;
+#else
+ static const int kMantissaOffset = 4;
+ static const int kExponentOffset = 0;
+#endif
+
+ static const int kAllocatableRangeBegin = 2;
+ static const int kAllocatableRangeEnd = 9;
+ static const int kAllocatableContext = 13; // cp
+ static const int kNumAllocatable =
+ kAllocatableRangeEnd - kAllocatableRangeBegin + 1;
+ static const int kMaxNumAllocatableRegisters =
+ kNumAllocatable + 1; // cp
+ static int NumAllocatableRegisters() { return kMaxNumAllocatableRegisters; }
+
+ static int ToAllocationIndex(Register reg) {
+ int index;
+ int code = reg.code();
+ if (code == kAllocatableContext) {
+ // Context is the last index
+ index = NumAllocatableRegisters() - 1;
+ } else {
+ // r0-r1 are skipped
+ index = code - kAllocatableRangeBegin;
+ }
+ DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters);
+ return index;
+ }
+
+ static Register FromAllocationIndex(int index) {
+ DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters);
+ return index == kMaxNumAllocatableRegisters - 1 ?
+ from_code(kAllocatableContext) : // Last index is always 'cp' register.
+ from_code(index + kAllocatableRangeBegin); // r0-r1 are skipped
+ }
+
+ static const char* AllocationIndexToString(int index) {
+ DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters);
+ const char* const names[] = {
+ "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "cp",
+ };
+ return names[index];
+ }
+
+ static Register from_code(int code) {
+ Register r = {code};
+ return r;
+ }
+
+ bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; }
+ bool is(Register reg) const { return code_ == reg.code_; }
+ int code() const {
+ DCHECK(is_valid());
+ return code_;
+ }
+ int bit() const {
+ DCHECK(is_valid());
+ return 1 << code_;
+ }
+
+ void set_code(int code) {
+ code_ = code;
+ DCHECK(is_valid());
+ }
+
+ // Unfortunately we can't make this private in a struct.
+ int code_;
+};
+
+typedef struct Register Register;
+
+
+// These constants are used in several locations, including static initializers
+const int kRegister_no_reg_Code = -1;
+const int kRegister_r0_Code = 0; // general scratch
+const int kRegister_r1_Code = 1;
+const int kRegister_r2_Code = 2;
+const int kRegister_r3_Code = 3;
+const int kRegister_r4_Code = 4;
+const int kRegister_r5_Code = 5;
+const int kRegister_r6_Code = 6;
+const int kRegister_r7_Code = 7;
+const int kRegister_r8_Code = 8;
+const int kRegister_r9_Code = 9;
+const int kRegister_r10_Code = 10; // roots array pointer
+const int kRegister_fp_Code = 11; // frame pointer
+const int kRegister_r12_Code = 12; // ip (general scratch)
+const int kRegister_r13_Code = 13;
+const int kRegister_r14_Code = 14;
+const int kRegister_sp_Code = 15; // stack pointer
+
+const Register no_reg = {kRegister_no_reg_Code};
+
+// Give alias names to registers
+const Register cp = {kRegister_r13_Code}; // JavaScript context pointer
+const Register kRootRegister = {kRegister_r10_Code}; // Roots array pointer.
+
+const Register r0 = {kRegister_r0_Code};
+// Lithium scratch register - defined in lithium-codegen-s390.h
+const Register r1 = {kRegister_r1_Code};
+const Register r2 = {kRegister_r2_Code};
+const Register r3 = {kRegister_r3_Code};
+const Register r4 = {kRegister_r4_Code};
+const Register r5 = {kRegister_r5_Code};
+const Register r6 = {kRegister_r6_Code};
+const Register r7 = {kRegister_r7_Code};
+const Register r8 = {kRegister_r8_Code};
+const Register r9 = {kRegister_r9_Code};
+// Used as roots register.
+const Register r10 = {kRegister_r10_Code};
+const Register fp = {kRegister_fp_Code};
+// IP - Intra procedural register
+const Register ip = {kRegister_r12_Code};
+// CP - Context Register
+const Register r13 = {kRegister_r13_Code};
+const Register r14 = {kRegister_r14_Code};
+const Register sp = {kRegister_sp_Code};
+
+// Double word FP register.
+struct DoubleRegister {
+ static const int kNumRegisters = 16;
+ static const int kMaxNumRegisters = kNumRegisters;
+#ifdef V8_TARGET_ARCH_S390X
+ static const int kNumVolatileRegisters = 8; // d0-d7
+#else
+ static const int kNumVolatileRegisters = 14; // d0-d15 except d4 and d6
+#endif
+ // TODO(JOHN): may not be true
+ static const int kAllocatableRangeBegin = 1;
+ static const int kAllocatableRangeEnd = 12;
+ static const int kNumAllocatable =
+ kAllocatableRangeEnd - kAllocatableRangeBegin + 1;
+ static const int kMaxNumAllocatableRegisters =
+ kNumAllocatable;
+ static int NumAllocatableRegisters() { return kMaxNumAllocatableRegisters; }
+
+ // TODO(turbofan)
+ inline static int NumAllocatableAliasedRegisters() {
+ return NumAllocatableRegisters();
+ }
+
+ static int ToAllocationIndex(DoubleRegister reg) {
+ int code = reg.code();
+ int index = code - kAllocatableRangeBegin;
+ DCHECK(index < kMaxNumAllocatableRegisters);
+ return index;
+ }
+
+ static DoubleRegister FromAllocationIndex(int index) {
+ DCHECK(index >= 0 && index < kMaxNumAllocatableRegisters);
+ return (from_code(index + kAllocatableRangeBegin)); // d0 is skipped
+ }
+
+ static const char* AllocationIndexToString(int index);
+ static DoubleRegister from_code(int code) {
+ DoubleRegister r = {code};
+ return r;
+ }
+
+ bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; }
+ bool is(DoubleRegister reg) const { return code_ == reg.code_; }
+
+ int code() const {
+ DCHECK(is_valid());
+ return code_;
+ }
+ int bit() const {
+ DCHECK(is_valid());
+ return 1 << code_;
+ }
+ void split_code(int* vm, int* m) const {
+ DCHECK(is_valid());
+ *m = (code_ & 0x10) >> 4;
+ *vm = code_ & 0x0F;
+ }
+
+ int code_;
+};
+
+
+typedef DoubleRegister DoubleRegister;
+
+const DoubleRegister no_dreg = {-1};
+const DoubleRegister d0 = {0};
+const DoubleRegister d1 = {1};
+const DoubleRegister d2 = {2};
+const DoubleRegister d3 = {3};
+const DoubleRegister d4 = {4};
+const DoubleRegister d5 = {5};
+const DoubleRegister d6 = {6};
+const DoubleRegister d7 = {7};
+const DoubleRegister d8 = {8};
+const DoubleRegister d9 = {9};
+const DoubleRegister d10 = {10};
+const DoubleRegister d11 = {11};
+const DoubleRegister d12 = {12};
+const DoubleRegister d13 = {13};
+const DoubleRegister d14 = {14};
+const DoubleRegister d15 = {15};
+
+// Aliases for double registers. Defined using #define instead of
+// "static const DoubleRegister&" because Clang complains otherwise when a
+// compilation unit that includes this header doesn't use the variables.
+#define kDoubleRegZero d14
+#define kScratchDoubleReg d13
+
+Register ToRegister(int num);
+
+// Coprocessor register
+struct CRegister {
+ bool is_valid() const { return 0 <= code_ && code_ < 16; }
+ bool is(CRegister creg) const { return code_ == creg.code_; }
+ int code() const {
+ DCHECK(is_valid());
+ return code_;
+ }
+ int bit() const {
+ DCHECK(is_valid());
+ return 1 << code_;
+ }
+
+ // Unfortunately we can't make this private in a struct.
+ int code_;
+};
+
+
+const CRegister no_creg = {-1};
+
+const CRegister cr0 = {0};
+const CRegister cr1 = {1};
+const CRegister cr2 = {2};
+const CRegister cr3 = {3};
+const CRegister cr4 = {4};
+const CRegister cr5 = {5};
+const CRegister cr6 = {6};
+const CRegister cr7 = {7};
+const CRegister cr8 = {8};
+const CRegister cr9 = {9};
+const CRegister cr10 = {10};
+const CRegister cr11 = {11};
+const CRegister cr12 = {12};
+const CRegister cr13 = {13};
+const CRegister cr14 = {14};
+const CRegister cr15 = {15};
+
+// -----------------------------------------------------------------------------
+// Machine instruction Operands
+
+#if V8_TARGET_ARCH_S390X
+const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64;
+#else
+const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32;
+#endif
+
+// Class Operand represents a shifter operand in data processing instructions
+// defining immediate numbers and masks
+typedef uint8_t Length;
+
+struct Mask {
+ uint8_t mask;
+ uint8_t value() {return mask;}
+ static Mask from_value(uint8_t input) {
+ DCHECK(input <= 0x0F);
+ Mask m = {input};
+ return m;
+ }
+};
+
+class Operand BASE_EMBEDDED {
+ public:
+ // immediate
+ INLINE(explicit Operand(intptr_t immediate,
+ RelocInfo::Mode rmode = kRelocInfo_NONEPTR));
+ INLINE(static Operand Zero()) { return Operand(static_cast<intptr_t>(0)); }
+ INLINE(explicit Operand(const ExternalReference& f));
+ explicit Operand(Handle<Object> handle);
+ INLINE(explicit Operand(Smi* value));
+
+ // rm
+ INLINE(explicit Operand(Register rm));
+
+ // Return true if this is a register operand.
+ INLINE(bool is_reg() const);
+
+ bool must_output_reloc_info(const Assembler* assembler) const;
+
+ inline intptr_t immediate() const {
+ DCHECK(!rm_.is_valid());
+ return imm_;
+ }
+
+ inline void setBits(int n) {
+ imm_ = (static_cast<uint32_t>(imm_) << (32 - n)) >> (32 - n);
+ }
+
+ Register rm() const { return rm_; }
+
+ private:
+ Register rm_;
+ intptr_t imm_; // valid if rm_ == no_reg
+ RelocInfo::Mode rmode_;
+
+ friend class Assembler;
+ friend class MacroAssembler;
+};
+
+typedef int32_t Disp;
+
+// Class MemOperand represents a memory operand in load and store instructions
+// On S390, we have various flavours of memory operands:
+// 1) a base register + 16 bit unsigned displacement
+// 2) a base register + index register + 16 bit unsigned displacement
+// 3) a base register + index register + 20 bit signed displacement
+class MemOperand BASE_EMBEDDED {
+ public:
+ explicit MemOperand(Register rx, Disp offset = 0);
+ explicit MemOperand(Register rx, Register rb, Disp offset = 0);
+
+ int32_t offset() const {
+ return offset_;
+ }
+ uint32_t getDisplacement() const { return offset(); }
+
+ // Base register
+ Register rb() const {
+ DCHECK(!baseRegister.is(no_reg));
+ return baseRegister;
+ }
+
+ Register getBaseRegister() const { return rb(); }
+
+ // Index Register
+ Register rx() const {
+ DCHECK(!indexRegister.is(no_reg));
+ return indexRegister;
+ }
+ Register getIndexRegister() const { return rx(); }
+
+ private:
+ Register baseRegister; // base
+ int32_t offset_; // offset
+ Register indexRegister; // index
+
+ friend class Assembler;
+};
+
+
+class DeferredRelocInfo {
+ public:
+ DeferredRelocInfo() {}
+ DeferredRelocInfo(int position, RelocInfo::Mode rmode, intptr_t data)
+ : position_(position), rmode_(rmode), data_(data) {}
+
+ int position() const { return position_; }
+ RelocInfo::Mode rmode() const { return rmode_; }
+ intptr_t data() const { return data_; }
+
+ private:
+ int position_;
+ RelocInfo::Mode rmode_;
+ intptr_t data_;
+};
+
+class Assembler : public AssemblerBase {
+ public:
+ // Create an assembler. Instructions and relocation information are emitted
+ // into a buffer, with the instructions starting from the beginning and the
+ // relocation information starting from the end of the buffer. See CodeDesc
+ // for a detailed comment on the layout (globals.h).
+ //
+ // If the provided buffer is NULL, the assembler allocates and grows its own
+ // buffer, and buffer_size determines the initial buffer size. The buffer is
+ // owned by the assembler and deallocated upon destruction of the assembler.
+ //
+ // If the provided buffer is not NULL, the assembler uses the provided buffer
+ // for code generation and assumes its size to be buffer_size. If the buffer
+ // is too small, a fatal error occurs. No deallocation of the buffer is done
+ // upon destruction of the assembler.
+ Assembler(Isolate* isolate, void* buffer, int buffer_size);
+ virtual ~Assembler() {}
+
+ // GetCode emits any pending (non-emitted) code and fills the descriptor
+ // desc. GetCode() is idempotent; it returns the same result if no other
+ // Assembler functions are invoked in between GetCode() calls.
+ void GetCode(CodeDesc* desc);
+
+ // Label operations & relative jumps (PPUM Appendix D)
+ //
+ // Takes a branch opcode (cc) and a label (L) and generates
+ // either a backward branch or a forward branch and links it
+ // to the label fixup chain. Usage:
+ //
+ // Label L; // unbound label
+ // j(cc, &L); // forward branch to unbound label
+ // bind(&L); // bind label to the current pc
+ // j(cc, &L); // backward branch to bound label
+ // bind(&L); // illegal: a label may be bound only once
+ //
+ // Note: The same Label can be used for forward and backward branches
+ // but it may be bound only once.
+
+ void bind(Label* L); // binds an unbound label L to the current code position
+
+ // Links a label at the current pc_offset(). If already bound, returns the
+ // bound position. If already linked, returns the position of the prior link.
+ // Otherwise, returns the current pc_offset().
+ int link(Label* L);
+
+ // Determines if Label is bound and near enough so that a single
+ // branch instruction can be used to reach it.
+ bool is_near(Label* L, Condition cond);
+
+ // Returns the branch offset to the given label from the current code position
+ // Links the label to the current position if it is still unbound
+ // Manages the jump elimination optimization if the second parameter is true.
+ int branch_offset(Label* L, bool jump_elimination_allowed) {
+ int position = link(L);
+ return position - pc_offset();
+ }
+
+ // Puts a labels target address at the given position.
+ // The high 8 bits are set to zero.
+ void label_at_put(Label* L, int at_offset);
+ void load_label_offset(Register r1, Label* L);
+
+ // Read/Modify the code target address in the branch/call instruction at pc.
+ INLINE(static Address target_address_at(Address pc,
+ Address constant_pool));
+ INLINE(static void set_target_address_at(
+ Address pc, Address constant_pool, Address target,
+ ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED));
+ INLINE(static Address target_address_at(Address pc, Code* code)) {
+ Address constant_pool = NULL;
+ return target_address_at(pc, constant_pool);
+ }
+ INLINE(static void set_target_address_at(
+ Address pc, Code* code, Address target,
+ ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) {
+ Address constant_pool = NULL;
+ set_target_address_at(pc, constant_pool, target, icache_flush_mode);
+ }
+
+ // Return the code target address at a call site from the return address
+ // of that call in the instruction stream.
+ inline static Address target_address_from_return_address(Address pc);
+
+ // Given the address of the beginning of a call, return the address
+ // in the instruction stream that the call will return to.
+ INLINE(static Address return_address_from_call_start(Address pc));
+
+ // Return the code target address of the patch debug break slot
+ INLINE(static Address break_address_from_return_address(Address pc));
+
+ inline Handle<Object> code_target_object_handle_at(Address pc);
+ // This sets the branch destination.
+ // This is for calls and branches within generated code.
+ inline static void deserialization_set_special_target_at(
+ Address instruction_payload, Code* code, Address target);
+
+ // This sets the internal reference at the pc.
+ inline static void deserialization_set_target_internal_reference_at(
+ Address pc, Address target,
+ RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
+
+ // Size of an instruction.
+ static const int kInstrSize = sizeof(Instr);
+
+ // Here we are patching the address in the LUI/ORI instruction pair.
+ // These values are used in the serialization process and must be zero for
+ // PPC platform, as Code, Embedded Object or External-reference pointers
+ // are split across two consecutive instructions and don't exist separately
+ // in the code, so the serializer should not step forwards in memory after
+ // a target is resolved and written.
+ static const int kSpecialTargetSize = 0;
+
+ // Number of bytes for instructions used to store pointer sized constant.
+#if V8_TARGET_ARCH_S390X
+ static const int kBytesForPtrConstant = 12; // iihf + iilf
+#else
+ static const int kBytesForPtrConstant = 6; // iilf
+#endif
+
+ // Distance between the instruction referring to the address of the call
+ // target and the return address.
+
+ // Offset between call target address and return address
+ // for BRASL calls
+ // Patch will be appiled to other FIXED_SEQUENCE call
+ static const int kCallTargetAddressOffset = 6;
+
+ // The length of FIXED_SEQUENCE call
+ // iihf r8, <address_hi> // <64-bit only>
+ // iilf r8, <address_lo>
+ // basr r14, r8
+#if V8_TARGET_ARCH_S390X
+ static const int kCallSequenceLength = 14;
+#else
+ static const int kCallSequenceLength = 8;
+#endif
+
+
+ // This is the length of the BreakLocationIterator::SetDebugBreakAtReturn()
+ // code patch FIXED_SEQUENCE in bytes!
+ // JS Return Sequence = Call Sequence + BKPT
+ static const int kJSReturnSequenceLength = kCallSequenceLength + 2;
+
+ // This is the length of the code sequence from SetDebugBreakAtSlot()
+ // FIXED_SEQUENCE in bytes!
+ static const int kDebugBreakSlotLength = kCallSequenceLength;
+ static const int kPatchDebugBreakSlotReturnOffset = kCallTargetAddressOffset;
+
+ // Length to patch between the start of the JS return sequence
+ // from SetDebugBreakAtReturn and the address from
+ // break_address_from_return_address.
+ //
+ // frame->pc() in Debug::SetAfterBreakTarget will point to BKPT in
+ // JS return sequence, so the length to patch will not include BKPT
+ // instruction length.
+ static const int kPatchReturnSequenceAddressOffset =
+ kCallSequenceLength - kPatchDebugBreakSlotReturnOffset;
+
+ // Length to patch between the start of the FIXED call sequence from
+ // SetDebugBreakAtSlot() and the the address from
+ // break_address_from_return_address.
+ static const int kPatchDebugBreakSlotAddressOffset =
+ kDebugBreakSlotLength - kPatchDebugBreakSlotReturnOffset;
+
+ static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) {
+ return ((cr.code() * CRWIDTH) + crbit);
+ }
+
+ // ---------------------------------------------------------------------------
+ // Code generation
+
+ // Helper for unconditional branch to Label with update to save register
+ void b(Register r, Label* l) {
+ positions_recorder()->WriteRecordedPositions();
+ int32_t halfwords = branch_offset(l, false) / 2;
+ brasl(r, Operand(halfwords));
+ }
+
+ // Conditional Branch Instruction - Generates either BRC / BRCL
+ void branchOnCond(Condition c, int branch_offset, bool is_bound = false);
+
+ // Helpers for conditional branch to Label
+ void b(Condition cond, Label* l, Label::Distance dist = Label::kFar) {
+ branchOnCond(cond, branch_offset(l, false),
+ l->is_bound() || (dist == Label::kNear));
+ }
+
+ void bc_short(Condition cond, Label* l, Label::Distance dist = Label::kFar) {
+ b(cond, l, Label::kNear);
+ }
+ // Helpers for conditional branch to Label
+ void beq(Label * l, Label::Distance dist = Label::kFar) { b(eq, l, dist); }
+ void bne(Label * l, Label::Distance dist = Label::kFar) { b(ne, l, dist); }
+ void blt(Label * l, Label::Distance dist = Label::kFar) { b(lt, l, dist); }
+ void ble(Label * l, Label::Distance dist = Label::kFar) { b(le, l, dist); }
+ void bgt(Label * l, Label::Distance dist = Label::kFar) { b(gt, l, dist); }
+ void bge(Label * l, Label::Distance dist = Label::kFar) { b(ge, l, dist); }
+ void b(Label * l, Label::Distance dist = Label::kFar) { b(al, l, dist); }
+ void jmp(Label * l, Label::Distance dist = Label::kFar) { b(al, l, dist); }
+ void bunordered(Label* l, Label::Distance dist = Label::kFar) {
+ b(unordered, l, dist); }
+ void bordered(Label* l, Label::Distance dist = Label::kFar) {
+ b(ordered, l, dist); }
+
+ // Helpers for conditional indirect branch off register
+ void b(Condition cond, Register r) { bcr(cond, r); }
+ void beq(Register r) { b(eq, r); }
+ void bne(Register r) { b(ne, r); }
+ void blt(Register r) { b(lt, r); }
+ void ble(Register r) { b(le, r); }
+ void bgt(Register r) { b(gt, r); }
+ void bge(Register r) { b(ge, r); }
+ void b(Register r) { b(al, r); }
+ void jmp(Register r) { b(al, r); }
+ void bunordered(Register r) { b(unordered, r); }
+ void bordered(Register r) { b(ordered, r); }
+
+ // S390 native instructions
+ // Indirect Conditional Branch via register
+ void bcr(Condition m, Register target);
+
+ // Conditional Branch Relative Long
+ void brcl(Condition m, const Operand& opnd, bool isCodeTarget = false);
+ // ---------------------------------------------------------------------------
+ // Code generation
+
+ // Insert the smallest number of nop instructions
+ // possible to align the pc offset to a multiple
+ // of m. m must be a power of 2 (>= 4).
+ void Align(int m);
+ // Insert the smallest number of zero bytes possible to align the pc offset
+ // to a mulitple of m. m must be a power of 2 (>= 2).
+ void DataAlign(int m);
+ // Aligns code to something that's optimal for a jump target for the platform.
+ void CodeTargetAlign();
+
+ void breakpoint(bool do_print) {
+ if (do_print) {
+ printf("DebugBreak is inserted to %p\n", pc_);
+ }
+#if V8_HOST_ARCH_64_BIT
+ int64_t value = reinterpret_cast<uint64_t>(&v8::base::OS::DebugBreak);
+ int32_t hi_32 = static_cast<int64_t>(value) >> 32;
+ int32_t lo_32 = static_cast<int32_t>(value);
+
+ iihf(r1, Operand(hi_32));
+ iilf(r1, Operand(lo_32));
+#else
+ iilf(r1, Operand(reinterpret_cast<uint32_t>(&v8::base::OS::DebugBreak)));
+#endif
+ basr(r14, r1);
+ }
+
+ // Load address relative long.
+ void larl(Register r, Label *l) {
+ larl(r, Operand(branch_offset(l, false)));
+ }
+
+ void call(Handle<Code> target, RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id = TypeFeedbackId::None());
+ void jump(Handle<Code> target, RelocInfo::Mode rmode, Condition cond);
+
+ void mvc(const MemOperand& opnd1, const MemOperand& opnd2, uint32_t length);
+ void asi(const MemOperand&, const Operand&);
+ void agsi(const MemOperand&, const Operand&);
+
+ // Data-processing instructions
+
+ // S390 instruction generation
+#define E_FORM(name)\
+void name()
+
+#define IE_FORM(name)\
+void name(const Operand& i1, const Operand& i2)
+
+#define I_FORM(name)\
+void name(const Operand& i)
+
+#define RR_FORM(name)\
+void name(Register r1, Register r2)
+
+#define RR2_FORM(name)\
+void name(Condition m1, Register r2)
+
+#define RX_FORM(name)\
+void name(Register r1, Register x2, Register b2, \
+ Disp d2);\
+void name(Register r1, const MemOperand& opnd)
+
+#define RI1_FORM(name)\
+void name(Register r, const Operand& i)
+
+#define RI2_FORM(name)\
+void name(Condition m, const Operand& i)
+
+#define RIE_FORM(name)\
+void name(Register r1, Register R3, const Operand& i)
+
+#define RIE_F_FORM(name)\
+void name(Register r1, Register r2, const Operand &i3, \
+ const Operand& i4, const Operand& i5)
+
+#define RIL1_FORM(name)\
+void name(Register r1, const Operand& i2)
+
+#define RIL2_FORM(name)\
+void name(Condition m1, const Operand& i2)
+
+#define RXE_FORM(name)\
+void name(Register r1, const MemOperand& opnd);\
+void name(Register r1, Register b2, Register x2, \
+ Disp d2)
+
+#define RXF_FORM(name)\
+void name(Register r1, Register r3, const MemOperand& opnd);\
+void name(Register r1, Register r3, Register b2, \
+ Register x2, Disp d2)
+
+#define RXY_FORM(name)\
+void name(Register r1, Register x2, Register b2, \
+ Disp d2);\
+void name(Register r1, const MemOperand& opnd)
+
+#define RSI_FORM(name)\
+void name(Register r1, Register r3, const Operand& i)
+
+#define RIS_FORM(name)\
+void name(Register r1, Condition m3, Register b4, \
+ Disp d4, const Operand& i2);\
+void name(Register r1, const Operand& i2, Condition m3, \
+ const MemOperand& opnd)
+
+#define SI_FORM(name)\
+void name(const MemOperand& opnd, const Operand& i);\
+void name(const Operand& i2, Register b1, Disp d1)
+
+#define SIL_FORM(name)\
+void name(Register b1, Disp d1, const Operand& i2);\
+void name(const MemOperand& opnd, const Operand& i2)
+
+#define RRE_FORM(name)\
+void name(Register r1, Register r2)
+
+#define RRF1_FORM(name)\
+void name(Register r1, Register r2, Register r3)
+
+#define RRF2_FORM(name)\
+void name(Condition m1, Register r1, Register r2)
+
+#define RRF3_FORM(name)\
+void name(Register r3, Condition m4, Register r1, Register r2)
+
+#define RS1_FORM(name)\
+void name(Register r1, Register r3, const MemOperand& opnd);\
+void name(Register r1, Register r3, Register b2, Disp d2)
+
+#define RS2_FORM(name)\
+void name(Register r1, Condition m3, const MemOperand& opnd);\
+void name(Register r1, Condition m3, Register b2, Disp d2)
+
+#define RSE_FORM(name)\
+void name(Register r1, Register r3, const MemOperand& opnd);\
+void name(Register r1, Register r3, Register b2, Disp d2)
+
+#define RSL_FORM(name)\
+void name(Length l, Register b2, Disp d2);\
+void name(const MemOperand& opnd)
+
+#define RSY1_FORM(name)\
+void name(Register r1, Register r3, Register b2, Disp d2);\
+void name(Register r1, Register r3, const MemOperand& opnd)
+
+#define RSY2_FORM(name)\
+void name(Register r1, Condition m3, Register b2, Disp d2);\
+void name(Register r1, Condition m3, const MemOperand& opnd)
+
+#define RRD_FORM(name)\
+void name(Register r1, Register r3, Register r2)
+
+#define RRS_FORM(name)\
+void name(Register r1, Register r2, Register b4, \
+ Disp d4, Condition m3);\
+void name(Register r1, Register r2, Condition m3, \
+ const MemOperand& opnd)
+
+#define S_FORM(name)\
+void name(Register b2, Disp d2);\
+void name(const MemOperand& opnd)
+
+#define SIY_FORM(name)\
+void name(const Operand& i2, Register b1, Disp d1);\
+void name(const MemOperand& opnd, const Operand& i)
+
+#define SS1_FORM(name)\
+void name(Register b1, Disp d1, \
+ Register b3, Disp d2, Length length);\
+void name(const MemOperand& opnd1, const MemOperand& opnd2, Length length)
+
+#define SS2_FORM(name)\
+void name(const MemOperand& opnd1, const MemOperand& opnd2, \
+ Length length1, Length length2);\
+void name(Register b1, \
+ Disp d1, Register b2, Disp d2, Length l1, Length l2)
+
+#define SS3_FORM(name)\
+void name(const MemOperand& opnd1, const MemOperand& opnd2, Length length);\
+void name(const Operand& i3, Register b1, \
+ Disp d1, Register b2, Disp d2, Length l1)
+
+#define SS4_FORM(name)\
+void name(const MemOperand& opnd1, const MemOperand& opnd2);\
+void name(Register r1, Register r3, Register b1, \
+ Disp d1, Register b2, Disp d2)
+
+#define SS5_FORM(name)\
+void name(const MemOperand& opnd1, const MemOperand& opnd2);\
+void name(Register r1, Register r3, Register b3, \
+ Disp d2, Register b4, Disp d4)
+
+#define SSE_FORM(name)\
+void name(Register b1, Disp d1, \
+ Register b2, Disp d2);\
+void name(const MemOperand& opnd1, const MemOperand& opnd2)
+
+#define SSF_FORM(name)\
+void name(Register r3, Register b1, Disp d1, \
+ Register b2, Disp d2);\
+void name(Register r3, const MemOperand& opnd1, const MemOperand& opnd2)
+
+// S390 instruction sets
+RX_FORM(a);
+RXE_FORM(adb);
+RRE_FORM(adbr);
+RIL1_FORM(afi);
+RXY_FORM(ag);
+RXY_FORM(agf);
+RIL1_FORM(agfi);
+RRE_FORM(agfr);
+RI1_FORM(aghi);
+RRE_FORM(agr);
+RX_FORM(ah);
+RI1_FORM(ahi);
+RXY_FORM(ahy);
+RX_FORM(al_z);
+RIL1_FORM(alfi);
+RXY_FORM(alg);
+RIL1_FORM(algfi);
+RRE_FORM(algr);
+RR_FORM(alr);
+RXY_FORM(aly);
+SS2_FORM(ap);
+RR_FORM(ar);
+RXY_FORM(ay);
+RX_FORM(bal);
+RR_FORM(basr);
+RX_FORM(bc);
+RX_FORM(bct);
+RXY_FORM(bctg);
+RR_FORM(bctr);
+RI1_FORM(bras);
+RIL1_FORM(brasl);
+RI2_FORM(brc);
+RX_FORM(c);
+RX_FORM(cd);
+RRE_FORM(cdr);
+RXE_FORM(cdb);
+RXE_FORM(ceb);
+RRE_FORM(cefbr);
+RRF2_FORM(cfebr);
+RIL1_FORM(cfi);
+RXY_FORM(cg);
+RIL1_FORM(cgfi);
+RI1_FORM(cghi);
+RX_FORM(ch);
+RI1_FORM(chi);
+RXY_FORM(chy);
+RX_FORM(cl);
+SS1_FORM(clc);
+RIL1_FORM(clfi);
+RXY_FORM(clg);
+RIL1_FORM(clgfi);
+RXY_FORM(cly);
+RR_FORM(cr_z);
+RXY_FORM(cy);
+RX_FORM(d);
+RXE_FORM(ddb);
+RRE_FORM(ddbr);
+RXY_FORM(dl);
+RRE_FORM(dlr);
+SS2_FORM(dp);
+RR_FORM(dr);
+RRE_FORM(dsgr);
+SS1_FORM(ed);
+RRE_FORM(epair);
+RX_FORM(ex);
+RRF2_FORM(fidbr);
+RRE_FORM(flogr);
+RX_FORM(ic_z);
+RXY_FORM(icy);
+RIL1_FORM(iihf);
+RI1_FORM(iihh);
+RI1_FORM(iihl);
+RIL1_FORM(iilf);
+RI1_FORM(iilh);
+RI1_FORM(iill);
+RX_FORM(l);
+RSY1_FORM(lang);
+RIL1_FORM(larl);
+RSY1_FORM(lax);
+RXY_FORM(lb);
+RRE_FORM(lbr);
+RRE_FORM(lcgr);
+RR_FORM(lcr);
+RX_FORM(le_z);
+RXY_FORM(ley);
+RXY_FORM(lg);
+RXY_FORM(lgb);
+RRE_FORM(lgbr);
+RXY_FORM(lgf);
+RRE_FORM(lgfr);
+RXY_FORM(lgh);
+RI1_FORM(lghi);
+RRE_FORM(lghr);
+RRE_FORM(lgr);
+RX_FORM(lh);
+RRE_FORM(lhr);
+RXY_FORM(lhy);
+RXY_FORM(llgf);
+RRE_FORM(llgfr);
+RXY_FORM(llgh);
+RRE_FORM(llghr);
+RXY_FORM(llh);
+RRE_FORM(llhr);
+RIL1_FORM(llihf);
+RIL1_FORM(llilf);
+RRE_FORM(lngr);
+RR_FORM(lnr);
+RSY1_FORM(loc);
+RR_FORM(lr);
+RXY_FORM(lrv);
+RXY_FORM(lrvh);
+RRE_FORM(ltgfr);
+RRE_FORM(ltgr);
+RR_FORM(ltr);
+RXY_FORM(ly);
+RX_FORM(m);
+RXE_FORM(mdb);
+RRE_FORM(mdbr);
+RI1_FORM(mghi);
+RX_FORM(mh);
+RI1_FORM(mhi);
+RXY_FORM(mhy);
+RXY_FORM(ml);
+RXY_FORM(mlg);
+RRE_FORM(mlgr);
+RRE_FORM(mlr);
+RR_FORM(mr_z);
+RX_FORM(ms);
+RIL1_FORM(msfi);
+RXY_FORM(msg);
+RIL1_FORM(msgfi);
+RRE_FORM(msgr);
+RRE_FORM(msr);
+RXY_FORM(msy);
+SS4_FORM(mvck);
+SSF_FORM(mvcos);
+SS4_FORM(mvcs);
+SS1_FORM(mvn);
+RX_FORM(n);
+SS1_FORM(nc);
+RXY_FORM(ng);
+RRE_FORM(ngr);
+SI_FORM(ni);
+RIL1_FORM(nihf);
+RIL1_FORM(nilf);
+RI1_FORM(nilh);
+RI1_FORM(nill);
+RR_FORM(nr);
+RXY_FORM(ny);
+RX_FORM(o);
+RXY_FORM(og);
+RRE_FORM(ogr);
+RIL1_FORM(oihf);
+RIL1_FORM(oilf);
+RI1_FORM(oill);
+RR_FORM(or_z);
+RXY_FORM(oy);
+SS2_FORM(pack);
+// RRE_FORM(popcnt);
+// RSY1_FORM(rll);
+// RSY1_FORM(rllg);
+RX_FORM(s);
+S_FORM(sal);
+RRE_FORM(sar);
+RXE_FORM(sdb);
+RRE_FORM(sdbr);
+RXY_FORM(sg);
+RXY_FORM(sgf);
+RRE_FORM(sgfr);
+RRE_FORM(sgr);
+RX_FORM(sh);
+RXY_FORM(shy);
+RX_FORM(sl);
+RIL1_FORM(slfi);
+RXY_FORM(slg);
+RXY_FORM(slgf);
+RIL1_FORM(slgfi);
+RRE_FORM(slgr);
+RR_FORM(slr);
+RXY_FORM(sly);
+RR_FORM(sr);
+RS1_FORM(srdl);
+RX_FORM(ste);
+RXY_FORM(stey);
+RXY_FORM(strv);
+I_FORM(svc);
+RXY_FORM(sy);
+RI1_FORM(tmll);
+RSL_FORM(tp);
+SS1_FORM(tr);
+S_FORM(ts);
+RX_FORM(x);
+SS1_FORM(xc);
+RXY_FORM(xg);
+RRE_FORM(xgr);
+RIL1_FORM(xihf);
+RIL1_FORM(xilf);
+RR_FORM(xr);
+RXY_FORM(xy);
+SS2_FORM(zap);
+
+
+ // Load Address Instructions
+ void la(Register r1, const MemOperand& src);
+ void lay(Register r1, const MemOperand& src);
+
+ // Load Instructions
+ void lt_z(Register r1, const MemOperand& src);
+ void ltg(Register r1, const MemOperand& src);
+
+ // Load Logical Byte Instructions (aka. chars)
+ void llc(Register r1, const MemOperand& src);
+ void llgc(Register r1, const MemOperand& src);
+
+ // Load Multiple Instructions
+ void lm(Register r1, Register r2, const MemOperand& src);
+ void lmy(Register r1, Register r2, const MemOperand& src);
+ void lmg(Register r1, Register r2, const MemOperand& src);
+
+ // Store Instructions
+ void stm(Register r1, Register r2, const MemOperand& src);
+ void stmy(Register r1, Register r2, const MemOperand& src);
+ void stmg(Register r1, Register r2, const MemOperand& src);
+ void st(Register dst, const MemOperand& src);
+ void sty(Register dst, const MemOperand& src);
+ void sth(Register dst, const MemOperand& src);
+ void sthy(Register dst, const MemOperand& src);
+ void stc(Register dst, const MemOperand& src);
+ void stcy(Register dst, const MemOperand& src);
+
+ // Compare Instructions
+ void cr(Register r1, Register r2);
+ void cgr(Register r1, Register r2);
+ void clr(Register r1, Register r2);
+ void clgr(Register r1, Register r2);
+ void cli(const MemOperand& mem, const Operand& imm);
+ void cliy(const MemOperand& mem, const Operand& imm);
+
+ // Test Under Mask Instructions
+ void tm(const MemOperand& mem, const Operand& imm);
+ void tmy(const MemOperand& mem, const Operand& imm);
+
+ // Rotate Instruction
+ void rll(Register r1, Register r3, Register opnd);
+ void rll(Register r1, Register r3, const Operand& opnd);
+ void rll(Register r1, Register r3, Register r2, const Operand& opnd);
+ void rllg(Register r1, Register r3, const Operand& opnd);
+ void rllg(Register r1, Register r3, const Register opnd);
+ void rllg(Register r1, Register r3, Register r2, const Operand& opnd);
+
+ // Shift Instruction (32)
+ void sll(Register r1, Register opnd);
+ void sll(Register r1, const Operand& opnd);
+ void sllk(Register r1, Register r3, Register opnd);
+ void sllk(Register r1, Register r3, const Operand& opnd);
+ void srl(Register r1, Register opnd);
+ void srl(Register r1, const Operand& opnd);
+ void srlk(Register r1, Register r3, Register opnd);
+ void srlk(Register r1, Register r3, const Operand& opnd);
+ void sra(Register r1, Register opnd);
+ void sra(Register r1, const Operand& opnd);
+ void srak(Register r1, Register r3, Register opnd);
+ void srak(Register r1, Register r3, const Operand& opnd);
+ void sla(Register r1, Register opnd);
+ void sla(Register r1, const Operand& opnd);
+ void slak(Register r1, Register r3, Register opnd);
+ void slak(Register r1, Register r3, const Operand& opnd);
+
+ // Data-processing instructions
+
+ void sub(Register dst, Register src1, Register src2,
+ OEBit s = LeaveOE, RCBit r = LeaveRC);
+
+ // Shift Instructions (64)
+ void sllg(Register r1, Register r3, const Operand& opnd);
+ void sllg(Register r1, Register r3, const Register opnd);
+ void srlg(Register r1, Register r3, const Operand& opnd);
+ void srlg(Register r1, Register r3, const Register opnd);
+ void srag(Register r1, Register r3, const Operand& opnd);
+ void srag(Register r1, Register r3, const Register opnd);
+ void srda(Register r1, const Operand& opnd);
+ void srdl(Register r1, const Operand& opnd);
+ void slag(Register r1, Register r3, const Operand& opnd);
+ void slag(Register r1, Register r3, const Register opnd);
+
+ // Rotate and Insert Selected Bits
+ void risbg(Register dst, Register src, const Operand& startBit,
+ const Operand& endBit, const Operand& shiftAmt,
+ bool zeroBits = true);
+ void risbgn(Register dst, Register src, const Operand& startBit,
+ const Operand& endBit, const Operand& shiftAmt,
+ bool zeroBits = true);
+
+ // Arithmetic Instructions
+ void ahik(Register r1, Register r3, const Operand& opnd);
+ void ark(Register r1, Register r2, Register r3);
+ void alrk(Register r1, Register r2, Register r3);
+ void aghik(Register r1, Register r3, const Operand& opnd);
+ void agrk(Register r1, Register r2, Register r3);
+ void algrk(Register r1, Register r2, Register r3);
+ void srk(Register r1, Register r2, Register r3);
+ void slrk(Register r1, Register r2, Register r3);
+ void sgrk(Register r1, Register r2, Register r3);
+ void slgrk(Register r1, Register r2, Register r3);
+
+ // Bitwise Instructions
+ void nrk(Register r1, Register r2, Register r3);
+ void ngrk(Register r1, Register r2, Register r3);
+ void ork(Register r1, Register r2, Register r3);
+ void ogrk(Register r1, Register r2, Register r3);
+ void xrk(Register r1, Register r2, Register r3);
+ void xgrk(Register r1, Register r2, Register r3);
+
+
+ // GPR <-> FPR conversions
+ void lgdr(Register r1, DoubleRegister f2);
+ void ldgr(DoubleRegister f1, Register r2);
+
+ // floating point instructions
+ void ld(DoubleRegister r1, const MemOperand& opnd);
+ void ldy(DoubleRegister r1, const MemOperand& opnd);
+ void le_z(DoubleRegister r1, const MemOperand& opnd);
+ void ley(DoubleRegister r1, const MemOperand& opnd);
+ void ldr(DoubleRegister r1, DoubleRegister r2);
+ void std(DoubleRegister r1, const MemOperand& opnd);
+ void stdy(DoubleRegister r1, const MemOperand& opnd);
+ void ste(DoubleRegister r1, const MemOperand& opnd);
+ void stey(DoubleRegister r1, const MemOperand& opnd);
+
+ void ledbr(DoubleRegister r1, DoubleRegister r2);
+ void ldebr(DoubleRegister r1, DoubleRegister r2);
+ void lpdbr(DoubleRegister r1, DoubleRegister r2);
+ // double type conversion
+ void cfdbr(Condition m, Register fixReg, DoubleRegister fltReg);
+ void cdfbr(DoubleRegister fltReg, Register fixReg);
+ void cgdbr(Condition m, Register fixReg, DoubleRegister fltReg);
+ void cdgbr(DoubleRegister fltReg, Register fixReg);
+ void cdlfbr(Condition m3, Condition m4,
+ DoubleRegister fltReg, Register fixReg);
+ void cdlgbr(Condition m3, Condition m4,
+ DoubleRegister fltReg, Register fixReg);
+ void clfdbr(Condition m3, Condition m4,
+ Register fixReg, DoubleRegister fltReg);
+ void clgdbr(Condition m3, Condition m4,
+ Register fixReg, DoubleRegister fltReg);
+
+ // float type conversion
+ void cfebr(Register fixReg, DoubleRegister fltReg);
+ void cefbr(DoubleRegister fltReg, Register fixReg);
+
+ void cdb(DoubleRegister r1, const MemOperand& opnd);
+ void cdbr(DoubleRegister r1, DoubleRegister r2);
+ void adb(DoubleRegister r1, const MemOperand& opnd);
+ void adbr(DoubleRegister r1, DoubleRegister r2);
+ void lzdr(DoubleRegister r1);
+ void sdb(DoubleRegister r1, const MemOperand& opnd);
+ void sdbr(DoubleRegister r1, DoubleRegister r2);
+ void mdb(DoubleRegister r1, const MemOperand& opnd);
+ void mdbr(DoubleRegister r1, DoubleRegister r2);
+ void ddb(DoubleRegister r1, const MemOperand& opnd);
+ void ddbr(DoubleRegister r1, DoubleRegister r2);
+ void madbr(DoubleRegister r1, DoubleRegister r2, DoubleRegister r3);
+ void msdbr(DoubleRegister r1, DoubleRegister r2, DoubleRegister r3);
+
+ void sqdb(DoubleRegister r1, const MemOperand& opnd);
+ void sqdbr(DoubleRegister r1, DoubleRegister r2);
+ void lcdbr(DoubleRegister r1, DoubleRegister r2);
+ void ldeb(DoubleRegister r1, const MemOperand& opnd);
+
+ enum FIDBRA_MASK3 {
+ FIDBRA_CURRENT_ROUNDING_MODE = 0,
+ FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0 = 1,
+ // ...
+ FIDBRA_ROUND_TOWARD_0 = 5,
+ FIDBRA_ROUND_TOWARD_POS_INF = 6,
+ FIDBRA_ROUND_TOWARD_NEG_INF = 7
+ };
+ void fidbra(DoubleRegister d1, DoubleRegister d2, FIDBRA_MASK3 m3);
+
+ // Branch Instructions
+ void brct(Register r1, const Operand& opnd);
+ void brctg(Register r1, const Operand& opnd);
+
+ // Move integer
+ void mvhi(const MemOperand& opnd1, const Operand& i2);
+ void mvghi(const MemOperand& opnd1, const Operand& i2);
+
+ void lhi(Register dst, const Operand& imm);
+
+ void stg(Register rs, const MemOperand &src);
+
+ // Exception-generating instructions and debugging support
+ void stop(const char* msg,
+ Condition cond = al,
+ int32_t code = kDefaultStopCode,
+ CRegister cr = cr7);
+
+ void bkpt(uint32_t imm16); // v5 and above
+
+ // Different nop operations are used by the code generator to detect certain
+ // states of the generated code.
+ enum NopMarkerTypes {
+ NON_MARKING_NOP = 0,
+ GROUP_ENDING_NOP,
+ DEBUG_BREAK_NOP,
+ // IC markers.
+ PROPERTY_ACCESS_INLINED,
+ PROPERTY_ACCESS_INLINED_CONTEXT,
+ PROPERTY_ACCESS_INLINED_CONTEXT_DONT_DELETE,
+ // Helper values.
+ LAST_CODE_MARKER,
+ FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED
+ };
+
+ void nop(int type = 0); // 0 is the default non-marking type.
+
+ // Check the code size generated from label to here.
+ int SizeOfCodeGeneratedSince(Label* label) {
+ return pc_offset() - label->pos();
+ }
+
+ // Class for scoping postponing the trampoline pool generation.
+ class BlockTrampolinePoolScope {
+ public:
+ explicit BlockTrampolinePoolScope(Assembler* assem) : assem_(assem) {
+ assem_->StartBlockTrampolinePool();
+ }
+ ~BlockTrampolinePoolScope() { assem_->EndBlockTrampolinePool(); }
+
+ private:
+ Assembler* assem_;
+
+ DISALLOW_IMPLICIT_CONSTRUCTORS(BlockTrampolinePoolScope);
+ };
+
+ // Debugging
+
+ // Mark address of the ExitJSFrame code.
+ void RecordJSReturn();
+
+ // Mark address of a debug break slot.
+ void RecordDebugBreakSlot();
+
+ // Record the AST id of the CallIC being compiled, so that it can be placed
+ // in the relocation information.
+ void SetRecordedAstId(TypeFeedbackId ast_id) {
+// PPC - this shouldn't be failing roohack DCHECK(recorded_ast_id_.IsNone());
+ recorded_ast_id_ = ast_id;
+ }
+
+ TypeFeedbackId RecordedAstId() {
+ // roohack - another issue??? DCHECK(!recorded_ast_id_.IsNone());
+ return recorded_ast_id_;
+ }
+
+ void ClearRecordedAstId() { recorded_ast_id_ = TypeFeedbackId::None(); }
+
+ // Record a comment relocation entry that can be used by a disassembler.
+ // Use --code-comments to enable.
+ void RecordComment(const char* msg);
+
+ // Record a deoptimization reason that can be used by a log or cpu profiler.
+ // Use --trace-deopt to enable.
+ void RecordDeoptReason(const int reason, const SourcePosition position);
+
+ // Writes a single byte or word of data in the code stream. Used
+ // for inline tables, e.g., jump-tables.
+ void db(uint8_t data);
+ void dd(uint32_t data);
+ void dq(uint64_t data);
+ void dp(uintptr_t data);
+
+ PositionsRecorder* positions_recorder() { return &positions_recorder_; }
+
+ void PatchConstantPoolAccessInstruction(int pc_offset, int offset,
+ ConstantPoolEntry::Access access,
+ ConstantPoolEntry::Type type) {
+ // No embedded constant pool support.
+ UNREACHABLE();
+ }
+
+ // Read/patch instructions
+ SixByteInstr instr_at(int pos) {
+ return Instruction::InstructionBits(buffer_ + pos);
+ }
+ template<typename T>
+ void instr_at_put(int pos, T instr) {
+ Instruction::SetInstructionBits<T>(buffer_ + pos, instr);
+ }
+
+ // Decodes instruction at pos, and returns its length
+ int32_t instr_length_at(int pos) {
+ return Instruction::InstructionLength(buffer_ + pos);
+ }
+
+ static SixByteInstr instr_at(byte* pc) {
+ return Instruction::InstructionBits(pc);
+ }
+
+ static Condition GetCondition(Instr instr);
+
+ static bool IsBranch(Instr instr);
+ static Register GetRA(Instr instr);
+ static Register GetRB(Instr instr);
+#if V8_TARGET_ARCH_S390X
+ static bool Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2);
+#else
+ static bool Is32BitLoadIntoIP(SixByteInstr instr);
+#endif
+
+
+ static bool IsCmpRegister(Instr instr);
+ static bool IsCmpImmediate(Instr instr);
+ static bool IsRlwinm(Instr instr);
+ static bool IsNop(SixByteInstr instr, int type = NON_MARKING_NOP);
+
+ // Postpone the generation of the trampoline pool for the specified number of
+ // instructions.
+ void CheckTrampolinePool();
+
+ // The code currently calls CheckBuffer() too often. This has the side
+ // effect of randomly growing the buffer in the middle of multi-instruction
+ // sequences.
+ //
+ // This function allows outside callers to check and grow the buffer
+ void EnsureSpaceFor(int space_needed);
+
+ void EmitRelocations();
+ void emit_label_addr(Label* label);
+
+ public:
+ byte* buffer_pos() const { return buffer_; }
+
+ protected:
+ // Relocation for a type-recording IC has the AST id added to it. This
+ // member variable is a way to pass the information from the call site to
+ // the relocation info.
+ TypeFeedbackId recorded_ast_id_;
+
+ int buffer_space() const { return reloc_info_writer.pos() - pc_; }
+
+ // Decode branch instruction at pos and return branch target pos
+ int target_at(int pos);
+
+ // Patch branch instruction at pos to branch to given branch target pos
+ void target_at_put(int pos, int target_pos);
+
+ // Record reloc info for current pc_
+ void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
+
+ // Block the emission of the trampoline pool before pc_offset.
+ void BlockTrampolinePoolBefore(int pc_offset) {
+ if (no_trampoline_pool_before_ < pc_offset)
+ no_trampoline_pool_before_ = pc_offset;
+ }
+
+ void StartBlockTrampolinePool() { trampoline_pool_blocked_nesting_++; }
+ void EndBlockTrampolinePool() { trampoline_pool_blocked_nesting_--; }
+ bool is_trampoline_pool_blocked() const {
+ return trampoline_pool_blocked_nesting_ > 0;
+ }
+
+ bool has_exception() const { return internal_trampoline_exception_; }
+
+ bool is_trampoline_emitted() const { return trampoline_emitted_; }
+
+ private:
+ // Code generation
+ // The relocation writer's position is at least kGap bytes below the end of
+ // the generated instructions. This is so that multi-instruction sequences do
+ // not have to check for overflow. The same is true for writes of large
+ // relocation info entries.
+ static const int kGap = 32;
+
+ // Repeated checking whether the trampoline pool should be emitted is rather
+ // expensive. By default we only check again once a number of instructions
+ // has been generated.
+ int next_buffer_check_; // pc offset of next buffer check.
+
+ // Emission of the trampoline pool may be blocked in some code sequences.
+ int trampoline_pool_blocked_nesting_; // Block emission if this is not zero.
+ int no_trampoline_pool_before_; // Block emission before this pc offset.
+
+ // Relocation info generation
+ // Each relocation is encoded as a variable size value
+ static const int kMaxRelocSize = RelocInfoWriter::kMaxSize;
+ RelocInfoWriter reloc_info_writer;
+ std::vector<DeferredRelocInfo> relocations_;
+
+ // The bound position, before this we cannot do instruction elimination.
+ int last_bound_pos_;
+
+ // Code emission
+ inline void CheckBuffer();
+ void GrowBuffer(int needed = 0);
+
+ inline int32_t emit_code_target(Handle<Code> target, RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id = TypeFeedbackId::None());
+ // S390 emitting helpers
+ inline void emit2bytes(uint16_t x);
+ inline void emit4bytes(uint32_t x);
+ inline void emit6bytes(uint64_t x);
+
+ inline void i_form(Opcode op, const Operand& i);
+ inline void e_form(Opcode op);
+ inline void ie_form(Opcode op, const Operand& i1, const Operand& i2);
+ inline void rr_form(Opcode op, Register r1, Register r2);
+ inline void rr_form(Opcode op, DoubleRegister r1, DoubleRegister r2);
+ inline void rr_form(Opcode op, Condition m1, Register r2);
+
+ inline void rr2_form(uint8_t op, Condition m1, Register r2);
+ inline void rx_form(Opcode op,
+ Register r1,
+ Register x2,
+ Register b2,
+ Disp d2);
+ inline void rx_form(Opcode op, DoubleRegister r1,
+ Register x2, Register b2, Disp d2);
+
+
+// RI1 format: <insn> R1,I2
+// +--------+----+----+------------------+
+// | OpCode | R1 |OpCd| I2 |
+// +--------+----+----+------------------+
+// 0 8 12 16 31
+ inline void ri_form(Opcode op, Register r1, const Operand& i2);
+// RI2 format: <insn> M1,I2
+// +--------+----+----+------------------+
+// | OpCode | M1 |OpCd| I2 |
+// +--------+----+----+------------------+
+// 0 8 12 16 31
+ inline void ri_form(Opcode op, Condition m1, const Operand& i2);
+ inline void rie_form(Opcode op, Register r1, Register r3,
+ const Operand& i2);
+ inline void rie_f_form(Opcode op, Register r1, Register r2, const Operand &i3,
+ const Operand& i4, const Operand& i5);
+ inline void ril_form(Opcode op, Register r1, const Operand& i2);
+ inline void ril_form(Opcode op, Condition m1, const Operand& i2);
+ inline void rre_form(Opcode op, Register r1, Register r2);
+ inline void rre_form(Opcode op, DoubleRegister r1,
+ DoubleRegister r2);
+ inline void rrd_form(Opcode op, Register r1, Register r3,
+ Register r2);
+// RS format: <insn> R1,M3,D2(B2)
+// +--------+----+----+----+-------------+
+// | OpCode | R1 | M3 | B2 | D2 |
+// +--------+----+----+----+-------------+
+// 0 8 12 16 20 31
+//
+ inline void rs_form(Opcode op,
+ Register r1,
+ Condition m3,
+ Register b2,
+ const Disp d2);
+// RS format: <insn> R1,R3,D2(B2)
+// +--------+----+----+----+-------------+
+// | OpCode | R1 | R3 | B2 | D2 |
+// +--------+----+----+----+-------------+
+// 0 8 12 16 20 31
+//
+ inline void rs_form(Opcode op,
+ Register r1,
+ Register r3,
+ Register b2,
+ const Disp d2);
+
+ inline void rsi_form(Opcode op, Register r1, Register r3, const Operand& i2);
+ inline void rsl_form(Opcode op, Length l1, Register b2, Disp d2);
+
+// RSY format: <insn> R1,R3,D2(B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+ inline void rsy_form(Opcode op,
+ Register r1,
+ Register r3,
+ Register b2,
+ const Disp d2);
+
+// RSY format: <insn> R1,M3,D2(B2)
+// +--------+----+----+----+-------------+--------+--------+
+// | OpCode | R1 | M3 | B2 | DL2 | DH2 | OpCode |
+// +--------+----+----+----+-------------+--------+--------+
+// 0 8 12 16 20 32 40 47
+ inline void rsy_form(Opcode op,
+ Register r1,
+ Condition m3,
+ Register b2,
+ const Disp d2);
+
+ inline void rxe_form(Opcode op, Register r1, Register x2, Register b2,
+ Disp d2);
+ inline void rxy_form(Opcode op, Register r1, Register x2, Register b2,
+ Disp d2);
+ inline void rxy_form(Opcode op, DoubleRegister r1, Register x2,
+ Register b2, Disp d2);
+ inline void rrs_form(Opcode op, Register r1, Register r2, Register b4,
+ Disp d4, Condition m3);
+ inline void ris_form(Opcode op, Register r1, Condition m3, Register b4, \
+ Disp d4, const Operand& i2);
+ inline void s_form(Opcode op, Register b1, Disp d2);
+ inline void si_form(Opcode op, const Operand& i2, Register b1,
+ Disp d1);
+ inline void siy_form(Opcode op, const Operand& i2, Register b1, \
+ Disp d1);
+ inline void sil_form(Opcode op, Register b1, Disp d1,
+ const Operand& i2);
+ inline void rxf_form(Opcode op, Register r1, Register r3, Register b2, \
+ Register x2, Disp d2);
+ inline void ss_form(Opcode op, Length l, Register b1, Disp d1, \
+ Register b2, Disp d2);
+ inline void ss_form(Opcode op, Length l1, Length l2, Register b1,
+ Disp d1, Register b2, Disp d2);
+ inline void ss_form(Opcode op, Length l1, const Operand& i3, Register b1,
+ Disp d1, Register b2, Disp d2);
+ inline void ss_form(Opcode op, Register r1, Register r2, Register b1,
+ Disp d1, Register b2, Disp d2);
+ inline void sse_form(Opcode op, Register b1, Disp d1, Register b2,
+ Disp d2);
+ inline void ssf_form(Opcode op, Register r3, Register b1, Disp d1,
+ Register b2, Disp d2);
+ inline void rrf1_form(Opcode op, Register r1, Register r2, Register r3);
+ inline void rrf1_form(uint32_t x);
+ inline void rrf2_form(uint32_t x);
+ inline void rrf3_form(uint32_t x);
+ inline void rrfe_form(Opcode op, Condition m3, Condition m4, Register r1,
+ Register r2);
+
+ inline void CheckTrampolinePoolQuick();
+
+ // Labels
+ void print(Label* L);
+ int max_reach_from(int pos);
+ void bind_to(Label* L, int pos);
+ void next(Label* L);
+
+ class Trampoline {
+ public:
+ Trampoline() {
+ next_slot_ = 0;
+ free_slot_count_ = 0;
+ }
+ Trampoline(int start, int slot_count) {
+ next_slot_ = start;
+ free_slot_count_ = slot_count;
+ }
+ int take_slot() {
+ int trampoline_slot = kInvalidSlotPos;
+ if (free_slot_count_ <= 0) {
+ // We have run out of space on trampolines.
+ // Make sure we fail in debug mode, so we become aware of each case
+ // when this happens.
+ DCHECK(0);
+ // Internal exception will be caught.
+ } else {
+ trampoline_slot = next_slot_;
+ free_slot_count_--;
+ next_slot_ += kTrampolineSlotsSize;
+ }
+ return trampoline_slot;
+ }
+
+ private:
+ int next_slot_;
+ int free_slot_count_;
+ };
+
+ int32_t get_trampoline_entry();
+ int unbound_labels_count_;
+ // If trampoline is emitted, generated code is becoming large. As
+ // this is already a slow case which can possibly break our code
+ // generation for the extreme case, we use this information to
+ // trigger different mode of branch instruction generation, where we
+ // no longer use a single branch instruction.
+ bool trampoline_emitted_;
+ static const int kTrampolineSlotsSize = kInstrSize;
+ static const int kMaxCondBranchReach = (1 << (16 - 1)) - 1;
+ static const int kMaxBlockTrampolineSectionSize = 64 * kInstrSize;
+ static const int kInvalidSlotPos = -1;
+
+ Trampoline trampoline_;
+ bool internal_trampoline_exception_;
+
+ friend class RegExpMacroAssemblerS390;
+ friend class RelocInfo;
+ friend class CodePatcher;
+ friend class BlockTrampolinePoolScope;
+
+ List< Handle<Code> > code_targets_;
+
+ PositionsRecorder positions_recorder_;
+ friend class PositionsRecorder;
+ friend class EnsureSpace;
+};
+
+
+class EnsureSpace BASE_EMBEDDED {
+ public:
+ explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
+};
+}
+} // namespace v8::internal
+
+#endif // V8_S390_ASSEMBLER_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/builtins-s390.cc
@@ -0,0 +1,1932 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/codegen.h"
+#include "src/debug.h"
+#include "src/deoptimizer.h"
+#include "src/full-codegen.h"
+#include "src/runtime/runtime.h"
+
+namespace v8 {
+namespace internal {
+
+
+#define __ ACCESS_MASM(masm)
+
+
+void Builtins::Generate_Adaptor(MacroAssembler* masm, CFunctionId id,
+ BuiltinExtraArguments extra_args) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments excluding receiver
+ // -- r3 : called function (only guaranteed when
+ // extra_args requires it)
+ // -- cp : context
+ // -- sp[0] : last argument
+ // -- ...
+ // -- sp[4 * (argc - 1)] : first argument (argc == r0)
+ // -- sp[4 * argc] : receiver
+ // -----------------------------------
+
+ // Insert extra arguments.
+ int num_extra_args = 0;
+ if (extra_args == NEEDS_CALLED_FUNCTION) {
+ num_extra_args = 1;
+ __ push(r3);
+ } else {
+ DCHECK(extra_args == NO_EXTRA_ARGUMENTS);
+ }
+
+ // JumpToExternalReference expects r0 to contain the number of arguments
+ // including the receiver and the extra arguments.
+ __ AddP(r2, Operand(num_extra_args + 1));
+ __ JumpToExternalReference(ExternalReference(id, masm->isolate()));
+}
+
+
+// Load the built-in InternalArray function from the current context.
+static void GenerateLoadInternalArrayFunction(MacroAssembler* masm,
+ Register result) {
+ // Load the native context.
+
+ __ LoadP(result,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ __ LoadP(result, FieldMemOperand(result, GlobalObject::kNativeContextOffset));
+ // Load the InternalArray function from the native context.
+ __ LoadP(result,
+ MemOperand(result, Context::SlotOffset(
+ Context::INTERNAL_ARRAY_FUNCTION_INDEX)));
+}
+
+
+// Load the built-in Array function from the current context.
+static void GenerateLoadArrayFunction(MacroAssembler* masm, Register result) {
+ // Load the native context.
+
+ __ LoadP(result,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ __ LoadP(result, FieldMemOperand(result, GlobalObject::kNativeContextOffset));
+ // Load the Array function from the native context.
+ __ LoadP(
+ result,
+ MemOperand(result, Context::SlotOffset(Context::ARRAY_FUNCTION_INDEX)));
+}
+
+
+void Builtins::Generate_InternalArrayCode(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments
+ // -- lr : return address
+ // -- sp[...]: constructor arguments
+ // -----------------------------------
+ Label generic_array_code, one_or_more_arguments, two_or_more_arguments;
+
+ // Get the InternalArray function.
+ GenerateLoadInternalArrayFunction(masm, r3);
+
+ if (FLAG_debug_code) {
+ // Initial map for the builtin InternalArray functions should be maps.
+ __ LoadP(r4,
+ FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ __ TestIfSmi(r4);
+ __ Assert(ne, kUnexpectedInitialMapForInternalArrayFunction, cr0);
+ __ CompareObjectType(r4, r5, r6, MAP_TYPE);
+ __ Assert(eq, kUnexpectedInitialMapForInternalArrayFunction);
+ }
+
+ // Run the native code for the InternalArray function called as a normal
+ // function.
+ // tail call a stub
+ InternalArrayConstructorStub stub(masm->isolate());
+ __ TailCallStub(&stub);
+}
+
+
+void Builtins::Generate_ArrayCode(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments
+ // -- lr : return address
+ // -- sp[...]: constructor arguments
+ // -----------------------------------
+ Label generic_array_code, one_or_more_arguments, two_or_more_arguments;
+
+ // Get the Array function.
+ GenerateLoadArrayFunction(masm, r3);
+
+ if (FLAG_debug_code) {
+ // Initial map for the builtin Array functions should be maps.
+ __ LoadP(r4,
+ FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ __ TestIfSmi(r4);
+ __ Assert(ne, kUnexpectedInitialMapForArrayFunction, cr0);
+ __ CompareObjectType(r4, r5, r6, MAP_TYPE);
+ __ Assert(eq, kUnexpectedInitialMapForArrayFunction);
+ }
+
+ __ LoadRR(r5, r3);
+ // Run the native code for the Array function called as a normal function.
+ // tail call a stub
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ ArrayConstructorStub stub(masm->isolate());
+ __ TailCallStub(&stub);
+}
+
+
+void Builtins::Generate_StringConstructCode(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments
+ // -- r3 : constructor function
+ // -- lr : return address
+ // -- sp[(argc - n - 1) * 4] : arg[n] (zero based)
+ // -- sp[argc * 4] : receiver
+ // -----------------------------------
+ Counters* counters = masm->isolate()->counters();
+ __ IncrementCounter(counters->string_ctor_calls(), 1, r4, r5);
+
+ Register function = r3;
+ if (FLAG_debug_code) {
+ __ LoadGlobalFunction(Context::STRING_FUNCTION_INDEX, r4);
+ __ CmpP(function, r4);
+ __ Assert(eq, kUnexpectedStringFunction);
+ }
+
+ // Load the first arguments in r2 and get rid of the rest.
+ Label no_arguments;
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&no_arguments);
+ // First args = sp[(argc - 1) * 4].
+ __ SubP(r2, Operand(1));
+ __ ShiftLeftP(r2, r2, Operand(kPointerSizeLog2));
+ __ la(sp, MemOperand(sp, r2));
+ __ LoadP(r2, MemOperand(sp));
+ // sp now point to args[0], drop args[0] + receiver.
+ __ Drop(2);
+
+ Register argument = r4;
+ Label not_cached, argument_is_string;
+ __ LookupNumberStringCache(r2, // Input.
+ argument, // Result.
+ r5, // Scratch.
+ r6, // Scratch.
+ r7, // Scratch.
+ ¬_cached);
+ __ IncrementCounter(counters->string_ctor_cached_number(), 1, r5, r6);
+ __ bind(&argument_is_string);
+
+ // ----------- S t a t e -------------
+ // -- r4 : argument converted to string
+ // -- r3 : constructor function
+ // -- lr : return address
+ // -----------------------------------
+
+ Label gc_required;
+ __ Allocate(JSValue::kSize,
+ r2, // Result.
+ r5, // Scratch.
+ r6, // Scratch.
+ &gc_required, TAG_OBJECT);
+
+ // Initialising the String Object.
+ Register map = r5;
+ __ LoadGlobalFunctionInitialMap(function, map, r6);
+ if (FLAG_debug_code) {
+ __ LoadlB(r6, FieldMemOperand(map, Map::kInstanceSizeOffset));
+ __ CmpP(r6, Operand(JSValue::kSize >> kPointerSizeLog2));
+ __ Assert(eq, kUnexpectedStringWrapperInstanceSize);
+ __ LoadlB(r6, FieldMemOperand(map, Map::kUnusedPropertyFieldsOffset));
+ __ CmpP(r6, Operand::Zero());
+ __ Assert(eq, kUnexpectedUnusedPropertiesOfStringWrapper);
+ }
+ __ StoreP(map, FieldMemOperand(r2, HeapObject::kMapOffset));
+
+ __ LoadRoot(r5, Heap::kEmptyFixedArrayRootIndex);
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kPropertiesOffset));
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kElementsOffset));
+
+ __ StoreP(argument, FieldMemOperand(r2, JSValue::kValueOffset));
+
+ // Ensure the object is fully initialized.
+ STATIC_ASSERT(JSValue::kSize == 4 * kPointerSize);
+
+ __ Ret();
+
+ // The argument was not found in the number to string cache. Check
+ // if it's a string already before calling the conversion builtin.
+ Label convert_argument;
+ __ bind(¬_cached);
+ __ JumpIfSmi(r2, &convert_argument);
+
+ // Is it a String?
+ __ LoadP(r4, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ LoadlB(r5, FieldMemOperand(r4, Map::kInstanceTypeOffset));
+ STATIC_ASSERT(kNotStringTag != 0);
+ __ mov(r0, Operand(kIsNotStringMask));
+ __ AndP(r0, r5);
+ __ bne(&convert_argument, Label::kNear);
+ __ LoadRR(argument, r2);
+ __ IncrementCounter(counters->string_ctor_conversions(), 1, r5, r6);
+ __ b(&argument_is_string);
+
+ // Invoke the conversion builtin and put the result into r4.
+ __ bind(&convert_argument);
+ __ push(function); // Preserve the function.
+ __ IncrementCounter(counters->string_ctor_conversions(), 1, r5, r6);
+ {
+ FrameAndConstantPoolScope scope(masm, StackFrame::INTERNAL);
+ __ push(r2);
+ __ InvokeBuiltin(Builtins::TO_STRING, CALL_FUNCTION);
+ }
+ __ pop(function);
+ __ LoadRR(argument, r2);
+ __ b(&argument_is_string);
+
+ // Load the empty string into r4, remove the receiver from the
+ // stack, and jump back to the case where the argument is a string.
+ __ bind(&no_arguments);
+ __ LoadRoot(argument, Heap::kempty_stringRootIndex);
+ __ Drop(1);
+ __ b(&argument_is_string);
+
+ // At this point the argument is already a string. Call runtime to
+ // create a string wrapper.
+ __ bind(&gc_required);
+ __ IncrementCounter(counters->string_ctor_gc_required(), 1, r5, r6);
+ {
+ FrameAndConstantPoolScope scope(masm, StackFrame::INTERNAL);
+ __ push(argument);
+ __ CallRuntime(Runtime::kNewStringWrapper, 1);
+ }
+ __ Ret();
+}
+
+
+static void CallRuntimePassFunction(MacroAssembler* masm,
+ Runtime::FunctionId function_id) {
+ FrameAndConstantPoolScope scope(masm, StackFrame::INTERNAL);
+ // Push a copy of the function onto the stack.
+ // Push function as parameter to the runtime call.
+ __ Push(r3, r3);
+
+ __ CallRuntime(function_id, 1);
+ // Restore reciever.
+ __ Pop(r3);
+}
+
+
+static void GenerateTailCallToSharedCode(MacroAssembler* masm) {
+ __ LoadP(ip, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(ip, FieldMemOperand(ip, SharedFunctionInfo::kCodeOffset));
+ __ AddP(ip, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ JumpToJSEntry(ip);
+}
+
+
+static void GenerateTailCallToReturnedCode(MacroAssembler* masm) {
+ __ AddP(ip, r2, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ JumpToJSEntry(ip);
+}
+
+
+void Builtins::Generate_InOptimizationQueue(MacroAssembler* masm) {
+ // Checking whether the queued function is ready for install is optional,
+ // since we come across interrupts and stack checks elsewhere. However,
+ // not checking may delay installing ready functions, and always checking
+ // would be quite expensive. A good compromise is to first check against
+ // stack limit as a cue for an interrupt signal.
+ Label ok;
+ __ CmpLogicalP(sp, RootMemOperand(Heap::kStackLimitRootIndex));
+ __ bge(&ok, Label::kNear);
+
+ CallRuntimePassFunction(masm, Runtime::kTryInstallOptimizedCode);
+ GenerateTailCallToReturnedCode(masm);
+
+ __ bind(&ok);
+ GenerateTailCallToSharedCode(masm);
+}
+
+
+static void Generate_Runtime_NewObject(MacroAssembler* masm,
+ bool create_memento,
+ Register original_constructor,
+ Label* count_incremented,
+ Label* allocated) {
+ // ----------- S t a t e -------------
+ // -- r3: argument for Runtime_NewObject
+ // -----------------------------------
+ Register result = r6;
+
+ if (create_memento) {
+ // Get the cell or allocation site.
+ __ LoadP(r4, MemOperand(sp, 2 * kPointerSize));
+ __ Push(r4, r3, original_constructor);
+ __ CallRuntime(Runtime::kNewObjectWithAllocationSite, 3);
+ __ LoadRR(result, r2);
+ // Runtime_NewObjectWithAllocationSite increments allocation count.
+ // Skip the increment.
+ __ b(count_incremented);
+ } else {
+ __ Push(r3, original_constructor);
+ __ CallRuntime(Runtime::kNewObject, 2);
+ __ LoadRR(result, r2);
+ __ b(allocated);
+ }
+}
+
+
+static void Generate_JSConstructStubHelper(MacroAssembler* masm,
+ bool is_api_function,
+ bool use_new_target,
+ bool create_memento) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments
+ // -- r3 : constructor function
+ // -- r4 : allocation site or undefined
+ // -- r5 : original constructor
+ // -- lr : return address
+ // -- sp[...]: constructor arguments
+ // -----------------------------------
+
+ // Should never create mementos for api functions.
+ DCHECK(!is_api_function || !create_memento);
+
+ Isolate* isolate = masm->isolate();
+
+ // Enter a construct frame.
+ {
+ FrameAndConstantPoolScope scope(masm, StackFrame::CONSTRUCT);
+
+ if (create_memento) {
+ __ AssertUndefinedOrAllocationSite(r4, r6);
+ __ push(r4);
+ }
+
+ // Preserve the incoming parameters on the stack.
+ __ SmiTag(r2);
+ if (use_new_target) {
+ __ Push(r2, r3, r5);
+ } else {
+ __ Push(r2, r3);
+ }
+
+ Label rt_call, allocated, normal_new, count_incremented;
+ __ CmpP(r3, r5);
+ __ beq(&normal_new);
+
+ // Original constructor and function are different.
+ Generate_Runtime_NewObject(masm, create_memento, r5, &count_incremented,
+ &allocated);
+ __ bind(&normal_new);
+
+ // Try to allocate the object without transitioning into C code. If any of
+ // the preconditions is not met, the code bails out to the runtime call.
+ if (FLAG_inline_new) {
+ Label undo_allocation;
+ ExternalReference debug_step_in_fp =
+ ExternalReference::debug_step_in_fp_address(isolate);
+ __ mov(r4, Operand(debug_step_in_fp));
+ __ LoadP(r4, MemOperand(r4));
+ __ CmpP(r4, Operand::Zero());
+ __ bne(&rt_call);
+
+ // Load the initial map and verify that it is in fact a map.
+ // r3: constructor function
+ __ LoadP(r4,
+ FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ __ JumpIfSmi(r4, &rt_call);
+ __ CompareObjectType(r4, r5, r6, MAP_TYPE);
+ __ bne(&rt_call);
+
+ // Check that the constructor is not constructing a JSFunction (see
+ // comments in Runtime_NewObject in runtime.cc). In which case the
+ // initial map's instance type would be JS_FUNCTION_TYPE.
+ // r3: constructor function
+ // r4: initial map
+ __ CompareInstanceType(r4, r5, JS_FUNCTION_TYPE);
+ __ beq(&rt_call);
+
+ if (!is_api_function) {
+ Label allocate;
+ MemOperand bit_field3 = FieldMemOperand(r4, Map::kBitField3Offset);
+ // Check if slack tracking is enabled.
+ __ LoadlW(r6, bit_field3);
+ __ DecodeField<Map::Counter>(r5, r6);
+ __ CmpP(r5, Operand(Map::kSlackTrackingCounterEnd));
+ __ blt(&allocate);
+ // Decrease generous allocation count.
+ __ AddP(r6, Operand(-(1 << Map::Counter::kShift)));
+ __ StoreW(r6, bit_field3);
+ __ CmpP(r5, Operand(Map::kSlackTrackingCounterEnd));
+ __ bne(&allocate);
+
+ __ push(r3);
+
+ __ Push(r4, r3); // r3 = constructor
+ __ CallRuntime(Runtime::kFinalizeInstanceSize, 1);
+
+ __ Pop(r3, r4);
+
+ __ bind(&allocate);
+ }
+
+ // Now allocate the JSObject on the heap.
+ // r3: constructor function
+ // r4: initial map
+ __ LoadlB(r5, FieldMemOperand(r4, Map::kInstanceSizeOffset));
+ if (create_memento) {
+ __ AddP(r5, Operand(AllocationMemento::kSize / kPointerSize));
+ }
+
+ __ Allocate(r5, r6, r7, r8, &rt_call, SIZE_IN_WORDS);
+
+ // Allocated the JSObject, now initialize the fields. Map is set to
+ // initial map and properties and elements are set to empty fixed array.
+ // r3: constructor function
+ // r4: initial map
+ // r5: object size (including memento if create_memento)
+ // r6: JSObject (not tagged)
+ __ LoadRoot(r8, Heap::kEmptyFixedArrayRootIndex);
+ __ StoreP(r4, MemOperand(r6, JSObject::kMapOffset));
+ __ StoreP(r8, MemOperand(r6, JSObject::kPropertiesOffset));
+ __ StoreP(r8, MemOperand(r6, JSObject::kElementsOffset));
+ __ la(r7, MemOperand(r6, 3 * kPointerSize));
+
+ __ ShiftLeftP(r8, r5, Operand(kPointerSizeLog2));
+ __ AddP(r8, r6); // End of object.
+
+ // Fill all the in-object properties with the appropriate filler.
+ // r3: constructor function
+ // r4: initial map
+ // r5: object size (in words, including memento if create_memento)
+ // r6: JSObject (not tagged)
+ // r7: First in-object property of JSObject (not tagged)
+ // r8: End of object
+ DCHECK_EQ(3 * kPointerSize, JSObject::kHeaderSize);
+ __ LoadRoot(r9, Heap::kUndefinedValueRootIndex);
+
+ if (!is_api_function) {
+ Label no_inobject_slack_tracking;
+
+ // Check if slack tracking is enabled.
+ __ LoadlW(ip, FieldMemOperand(r4, Map::kBitField3Offset));
+ __ DecodeField<Map::Counter>(ip);
+ __ CmpP(ip, Operand(Map::kSlackTrackingCounterEnd));
+ __ blt(&no_inobject_slack_tracking);
+
+ // Allocate object with a slack.
+ __ LoadlB(r2, FieldMemOperand(r4,
+ Map::kPreAllocatedPropertyFieldsOffset));
+ if (FLAG_debug_code) {
+ __ ShiftLeftP(r0, r2, Operand(kPointerSizeLog2));
+ __ AddP(r0, r7);
+ // r0: offset of first field after pre-allocated fields
+ __ CmpP(r0, r8);
+ __ Assert(le, kUnexpectedNumberOfPreAllocatedPropertyFields);
+ }
+ {
+ Label done;
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&done);
+ __ InitializeNFieldsWithFiller(r7, r2, r9);
+ __ bind(&done);
+ }
+ // To allow for truncation.
+ __ LoadRoot(r9, Heap::kOnePointerFillerMapRootIndex);
+ // Fill the remaining fields with one pointer filler map.
+ __ bind(&no_inobject_slack_tracking);
+ }
+
+ if (create_memento) {
+ __ SubP(r2, r8, Operand(AllocationMemento::kSize));
+ __ InitializeFieldsWithFiller(r7, r2, r9);
+
+ // Fill in memento fields.
+ // r7: points to the allocated but uninitialized memento.
+ __ LoadRoot(r9, Heap::kAllocationMementoMapRootIndex);
+ __ StoreP(r9, MemOperand(r7, AllocationMemento::kMapOffset));
+ // Load the AllocationSite
+ __ LoadP(r9, MemOperand(sp, 2 * kPointerSize));
+ __ StoreP(r9,
+ MemOperand(r7, AllocationMemento::kAllocationSiteOffset));
+ __ AddP(r7, Operand(AllocationMemento::kAllocationSiteOffset +
+ kPointerSize));
+ } else {
+ __ InitializeFieldsWithFiller(r7, r8, r9);
+ }
+
+ // Add the object tag to make the JSObject real, so that we can continue
+ // and jump into the continuation code at any time from now on. Any
+ // failures need to undo the allocation, so that the heap is in a
+ // consistent state and verifiable.
+ __ AddP(r6, Operand(kHeapObjectTag));
+
+ // Check if a non-empty properties array is needed. Continue with
+ // allocated object if not; allocate and initialize a FixedArray if yes.
+ // r3: constructor function
+ // r6: JSObject
+ // r7: start of next object (not tagged)
+ __ LoadlB(r5, FieldMemOperand(r4, Map::kUnusedPropertyFieldsOffset));
+ // The field instance sizes contains both pre-allocated property fields
+ // and in-object properties.
+ __ LoadlB(r0, FieldMemOperand(r4,
+ Map::kPreAllocatedPropertyFieldsOffset));
+ __ AddP(r5, r0);
+ __ LoadlB(r0, FieldMemOperand(r4, Map::kInObjectPropertiesOffset));
+ // @TODO: Okay to remove LeaveOE, SetRC?
+ __ SubP(r5, r5, r0 /*, LeaveOE, SetRC */);
+
+ // Done if no extra properties are to be allocated.
+ __ beq(&allocated /*, cr0*/);
+ __ Assert(ge, kPropertyAllocationCountFailed, cr0);
+
+ // Scale the number of elements by pointer size and add the header for
+ // FixedArrays to the start of the next object calculation from above.
+ // r3: constructor
+ // r5: number of elements in properties array
+ // r6: JSObject
+ // r7: start of next object
+ __ AddP(r2, r5, Operand(FixedArray::kHeaderSize / kPointerSize));
+ __ Allocate(
+ r2, r7, r8, r4, &undo_allocation,
+ static_cast<AllocationFlags>(RESULT_CONTAINS_TOP | SIZE_IN_WORDS));
+
+ // Initialize the FixedArray.
+ // r3: constructor
+ // r5: number of elements in properties array
+ // r6: JSObject
+ // r7: FixedArray (not tagged)
+ __ LoadRoot(r8, Heap::kFixedArrayMapRootIndex);
+ __ LoadRR(r4, r7);
+ DCHECK_EQ(0 * kPointerSize, JSObject::kMapOffset);
+ __ StoreP(r8, MemOperand(r4));
+ DCHECK_EQ(1 * kPointerSize, FixedArray::kLengthOffset);
+ __ SmiTag(r2, r5);
+ __ StoreP(r2, MemOperand(r4, kPointerSize));
+ __ AddP(r4, Operand(2 * kPointerSize));
+
+ // Initialize the fields to undefined.
+ // r3: constructor function
+ // r4: First element of FixedArray (not tagged)
+ // r5: number of elements in properties array
+ // r6: JSObject
+ // r7: FixedArray (not tagged)
+ DCHECK_EQ(2 * kPointerSize, FixedArray::kHeaderSize);
+ {
+ Label done;
+ __ CmpP(r5, Operand::Zero());
+ __ beq(&done);
+ if (!is_api_function || create_memento) {
+ __ LoadRoot(r9, Heap::kUndefinedValueRootIndex);
+ } else if (FLAG_debug_code) {
+ __ CompareRoot(r9, Heap::kUndefinedValueRootIndex);
+ __ Assert(eq, kUndefinedValueNotLoaded);
+ }
+ __ InitializeNFieldsWithFiller(r4, r5, r9);
+ __ bind(&done);
+ }
+
+ // Store the initialized FixedArray into the properties field of
+ // the JSObject
+ // r3: constructor function
+ // r6: JSObject
+ // r7: FixedArray (not tagged)
+ __ AddP(r7, Operand(kHeapObjectTag)); // Add the heap tag.
+ __ StoreP(r7, FieldMemOperand(r6, JSObject::kPropertiesOffset));
+
+ // Continue with JSObject being successfully allocated
+ // r3: constructor function
+ // r6: JSObject
+ __ b(&allocated);
+
+ // Undo the setting of the new top so that the heap is verifiable. For
+ // example, the map's unused properties potentially do not match the
+ // allocated objects unused properties.
+ // r6: JSObject (previous new top)
+ __ bind(&undo_allocation);
+ __ UndoAllocationInNewSpace(r6, r7);
+ }
+
+ // Allocate the new receiver object using the runtime call.
+ // r3: constructor function
+ __ bind(&rt_call);
+ Generate_Runtime_NewObject(masm, create_memento, r3, &count_incremented,
+ &allocated);
+
+ // Receiver for constructor call allocated.
+ // r6: JSObject
+ __ bind(&allocated);
+
+ if (create_memento) {
+ int offset = (use_new_target ? 3 : 2) * kPointerSize;
+ __ LoadP(r4, MemOperand(sp, offset));
+ __ LoadRoot(r7, Heap::kUndefinedValueRootIndex);
+ __ CmpP(r4, r7);
+ __ beq(&count_incremented);
+ // r4 is an AllocationSite. We are creating a memento from it, so we
+ // need to increment the memento create count.
+ __ LoadP(r5,
+ FieldMemOperand(r4, AllocationSite::kPretenureCreateCountOffset));
+ __ AddSmiLiteral(r5, r5, Smi::FromInt(1), r0);
+ __ StoreP(r5,
+ FieldMemOperand(r4, AllocationSite::kPretenureCreateCountOffset),
+ r0);
+ __ bind(&count_incremented);
+ }
+
+ // Restore the parameters.
+ if (use_new_target) {
+ __ Pop(r3, ip);
+ } else {
+ __ pop(r3);
+ }
+
+ // Retrieve smi-tagged arguments count from the stack.
+ __ LoadP(r5, MemOperand(sp));
+
+ // Push new.target onto the construct frame. This is stored just below the
+ // receiver on the stack.
+ if (use_new_target) {
+ __ Push(ip, r6, r6);
+ } else {
+ __ Push(r6, r6);
+ }
+
+ // Set up pointer to last argument.
+ __ la(r4, MemOperand(fp, StandardFrameConstants::kCallerSPOffset));
+
+ // Copy arguments and receiver to the expression stack.
+ // r3: constructor function
+ // r4: address of last argument (caller sp)
+ // r5: number of arguments (smi-tagged)
+ // sp[0]: receiver
+ // sp[1]: receiver
+ // sp[2]: new.target (if used)
+ // sp[2/3]: number of arguments (smi-tagged)
+ Label loop, no_args;
+ __ SmiUntag(r2, r5);
+ __ beq(&no_args);
+ __ ShiftLeftP(ip, r2, Operand(kPointerSizeLog2));
+ __ SubP(sp, sp, ip);
+ __ bind(&loop);
+ __ lay(ip, MemOperand(ip, -kPointerSize));
+ __ LoadP(r0, MemOperand(ip, r4));
+ __ StoreP(r0, MemOperand(ip, sp));
+ __ BranchOnCount(r2, &loop);
+ __ SmiUntag(r2, r5);
+ __ bind(&no_args);
+
+ // Call the function.
+ // r2: number of arguments
+ // r3: constructor function
+ if (is_api_function) {
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+ Handle<Code> code = masm->isolate()->builtins()->HandleApiCallConstruct();
+ __ Call(code, RelocInfo::CODE_TARGET);
+ } else {
+ ParameterCount actual(r2);
+ __ InvokeFunction(r3, actual, CALL_FUNCTION, NullCallWrapper());
+ }
+
+ // Store offset of return address for deoptimizer.
+ // TODO(arv): Remove the "!use_new_target" before supporting optimization
+ // of functions that reference new.target
+ if (!is_api_function && !use_new_target) {
+ masm->isolate()->heap()->SetConstructStubDeoptPCOffset(masm->pc_offset());
+ }
+
+ // Restore context from the frame.
+ // r2: result
+ // sp[0]: receiver
+ // sp[1]: new.target (if used)
+ // sp[1/2]: number of arguments (smi-tagged)
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+
+ // If the result is an object (in the ECMA sense), we should get rid
+ // of the receiver and use the result; see ECMA-262 section 13.2.2-7
+ // on page 74.
+ Label use_receiver, exit;
+
+ // If the result is a smi, it is *not* an object in the ECMA sense.
+ // r2: result
+ // sp[0]: receiver (newly allocated object)
+ // sp[1]: new.target (if used)
+ // sp[1/2]: number of arguments (smi-tagged)
+ __ JumpIfSmi(r2, &use_receiver);
+
+ // If the type of the result (stored in its map) is less than
+ // FIRST_SPEC_OBJECT_TYPE, it is not an object in the ECMA sense.
+ __ CompareObjectType(r2, r3, r5, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(&exit, Label::kNear);
+
+ // Throw away the result of the constructor invocation and use the
+ // on-stack receiver as the result.
+ __ bind(&use_receiver);
+ __ LoadP(r2, MemOperand(sp));
+
+ // Remove receiver from the stack, remove caller arguments, and
+ // return.
+ __ bind(&exit);
+ // r2: result
+ // sp[0]: receiver (newly allocated object)
+ // sp[1]: new.target (if used)
+ // sp[1/2]: number of arguments (smi-tagged)
+ int offset = (use_new_target ? 2 : 1) * kPointerSize;
+ __ LoadP(r3, MemOperand(sp, offset));
+
+ // Leave construct frame.
+ }
+
+ __ SmiToPtrArrayOffset(r3, r3);
+ __ la(sp, MemOperand(sp, r3, kPointerSize));
+ __ IncrementCounter(isolate->counters()->constructed_objects(),
+ 1, r3, r4);
+ __ Ret();
+}
+
+
+void Builtins::Generate_JSConstructStubGeneric(MacroAssembler* masm) {
+ Generate_JSConstructStubHelper(masm, false, false, FLAG_pretenuring_call_new);
+}
+
+
+void Builtins::Generate_JSConstructStubApi(MacroAssembler* masm) {
+ Generate_JSConstructStubHelper(masm, true, false, false);
+}
+
+
+void Builtins::Generate_JSConstructStubNewTarget(MacroAssembler* masm) {
+ Generate_JSConstructStubHelper(masm, false, true, FLAG_pretenuring_call_new);
+}
+
+
+void Builtins::Generate_JSConstructStubForDerived(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments
+ // -- r3 : constructor function
+ // -- r4 : allocation site or undefined
+ // -- r5 : original constructor
+ // -- r14 : return address
+ // -- sp[...]: constructor arguments
+ // -----------------------------------
+
+ // TODO(dslomov): support pretenuring
+ CHECK(!FLAG_pretenuring_call_new);
+
+ {
+ FrameAndConstantPoolScope scope(masm, StackFrame::CONSTRUCT);
+
+ // Smi-tagged arguments count.
+ __ LoadRR(r6, r2);
+ __ SmiTag(r6/*, SetRC*/);
+
+ // receiver is the hole.
+ __ LoadRoot(ip, Heap::kTheHoleValueRootIndex);
+
+ // smi arguments count, new.target, receiver
+ __ Push(r6, r5, ip);
+
+ // Set up pointer to last argument.
+ __ AddP(r4, fp, Operand(StandardFrameConstants::kCallerSPOffset));
+
+ // Copy arguments and receiver to the expression stack.
+ // r2: number of arguments
+ // r3: constructor function
+ // r4: address of last argument (caller sp)
+ // r6: number of arguments (smi-tagged)
+ // sp[0]: receiver
+ // sp[1]: new.target
+ // sp[2]: number of arguments (smi-tagged)
+ Label loop, no_args;
+ __ LoadAndTestRR(r1, r2);
+ __ beq(&no_args/*, cr0*/);
+ __ ShiftLeftP(ip, r1, Operand(kPointerSizeLog2));
+ __ bind(&loop);
+ __ SubP(ip, ip, Operand(kPointerSize));
+ __ LoadP(r0, MemOperand(r4, ip));
+ __ push(r0);
+ __ BranchOnCount(r1, &loop);
+ __ bind(&no_args);
+
+ // Handle step in.
+ Label skip_step_in;
+ ExternalReference debug_step_in_fp =
+ ExternalReference::debug_step_in_fp_address(masm->isolate());
+ __ mov(r4, Operand(debug_step_in_fp));
+ __ LoadP(r4, MemOperand(r4));
+ __ AndP(r0, r4, r4);
+ __ beq(&skip_step_in/*, cr0*/);
+
+ __ Push(r2, r3, r3);
+ __ CallRuntime(Runtime::kHandleStepInForDerivedConstructors, 1);
+ __ Pop(r2, r3);
+
+ __ bind(&skip_step_in);
+
+ // Call the function.
+ // r2: number of arguments
+ // r3: constructor function
+ ParameterCount actual(r2);
+ __ InvokeFunction(r3, actual, CALL_FUNCTION, NullCallWrapper());
+
+ // Restore context from the frame.
+ // r2: result
+ // sp[0]: number of arguments (smi-tagged)
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ // Get arguments count, skipping over new.target.
+ __ LoadP(r3, MemOperand(sp, kPointerSize));
+
+ // Leave construct frame.
+ }
+
+ __ SmiToPtrArrayOffset(r3, r3);
+ __ lay(sp, MemOperand(sp, r3));
+ __ lay(sp, MemOperand(sp, kPointerSize));
+ __ Ret();
+}
+
+
+enum IsTagged { kArgcIsSmiTagged, kArgcIsUntaggedInt };
+
+
+// Clobbers r4; preserves all other registers.
+static void Generate_CheckStackOverflow(MacroAssembler* masm,
+ const int calleeOffset, Register argc,
+ IsTagged argc_is_tagged) {
+ // Check the stack for overflow. We are not trying to catch
+ // interruptions (e.g. debug break and preemption) here, so the "real stack
+ // limit" is checked.
+ Label okay;
+ __ LoadRoot(r4, Heap::kRealStackLimitRootIndex);
+ // Make r4 the space we have left. The stack might already be overflowed
+ // here which will cause r4 to become negative.
+ __ SubP(r4, sp, r4);
+ // Check if the arguments will overflow the stack.
+ if (argc_is_tagged == kArgcIsSmiTagged) {
+ __ SmiToPtrArrayOffset(r0, argc);
+ } else {
+ DCHECK(argc_is_tagged == kArgcIsUntaggedInt);
+ __ ShiftLeftP(r0, argc, Operand(kPointerSizeLog2));
+ }
+ __ CmpP(r4, r0);
+ __ bgt(&okay); // Signed comparison.
+
+ // Out of stack space.
+ __ LoadP(r3, MemOperand(fp, calleeOffset));
+ if (argc_is_tagged == kArgcIsUntaggedInt) {
+ __ SmiTag(argc);
+ }
+ __ Push(r3, argc);
+ __ InvokeBuiltin(Builtins::STACK_OVERFLOW, CALL_FUNCTION);
+
+ __ bind(&okay);
+}
+
+
+static void Generate_JSEntryTrampolineHelper(MacroAssembler* masm,
+ bool is_construct) {
+ // Called from Generate_JS_Entry
+ // r2: code entry
+ // r3: function
+ // r4: receiver
+ // r5: argc
+ // r6: argv
+ // r0,r7-r9, cp may be clobbered
+ ProfileEntryHookStub::MaybeCallEntryHook(masm);
+
+ // Clear the context before we push it when entering the internal frame.
+ __ LoadImmP(cp, Operand::Zero());
+
+ // Enter an internal frame.
+ {
+ // FrameScope ends up calling MacroAssembler::EnterFrame here
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Set up the context from the function argument.
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+
+ __ InitializeRootRegister();
+
+ // Push the function and the receiver onto the stack.
+ __ lay(sp, MemOperand(sp, -2 * kPointerSize));
+ __ StoreP(r3, MemOperand(sp, 1 * kPointerSize));
+ __ StoreP(r4, MemOperand(sp, 0 * kPointerSize));
+
+ // Check if we have enough stack space to push all arguments.
+ // The function is the first thing that was pushed above after entering
+ // the internal frame.
+ const int kFunctionOffset =
+ InternalFrameConstants::kCodeOffset - kPointerSize;
+ // Clobbers r4.
+ Generate_CheckStackOverflow(masm, kFunctionOffset, r5, kArgcIsUntaggedInt);
+
+ // Copy arguments to the stack in a loop from argv to sp.
+ // The arguments are actually placed in reverse order on sp
+ // compared to argv (i.e. arg1 is highest memory in sp).
+ // r3: function
+ // r5: argc
+ // r6: argv, i.e. points to first arg
+ // r7: scratch reg to hold scaled argc
+ // r8: scratch reg to hold arg handle
+ // r9: scratch reg to hold index into argv
+ Label argLoop, argExit;
+ intptr_t zero = 0;
+ __ ShiftLeftP(r7, r5, Operand(kPointerSizeLog2));
+ __ SubRR(sp, r7); // Buy the stack frame to fit args
+ __ LoadImmP(r9, Operand(zero)); // Initialize argv index
+ __ bind(&argLoop);
+ __ CmpPH(r7, Operand(zero));
+ __ beq(&argExit, Label::kNear);
+ __ lay(r7, MemOperand(r7, -kPointerSize));
+ __ LoadP(r8, MemOperand(r9, r6)); // read next parameter
+ __ la(r9, MemOperand(r9, kPointerSize)); // r9++;
+ __ LoadP(r0, MemOperand(r8)); // dereference handle
+ __ StoreP(r0, MemOperand(r7, sp)); // push parameter
+ __ b(&argLoop);
+ __ bind(&argExit);
+
+ // Initialize all JavaScript callee-saved registers, since they will be seen
+ // by the garbage collector as part of handlers.
+ __ LoadRoot(r6, Heap::kUndefinedValueRootIndex);
+ __ LoadRR(r7, r6);
+ __ LoadRR(r8, r6);
+ __ LoadRR(r9, r6);
+
+ // Invoke the code and pass argc as r2.
+ __ LoadRR(r2, r5);
+ if (is_construct) {
+ // No type feedback cell is available
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ CallConstructStub stub(masm->isolate(), NO_CALL_CONSTRUCTOR_FLAGS);
+ __ CallStub(&stub);
+ } else {
+ ParameterCount actual(r2);
+ __ InvokeFunction(r3, actual, CALL_FUNCTION, NullCallWrapper());
+ }
+ // Exit the JS frame and remove the parameters (except function), and
+ // return.
+ }
+ __ b(r14);
+
+ // r2: result
+}
+
+
+void Builtins::Generate_JSEntryTrampoline(MacroAssembler* masm) {
+ Generate_JSEntryTrampolineHelper(masm, false);
+}
+
+
+void Builtins::Generate_JSConstructEntryTrampoline(MacroAssembler* masm) {
+ Generate_JSEntryTrampolineHelper(masm, true);
+}
+
+
+void Builtins::Generate_CompileLazy(MacroAssembler* masm) {
+ CallRuntimePassFunction(masm, Runtime::kCompileLazy);
+ GenerateTailCallToReturnedCode(masm);
+}
+
+
+static void CallCompileOptimized(MacroAssembler* masm, bool concurrent) {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ // Push a copy of the function onto the stack.
+ __ lay(sp, MemOperand(sp, -2 * kPointerSize));
+ __ StoreP(r3, MemOperand(sp, 1 * kPointerSize));
+ // Push function as parameter to the runtime call.
+ __ StoreP(r3, MemOperand(sp, 0 * kPointerSize));
+ // Whether to compile in a background thread.
+ __ LoadRoot(
+ r0, concurrent ? Heap::kTrueValueRootIndex : Heap::kFalseValueRootIndex);
+ __ push(r0);
+ __ CallRuntime(Runtime::kCompileOptimized, 2);
+
+ // Restore receiver.
+ __ LoadP(r3, MemOperand(sp, 0));
+ __ la(sp, MemOperand(sp, kPointerSize));
+}
+
+
+void Builtins::Generate_CompileOptimized(MacroAssembler* masm) {
+ CallCompileOptimized(masm, false);
+ GenerateTailCallToReturnedCode(masm);
+}
+
+
+void Builtins::Generate_CompileOptimizedConcurrent(MacroAssembler* masm) {
+ CallCompileOptimized(masm, true);
+ GenerateTailCallToReturnedCode(masm);
+}
+
+
+static void GenerateMakeCodeYoungAgainCommon(MacroAssembler* masm) {
+ // For now, we are relying on the fact that make_code_young doesn't do any
+ // garbage collection which allows us to save/restore the registers without
+ // worrying about which of them contain pointers. We also don't build an
+ // internal frame to make the code faster, since we shouldn't have to do stack
+ // crawls in MakeCodeYoung. This seems a bit fragile.
+
+ // Point r2 at the start of the PlatformCodeAge sequence.
+ __ CleanseP(r14);
+ __ SubP(r14, Operand(kCodeAgingSequenceLength));
+ __ LoadRR(r2, r14);
+
+ // The following registers must be saved and restored when calling through to
+ // the runtime:
+ // r2 - contains return address (beginning of patch sequence)
+ // r3 - isolate
+ // ir - return address
+ FrameScope scope(masm, StackFrame::MANUAL);
+ __ Pop(r14);
+ __ LoadRR(r0, r14);
+ __ MultiPush(r0.bit() | r2.bit() | r3.bit() | fp.bit());
+ __ PrepareCallCFunction(2, 0, r4);
+ __ mov(r3, Operand(ExternalReference::isolate_address(masm->isolate())));
+ __ CallCFunction(
+ ExternalReference::get_make_code_young_function(masm->isolate()), 2);
+ __ MultiPop(r0.bit() | r2.bit() | r3.bit() | fp.bit());
+ __ LoadRR(r14, r0);
+ __ LoadRR(ip, r2);
+ __ Jump(ip);
+}
+
+#define DEFINE_CODE_AGE_BUILTIN_GENERATOR(C) \
+ void Builtins::Generate_Make##C##CodeYoungAgainEvenMarking( \
+ MacroAssembler* masm) { \
+ GenerateMakeCodeYoungAgainCommon(masm); \
+ } \
+ void Builtins::Generate_Make##C##CodeYoungAgainOddMarking( \
+ MacroAssembler* masm) { \
+ GenerateMakeCodeYoungAgainCommon(masm); \
+ }
+CODE_AGE_LIST(DEFINE_CODE_AGE_BUILTIN_GENERATOR)
+#undef DEFINE_CODE_AGE_BUILTIN_GENERATOR
+
+
+void Builtins::Generate_MarkCodeAsExecutedOnce(MacroAssembler* masm) {
+ // For now, we are relying on the fact that make_code_young doesn't do any
+ // garbage collection which allows us to save/restore the registers without
+ // worrying about which of them contain pointers. We also don't build an
+ // internal frame to make the code faster, since we shouldn't have to do stack
+ // crawls in MakeCodeYoung. This seems a bit fragile.
+
+ // Point r2 at the start of the PlatformCodeAge sequence.
+ __ CleanseP(r14);
+ __ SubP(r14, Operand(kCodeAgingSequenceLength));
+ __ LoadRR(r2, r14);
+
+ // The following registers must be saved and restored when calling through to
+ // the runtime:
+ // r2 - contains return address (beginning of patch sequence)
+ // r3 - isolate
+ // ir - return address
+ FrameScope scope(masm, StackFrame::MANUAL);
+ __ Pop(r14);
+ __ LoadRR(r0, r14);
+ __ MultiPush(r0.bit() | r2.bit() | r3.bit() | fp.bit());
+ __ PrepareCallCFunction(2, 0, r4);
+ __ mov(r3, Operand(ExternalReference::isolate_address(masm->isolate())));
+ __ CallCFunction(
+ ExternalReference::get_mark_code_as_executed_function(masm->isolate()),
+ 2);
+ __ MultiPop(r0.bit() | r2.bit() | r3.bit() | fp.bit());
+ __ LoadRR(r14, r0);
+ __ LoadRR(ip, r2);
+
+ // Perform prologue operations usually performed by the young code stub.
+ __ PushFixedFrame(r3);
+ __ la(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+
+ // Jump to point after the code-age stub.
+ __ AddP(r2, ip, Operand(kNoCodeAgeSequenceLength));
+ __ Jump(r2);
+}
+
+
+void Builtins::Generate_MarkCodeAsExecutedTwice(MacroAssembler* masm) {
+ GenerateMakeCodeYoungAgainCommon(masm);
+}
+
+
+void Builtins::Generate_MarkCodeAsToBeExecutedOnce(MacroAssembler* masm) {
+ Generate_MarkCodeAsExecutedOnce(masm);
+}
+
+
+static void Generate_NotifyStubFailureHelper(MacroAssembler* masm,
+ SaveFPRegsMode save_doubles) {
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Preserve registers across notification, this is important for compiled
+ // stubs that tail call the runtime on deopts passing their parameters in
+ // registers.
+ __ MultiPush(kJSCallerSaved | kCalleeSaved);
+ // Pass the function and deoptimization type to the runtime system.
+ __ CallRuntime(Runtime::kNotifyStubFailure, 0, save_doubles);
+ __ MultiPop(kJSCallerSaved | kCalleeSaved);
+ }
+
+ __ la(sp, MemOperand(sp, kPointerSize)); // Ignore state
+ __ Ret(); // Jump to miss handler
+}
+
+
+void Builtins::Generate_NotifyStubFailure(MacroAssembler* masm) {
+ Generate_NotifyStubFailureHelper(masm, kDontSaveFPRegs);
+}
+
+
+void Builtins::Generate_NotifyStubFailureSaveDoubles(MacroAssembler* masm) {
+ Generate_NotifyStubFailureHelper(masm, kSaveFPRegs);
+}
+
+
+static void Generate_NotifyDeoptimizedHelper(MacroAssembler* masm,
+ Deoptimizer::BailoutType type) {
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ // Pass the function and deoptimization type to the runtime system.
+ __ LoadSmiLiteral(r2, Smi::FromInt(static_cast<int>(type)));
+ __ push(r2);
+ __ CallRuntime(Runtime::kNotifyDeoptimized, 1);
+ }
+
+ // Get the full codegen state from the stack and untag it -> r8.
+ __ LoadP(r8, MemOperand(sp, 0 * kPointerSize));
+ __ SmiUntag(r8);
+ // Switch on the state.
+ Label with_tos_register, unknown_state;
+ __ CmpP(r8, Operand(FullCodeGenerator::NO_REGISTERS));
+ __ bne(&with_tos_register);
+ __ la(sp, MemOperand(sp, 1 * kPointerSize)); // Remove state.
+ __ Ret();
+
+ __ bind(&with_tos_register);
+ __ LoadP(r2, MemOperand(sp, 1 * kPointerSize));
+ __ CmpP(r8, Operand(FullCodeGenerator::TOS_REG));
+ __ bne(&unknown_state);
+ __ la(sp, MemOperand(sp, 2 * kPointerSize)); // Remove state.
+ __ Ret();
+
+ __ bind(&unknown_state);
+ __ stop("no cases left");
+}
+
+
+void Builtins::Generate_NotifyDeoptimized(MacroAssembler* masm) {
+ Generate_NotifyDeoptimizedHelper(masm, Deoptimizer::EAGER);
+}
+
+
+void Builtins::Generate_NotifySoftDeoptimized(MacroAssembler* masm) {
+ Generate_NotifyDeoptimizedHelper(masm, Deoptimizer::SOFT);
+}
+
+
+void Builtins::Generate_NotifyLazyDeoptimized(MacroAssembler* masm) {
+ Generate_NotifyDeoptimizedHelper(masm, Deoptimizer::LAZY);
+}
+
+
+void Builtins::Generate_OnStackReplacement(MacroAssembler* masm) {
+ // Lookup the function in the JavaScript frame.
+ __ LoadP(r2, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ // Pass function as argument.
+ __ push(r2);
+ __ CallRuntime(Runtime::kCompileForOnStackReplacement, 1);
+ }
+
+ // If the code object is null, just return to the unoptimized code.
+ Label skip;
+ __ CmpSmiLiteral(r2, Smi::FromInt(0), r0);
+ __ bne(&skip);
+ __ Ret();
+
+ __ bind(&skip);
+
+ // Load deoptimization data from the code object.
+ // <deopt_data> = <code>[#deoptimization_data_offset]
+ __ LoadP(r3, FieldMemOperand(r2, Code::kDeoptimizationDataOffset));
+
+ // Load the OSR entrypoint offset from the deoptimization data.
+ // <osr_offset> = <deopt_data>[#header_size + #osr_pc_offset]
+ __ LoadP(r3, FieldMemOperand(
+ r3, FixedArray::OffsetOfElementAt(
+ DeoptimizationInputData::kOsrPcOffsetIndex)));
+ __ SmiUntag(r3);
+
+ // Compute the target address = code_obj + header_size + osr_offset
+ // <entry_addr> = <code_obj> + #header_size + <osr_offset>
+ __ AddP(r2, r3);
+ __ AddP(r0, r2, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ LoadRR(r14, r0);
+
+ // And "return" to the OSR entry point of the function.
+ __ Ret();
+}
+
+
+void Builtins::Generate_OsrAfterStackCheck(MacroAssembler* masm) {
+ // We check the stack limit as indicator that recompilation might be done.
+ Label ok;
+ __ CmpLogicalP(sp, RootMemOperand(Heap::kStackLimitRootIndex));
+ __ bge(&ok, Label::kNear);
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ __ CallRuntime(Runtime::kStackGuard, 0);
+ }
+ __ Jump(masm->isolate()->builtins()->OnStackReplacement(),
+ RelocInfo::CODE_TARGET);
+
+ __ bind(&ok);
+ __ Ret();
+}
+
+
+void Builtins::Generate_FunctionCall(MacroAssembler* masm) {
+ // 1. Make sure we have at least one argument.
+ // r2: actual number of arguments
+ {
+ Label done;
+ __ CmpP(r2, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ push(r4);
+ __ AddP(r2, Operand(1));
+ __ bind(&done);
+ }
+
+ // 2. Get the function to call (passed as receiver) from the stack, check
+ // if it is a function.
+ // r2: actual number of arguments
+ Label slow, non_function;
+ __ ShiftLeftP(r3, r2, Operand(kPointerSizeLog2));
+ __ lay(r3, MemOperand(r3, sp));
+ __ LoadP(r3, MemOperand(r3));
+ __ JumpIfSmi(r3, &non_function);
+ __ CompareObjectType(r3, r4, r4, JS_FUNCTION_TYPE);
+ __ bne(&slow);
+
+ // 3a. Patch the first argument if necessary when calling a function.
+ // r2: actual number of arguments
+ // r3: function
+ Label shift_arguments;
+ __ LoadImmP(r6, Operand::Zero()); // indicate regular
+ {
+ Label convert_to_object, use_global_proxy, patch_receiver;
+ // Change context eagerly in case we need the global receiver.
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+
+ // Do not transform the receiver for strict mode functions.
+ __ LoadP(r4,
+ FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadlW(r5,
+ FieldMemOperand(r4, SharedFunctionInfo::kCompilerHintsOffset));
+ __ TestBit(r5,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kStrictModeFunction,
+#else
+ SharedFunctionInfo::kStrictModeFunction + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&shift_arguments /*, cr0*/);
+
+ // Do not transform the receiver for native (Compilerhints already in r5).
+ __ TestBit(r5,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kNative,
+#else
+ SharedFunctionInfo::kNative + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&shift_arguments /*, cr0*/);
+
+ // Compute the receiver in sloppy mode.
+ __ ShiftLeftP(ip, r2, Operand(kPointerSizeLog2));
+ __ lay(r4, MemOperand(sp, ip));
+ __ LoadP(r4, MemOperand(r4, -kPointerSize));
+ // r2: actual number of arguments
+ // r3: function
+ // r4: first argument
+ __ JumpIfSmi(r4, &convert_to_object);
+
+ __ CompareRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ beq(&use_global_proxy, Label::kNear);
+ __ CompareRoot(r4, Heap::kNullValueRootIndex);
+ __ beq(&use_global_proxy, Label::kNear);
+
+ STATIC_ASSERT(LAST_SPEC_OBJECT_TYPE == LAST_TYPE);
+ __ CompareObjectType(r4, r5, r5, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(&shift_arguments);
+
+ __ bind(&convert_to_object);
+
+ {
+ // Enter an internal frame in order to preserve argument count.
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ __ SmiTag(r2);
+ __ Push(r2, r4);
+ __ InvokeBuiltin(Builtins::TO_OBJECT, CALL_FUNCTION);
+ __ LoadRR(r4, r2);
+
+ __ pop(r2);
+ __ SmiUntag(r2);
+
+ // Exit the internal frame.
+ }
+
+ // Restore the function to r3, and the flag to r6.
+ __ ShiftLeftP(r6, r2, Operand(kPointerSizeLog2));
+ __ lay(r6, MemOperand(r6, sp));
+ __ LoadP(r3, MemOperand(r6));
+ __ LoadImmP(r6, Operand::Zero());
+ __ b(&patch_receiver, Label::kNear);
+
+ __ bind(&use_global_proxy);
+ __ LoadP(r4, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(r4, FieldMemOperand(r4, GlobalObject::kGlobalProxyOffset));
+
+ __ bind(&patch_receiver);
+ __ ShiftLeftP(ip, r2, Operand(kPointerSizeLog2));
+ __ lay(r5, MemOperand(sp, ip));
+ __ StoreP(r4, MemOperand(r5, -kPointerSize));
+
+ __ b(&shift_arguments);
+ }
+
+ // 3b. Check for function proxy.
+ __ bind(&slow);
+ __ LoadImmP(r6, Operand(1, kRelocInfo_NONEPTR)); // indicate function proxy
+ __ CmpP(r4, Operand(JS_FUNCTION_PROXY_TYPE));
+ __ beq(&shift_arguments, Label::kNear);
+ __ bind(&non_function);
+ __ LoadImmP(r6, Operand(2, kRelocInfo_NONEPTR)); // indicate non-function
+
+ // 3c. Patch the first argument when calling a non-function. The
+ // CALL_NON_FUNCTION builtin expects the non-function callee as
+ // receiver, so overwrite the first argument which will ultimately
+ // become the receiver.
+ // r2: actual number of arguments
+ // r3: function
+ // r6: call type (0: JS function, 1: function proxy, 2: non-function)
+ __ ShiftLeftP(ip, r2, Operand(kPointerSizeLog2));
+ __ lay(r4, MemOperand(sp, ip));
+ __ StoreP(r3, MemOperand(r4, -kPointerSize));
+
+ // 4. Shift arguments and return address one slot down on the stack
+ // (overwriting the original receiver). Adjust argument count to make
+ // the original first argument the new receiver.
+ // r2: actual number of arguments
+ // r3: function
+ // r6: call type (0: JS function, 1: function proxy, 2: non-function)
+ __ bind(&shift_arguments);
+ {
+ Label loop;
+ // Calculate the copy start address (destination). Copy end address is sp.
+ __ ShiftLeftP(ip, r2, Operand(kPointerSizeLog2));
+ __ lay(r4, MemOperand(sp, ip));
+
+ __ bind(&loop);
+ __ LoadP(ip, MemOperand(r4, -kPointerSize));
+ __ StoreP(ip, MemOperand(r4));
+ __ SubP(r4, Operand(kPointerSize));
+ __ CmpP(r4, sp);
+ __ bne(&loop);
+ // Adjust the actual number of arguments and remove the top element
+ // (which is a copy of the last argument).
+ __ SubP(r2, Operand(1));
+ __ pop();
+ }
+
+ // 5a. Call non-function via tail call to CALL_NON_FUNCTION builtin,
+ // or a function proxy via CALL_FUNCTION_PROXY.
+ // r2: actual number of arguments
+ // r3: function
+ // r6: call type (0: JS function, 1: function proxy, 2: non-function)
+ {
+ Label function, non_proxy;
+ __ CmpP(r6, Operand::Zero());
+ __ beq(&function);
+ // Expected number of arguments is 0 for CALL_NON_FUNCTION.
+ __ LoadImmP(r4, Operand::Zero());
+ __ CmpP(r6, Operand(1));
+ __ bne(&non_proxy);
+
+ __ push(r3); // re-add proxy object as additional argument
+ __ AddP(r2, Operand(1));
+ __ GetBuiltinFunction(r3, Builtins::CALL_FUNCTION_PROXY);
+ __ Jump(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET);
+
+ __ bind(&non_proxy);
+ __ GetBuiltinFunction(r3, Builtins::CALL_NON_FUNCTION);
+ __ Jump(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET);
+ __ bind(&function);
+ }
+
+ // 5b. Get the code to call from the function and check that the number of
+ // expected arguments matches what we're providing. If so, jump
+ // (tail-call) to the code in register edx without checking arguments.
+ // r2: actual number of arguments
+ // r3: function
+ __ LoadP(r5, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadW(
+ r4, FieldMemOperand(r5, SharedFunctionInfo::kFormalParameterCountOffset));
+#if !V8_TARGET_ARCH_S390X
+ __ SmiUntag(r4);
+#endif
+ __ CmpP(r4, r2); // Check formal and actual parameter counts.
+ __ Jump(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET, ne);
+
+ __ LoadP(ip, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+ ParameterCount expected(0);
+ __ InvokeCode(ip, expected, expected, JUMP_FUNCTION, NullCallWrapper());
+}
+
+
+static void Generate_PushAppliedArguments(MacroAssembler* masm,
+ const int argumentsOffset,
+ const int indexOffset,
+ const int limitOffset) {
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register key = LoadDescriptor::NameRegister();
+ Register slot = LoadDescriptor::SlotRegister();
+ Register vector = LoadWithVectorDescriptor::VectorRegister();
+
+ // Copy all arguments from the array to the stack.
+ Label entry, loop;
+ __ LoadP(key, MemOperand(fp, indexOffset));
+ __ b(&entry);
+ __ bind(&loop);
+ __ LoadP(receiver, MemOperand(fp, argumentsOffset));
+
+ // Use inline caching to speed up access to arguments.
+ FeedbackVectorSpec spec(0, Code::KEYED_LOAD_IC);
+ Handle<TypeFeedbackVector> feedback_vector =
+ masm->isolate()->factory()->NewTypeFeedbackVector(&spec);
+ int index = feedback_vector->GetIndex(FeedbackVectorICSlot(0));
+ __ LoadSmiLiteral(slot, Smi::FromInt(index));
+ __ Move(vector, feedback_vector);
+ Handle<Code> ic =
+ KeyedLoadICStub(masm->isolate(), LoadICState(kNoExtraICState)).GetCode();
+ __ Call(ic, RelocInfo::CODE_TARGET);
+
+ // Push the nth argument.
+ __ push(r2);
+
+ // Update the index on the stack and in register key.
+ __ LoadP(key, MemOperand(fp, indexOffset));
+ __ AddSmiLiteral(key, key, Smi::FromInt(1), r0);
+ __ StoreP(key, MemOperand(fp, indexOffset));
+
+ // Test if the copy loop has finished copying all the elements from the
+ // arguments object.
+ __ bind(&entry);
+ __ LoadP(r0, MemOperand(fp, limitOffset));
+ __ CmpP(key, r0);
+ __ bne(&loop);
+
+ // On exit, the pushed arguments count is in r2, untagged
+ __ SmiUntag(r2, key);
+}
+
+
+// Used by FunctionApply and ReflectApply
+static void Generate_ApplyHelper(MacroAssembler* masm, bool targetIsArgument) {
+ const int kFormalParameters = targetIsArgument ? 3 : 2;
+ const int kStackSize = kFormalParameters + 1;
+
+ {
+ FrameScope frame_scope(masm, StackFrame::INTERNAL);
+ const int kArgumentsOffset = kFPOnStackSize + kPCOnStackSize;
+ const int kReceiverOffset = kArgumentsOffset + kPointerSize;
+ const int kFunctionOffset = kReceiverOffset + kPointerSize;
+
+ __ LoadP(r2, MemOperand(fp, kFunctionOffset)); // get the function
+ __ push(r2);
+ __ LoadP(r2, MemOperand(fp, kArgumentsOffset)); // get the args array
+ __ push(r2);
+ if (targetIsArgument) {
+ __ InvokeBuiltin(Builtins::REFLECT_APPLY_PREPARE, CALL_FUNCTION);
+ } else {
+ __ InvokeBuiltin(Builtins::APPLY_PREPARE, CALL_FUNCTION);
+ }
+
+ Generate_CheckStackOverflow(masm, kFunctionOffset, r2, kArgcIsSmiTagged);
+
+ // Push current limit and index.
+ const int kIndexOffset =
+ StandardFrameConstants::kExpressionsOffset - (2 * kPointerSize);
+ const int kLimitOffset =
+ StandardFrameConstants::kExpressionsOffset - (1 * kPointerSize);
+ __ LoadImmP(r3, Operand::Zero());
+ __ Push(r2, r3); // limit and initial index.
+
+ // Get the receiver.
+ __ LoadP(r2, MemOperand(fp, kReceiverOffset));
+
+ // Check that the function is a JS function (otherwise it must be a proxy).
+ Label push_receiver;
+ __ LoadP(r3, MemOperand(fp, kFunctionOffset));
+ __ CompareObjectType(r3, r4, r4, JS_FUNCTION_TYPE);
+ __ bne(&push_receiver);
+
+ // Change context eagerly to get the right global object if necessary.
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+ // Load the shared function info while the function is still in r3.
+ __ LoadP(r4,
+ FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+
+ // Compute the receiver.
+ // Do not transform the receiver for strict mode functions.
+ Label call_to_object, use_global_proxy;
+ __ LoadlW(r4,
+ FieldMemOperand(r4, SharedFunctionInfo::kCompilerHintsOffset));
+ __ TestBit(r4,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kStrictModeFunction,
+#else
+ SharedFunctionInfo::kStrictModeFunction + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&push_receiver /*, cr0*/);
+
+ // Do not transform the receiver for strict mode functions.
+ __ TestBit(r4,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kNative,
+#else
+ SharedFunctionInfo::kNative + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&push_receiver /*, cr0*/);
+
+ // Compute the receiver in sloppy mode.
+ __ JumpIfSmi(r2, &call_to_object);
+ __ CompareRoot(r2, Heap::kNullValueRootIndex);
+ __ beq(&use_global_proxy);
+ __ LoadRoot(r3, Heap::kUndefinedValueRootIndex);
+ __ CmpP(r2, r3);
+ __ beq(&use_global_proxy);
+
+ // Check if the receiver is already a JavaScript object.
+ // r2: receiver
+ STATIC_ASSERT(LAST_SPEC_OBJECT_TYPE == LAST_TYPE);
+ __ CompareObjectType(r2, r3, r3, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(&push_receiver);
+
+ // Convert the receiver to a regular object.
+ // r2: receiver
+ __ bind(&call_to_object);
+ __ push(r2);
+ __ InvokeBuiltin(Builtins::TO_OBJECT, CALL_FUNCTION);
+ __ b(&push_receiver);
+
+ __ bind(&use_global_proxy);
+ __ LoadP(r2, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(r2, FieldMemOperand(r2, GlobalObject::kGlobalProxyOffset));
+
+ // Push the receiver.
+ // r2: receiver
+ __ bind(&push_receiver);
+ __ push(r2);
+
+ // Copy all arguments from the array to the stack.
+ Generate_PushAppliedArguments(masm, kArgumentsOffset, kIndexOffset,
+ kLimitOffset);
+
+ // Call the function.
+ Label call_proxy;
+ ParameterCount actual(r2);
+ __ LoadP(r3, MemOperand(fp, kFunctionOffset));
+ __ CompareObjectType(r3, r4, r4, JS_FUNCTION_TYPE);
+ __ bne(&call_proxy);
+ __ InvokeFunction(r3, actual, CALL_FUNCTION, NullCallWrapper());
+
+ __ LeaveFrame(StackFrame::INTERNAL);
+ __ la(sp, MemOperand(sp, kStackSize * kPointerSize));
+ __ Ret();
+
+ // Call the function proxy.
+ __ bind(&call_proxy);
+ __ push(r3); // add function proxy as last argument
+ __ AddP(r2, Operand(1));
+ __ LoadImmP(r4, Operand::Zero());
+ __ GetBuiltinFunction(r3, Builtins::CALL_FUNCTION_PROXY);
+ __ Call(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET);
+
+ // Tear down the internal frame and remove function, receiver and args.
+ }
+ __ la(sp, MemOperand(sp, kStackSize * kPointerSize));
+ __ Ret();
+}
+
+
+static void Generate_ConstructHelper(MacroAssembler* masm) {
+ const int kFormalParameters = 3;
+ const int kStackSize = kFormalParameters + 1;
+
+ {
+ FrameScope frame_scope(masm, StackFrame::INTERNAL);
+ const int kNewTargetOffset = kFPOnStackSize + kPCOnStackSize;
+ const int kArgumentsOffset = kNewTargetOffset + kPointerSize;
+ const int kFunctionOffset = kArgumentsOffset + kPointerSize;
+
+ // If newTarget is not supplied, set it to constructor
+ Label validate_arguments;
+ __ LoadP(r2, MemOperand(fp, kNewTargetOffset));
+ __ CompareRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ bne(&validate_arguments, Label::kNear);
+ __ LoadP(r2, MemOperand(fp, kFunctionOffset));
+ __ StoreP(r2, MemOperand(fp, kNewTargetOffset));
+
+ // Validate arguments
+ __ bind(&validate_arguments);
+ __ LoadP(r2, MemOperand(fp, kFunctionOffset)); // get the function
+ __ push(r2);
+ __ LoadP(r2, MemOperand(fp, kArgumentsOffset)); // get the args array
+ __ push(r2);
+ __ LoadP(r2, MemOperand(fp, kNewTargetOffset)); // get the new.target
+ __ push(r2);
+ __ InvokeBuiltin(Builtins::REFLECT_CONSTRUCT_PREPARE, CALL_FUNCTION);
+
+ Generate_CheckStackOverflow(masm, kFunctionOffset, r2, kArgcIsSmiTagged);
+
+ // Push current limit and index.
+ const int kIndexOffset =
+ StandardFrameConstants::kExpressionsOffset - (2 * kPointerSize);
+ const int kLimitOffset =
+ StandardFrameConstants::kExpressionsOffset - (1 * kPointerSize);
+ __ LoadImmP(r3, Operand::Zero());
+ __ Push(r2, r3); // limit and initial index.
+ // Push newTarget and callee functions
+ __ LoadP(r2, MemOperand(fp, kNewTargetOffset));
+ __ push(r2);
+ __ LoadP(r2, MemOperand(fp, kFunctionOffset));
+ __ push(r2);
+
+ // Copy all arguments from the array to the stack.
+ Generate_PushAppliedArguments(masm, kArgumentsOffset, kIndexOffset,
+ kLimitOffset);
+
+ // Use undefined feedback vector
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ LoadP(r3, MemOperand(fp, kFunctionOffset));
+
+ // Call the function.
+ CallConstructStub stub(masm->isolate(), SUPER_CONSTRUCTOR_CALL);
+ __ Call(stub.GetCode(), RelocInfo::CONSTRUCT_CALL);
+
+ __ Drop(1);
+
+ // Leave internal frame.
+ }
+ __ lay(sp, MemOperand(sp, kStackSize * kPointerSize));
+ __ Ret();
+}
+
+
+void Builtins::Generate_FunctionApply(MacroAssembler* masm) {
+ Generate_ApplyHelper(masm, false);
+}
+
+
+void Builtins::Generate_ReflectApply(MacroAssembler* masm) {
+ Generate_ApplyHelper(masm, true);
+}
+
+
+void Builtins::Generate_ReflectConstruct(MacroAssembler* masm) {
+ Generate_ConstructHelper(masm);
+}
+
+
+static void ArgumentAdaptorStackCheck(MacroAssembler* masm,
+ Label* stack_overflow) {
+ // ----------- S t a t e -------------
+ // -- r2 : actual number of arguments
+ // -- r3 : function (passed through to callee)
+ // -- r4 : expected number of arguments
+ // -----------------------------------
+ // Check the stack for overflow. We are not trying to catch
+ // interruptions (e.g. debug break and preemption) here, so the "real stack
+ // limit" is checked.
+ __ LoadRoot(r7, Heap::kRealStackLimitRootIndex);
+ // Make r7 the space we have left. The stack might already be overflowed
+ // here which will cause r7 to become negative.
+ __ SubP(r7, sp, r7);
+ // Check if the arguments will overflow the stack.
+ __ ShiftLeftP(r0, r4, Operand(kPointerSizeLog2));
+ __ CmpP(r7, r0);
+ __ ble(stack_overflow); // Signed comparison.
+}
+
+
+static void EnterArgumentsAdaptorFrame(MacroAssembler* masm) {
+ __ SmiTag(r2);
+ __ LoadSmiLiteral(r6, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR));
+ // Stack updated as such:
+ // old SP --->
+ // R14 Return Addr
+ // Old FP <--- New FP
+ // Argument Adapter SMI
+ // Function
+ // ArgC as SMI <--- New SP
+ __ lay(sp, MemOperand(sp, -5 * kPointerSize));
+
+ // Cleanse the top nibble of 31-bit pointers.
+ __ CleanseP(r14);
+ __ StoreP(r14, MemOperand(sp, 4 * kPointerSize));
+ __ StoreP(fp, MemOperand(sp, 3 * kPointerSize));
+ __ StoreP(r6, MemOperand(sp, 2 * kPointerSize));
+ __ StoreP(r3, MemOperand(sp, 1 * kPointerSize));
+ __ StoreP(r2, MemOperand(sp, 0 * kPointerSize));
+ __ la(fp, MemOperand(sp,
+ StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
+}
+
+
+static void LeaveArgumentsAdaptorFrame(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : result being passed through
+ // -----------------------------------
+ // Get the number of arguments passed (as a smi), tear down the frame and
+ // then tear down the parameters.
+ __ LoadP(r3, MemOperand(fp, -(StandardFrameConstants::kFixedFrameSizeFromFp +
+ kPointerSize)));
+ int stack_adjustment = kPointerSize; // adjust for receiver
+ __ LeaveFrame(StackFrame::ARGUMENTS_ADAPTOR, stack_adjustment);
+ __ SmiToPtrArrayOffset(r3, r3);
+ __ lay(sp, MemOperand(sp, r3));
+}
+
+
+void Builtins::Generate_ArgumentsAdaptorTrampoline(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : actual number of arguments
+ // -- r3 : function (passed through to callee)
+ // -- r4 : expected number of arguments
+ // -----------------------------------
+
+ Label stack_overflow;
+ ArgumentAdaptorStackCheck(masm, &stack_overflow);
+ Label invoke, dont_adapt_arguments;
+
+ Label enough, too_few;
+ __ LoadP(ip, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+ __ CmpP(r2, r4);
+ __ blt(&too_few);
+ __ CmpP(r4, Operand(SharedFunctionInfo::kDontAdaptArgumentsSentinel));
+ __ beq(&dont_adapt_arguments);
+
+ { // Enough parameters: actual >= expected
+ __ bind(&enough);
+ EnterArgumentsAdaptorFrame(masm);
+
+ // Calculate copy start address into r2 and copy end address into r4.
+ // r2: actual number of arguments as a smi
+ // r3: function
+ // r4: expected number of arguments
+ // ip: code entry to call
+ __ SmiToPtrArrayOffset(r2, r2);
+ __ AddP(r2, fp);
+ // adjust for return address and receiver
+ __ AddP(r2, Operand(2 * kPointerSize));
+ __ ShiftLeftP(r4, r4, Operand(kPointerSizeLog2));
+ __ SubP(r4, r2, r4);
+
+ // Copy the arguments (including the receiver) to the new stack frame.
+ // r2: copy start address
+ // r3: function
+ // r4: copy end address
+ // ip: code entry to call
+
+ Label copy;
+ __ bind(©);
+ __ LoadP(r0, MemOperand(r2, 0));
+ __ push(r0);
+ __ CmpP(r2, r4); // Compare before moving to next argument.
+ __ lay(r2, MemOperand(r2, -kPointerSize));
+ __ bne(©);
+
+ __ b(&invoke);
+ }
+
+ { // Too few parameters: Actual < expected
+ __ bind(&too_few);
+
+ // If the function is strong we need to throw an error.
+ Label no_strong_error;
+ __ LoadP(r6, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadlW(r7, FieldMemOperand(r6,
+ SharedFunctionInfo::kCompilerHintsOffset));
+ __ TestBit(r7,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kStrongModeFunction,
+#else
+ SharedFunctionInfo::kStrongModeFunction + kSmiTagSize,
+#endif
+ r0);
+ __ beq(&no_strong_error);
+
+ // What we really care about is the required number of arguments.
+ __ LoadlW(r6, FieldMemOperand(r6, SharedFunctionInfo::kLengthOffset));
+#if V8_TARGET_ARCH_S390X
+ // See commment near kLenghtOffset in src/objects.h
+ __ ShiftRightArith(r6, r6, Operand(kSmiTagSize));
+#else
+ __ SmiUntag(r6);
+#endif
+ __ CmpP(r2, r6);
+ __ bge(&no_strong_error);
+
+ {
+ FrameScope frame(masm, StackFrame::MANUAL);
+ EnterArgumentsAdaptorFrame(masm);
+ __ CallRuntime(Runtime::kThrowStrongModeTooFewArguments, 0);
+ }
+
+ __ bind(&no_strong_error);
+ EnterArgumentsAdaptorFrame(masm);
+
+ // Calculate copy start address into r0 and copy end address is fp.
+ // r2: actual number of arguments as a smi
+ // r3: function
+ // r4: expected number of arguments
+ // ip: code entry to call
+ __ SmiToPtrArrayOffset(r2, r2);
+ __ lay(r2, MemOperand(r2, fp));
+
+ // Copy the arguments (including the receiver) to the new stack frame.
+ // r2: copy start address
+ // r3: function
+ // r4: expected number of arguments
+ // ip: code entry to call
+ Label copy;
+ __ bind(©);
+ // Adjust load for return address and receiver.
+ __ LoadP(r0, MemOperand(r2, 2 * kPointerSize));
+ __ push(r0);
+ __ CmpP(r2, fp); // Compare before moving to next argument.
+ __ lay(r2, MemOperand(r2, -kPointerSize));
+ __ bne(©);
+
+ // Fill the remaining expected arguments with undefined.
+ // r3: function
+ // r4: expected number of argumentus
+ // ip: code entry to call
+ __ LoadRoot(r0, Heap::kUndefinedValueRootIndex);
+ __ ShiftLeftP(r4, r4, Operand(kPointerSizeLog2));
+ __ SubP(r4, fp, r4);
+ // Adjust for frame.
+ __ SubP(r4, Operand(StandardFrameConstants::kFixedFrameSizeFromFp +
+ 2 * kPointerSize));
+
+ Label fill;
+ __ bind(&fill);
+ __ push(r0);
+ __ CmpP(sp, r4);
+ __ bne(&fill);
+ }
+
+ // Call the entry point.
+ __ bind(&invoke);
+ __ CallJSEntry(ip);
+
+ // Store offset of return address for deoptimizer.
+ masm->isolate()->heap()->SetArgumentsAdaptorDeoptPCOffset(masm->pc_offset());
+
+ // Exit frame and return.
+ LeaveArgumentsAdaptorFrame(masm);
+ __ Ret();
+
+
+ // -------------------------------------------
+ // Dont adapt arguments.
+ // -------------------------------------------
+ __ bind(&dont_adapt_arguments);
+ __ JumpToJSEntry(ip);
+
+ __ bind(&stack_overflow);
+ {
+ FrameScope frame(masm, StackFrame::MANUAL);
+ EnterArgumentsAdaptorFrame(masm);
+ __ InvokeBuiltin(Builtins::STACK_OVERFLOW, CALL_FUNCTION);
+ __ bkpt(0);
+ }
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/code-stubs-s390.cc
@@ -0,0 +1,5685 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/base/bits.h"
+#include "src/bootstrapper.h"
+#include "src/code-stubs.h"
+#include "src/codegen.h"
+#include "src/ic/handler-compiler.h"
+#include "src/ic/ic.h"
+#include "src/ic/stub-cache.h"
+#include "src/isolate.h"
+#include "src/jsregexp.h"
+#include "src/regexp-macro-assembler.h"
+#include "src/runtime/runtime.h"
+
+namespace v8 {
+namespace internal {
+
+
+static void InitializeArrayConstructorDescriptor(
+ Isolate* isolate, CodeStubDescriptor* descriptor,
+ int constant_stack_parameter_count) {
+ Address deopt_handler =
+ Runtime::FunctionForId(Runtime::kArrayConstructor)->entry;
+
+ if (constant_stack_parameter_count == 0) {
+ descriptor->Initialize(deopt_handler, constant_stack_parameter_count,
+ JS_FUNCTION_STUB_MODE);
+ } else {
+ descriptor->Initialize(r2, deopt_handler, constant_stack_parameter_count,
+ JS_FUNCTION_STUB_MODE, PASS_ARGUMENTS);
+ }
+}
+
+
+static void InitializeInternalArrayConstructorDescriptor(
+ Isolate* isolate, CodeStubDescriptor* descriptor,
+ int constant_stack_parameter_count) {
+ Address deopt_handler =
+ Runtime::FunctionForId(Runtime::kInternalArrayConstructor)->entry;
+
+ if (constant_stack_parameter_count == 0) {
+ descriptor->Initialize(deopt_handler, constant_stack_parameter_count,
+ JS_FUNCTION_STUB_MODE);
+ } else {
+ descriptor->Initialize(r2, deopt_handler, constant_stack_parameter_count,
+ JS_FUNCTION_STUB_MODE, PASS_ARGUMENTS);
+ }
+}
+
+
+void ArrayNoArgumentConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeArrayConstructorDescriptor(isolate(), descriptor, 0);
+}
+
+
+void ArraySingleArgumentConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeArrayConstructorDescriptor(isolate(), descriptor, 1);
+}
+
+
+void ArrayNArgumentsConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeArrayConstructorDescriptor(isolate(), descriptor, -1);
+}
+
+
+void InternalArrayNoArgumentConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeInternalArrayConstructorDescriptor(isolate(), descriptor, 0);
+}
+
+
+void InternalArraySingleArgumentConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeInternalArrayConstructorDescriptor(isolate(), descriptor, 1);
+}
+
+
+void InternalArrayNArgumentsConstructorStub::InitializeDescriptor(
+ CodeStubDescriptor* descriptor) {
+ InitializeInternalArrayConstructorDescriptor(isolate(), descriptor, -1);
+}
+
+
+#define __ ACCESS_MASM(masm)
+
+
+static void EmitIdenticalObjectComparison(MacroAssembler* masm, Label* slow,
+ Condition cond, Strength strength);
+static void EmitSmiNonsmiComparison(MacroAssembler* masm, Register lhs,
+ Register rhs, Label* lhs_not_nan,
+ Label* slow, bool strict);
+static void EmitStrictTwoHeapObjectCompare(MacroAssembler* masm, Register lhs,
+ Register rhs);
+
+
+void HydrogenCodeStub::GenerateLightweightMiss(MacroAssembler* masm,
+ ExternalReference miss) {
+ // Update the static counter each time a new code stub is generated.
+ isolate()->counters()->code_stubs()->Increment();
+
+ CallInterfaceDescriptor descriptor = GetCallInterfaceDescriptor();
+ int param_count = descriptor.GetRegisterParameterCount();
+ {
+ // Call the runtime system in a fresh internal frame.
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ DCHECK(param_count == 0 ||
+ r2.is(descriptor.GetRegisterParameter(param_count - 1)));
+ // Push arguments
+ for (int i = 0; i < param_count; ++i) {
+ __ push(descriptor.GetRegisterParameter(i));
+ }
+ __ CallExternalReference(miss, param_count);
+ }
+
+ __ Ret();
+}
+
+
+void DoubleToIStub::Generate(MacroAssembler* masm) {
+ Label out_of_range, only_low, negate, done, fastpath_done;
+ Register input_reg = source();
+ Register result_reg = destination();
+ DCHECK(is_truncating());
+
+ int double_offset = offset();
+
+ // Immediate values for this stub fit in instructions, so it's safe to use ip.
+ Register scratch = GetRegisterThatIsNotOneOf(input_reg, result_reg);
+ Register scratch_low =
+ GetRegisterThatIsNotOneOf(input_reg, result_reg, scratch);
+ Register scratch_high =
+ GetRegisterThatIsNotOneOf(input_reg, result_reg, scratch, scratch_low);
+ DoubleRegister double_scratch = kScratchDoubleReg;
+
+ __ push(scratch);
+ // Account for saved regs if input is sp.
+ if (input_reg.is(sp)) double_offset += kPointerSize;
+
+ if (!skip_fastpath()) {
+ // Load double input.
+ __ LoadF(double_scratch, MemOperand(input_reg, double_offset));
+
+ // Do fast-path convert from double to int.
+ __ ConvertDoubleToInt64(double_scratch,
+#if !V8_TARGET_ARCH_S390X
+ scratch,
+#endif
+ result_reg, d0);
+
+// Test for overflow
+#if V8_TARGET_ARCH_S390X
+ __ TestIfInt32(result_reg, r0);
+#else
+ __ TestIfInt32(scratch, result_reg, r0);
+#endif
+ __ beq(&fastpath_done, Label::kNear);
+ }
+
+ __ Push(scratch_high, scratch_low);
+ // Account for saved regs if input is sp.
+ if (input_reg.is(sp)) double_offset += 2 * kPointerSize;
+
+ __ LoadlW(scratch_high,
+ MemOperand(input_reg, double_offset + Register::kExponentOffset));
+ __ LoadlW(scratch_low,
+ MemOperand(input_reg, double_offset + Register::kMantissaOffset));
+
+ __ ExtractBitMask(scratch, scratch_high, HeapNumber::kExponentMask);
+ // Load scratch with exponent - 1. This is faster than loading
+ // with exponent because Bias + 1 = 1024 which is a *S390* immediate value.
+ STATIC_ASSERT(HeapNumber::kExponentBias + 1 == 1024);
+ __ SubP(scratch, Operand(HeapNumber::kExponentBias + 1));
+ // If exponent is greater than or equal to 84, the 32 less significant
+ // bits are 0s (2^84 = 1, 52 significant bits, 32 uncoded bits),
+ // the result is 0.
+ // Compare exponent with 84 (compare exponent - 1 with 83).
+ __ CmpP(scratch, Operand(83));
+ __ bge(&out_of_range, Label::kNear);
+
+ // If we reach this code, 31 <= exponent <= 83.
+ // So, we don't have to handle cases where 0 <= exponent <= 20 for
+ // which we would need to shift right the high part of the mantissa.
+ // Scratch contains exponent - 1.
+ // Load scratch with 52 - exponent (load with 51 - (exponent - 1)).
+ __ Load(r0, Operand(51));
+ __ SubP(scratch, r0, scratch);
+ __ CmpP(scratch, Operand::Zero());
+ __ ble(&only_low, Label::kNear);
+ // 21 <= exponent <= 51, shift scratch_low and scratch_high
+ // to generate the result.
+ __ ShiftRight(scratch_low, scratch_low, scratch);
+ // Scratch contains: 52 - exponent.
+ // We needs: exponent - 20.
+ // So we use: 32 - scratch = 32 - 52 + exponent = exponent - 20.
+ __ Load(r0, Operand(32));
+ __ SubP(scratch, r0, scratch);
+ __ ExtractBitMask(result_reg, scratch_high, HeapNumber::kMantissaMask);
+ // Set the implicit 1 before the mantissa part in scratch_high.
+ STATIC_ASSERT(HeapNumber::kMantissaBitsInTopWord >= 16);
+ __ Load(r0, Operand(1 << ((HeapNumber::kMantissaBitsInTopWord) - 16)));
+ __ ShiftLeftP(r0, r0, Operand(16));
+ __ OrP(result_reg, result_reg, r0);
+ __ ShiftLeft(r0, result_reg, scratch);
+ __ OrP(result_reg, scratch_low, r0);
+ __ b(&negate, Label::kNear);
+
+ __ bind(&out_of_range);
+ __ mov(result_reg, Operand::Zero());
+ __ b(&done, Label::kNear);
+
+ __ bind(&only_low);
+ // 52 <= exponent <= 83, shift only scratch_low.
+ // On entry, scratch contains: 52 - exponent.
+ __ LoadComplementRR(scratch, scratch);
+ __ ShiftLeft(result_reg, scratch_low, scratch);
+
+ __ bind(&negate);
+ // If input was positive, scratch_high ASR 31 equals 0 and
+ // scratch_high LSR 31 equals zero.
+ // New result = (result eor 0) + 0 = result.
+ // If the input was negative, we have to negate the result.
+ // Input_high ASR 31 equals 0xffffffff and scratch_high LSR 31 equals 1.
+ // New result = (result eor 0xffffffff) + 1 = 0 - result.
+ __ ShiftRightArith(r0, scratch_high, Operand(31));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(r0, r0);
+ __ ShiftRightP(r0, r0, Operand(32));
+#endif
+ __ XorP(result_reg, r0);
+ __ ShiftRight(r0, scratch_high, Operand(31));
+ __ AddP(result_reg, r0);
+
+ __ bind(&done);
+ __ Pop(scratch_high, scratch_low);
+
+ __ bind(&fastpath_done);
+ __ pop(scratch);
+
+ __ Ret();
+}
+
+
+// Handle the case where the lhs and rhs are the same object.
+// Equality is almost reflexive (everything but NaN), so this is a test
+// for "identity and not NaN".
+static void EmitIdenticalObjectComparison(MacroAssembler* masm, Label* slow,
+ Condition cond, Strength strength) {
+ Label not_identical;
+ Label heap_number, return_equal;
+ __ CmpP(r2, r3);
+ __ bne(¬_identical);
+
+ // Test for NaN. Sadly, we can't just compare to Factory::nan_value(),
+ // so we do the second best thing - test it ourselves.
+ // They are both equal and they are not both Smis so both of them are not
+ // Smis. If it's not a heap number, then return equal.
+ if (cond == lt || cond == gt) {
+ // Call runtime on identical JSObjects.
+ __ CompareObjectType(r2, r6, r6, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(slow);
+ // Call runtime on identical symbols since we need to throw a TypeError.
+ __ CmpP(r6, Operand(SYMBOL_TYPE));
+ __ beq(slow);
+ if (is_strong(strength)) {
+ // Call the runtime on anything that is converted in the semantics, since
+ // we need to throw a TypeError. Smis have already been ruled out.
+ __ CmpP(r6, Operand(HEAP_NUMBER_TYPE));
+ __ beq(&return_equal);
+ __ AddP(r0, r6, Operand(kIsNotStringMask));
+ __ bne(slow);
+ }
+ } else {
+ __ CompareObjectType(r2, r6, r6, HEAP_NUMBER_TYPE);
+ __ beq(&heap_number);
+ // Comparing JS objects with <=, >= is complicated.
+ if (cond != eq) {
+ __ CmpP(r6, Operand(FIRST_SPEC_OBJECT_TYPE));
+ __ bge(slow);
+ // Call runtime on identical symbols since we need to throw a TypeError.
+ __ CmpP(r6, Operand(SYMBOL_TYPE));
+ __ beq(slow);
+ if (is_strong(strength)) {
+ // Call the runtime on anything that is converted in the semantics,
+ // since we need to throw a TypeError. Smis and heap numbers have
+ // already been ruled out.
+ __ AndP(r0, r6, Operand(kIsNotStringMask));
+ __ bne(slow);
+ }
+ // Normally here we fall through to return_equal, but undefined is
+ // special: (undefined == undefined) == true, but
+ // (undefined <= undefined) == false! See ECMAScript 11.8.5.
+ if (cond == le || cond == ge) {
+ __ CmpP(r6, Operand(ODDBALL_TYPE));
+ __ bne(&return_equal);
+ __ CompareRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ bne(&return_equal);
+ if (cond == le) {
+ // undefined <= undefined should fail.
+ __ LoadImmP(r2, Operand(GREATER));
+ } else {
+ // undefined >= undefined should fail.
+ __ LoadImmP(r2, Operand(LESS));
+ }
+ __ Ret();
+ }
+ }
+ }
+
+ __ bind(&return_equal);
+ if (cond == lt) {
+ __ LoadImmP(r2, Operand(GREATER)); // Things aren't less than themselves.
+ } else if (cond == gt) {
+ __ LoadImmP(r2, Operand(LESS)); // Things aren't greater than themselves.
+ } else {
+ __ LoadImmP(r2, Operand(EQUAL)); // Things are <=, >=, ==, === themselves
+ }
+ __ Ret();
+
+ // For less and greater we don't have to check for NaN since the result of
+ // x < x is false regardless. For the others here is some code to check
+ // for NaN.
+ if (cond != lt && cond != gt) {
+ __ bind(&heap_number);
+ // It is a heap number, so return non-equal if it's NaN and equal if it's
+ // not NaN.
+
+ // The representation of NaN values has all exponent bits (52..62) set,
+ // and not all mantissa bits (0..51) clear.
+ // Read top bits of double representation (second word of value).
+ __ LoadlW(r4, FieldMemOperand(r2, HeapNumber::kExponentOffset));
+ // Test that exponent bits are all set.
+ STATIC_ASSERT(HeapNumber::kExponentMask == 0x7ff00000u);
+ __ ExtractBitMask(r5, r4, HeapNumber::kExponentMask);
+ __ CmpLogicalP(r5, Operand(0x7ff));
+ __ bne(&return_equal);
+
+ // Shift out flag and all exponent bits, retaining only mantissa.
+ __ sll(r4, Operand(HeapNumber::kNonMantissaBitsInTopWord));
+ // Or with all low-bits of mantissa.
+ __ LoadlW(r5, FieldMemOperand(r2, HeapNumber::kMantissaOffset));
+ __ OrP(r2, r5, r4);
+ __ CmpP(r2, Operand::Zero());
+ // For equal we already have the right value in r2: Return zero (equal)
+ // if all bits in mantissa are zero (it's an Infinity) and non-zero if
+ // not (it's a NaN). For <= and >= we need to load r0 with the failing
+ // value if it's a NaN.
+ if (cond != eq) {
+ Label not_equal;
+ __ bne(¬_equal, Label::kNear);
+ // All-zero means Infinity means equal.
+ __ Ret();
+ __ bind(¬_equal);
+ if (cond == le) {
+ __ LoadImmP(r2, Operand(GREATER)); // NaN <= NaN should fail.
+ } else {
+ __ LoadImmP(r2, Operand(LESS)); // NaN >= NaN should fail.
+ }
+ }
+ __ Ret();
+ }
+ // No fall through here.
+
+ __ bind(¬_identical);
+}
+
+
+// See comment at call site.
+static void EmitSmiNonsmiComparison(MacroAssembler* masm, Register lhs,
+ Register rhs, Label* lhs_not_nan,
+ Label* slow, bool strict) {
+ DCHECK((lhs.is(r2) && rhs.is(r3)) || (lhs.is(r3) && rhs.is(r2)));
+
+ Label rhs_is_smi;
+ __ JumpIfSmi(rhs, &rhs_is_smi);
+
+ // Lhs is a Smi. Check whether the rhs is a heap number.
+ __ CompareObjectType(rhs, r5, r6, HEAP_NUMBER_TYPE);
+ if (strict) {
+ // If rhs is not a number and lhs is a Smi then strict equality cannot
+ // succeed. Return non-equal
+ // If rhs is r2 then there is already a non zero value in it.
+ Label skip;
+ __ beq(&skip, Label::kNear);
+ if (!rhs.is(r2)) {
+ __ mov(r2, Operand(NOT_EQUAL));
+ }
+ __ Ret();
+ __ bind(&skip);
+ } else {
+ // Smi compared non-strictly with a non-Smi non-heap-number. Call
+ // the runtime.
+ __ bne(slow);
+ }
+
+ // Lhs is a smi, rhs is a number.
+ // Convert lhs to a double in d7.
+ __ SmiToDouble(d7, lhs);
+ // Load the double from rhs, tagged HeapNumber r2, to d6.
+ __ LoadF(d6, FieldMemOperand(rhs, HeapNumber::kValueOffset));
+
+ // We now have both loaded as doubles but we can skip the lhs nan check
+ // since it's a smi.
+ __ b(lhs_not_nan);
+
+ __ bind(&rhs_is_smi);
+ // Rhs is a smi. Check whether the non-smi lhs is a heap number.
+ __ CompareObjectType(lhs, r6, r6, HEAP_NUMBER_TYPE);
+ if (strict) {
+ // If lhs is not a number and rhs is a smi then strict equality cannot
+ // succeed. Return non-equal.
+ // If lhs is r2 then there is already a non zero value in it.
+ Label skip;
+ __ beq(&skip, Label::kNear);
+ if (!lhs.is(r2)) {
+ __ mov(r2, Operand(NOT_EQUAL));
+ }
+ __ Ret();
+ __ bind(&skip);
+ } else {
+ // Smi compared non-strictly with a non-smi non-heap-number. Call
+ // the runtime.
+ __ bne(slow);
+ }
+
+ // Rhs is a smi, lhs is a heap number.
+ // Load the double from lhs, tagged HeapNumber r3, to d7.
+ __ LoadF(d7, FieldMemOperand(lhs, HeapNumber::kValueOffset));
+ // Convert rhs to a double in d6.
+ __ SmiToDouble(d6, rhs);
+ // Fall through to both_loaded_as_doubles.
+}
+
+
+// See comment at call site.
+static void EmitStrictTwoHeapObjectCompare(MacroAssembler* masm, Register lhs,
+ Register rhs) {
+ DCHECK((lhs.is(r2) && rhs.is(r3)) || (lhs.is(r3) && rhs.is(r2)));
+
+ // If either operand is a JS object or an oddball value, then they are
+ // not equal since their pointers are different.
+ // There is no test for undetectability in strict equality.
+ STATIC_ASSERT(LAST_TYPE == LAST_SPEC_OBJECT_TYPE);
+ Label first_non_object;
+ // Get the type of the first operand into r4 and compare it with
+ // FIRST_SPEC_OBJECT_TYPE.
+ __ CompareObjectType(rhs, r4, r4, FIRST_SPEC_OBJECT_TYPE);
+ __ blt(&first_non_object, Label::kNear);
+
+ // Return non-zero (r2 is not zero)
+ Label return_not_equal;
+ __ bind(&return_not_equal);
+ __ Ret();
+
+ __ bind(&first_non_object);
+ // Check for oddballs: true, false, null, undefined.
+ __ CmpP(r4, Operand(ODDBALL_TYPE));
+ __ beq(&return_not_equal);
+
+ __ CompareObjectType(lhs, r5, r5, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(&return_not_equal);
+
+ // Check for oddballs: true, false, null, undefined.
+ __ CmpP(r5, Operand(ODDBALL_TYPE));
+ __ beq(&return_not_equal);
+
+ // Now that we have the types we might as well check for
+ // internalized-internalized.
+ STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
+ __ OrP(r4, r4, r5);
+ __ AndP(r0, r4, Operand(kIsNotStringMask | kIsNotInternalizedMask));
+ __ beq(&return_not_equal/*, cr0*/);
+}
+
+
+// See comment at call site.
+static void EmitCheckForTwoHeapNumbers(MacroAssembler* masm,
+ Register lhs, Register rhs,
+ Label* both_loaded_as_doubles,
+ Label* not_heap_numbers,
+ Label* slow) {
+ DCHECK((lhs.is(r2) && rhs.is(r3)) || (lhs.is(r3) && rhs.is(r2)));
+
+ __ CompareObjectType(rhs, r5, r4, HEAP_NUMBER_TYPE);
+ __ bne(not_heap_numbers);
+ __ LoadP(r4, FieldMemOperand(lhs, HeapObject::kMapOffset));
+ __ CmpP(r4, r5);
+ __ bne(slow); // First was a heap number, second wasn't. Go slow case.
+
+ // Both are heap numbers. Load them up then jump to the code we have
+ // for that.
+ __ LoadF(d6, FieldMemOperand(rhs, HeapNumber::kValueOffset));
+ __ LoadF(d7, FieldMemOperand(lhs, HeapNumber::kValueOffset));
+
+ __ b(both_loaded_as_doubles);
+}
+
+
+// Fast negative check for internalized-to-internalized equality.
+static void EmitCheckForInternalizedStringsOrObjects(MacroAssembler* masm,
+ Register lhs,
+ Register rhs,
+ Label* possible_strings,
+ Label* not_both_strings) {
+ DCHECK((lhs.is(r2) && rhs.is(r3)) ||
+ (lhs.is(r3) && rhs.is(r2)));
+
+ // r4 is object type of rhs.
+ Label object_test;
+ STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
+ __ mov(r0, Operand(kIsNotStringMask));
+ __ AndP(r0, r4);
+ __ bne(&object_test /*, cr0*/, Label::kNear);
+ __ mov(r0, Operand(kIsNotInternalizedMask));
+ __ AndP(r0, r4);
+ __ bne(possible_strings /*, cr0*/);
+ __ CompareObjectType(lhs, r5, r5, FIRST_NONSTRING_TYPE);
+ __ bge(not_both_strings);
+ __ mov(r0, Operand(kIsNotInternalizedMask));
+ __ AndP(r0, r5);
+ __ bne(possible_strings /*, cr0*/);
+
+ // Both are internalized. We already checked they weren't the same pointer
+ // so they are not equal.
+ __ LoadImmP(r2, Operand(NOT_EQUAL));
+ __ Ret();
+
+ __ bind(&object_test);
+ __ CmpP(r4, Operand(FIRST_SPEC_OBJECT_TYPE));
+ __ blt(not_both_strings);
+ __ CompareObjectType(lhs, r4, r5, FIRST_SPEC_OBJECT_TYPE);
+ __ blt(not_both_strings);
+ // If both objects are undetectable, they are equal. Otherwise, they
+ // are not equal, since they are different objects and an object is not
+ // equal to undefined.
+ __ LoadP(r5, FieldMemOperand(rhs, HeapObject::kMapOffset));
+ __ LoadlB(r4, FieldMemOperand(r4, Map::kBitFieldOffset));
+ __ LoadlB(r5, FieldMemOperand(r5, Map::kBitFieldOffset));
+ __ AndP(r2, r5, r4);
+ __ AndP(r2, Operand(1 << Map::kIsUndetectable));
+ __ XorP(r2, Operand(1 << Map::kIsUndetectable));
+ __ Ret();
+}
+
+
+static void CompareICStub_CheckInputType(MacroAssembler* masm, Register input,
+ Register scratch,
+ CompareICState::State expected,
+ Label* fail) {
+ Label ok;
+ if (expected == CompareICState::SMI) {
+ __ JumpIfNotSmi(input, fail);
+ } else if (expected == CompareICState::NUMBER) {
+ __ JumpIfSmi(input, &ok);
+ __ CheckMap(input, scratch, Heap::kHeapNumberMapRootIndex, fail,
+ DONT_DO_SMI_CHECK);
+ }
+ // We could be strict about internalized/non-internalized here, but as long as
+ // hydrogen doesn't care, the stub doesn't have to care either.
+ __ bind(&ok);
+}
+
+
+// On entry r3 and r4 are the values to be compared.
+// On exit r2 is 0, positive or negative to indicate the result of
+// the comparison.
+void CompareICStub::GenerateGeneric(MacroAssembler* masm) {
+ Register lhs = r3;
+ Register rhs = r2;
+ Condition cc = GetCondition();
+
+ Label miss;
+ CompareICStub_CheckInputType(masm, lhs, r4, left(), &miss);
+ CompareICStub_CheckInputType(masm, rhs, r5, right(), &miss);
+
+ Label slow; // Call builtin.
+ Label not_smis, both_loaded_as_doubles, lhs_not_nan;
+
+ Label not_two_smis, smi_done;
+ __ OrP(r4, r3, r2);
+ __ JumpIfNotSmi(r4, ¬_two_smis);
+ __ SmiUntag(r3);
+ __ SmiUntag(r2);
+ __ SubP(r2, r3, r2);
+ __ Ret();
+ __ bind(¬_two_smis);
+
+ // NOTICE! This code is only reached after a smi-fast-case check, so
+ // it is certain that at least one operand isn't a smi.
+
+ // Handle the case where the objects are identical. Either returns the answer
+ // or goes to slow. Only falls through if the objects were not identical.
+ EmitIdenticalObjectComparison(masm, &slow, cc, strength());
+
+ // If either is a Smi (we know that not both are), then they can only
+ // be strictly equal if the other is a HeapNumber.
+ STATIC_ASSERT(kSmiTag == 0);
+ DCHECK_EQ(static_cast<Smi*>(0), Smi::FromInt(0));
+ __ AndP(r4, lhs, rhs);
+ __ JumpIfNotSmi(r4, ¬_smis);
+ // One operand is a smi. EmitSmiNonsmiComparison generates code that can:
+ // 1) Return the answer.
+ // 2) Go to slow.
+ // 3) Fall through to both_loaded_as_doubles.
+ // 4) Jump to lhs_not_nan.
+ // In cases 3 and 4 we have found out we were dealing with a number-number
+ // comparison. The double values of the numbers have been loaded
+ // into d7 and d6.
+ EmitSmiNonsmiComparison(masm, lhs, rhs, &lhs_not_nan, &slow, strict());
+
+ __ bind(&both_loaded_as_doubles);
+ // The arguments have been converted to doubles and stored in d6 and d7
+ __ bind(&lhs_not_nan);
+ Label no_nan;
+ __ cdbr(d7, d6);
+
+ Label nan, equal, less_than;
+ __ bunordered(&nan);
+ __ beq(&equal, Label::kNear);
+ __ blt(&less_than, Label::kNear);
+ __ LoadImmP(r2, Operand(GREATER));
+ __ Ret();
+ __ bind(&equal);
+ __ LoadImmP(r2, Operand(EQUAL));
+ __ Ret();
+ __ bind(&less_than);
+ __ LoadImmP(r2, Operand(LESS));
+ __ Ret();
+
+ __ bind(&nan);
+ // If one of the sides was a NaN then the v flag is set. Load r2 with
+ // whatever it takes to make the comparison fail, since comparisons with NaN
+ // always fail.
+ if (cc == lt || cc == le) {
+ __ LoadImmP(r2, Operand(GREATER));
+ } else {
+ __ LoadImmP(r2, Operand(LESS));
+ }
+ __ Ret();
+
+ __ bind(¬_smis);
+ // At this point we know we are dealing with two different objects,
+ // and neither of them is a Smi. The objects are in rhs_ and lhs_.
+ if (strict()) {
+ // This returns non-equal for some object types, or falls through if it
+ // was not lucky.
+ EmitStrictTwoHeapObjectCompare(masm, lhs, rhs);
+ }
+
+ Label check_for_internalized_strings;
+ Label flat_string_check;
+ // Check for heap-number-heap-number comparison. Can jump to slow case,
+ // or load both doubles into r2, r3, r4, r5 and jump to the code that handles
+ // that case. If the inputs are not doubles then jumps to
+ // check_for_internalized_strings.
+ // In this case r4 will contain the type of rhs_. Never falls through.
+ EmitCheckForTwoHeapNumbers(masm, lhs, rhs, &both_loaded_as_doubles,
+ &check_for_internalized_strings,
+ &flat_string_check);
+
+ __ bind(&check_for_internalized_strings);
+ // In the strict case the EmitStrictTwoHeapObjectCompare already took care of
+ // internalized strings.
+ if (cc == eq && !strict()) {
+ // Returns an answer for two internalized strings or two detectable objects.
+ // Otherwise jumps to string case or not both strings case.
+ // Assumes that r4 is the type of rhs_ on entry.
+ EmitCheckForInternalizedStringsOrObjects(masm, lhs, rhs, &flat_string_check,
+ &slow);
+ }
+
+ // Check for both being sequential one-byte strings,
+ // and inline if that is the case.
+ __ bind(&flat_string_check);
+
+ __ JumpIfNonSmisNotBothSequentialOneByteStrings(lhs, rhs, r4, r5, &slow);
+
+ __ IncrementCounter(isolate()->counters()->string_compare_native(), 1, r4,
+ r5);
+ if (cc == eq) {
+ StringHelper::GenerateFlatOneByteStringEquals(masm, lhs, rhs, r4, r5);
+ } else {
+ StringHelper::GenerateCompareFlatOneByteStrings(masm, lhs, rhs, r4, r5, r6);
+ }
+ // Never falls through to here.
+
+ __ bind(&slow);
+
+ __ Push(lhs, rhs);
+ // Figure out which native to call and setup the arguments.
+ Builtins::JavaScript native;
+ if (cc == eq) {
+ native = strict() ? Builtins::STRICT_EQUALS : Builtins::EQUALS;
+ } else {
+ native =
+ is_strong(strength()) ? Builtins::COMPARE_STRONG : Builtins::COMPARE;
+ int ncr; // NaN compare result
+ if (cc == lt || cc == le) {
+ ncr = GREATER;
+ } else {
+ DCHECK(cc == gt || cc == ge); // remaining cases
+ ncr = LESS;
+ }
+ __ LoadSmiLiteral(r2, Smi::FromInt(ncr));
+ __ push(r2);
+ }
+
+ // Call the native; it returns -1 (less), 0 (equal), or 1 (greater)
+ // tagged as a small integer.
+ __ InvokeBuiltin(native, JUMP_FUNCTION);
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void StoreBufferOverflowStub::Generate(MacroAssembler* masm) {
+ // We don't allow a GC during a store buffer overflow so there is no need to
+ // store the registers in any particular way, but we do have to store and
+ // restore them.
+ __ LoadRR(r0, r14);
+ __ MultiPush(kJSCallerSaved | r0.bit());
+ if (save_doubles()) {
+ __ SaveFPRegs(sp, 0, DoubleRegister::kNumVolatileRegisters);
+ }
+ const int argument_count = 1;
+ const int fp_argument_count = 0;
+ const Register scratch = r3;
+
+ AllowExternalCallThatCantCauseGC scope(masm);
+ __ PrepareCallCFunction(argument_count, fp_argument_count, scratch);
+ __ mov(r2, Operand(ExternalReference::isolate_address(isolate())));
+ __ CallCFunction(ExternalReference::store_buffer_overflow_function(isolate()),
+ argument_count);
+ if (save_doubles()) {
+ __ RestoreFPRegs(sp, 0, DoubleRegister::kNumVolatileRegisters);
+ }
+ __ MultiPop(kJSCallerSaved | r0.bit());
+ __ LoadRR(r14, r0);
+ __ Ret();
+}
+
+
+void StoreRegistersStateStub::Generate(MacroAssembler* masm) {
+ __ PushSafepointRegisters();
+ __ b(r14);
+}
+
+
+void RestoreRegistersStateStub::Generate(MacroAssembler* masm) {
+ __ PopSafepointRegisters();
+ __ b(r14);
+}
+
+
+void MathPowStub::Generate(MacroAssembler* masm) {
+ const Register base = r3;
+ const Register exponent = MathPowTaggedDescriptor::exponent();
+ DCHECK(exponent.is(r4));
+ const Register heapnumbermap = r7;
+ const Register heapnumber = r2;
+ const DoubleRegister double_base = d1;
+ const DoubleRegister double_exponent = d2;
+ const DoubleRegister double_result = d3;
+ const DoubleRegister double_scratch = d0;
+ const Register scratch = r1;
+ const Register scratch2 = r9;
+
+ Label call_runtime, done, int_exponent;
+ if (exponent_type() == ON_STACK) {
+ Label base_is_smi, unpack_exponent;
+ // The exponent and base are supplied as arguments on the stack.
+ // This can only happen if the stub is called from non-optimized code.
+ // Load input parameters from stack to double registers.
+ __ LoadP(base, MemOperand(sp, 1 * kPointerSize));
+ __ LoadP(exponent, MemOperand(sp, 0 * kPointerSize));
+
+ __ LoadRoot(heapnumbermap, Heap::kHeapNumberMapRootIndex);
+
+ __ UntagAndJumpIfSmi(scratch, base, &base_is_smi);
+ __ LoadP(scratch, FieldMemOperand(base, JSObject::kMapOffset));
+ __ CmpP(scratch, heapnumbermap);
+ __ bne(&call_runtime);
+
+ __ LoadF(double_base, FieldMemOperand(base, HeapNumber::kValueOffset));
+ __ b(&unpack_exponent, Label::kNear);
+
+ __ bind(&base_is_smi);
+ __ ConvertIntToDouble(scratch, double_base);
+ __ bind(&unpack_exponent);
+
+ __ UntagAndJumpIfSmi(scratch, exponent, &int_exponent);
+ __ LoadP(scratch, FieldMemOperand(exponent, JSObject::kMapOffset));
+ __ CmpP(scratch, heapnumbermap);
+ __ bne(&call_runtime);
+
+ __ LoadF(double_exponent,
+ FieldMemOperand(exponent, HeapNumber::kValueOffset));
+ } else if (exponent_type() == TAGGED) {
+ // Base is already in double_base.
+ __ UntagAndJumpIfSmi(scratch, exponent, &int_exponent);
+
+ __ LoadF(double_exponent,
+ FieldMemOperand(exponent, HeapNumber::kValueOffset));
+ }
+
+ if (exponent_type() != INTEGER) {
+ // Detect integer exponents stored as double.
+ __ TryDoubleToInt32Exact(scratch, double_exponent, scratch2,
+ double_scratch);
+ __ beq(&int_exponent, Label::kNear);
+
+ if (exponent_type() == ON_STACK) {
+ // Detect square root case. Crankshaft detects constant +/-0.5 at
+ // compile time and uses DoMathPowHalf instead. We then skip this check
+ // for non-constant cases of +/-0.5 as these hardly occur.
+ Label not_plus_half, not_minus_inf1, not_minus_inf2;
+
+ // Test for 0.5.
+ __ LoadDoubleLiteral(double_scratch, 0.5, scratch);
+ __ cdbr(double_exponent, double_scratch);
+ __ bne(¬_plus_half, Label::kNear);
+
+ // Calculates square root of base. Check for the special case of
+ // Math.pow(-Infinity, 0.5) == Infinity (ECMA spec, 15.8.2.13).
+ __ LoadDoubleLiteral(double_scratch, -V8_INFINITY, scratch);
+ __ cdbr(double_base, double_scratch);
+ __ bne(¬_minus_inf1, Label::kNear);
+ __ lcdbr(double_result, double_scratch);
+ __ b(&done);
+ __ bind(¬_minus_inf1);
+
+ // Add +0 to convert -0 to +0.
+ __ ldr(double_scratch, double_base);
+ __ lzdr(kDoubleRegZero);
+ __ adbr(double_scratch, kDoubleRegZero);
+ __ sqdbr(double_result, double_scratch);
+ __ b(&done);
+
+ __ bind(¬_plus_half);
+ __ LoadDoubleLiteral(double_scratch, -0.5, scratch);
+ __ cdbr(double_exponent, double_scratch);
+ __ bne(&call_runtime);
+
+ // Calculates square root of base. Check for the special case of
+ // Math.pow(-Infinity, -0.5) == 0 (ECMA spec, 15.8.2.13).
+ __ LoadDoubleLiteral(double_scratch, -V8_INFINITY, scratch);
+ __ cdbr(double_base, double_scratch);
+ __ bne(¬_minus_inf2, Label::kNear);
+ __ ldr(double_result, kDoubleRegZero);
+ __ b(&done);
+ __ bind(¬_minus_inf2);
+
+ // Add +0 to convert -0 to +0.
+ __ ldr(double_scratch, double_base);
+ __ lzdr(kDoubleRegZero);
+ __ adbr(double_scratch, kDoubleRegZero);
+ __ LoadDoubleLiteral(double_result, 1.0, scratch);
+ __ sqdbr(double_scratch, double_scratch);
+ __ ddbr(double_result, double_scratch);
+ __ b(&done);
+ }
+
+ __ push(r14);
+ {
+ AllowExternalCallThatCantCauseGC scope(masm);
+ __ PrepareCallCFunction(0, 2, scratch);
+ __ MovToFloatParameters(double_base, double_exponent);
+ __ CallCFunction(
+ ExternalReference::power_double_double_function(isolate()), 0, 2);
+ }
+ __ pop(r14);
+ __ MovFromFloatResult(double_result);
+ __ b(&done);
+ }
+
+ // Calculate power with integer exponent.
+ __ bind(&int_exponent);
+
+ // Get two copies of exponent in the registers scratch and exponent.
+ if (exponent_type() == INTEGER) {
+ __ LoadRR(scratch, exponent);
+ } else {
+ // Exponent has previously been stored into scratch as untagged integer.
+ __ LoadRR(exponent, scratch);
+ }
+ __ ldr(double_scratch, double_base); // Back up base.
+ __ LoadImmP(scratch2, Operand(1));
+ __ ConvertIntToDouble(scratch2, double_result);
+
+ // Get absolute value of exponent.
+ Label positive_exponent;
+ __ CmpP(scratch, Operand::Zero());
+ __ bge(&positive_exponent, Label::kNear);
+ __ LoadComplementRR(scratch, scratch);
+ __ bind(&positive_exponent);
+
+ Label while_true, no_carry, loop_end;
+ __ bind(&while_true);
+ __ mov(scratch2, Operand(1));
+ __ AndP(scratch2, scratch);
+ __ beq(&no_carry /*, cr0*/, Label::kNear);
+ __ mdbr(double_result, double_scratch);
+ __ bind(&no_carry);
+ __ ShiftRightArithP(scratch, scratch, Operand(1));
+ __ beq(&loop_end /*, cr0*/, Label::kNear);
+ __ mdbr(double_scratch, double_scratch);
+ __ b(&while_true);
+ __ bind(&loop_end);
+
+ __ CmpP(exponent, Operand::Zero());
+ __ bge(&done);
+
+ // get 1/double_result:
+ __ ldr(double_scratch, double_result);
+ __ LoadImmP(scratch2, Operand(1));
+ __ ConvertIntToDouble(scratch2, double_result);
+ __ ddbr(double_result, double_scratch);
+
+ // Test whether result is zero. Bail out to check for subnormal result.
+ // Due to subnormals, x^-y == (1/x)^y does not hold in all cases.
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(double_result, kDoubleRegZero);
+ __ bne(&done, Label::kNear);
+ // double_exponent may not containe the exponent value if the input was a
+ // smi. We set it with exponent value before bailing out.
+ __ ConvertIntToDouble(exponent, double_exponent);
+
+ // Returning or bailing out.
+ Counters* counters = isolate()->counters();
+ if (exponent_type() == ON_STACK) {
+ // The arguments are still on the stack.
+ __ bind(&call_runtime);
+ __ TailCallRuntime(Runtime::kMathPowRT, 2, 1);
+
+ // The stub is called from non-optimized code, which expects the result
+ // as heap number in exponent.
+ __ bind(&done);
+ __ AllocateHeapNumber(heapnumber, scratch, scratch2, heapnumbermap,
+ &call_runtime);
+ __ StoreF(double_result,
+ FieldMemOperand(heapnumber, HeapNumber::kValueOffset));
+ DCHECK(heapnumber.is(r2));
+ __ IncrementCounter(counters->math_pow(), 1, scratch, scratch2);
+ __ Ret(2);
+ } else {
+ __ push(r14);
+ {
+ AllowExternalCallThatCantCauseGC scope(masm);
+ __ PrepareCallCFunction(0, 2, scratch);
+ __ MovToFloatParameters(double_base, double_exponent);
+ __ CallCFunction(
+ ExternalReference::power_double_double_function(isolate()), 0, 2);
+ }
+ __ pop(r14);
+ __ MovFromFloatResult(double_result);
+
+ __ bind(&done);
+ __ IncrementCounter(counters->math_pow(), 1, scratch, scratch2);
+ __ Ret();
+ }
+}
+
+
+bool CEntryStub::NeedsImmovableCode() { return true; }
+
+
+void CodeStub::GenerateStubsAheadOfTime(Isolate* isolate) {
+ CEntryStub::GenerateAheadOfTime(isolate);
+ StoreBufferOverflowStub::GenerateFixedRegStubsAheadOfTime(isolate);
+ StubFailureTrampolineStub::GenerateAheadOfTime(isolate);
+ ArrayConstructorStubBase::GenerateStubsAheadOfTime(isolate);
+ CreateAllocationSiteStub::GenerateAheadOfTime(isolate);
+ CreateWeakCellStub::GenerateAheadOfTime(isolate);
+ BinaryOpICStub::GenerateAheadOfTime(isolate);
+ StoreRegistersStateStub::GenerateAheadOfTime(isolate);
+ RestoreRegistersStateStub::GenerateAheadOfTime(isolate);
+ BinaryOpICWithAllocationSiteStub::GenerateAheadOfTime(isolate);
+ StoreFastElementStub::GenerateAheadOfTime(isolate);
+ TypeofStub::GenerateAheadOfTime(isolate);
+}
+
+
+void StoreRegistersStateStub::GenerateAheadOfTime(Isolate* isolate) {
+ StoreRegistersStateStub stub(isolate);
+ stub.GetCode();
+}
+
+
+void RestoreRegistersStateStub::GenerateAheadOfTime(Isolate* isolate) {
+ RestoreRegistersStateStub stub(isolate);
+ stub.GetCode();
+}
+
+
+void CodeStub::GenerateFPStubs(Isolate* isolate) {
+ SaveFPRegsMode mode = kSaveFPRegs;
+ CEntryStub(isolate, 1, mode).GetCode();
+ StoreBufferOverflowStub(isolate, mode).GetCode();
+ isolate->set_fp_stubs_generated(true);
+}
+
+
+void CEntryStub::GenerateAheadOfTime(Isolate* isolate) {
+ CEntryStub stub(isolate, 1, kDontSaveFPRegs);
+ stub.GetCode();
+}
+
+
+void CEntryStub::Generate(MacroAssembler* masm) {
+ // Called from JavaScript; parameters are on stack as if calling JS function.
+ // r2: number of arguments including receiver
+ // r3: pointer to builtin function
+ // fp: frame pointer (restored after C call)
+ // sp: stack pointer (restored as callee's sp after C call)
+ // cp: current context (C callee-saved)
+
+ ProfileEntryHookStub::MaybeCallEntryHook(masm);
+
+ __ LoadRR(r7, r3);
+
+ // Compute the argv pointer.
+ __ ShiftLeftP(r3, r2, Operand(kPointerSizeLog2));
+ __ lay(r3, MemOperand(r3, sp, -kPointerSize));
+
+
+ // Enter the exit frame that transitions from JavaScript to C++.
+ FrameScope scope(masm, StackFrame::MANUAL);
+
+ // Need at least one extra slot for return address location.
+ int arg_stack_space = 1;
+
+#if V8_TARGET_ARCH_S390X && !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
+ // Pass buffer for return value on stack if necessary
+ if (result_size() > 1) {
+ DCHECK_EQ(2, result_size());
+ arg_stack_space += 2;
+ }
+#endif
+#if V8_TARGET_ARCH_S390X
+
+ // 64-bit linux pass Argument object by reference not value
+ arg_stack_space += 2;
+#endif
+
+ __ EnterExitFrame(save_doubles(), arg_stack_space);
+
+ // Store a copy of argc, argv in callee-saved registers for later.
+ __ LoadRR(r6, r2);
+ __ LoadRR(r8, r3);
+ // r2, r6: number of arguments including receiver (C callee-saved)
+ // r3, r8: pointer to the first argument
+ // r7: pointer to builtin function (C callee-saved)
+
+ // Result returned in registers or stack, depending on result size and ABI.
+
+ Register isolate_reg = r4;
+#if V8_TARGET_ARCH_S390X && !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
+ if (result_size() > 1) {
+ // The return value is 16-byte non-scalar value.
+ // Use frame storage reserved by calling function to pass return
+ // buffer as implicit first argument.
+ __ LoadRR(r4, r3);
+ __ LoadRR(r3, r2);
+ __ la(r2, MemOperand(sp, (kStackFrameExtraParamSlot + 1) * kPointerSize));
+ isolate_reg = r5;
+ }
+#endif
+ // Call C built-in.
+ __ mov(isolate_reg, Operand(ExternalReference::isolate_address(isolate())));
+
+ Register target = r7;
+
+ // To let the GC traverse the return address of the exit frames, we need to
+ // know where the return address is. The CEntryStub is unmovable, so
+ // we can store the address on the stack to be able to find it again and
+ // we never have to restore it, because it will not change.
+ { Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm);
+ Label return_label;
+ __ larl(r14, &return_label); // Generate the return addr of call later.
+ __ StoreP(r14, MemOperand(sp, kStackFrameRASlot * kPointerSize));
+
+ // zLinux ABI requires caller's frame to have sufficient space for callee
+ // preserved regsiter save area.
+ // __ lay(sp, MemOperand(sp, -kCalleeRegisterSaveAreaSize));
+ __ positions_recorder()->WriteRecordedPositions();
+ __ b(target);
+ __ bind(&return_label);
+ // __ la(sp, MemOperand(sp, +kCalleeRegisterSaveAreaSize));
+ }
+
+#if V8_TARGET_ARCH_S390X && !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
+ // If return value is on the stack, pop it to registers.
+ if (result_size() > 1) {
+ __ LoadP(r3, MemOperand(r2, kPointerSize));
+ __ LoadP(r2, MemOperand(r2));
+ }
+#endif
+
+ // Check result for exception sentinel.
+ Label exception_returned;
+ __ CompareRoot(r2, Heap::kExceptionRootIndex);
+ __ beq(&exception_returned, Label::kNear);
+
+ // Check that there is no pending exception, otherwise we
+ // should have returned the exception sentinel.
+ if (FLAG_debug_code) {
+ Label okay;
+ ExternalReference pending_exception_address(
+ Isolate::kPendingExceptionAddress, isolate());
+ __ mov(r4, Operand(pending_exception_address));
+ __ LoadP(r4, MemOperand(r4));
+ __ CompareRoot(r4, Heap::kTheHoleValueRootIndex);
+ // Cannot use check here as it attempts to generate call into runtime.
+ __ beq(&okay, Label::kNear);
+ __ stop("Unexpected pending exception");
+ __ bind(&okay);
+ }
+
+ // Exit C frame and return.
+ // r2:r3: result
+ // sp: stack pointer
+ // fp: frame pointer
+ // r6: still holds argc (callee-saved).
+ __ LeaveExitFrame(save_doubles(), r6, true);
+ __ b(r14);
+
+ // Handling of exception.
+ __ bind(&exception_returned);
+
+ ExternalReference pending_handler_context_address(
+ Isolate::kPendingHandlerContextAddress, isolate());
+ ExternalReference pending_handler_code_address(
+ Isolate::kPendingHandlerCodeAddress, isolate());
+ ExternalReference pending_handler_offset_address(
+ Isolate::kPendingHandlerOffsetAddress, isolate());
+ ExternalReference pending_handler_fp_address(
+ Isolate::kPendingHandlerFPAddress, isolate());
+ ExternalReference pending_handler_sp_address(
+ Isolate::kPendingHandlerSPAddress, isolate());
+
+ // Ask the runtime for help to determine the handler. This will set r3 to
+ // contain the current pending exception, don't clobber it.
+ ExternalReference find_handler(Runtime::kUnwindAndFindExceptionHandler,
+ isolate());
+ {
+ FrameScope scope(masm, StackFrame::MANUAL);
+ __ PrepareCallCFunction(3, 0, r2);
+ __ LoadImmP(r2, Operand::Zero());
+ __ LoadImmP(r3, Operand::Zero());
+ __ mov(r4, Operand(ExternalReference::isolate_address(isolate())));
+ __ CallCFunction(find_handler, 3);
+ }
+
+ // Retrieve the handler context, SP and FP.
+ __ mov(cp, Operand(pending_handler_context_address));
+ __ LoadP(cp, MemOperand(cp));
+ __ mov(sp, Operand(pending_handler_sp_address));
+ __ LoadP(sp, MemOperand(sp));
+ __ mov(fp, Operand(pending_handler_fp_address));
+ __ LoadP(fp, MemOperand(fp));
+
+ // If the handler is a JS frame, restore the context to the frame. Note that
+ // the context will be set to (cp == 0) for non-JS frames.
+ Label skip;
+ __ CmpP(cp, Operand::Zero());
+ __ beq(&skip, Label::kNear);
+ __ StoreP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ bind(&skip);
+
+ // Compute the handler entry address and jump to it.
+ __ mov(r3, Operand(pending_handler_code_address));
+ __ LoadP(r3, MemOperand(r3));
+ __ mov(r4, Operand(pending_handler_offset_address));
+ __ LoadP(r4, MemOperand(r4));
+ __ AddP(r3, r3, Operand(Code::kHeaderSize - kHeapObjectTag)); // Code start
+ __ AddP(ip, r3, r4);
+ __ Jump(ip);
+}
+
+
+void JSEntryStub::Generate(MacroAssembler* masm) {
+ // r2: code entry
+ // r3: function
+ // r4: receiver
+ // r5: argc
+ // r6: argv
+
+ Label invoke, handler_entry, exit;
+
+ ProfileEntryHookStub::MaybeCallEntryHook(masm);
+
+ // saving floating point registers
+#if V8_TARGET_ARCH_S390X
+ // 64bit ABI requires f8 to f15 be saved
+ __ lay(sp, MemOperand(sp, -8 * kDoubleSize));
+ __ std(d8, MemOperand(sp));
+ __ std(d9, MemOperand(sp, 1 * kDoubleSize));
+ __ std(d10, MemOperand(sp, 2 * kDoubleSize));
+ __ std(d11, MemOperand(sp, 3 * kDoubleSize));
+ __ std(d12, MemOperand(sp, 4 * kDoubleSize));
+ __ std(d13, MemOperand(sp, 5 * kDoubleSize));
+ __ std(d14, MemOperand(sp, 6 * kDoubleSize));
+ __ std(d15, MemOperand(sp, 7 * kDoubleSize));
+#else
+ // 31bit ABI requires you to store f4 and f6:
+ // http://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_s390.html#AEN417
+ __ lay(sp, MemOperand(sp, -2 * kDoubleSize));
+ __ std(d4, MemOperand(sp));
+ __ std(d6, MemOperand(sp, kDoubleSize));
+#endif
+
+ // zLinux ABI
+ // Incoming parameters:
+ // r2: code entry
+ // r3: function
+ // r4: receiver
+ // r5: argc
+ // r6: argv
+ // Requires us to save the callee-preserved registers r6-r13
+ // General convention is to also save r14 (return addr) and
+ // sp/r15 as well in a single STM/STMG
+ __ lay(sp, MemOperand(sp, -10 * kPointerSize));
+ __ StoreMultipleP(r6, sp, MemOperand(sp, 0));
+
+
+
+ // int offset_to_argv = kPointerSize * 22; // matches (22*4) above
+ // __ LoadlW(r7, MemOperand(sp, offset_to_argv));
+
+ // Push a frame with special values setup to mark it as an entry frame.
+ // Bad FP (-1)
+ // SMI Marker
+ // SMI Marker
+ // kCEntryFPAddress
+ // Frame type
+ __ lay(sp, MemOperand(sp, -5 * kPointerSize));
+ // Push a bad frame pointer to fail if it is used.
+ __ LoadImmP(r10, Operand(-1));
+
+ int marker = type();
+ __ LoadSmiLiteral(r9, Smi::FromInt(marker));
+ __ LoadSmiLiteral(r8, Smi::FromInt(marker));
+ // Save copies of the top frame descriptor on the stack.
+ __ mov(r7, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ __ LoadP(r7, MemOperand(r7));
+ __ StoreMultipleP(r7, r10, MemOperand(sp, kPointerSize));
+ // Set up frame pointer for the frame to be pushed.
+ // Need to add kPointerSize, because sp has one extra
+ // frame already for the frame type being pushed later.
+ __ lay(fp, MemOperand(sp, -EntryFrameConstants::kCallerFPOffset +
+ kPointerSize));
+
+
+ // If this is the outermost JS call, set js_entry_sp value.
+ Label non_outermost_js;
+ ExternalReference js_entry_sp(Isolate::kJSEntrySPAddress, isolate());
+ __ mov(r7, Operand(ExternalReference(js_entry_sp)));
+ __ LoadAndTestP(r8, MemOperand(r7));
+ __ bne(&non_outermost_js, Label::kNear);
+ __ StoreP(fp, MemOperand(r7));
+ __ LoadSmiLiteral(ip, Smi::FromInt(StackFrame::OUTERMOST_JSENTRY_FRAME));
+ Label cont;
+ __ b(&cont, Label::kNear);
+ __ bind(&non_outermost_js);
+ __ LoadSmiLiteral(ip, Smi::FromInt(StackFrame::INNER_JSENTRY_FRAME));
+
+ __ bind(&cont);
+ __ StoreP(ip, MemOperand(sp)); // frame-type
+
+ // Jump to a faked try block that does the invoke, with a faked catch
+ // block that sets the pending exception.
+ __ b(&invoke, Label::kNear);
+
+ __ bind(&handler_entry);
+ handler_offset_ = handler_entry.pos();
+ // Caught exception: Store result (exception) in the pending exception
+ // field in the JSEnv and return a failure sentinel. Coming in here the
+ // fp will be invalid because the PushStackHandler below sets it to 0 to
+ // signal the existence of the JSEntry frame.
+ __ mov(ip, Operand(ExternalReference(Isolate::kPendingExceptionAddress,
+ isolate())));
+
+ __ StoreP(r2, MemOperand(ip));
+ __ LoadRoot(r2, Heap::kExceptionRootIndex);
+ __ b(&exit, Label::kNear);
+
+ // Invoke: Link this frame into the handler chain.
+ __ bind(&invoke);
+ // Must preserve r2-r6.
+ __ PushStackHandler();
+ // If an exception not caught by another handler occurs, this handler
+ // returns control to the code after the b(&invoke) above, which
+ // restores all kCalleeSaved registers (including cp and fp) to their
+ // saved values before returning a failure to C.
+
+ // Clear any pending exceptions.
+ __ mov(ip, Operand(ExternalReference(Isolate::kPendingExceptionAddress,
+ isolate())));
+ __ mov(r7, Operand(isolate()->factory()->the_hole_value()));
+ __ StoreP(r7, MemOperand(ip));
+
+ // Invoke the function by calling through JS entry trampoline builtin.
+ // Notice that we cannot store a reference to the trampoline code directly in
+ // this stub, because runtime stubs are not traversed when doing GC.
+
+ // Expected registers by Builtins::JSEntryTrampoline
+ // r2: code entry
+ // r3: function
+ // r4: receiver
+ // r5: argc
+ // r6: argv
+ if (type() == StackFrame::ENTRY_CONSTRUCT) {
+ ExternalReference construct_entry(Builtins::kJSConstructEntryTrampoline,
+ isolate());
+ __ mov(ip, Operand(construct_entry));
+ } else {
+ ExternalReference entry(Builtins::kJSEntryTrampoline, isolate());
+ __ mov(ip, Operand(entry));
+ }
+ __ LoadP(ip, MemOperand(ip)); // deref address
+
+ // Branch and link to JSEntryTrampoline.
+ // the address points to the start of the code object, skip the header
+ __ AddP(ip, Operand(Code::kHeaderSize - kHeapObjectTag));
+ Label return_addr;
+ // __ basr(r14, ip);
+ __ larl(r14, &return_addr);
+ __ b(ip);
+ __ bind(&return_addr);
+
+ // Unlink this frame from the handler chain.
+ __ PopStackHandler();
+
+ __ bind(&exit); // r2 holds result
+ // Check if the current stack frame is marked as the outermost JS frame.
+ Label non_outermost_js_2;
+ __ pop(r7);
+ __ CmpSmiLiteral(r7, Smi::FromInt(StackFrame::OUTERMOST_JSENTRY_FRAME), r0);
+ __ bne(&non_outermost_js_2, Label::kNear);
+ __ mov(r8, Operand::Zero());
+ __ mov(r7, Operand(ExternalReference(js_entry_sp)));
+ __ StoreP(r8, MemOperand(r7));
+ __ bind(&non_outermost_js_2);
+
+ // Restore the top frame descriptors from the stack.
+ __ pop(r5);
+ __ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ __ StoreP(r5, MemOperand(ip));
+
+ // Reset the stack to the callee saved registers.
+ __ lay(sp, MemOperand(sp, -EntryFrameConstants::kCallerFPOffset));
+
+// Restore callee-saved registers and return.
+#ifdef DEBUG
+ if (FLAG_debug_code) {
+ Label here;
+ __ b(r14, &here /*, SetLK*/);
+ __ bind(&here);
+ }
+#endif
+
+ // Reload callee-saved preserved regs, return address reg (r14) and sp
+ __ LoadMultipleP(r6, sp, MemOperand(sp, 0));
+ __ la(sp, MemOperand(sp, 10 * kPointerSize));
+
+ // saving floating point registers
+#if V8_TARGET_ARCH_S390X
+ // 64bit ABI requires f8 to f15 be saved
+ __ ld(d8, MemOperand(sp));
+ __ ld(d9, MemOperand(sp, 1 * kDoubleSize));
+ __ ld(d10, MemOperand(sp, 2 * kDoubleSize));
+ __ ld(d11, MemOperand(sp, 3 * kDoubleSize));
+ __ ld(d12, MemOperand(sp, 4 * kDoubleSize));
+ __ ld(d13, MemOperand(sp, 5 * kDoubleSize));
+ __ ld(d14, MemOperand(sp, 6 * kDoubleSize));
+ __ ld(d15, MemOperand(sp, 7 * kDoubleSize));
+ __ la(sp, MemOperand(sp, 8 * kDoubleSize));
+#else
+ // 31bit ABI requires you to store f4 and f6:
+ // http://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_s390.html#AEN417
+ __ ld(d4, MemOperand(sp));
+ __ ld(d6, MemOperand(sp, kDoubleSize));
+ __ la(sp, MemOperand(sp, 2 * kDoubleSize));
+#endif
+
+ __ b(r14);
+}
+
+
+// Uses registers r2 to r6.
+// Expected input (depending on whether args are in registers or on the stack):
+// * object: r2 or at sp + 1 * kPointerSize.
+// * function: r3 or at sp.
+//
+// An inlined call site may have been generated before calling this stub.
+// In this case the offset to the inline site to patch is passed in r7.
+// (See LCodeGen::DoInstanceOfKnownGlobal)
+void InstanceofStub::Generate(MacroAssembler* masm) {
+ // Call site inlining and patching implies arguments in registers.
+ DCHECK(HasArgsInRegisters() || !HasCallSiteInlineCheck());
+
+ // Fixed register usage throughout the stub:
+ const Register object = r2; // Object (lhs).
+ Register map = r5; // Map of the object.
+ const Register function = r3; // Function (rhs).
+ const Register prototype = r6; // Prototype of the function.
+ // The map_check_delta was stored in r7
+ // The bool_load_delta was stored in r8
+ // (See LCodeGen::DoDeferredLInstanceOfKnownGlobal).
+ const Register map_check_delta = r7;
+ const Register bool_load_delta = r8;
+ const Register inline_site = r9;
+ const Register scratch = r4;
+ Register scratch3 = no_reg;
+
+// // delta = mov + unaligned LoadP + cmp + bne
+// #if V8_TARGET_ARCH_S390X
+// const int32_t kDeltaToLoadBoolResult = 28; // IIHF + IILF + LG + CR + BRCL
+// #else
+// const int32_t kDeltaToLoadBoolResult = 18; // IILF + L + CR + BRCL
+// #endif
+//
+ Label slow, loop, is_instance, is_not_instance, not_js_object;
+
+ if (!HasArgsInRegisters()) {
+ __ LoadP(object, MemOperand(sp, 1 * kPointerSize));
+ __ LoadP(function, MemOperand(sp, 0));
+ }
+
+ // Check that the left hand is a JS object and load map.
+ __ JumpIfSmi(object, ¬_js_object);
+ __ IsObjectJSObjectType(object, map, scratch, ¬_js_object);
+
+ // If there is a call site cache don't look in the global cache, but do the
+ // real lookup and update the call site cache.
+ if (!HasCallSiteInlineCheck() && !ReturnTrueFalseObject()) {
+ Label miss;
+ __ CompareRoot(function, Heap::kInstanceofCacheFunctionRootIndex);
+ __ bne(&miss, Label::kNear);
+ __ CompareRoot(map, Heap::kInstanceofCacheMapRootIndex);
+ __ bne(&miss, Label::kNear);
+ __ LoadRoot(r2, Heap::kInstanceofCacheAnswerRootIndex);
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ __ bind(&miss);
+ }
+
+ // Get the prototype of the function.
+ __ TryGetFunctionPrototype(function, prototype, scratch, &slow, true);
+
+ // Check that the function prototype is a JS object.
+ __ JumpIfSmi(prototype, &slow);
+ __ IsObjectJSObjectType(prototype, scratch, scratch, &slow);
+
+ // Update the global instanceof or call site inlined cache with the current
+ // map and function. The cached answer will be set when it is known below.
+ if (!HasCallSiteInlineCheck()) {
+ __ StoreRoot(function, Heap::kInstanceofCacheFunctionRootIndex);
+ __ StoreRoot(map, Heap::kInstanceofCacheMapRootIndex);
+ } else {
+ DCHECK(HasArgsInRegisters());
+ // Patch the (relocated) inlined map check.
+
+ const Register offset = map_check_delta;
+ __ CleanseP(r14);
+ __ LoadRR(inline_site, r14);
+ __ SubP(inline_site, inline_site, offset);
+ // Get the map location in offset and patch it.
+ __ GetRelocatedValue(inline_site, offset, scratch);
+ __ StoreP(map,
+ FieldMemOperand(offset, Cell::kValueOffset));
+
+ __ LoadRR(scratch, map);
+ __ RecordWriteField(offset, Cell::kValueOffset, scratch, function,
+ kLRHasNotBeenSaved, kDontSaveFPRegs,
+ OMIT_REMEMBERED_SET, OMIT_SMI_CHECK);
+ }
+
+ // Register mapping: r5 is object map and r6 is function prototype.
+ // Get prototype of object into r4.
+ __ LoadP(scratch, FieldMemOperand(map, Map::kPrototypeOffset));
+
+ // We don't need map any more. Use it as a scratch register.
+ scratch3 = map;
+ map = no_reg;
+
+ // Loop through the prototype chain looking for the function prototype.
+ __ LoadRoot(scratch3, Heap::kNullValueRootIndex);
+ __ bind(&loop);
+ __ CmpP(scratch, prototype);
+ __ beq(&is_instance, Label::kNear);
+ __ CmpP(scratch, scratch3);
+ __ beq(&is_not_instance, Label::kNear);
+ __ LoadP(scratch, FieldMemOperand(scratch, HeapObject::kMapOffset));
+ __ LoadP(scratch, FieldMemOperand(scratch, Map::kPrototypeOffset));
+ __ b(&loop);
+ Factory* factory = isolate()->factory();
+
+ __ bind(&is_instance);
+ if (!HasCallSiteInlineCheck()) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(0));
+ __ StoreRoot(r2, Heap::kInstanceofCacheAnswerRootIndex);
+ if (ReturnTrueFalseObject()) {
+ __ Move(r2, factory->true_value());
+ }
+ } else {
+ // Patch the call site to return true.
+ __ LoadRoot(r2, Heap::kTrueValueRootIndex);
+ __ AddP(inline_site, inline_site, bool_load_delta);
+ // Get the boolean result location in scratch and patch it.
+ __ SetRelocatedValue(inline_site, scratch, r2);
+
+ if (!ReturnTrueFalseObject()) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(0));
+ }
+ }
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ __ bind(&is_not_instance);
+ if (!HasCallSiteInlineCheck()) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(1));
+ __ StoreRoot(r2, Heap::kInstanceofCacheAnswerRootIndex);
+ if (ReturnTrueFalseObject()) {
+ __ Move(r2, factory->false_value());
+ }
+ } else {
+ // Patch the call site to return false.
+ __ LoadRoot(r2, Heap::kFalseValueRootIndex);
+ __ AddP(inline_site, inline_site, bool_load_delta);
+ // Get the boolean result location in scratch and patch it.
+ __ SetRelocatedValue(inline_site, scratch, r2);
+
+ if (!ReturnTrueFalseObject()) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(1));
+ }
+ }
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ Label object_not_null, object_not_null_or_smi;
+ __ bind(¬_js_object);
+ // Before null, smi and string value checks, check that the rhs is a function
+ // as for a non-function rhs an exception needs to be thrown.
+ __ JumpIfSmi(function, &slow);
+ __ CompareObjectType(function, scratch3, scratch, JS_FUNCTION_TYPE);
+ __ bne(&slow);
+
+ // Null is not instance of anything.
+ __ CmpP(object, Operand(isolate()->factory()->null_value()));
+ __ bne(&object_not_null, Label::kNear);
+ if (ReturnTrueFalseObject()) {
+ __ Move(r2, factory->false_value());
+ } else {
+ __ LoadSmiLiteral(r2, Smi::FromInt(1));
+ }
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ __ bind(&object_not_null);
+ // Smi values are not instances of anything.
+ __ JumpIfNotSmi(object, &object_not_null_or_smi);
+ if (ReturnTrueFalseObject()) {
+ __ Move(r2, factory->false_value());
+ } else {
+ __ LoadSmiLiteral(r2, Smi::FromInt(1));
+ }
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ __ bind(&object_not_null_or_smi);
+ // String values are not instances of anything.
+ __ IsObjectJSStringType(object, scratch, &slow);
+ if (ReturnTrueFalseObject()) {
+ __ Move(r2, factory->false_value());
+ } else {
+ __ LoadSmiLiteral(r2, Smi::FromInt(1));
+ }
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+
+ // Slow-case. Tail call builtin.
+ __ bind(&slow);
+ if (!ReturnTrueFalseObject()) {
+ if (HasArgsInRegisters()) {
+ __ Push(r2, r3);
+ }
+ __ InvokeBuiltin(Builtins::INSTANCE_OF, JUMP_FUNCTION);
+ } else {
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ __ Push(r2, r3);
+ __ InvokeBuiltin(Builtins::INSTANCE_OF, CALL_FUNCTION);
+ }
+ Label true_value, done;
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&true_value, Label::kNear);
+
+ __ LoadRoot(r2, Heap::kFalseValueRootIndex);
+ __ b(&done, Label::kNear);
+
+ __ bind(&true_value);
+ __ LoadRoot(r2, Heap::kTrueValueRootIndex);
+
+ __ bind(&done);
+ __ Ret(HasArgsInRegisters() ? 0 : 2);
+ }
+}
+
+
+void FunctionPrototypeStub::Generate(MacroAssembler* masm) {
+ Label miss;
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ // Ensure that the vector and slot registers won't be clobbered before
+ // calling the miss handler.
+ DCHECK(!AreAliased(r6, r7, LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister()));
+
+ NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, r6,
+ r7, &miss);
+ __ bind(&miss);
+ PropertyAccessCompiler::TailCallBuiltin(
+ masm, PropertyAccessCompiler::MissBuiltin(Code::LOAD_IC));
+}
+
+
+void LoadIndexedStringStub::Generate(MacroAssembler* masm) {
+ // Return address is in lr.
+ Label miss;
+
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register index = LoadDescriptor::NameRegister();
+ Register scratch = r7;
+ Register result = r2;
+ DCHECK(!scratch.is(receiver) && !scratch.is(index));
+ DCHECK(!scratch.is(LoadWithVectorDescriptor::VectorRegister()) &&
+ result.is(LoadWithVectorDescriptor::SlotRegister()));
+
+ // StringCharAtGenerator doesn't use the result register until it's passed
+ // the different miss possibilities. If it did, we would have a conflict
+ // when FLAG_vector_ics is true.
+ StringCharAtGenerator char_at_generator(receiver, index, scratch, result,
+ &miss, // When not a string.
+ &miss, // When not a number.
+ &miss, // When index out of range.
+ STRING_INDEX_IS_ARRAY_INDEX,
+ RECEIVER_IS_STRING);
+ char_at_generator.GenerateFast(masm);
+ __ Ret();
+
+ StubRuntimeCallHelper call_helper;
+ char_at_generator.GenerateSlow(masm, PART_OF_IC_HANDLER, call_helper);
+
+ __ bind(&miss);
+ PropertyAccessCompiler::TailCallBuiltin(
+ masm, PropertyAccessCompiler::MissBuiltin(Code::KEYED_LOAD_IC));
+}
+
+
+void ArgumentsAccessStub::GenerateReadElement(MacroAssembler* masm) {
+ // The displacement is the offset of the last parameter (if any)
+ // relative to the frame pointer.
+ const int kDisplacement =
+ StandardFrameConstants::kCallerSPOffset - kPointerSize;
+ DCHECK(r3.is(ArgumentsAccessReadDescriptor::index()));
+ DCHECK(r2.is(ArgumentsAccessReadDescriptor::parameter_count()));
+
+ // Check that the key is a smi.
+ Label slow;
+ __ JumpIfNotSmi(r3, &slow);
+
+ // Check if the calling frame is an arguments adaptor frame.
+ Label adaptor;
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r5, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ STATIC_ASSERT(StackFrame::ARGUMENTS_ADAPTOR < 0x3fffu);
+ __ CmpSmiLiteral(r5, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ beq(&adaptor);
+
+ // Check index against formal parameters count limit passed in
+ // through register r2. Use unsigned comparison to get negative
+ // check for free.
+ __ CmpLogicalP(r3, r2);
+ __ bge(&slow);
+
+ // Read the argument from the stack and return it.
+ __ SubP(r5, r2, r3);
+ __ SmiToPtrArrayOffset(r5, r5);
+ __ lay(r5, MemOperand(r5, fp));
+ __ LoadP(r2, MemOperand(r5, kDisplacement));
+ __ Ret();
+
+ // Arguments adaptor case: Check index against actual arguments
+ // limit found in the arguments adaptor frame. Use unsigned
+ // comparison to get negative check for free.
+ __ bind(&adaptor);
+ __ LoadP(r2,
+ MemOperand(r4, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ CmpLogicalP(r3, r2);
+ __ bge(&slow);
+
+ // Read the argument from the adaptor frame and return it.
+ __ SubP(r5, r2, r3);
+ __ SmiToPtrArrayOffset(r5, r5);
+ __ AddP(r5, r4);
+ __ LoadP(r2, MemOperand(r5, kDisplacement));
+ __ Ret();
+
+ // Slow-case: Handle non-smi or out-of-bounds access to arguments
+ // by calling the runtime system.
+ __ bind(&slow);
+ __ push(r3);
+ __ TailCallRuntime(Runtime::kGetArgumentsProperty, 1, 1);
+}
+
+
+void ArgumentsAccessStub::GenerateNewSloppySlow(MacroAssembler* masm) {
+ // sp[0] : number of parameters
+ // sp[1] : receiver displacement
+ // sp[2] : function
+
+ // Check if the calling frame is an arguments adaptor frame.
+ Label runtime;
+ __ LoadP(r5, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r4, MemOperand(r5, StandardFrameConstants::kContextOffset));
+ STATIC_ASSERT(StackFrame::ARGUMENTS_ADAPTOR < 0x3fffu);
+ __ CmpSmiLiteral(r4, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ bne(&runtime);
+
+ // Patch the arguments.length and the parameters pointer in the current frame.
+ __ LoadP(r4,
+ MemOperand(r5, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ StoreP(r4, MemOperand(sp, 0 * kPointerSize));
+ __ SmiToPtrArrayOffset(r4, r4);
+ __ AddP(r5, r4);
+ __ AddP(r5, Operand(StandardFrameConstants::kCallerSPOffset));
+ __ StoreP(r5, MemOperand(sp, 1 * kPointerSize));
+
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kNewSloppyArguments, 3, 1);
+}
+
+
+void ArgumentsAccessStub::GenerateNewSloppyFast(MacroAssembler* masm) {
+ // Stack layout:
+ // sp[0] : number of parameters (tagged)
+ // sp[1] : address of receiver argument
+ // sp[2] : function
+ // Registers used over whole function:
+ // r8 : allocated object (tagged)
+ // r13 : mapped parameter count (tagged)
+
+ __ LoadP(r3, MemOperand(sp, 0 * kPointerSize));
+ // r3 = parameter count (tagged)
+
+ // Check if the calling frame is an arguments adaptor frame.
+ Label runtime;
+ Label adaptor_frame, try_allocate;
+ __ LoadP(r5, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r4, MemOperand(r5, StandardFrameConstants::kContextOffset));
+ STATIC_ASSERT(StackFrame::ARGUMENTS_ADAPTOR < 0x3fffu);
+ __ CmpSmiLiteral(r4, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ beq(&adaptor_frame, Label::kNear);
+
+ // No adaptor, parameter count = argument count.
+ __ LoadRR(r4, r3);
+ __ b(&try_allocate);
+
+ // We have an adaptor frame. Patch the parameters pointer.
+ __ bind(&adaptor_frame);
+ __ LoadP(r4,
+ MemOperand(r5, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ SmiToPtrArrayOffset(r6, r4);
+ __ AddP(r5, r6);
+ __ AddP(r5, Operand(StandardFrameConstants::kCallerSPOffset));
+ __ StoreP(r5, MemOperand(sp, 1 * kPointerSize));
+
+ // r3 = parameter count (tagged)
+ // r4 = argument count (tagged)
+ // Compute the mapped parameter count = min(r3, r4) in r3.
+ Label skip;
+ __ CmpP(r3, r4);
+ __ blt(&skip, Label::kNear);
+ __ LoadRR(r3, r4);
+ __ bind(&skip);
+
+ __ bind(&try_allocate);
+
+ // Compute the sizes of backing store, parameter map, and arguments object.
+ // 1. Parameter map, has 2 extra words containing context and backing store.
+ const int kParameterMapHeaderSize =
+ FixedArray::kHeaderSize + 2 * kPointerSize;
+ // If there are no mapped parameters, we do not need the parameter_map.
+ Label skip2, skip3;
+ __ CmpSmiLiteral(r3, Smi::FromInt(0), r0);
+ __ bne(&skip2, Label::kNear);
+ __ LoadImmP(r1, Operand::Zero());
+ __ b(&skip3, Label::kNear);
+ __ bind(&skip2);
+ __ SmiToPtrArrayOffset(r1, r3);
+ __ AddP(r1, Operand(kParameterMapHeaderSize));
+ __ bind(&skip3);
+
+ // 2. Backing store.
+ __ SmiToPtrArrayOffset(r6, r4);
+ __ AddP(r1, r6);
+ __ AddP(r1, Operand(FixedArray::kHeaderSize));
+
+ // 3. Arguments object.
+ __ AddP(r1, Operand(Heap::kSloppyArgumentsObjectSize));
+
+ // Do the allocation of all three objects in one go.
+ __ Allocate(r1, r2, r5, r6, &runtime, TAG_OBJECT);
+
+ // r2 = address of new object(s) (tagged)
+ // r4 = argument count (smi-tagged)
+ // Get the arguments boilerplate from the current native context into r3.
+ const int kNormalOffset =
+ Context::SlotOffset(Context::SLOPPY_ARGUMENTS_MAP_INDEX);
+ const int kAliasedOffset =
+ Context::SlotOffset(Context::FAST_ALIASED_ARGUMENTS_MAP_INDEX);
+
+ __ LoadP(r6,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ __ LoadP(r6, FieldMemOperand(r6, GlobalObject::kNativeContextOffset));
+ Label skip4, skip5;
+ __ CmpP(r3, Operand::Zero());
+ __ bne(&skip4, Label::kNear);
+ __ LoadP(r6, MemOperand(r6, kNormalOffset));
+ __ b(&skip5, Label::kNear);
+ __ bind(&skip4);
+ __ LoadP(r6, MemOperand(r6, kAliasedOffset));
+ __ bind(&skip5);
+
+ // r2 = address of new object (tagged)
+ // r3 = mapped parameter count (tagged)
+ // r4 = argument count (smi-tagged)
+ // r6 = address of arguments map (tagged)
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kMapOffset));
+ __ LoadRoot(r5, Heap::kEmptyFixedArrayRootIndex);
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kPropertiesOffset));
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kElementsOffset));
+
+ // Set up the callee in-object property.
+ STATIC_ASSERT(Heap::kArgumentsCalleeIndex == 1);
+ __ LoadP(r5, MemOperand(sp, 2 * kPointerSize));
+ __ AssertNotSmi(r5);
+ const int kCalleeOffset =
+ JSObject::kHeaderSize + Heap::kArgumentsCalleeIndex * kPointerSize;
+ __ StoreP(r5, FieldMemOperand(r2, kCalleeOffset));
+
+ // Use the length (smi tagged) and set that as an in-object property too.
+ __ AssertSmi(r4);
+ STATIC_ASSERT(Heap::kArgumentsLengthIndex == 0);
+ const int kLengthOffset =
+ JSObject::kHeaderSize + Heap::kArgumentsLengthIndex * kPointerSize;
+ __ StoreP(r4, FieldMemOperand(r2, kLengthOffset));
+
+ // Set up the elements pointer in the allocated arguments object.
+ // If we allocated a parameter map, r6 will point there, otherwise
+ // it will point to the backing store.
+ __ AddP(r6, r2, Operand(Heap::kSloppyArgumentsObjectSize));
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kElementsOffset));
+
+ // r2 = address of new object (tagged)
+ // r3 = mapped parameter count (tagged)
+ // r4 = argument count (tagged)
+ // r6 = address of parameter map or backing store (tagged)
+ // Initialize parameter map. If there are no mapped arguments, we're done.
+ Label skip_parameter_map, skip6;
+ __ CmpSmiLiteral(r3, Smi::FromInt(0), r0);
+ __ bne(&skip6, Label::kNear);
+ // Move backing store address to r5, because it is
+ // expected there when filling in the unmapped arguments.
+ __ LoadRR(r5, r6);
+ __ b(&skip_parameter_map);
+ __ bind(&skip6);
+
+ __ LoadRoot(r8, Heap::kSloppyArgumentsElementsMapRootIndex);
+ __ StoreP(r8, FieldMemOperand(r6, FixedArray::kMapOffset));
+ __ AddSmiLiteral(r8, r3, Smi::FromInt(2), r0);
+ __ StoreP(r8, FieldMemOperand(r6, FixedArray::kLengthOffset));
+ __ StoreP(cp,
+ FieldMemOperand(r6, FixedArray::kHeaderSize + 0 * kPointerSize));
+ __ SmiToPtrArrayOffset(r8, r3);
+ __ AddP(r8, r6);
+ __ AddP(r8, Operand(kParameterMapHeaderSize));
+ __ StoreP(r8,
+ FieldMemOperand(r6, FixedArray::kHeaderSize + 1 * kPointerSize));
+
+ // Copy the parameter slots and the holes in the arguments.
+ // We need to fill in mapped_parameter_count slots. They index the context,
+ // where parameters are stored in reverse order, at
+ // MIN_CONTEXT_SLOTS .. MIN_CONTEXT_SLOTS+parameter_count-1
+ // The mapped parameter thus need to get indices
+ // MIN_CONTEXT_SLOTS+parameter_count-1 ..
+ // MIN_CONTEXT_SLOTS+parameter_count-mapped_parameter_count
+ // We loop from right to left.
+ Label parameters_loop, parameters_test;
+ __ LoadRR(r8, r3);
+ __ LoadP(r1, MemOperand(sp, 0 * kPointerSize));
+ __ AddSmiLiteral(r1, r1,
+ Smi::FromInt(Context::MIN_CONTEXT_SLOTS), r0);
+ __ SubP(r1, r1, r3);
+ __ LoadRoot(r9, Heap::kTheHoleValueRootIndex);
+ __ SmiToPtrArrayOffset(r5, r8);
+ __ AddP(r5, r6);
+ __ AddP(r5, Operand(kParameterMapHeaderSize));
+
+ // r8 = loop variable (tagged)
+ // r3 = mapping index (tagged)
+ // r5 = address of backing store (tagged)
+ // r6 = address of parameter map (tagged)
+ // r7 = temporary scratch (a.o., for address calculation)
+ // r9 = the hole value
+ __ b(¶meters_test, Label::kNear);
+
+ __ bind(¶meters_loop);
+ __ SubSmiLiteral(r8, r8, Smi::FromInt(1), r0);
+ __ SmiToPtrArrayOffset(r7, r8);
+ __ AddP(r7, Operand(kParameterMapHeaderSize - kHeapObjectTag));
+ __ StoreP(r1, MemOperand(r7, r6));
+ __ SubP(r7, Operand(kParameterMapHeaderSize - FixedArray::kHeaderSize));
+ __ StoreP(r9, MemOperand(r7, r5));
+ __ AddSmiLiteral(r1, r1, Smi::FromInt(1), r0);
+ __ bind(¶meters_test);
+ __ CmpSmiLiteral(r8, Smi::FromInt(0), r0);
+ __ bne(¶meters_loop);
+
+ __ bind(&skip_parameter_map);
+ // r4 = argument count (tagged)
+ // r5 = address of backing store (tagged)
+ // r7 = scratch
+ // Copy arguments header and remaining slots (if there are any).
+ __ LoadRoot(r7, Heap::kFixedArrayMapRootIndex);
+ __ StoreP(r7, FieldMemOperand(r5, FixedArray::kMapOffset));
+ __ StoreP(r4, FieldMemOperand(r5, FixedArray::kLengthOffset));
+
+ Label arguments_loop, arguments_test;
+ __ LoadRR(r1, r3);
+ __ LoadP(r6, MemOperand(sp, 1 * kPointerSize));
+ __ SmiToPtrArrayOffset(r7, r1);
+ __ SubP(r6, r6, r7);
+ __ b(&arguments_test, Label::kNear);
+
+ __ bind(&arguments_loop);
+ __ SubP(r6, Operand(kPointerSize));
+ __ LoadP(r8, MemOperand(r6, 0));
+ __ SmiToPtrArrayOffset(r7, r1);
+ __ AddP(r7, r5);
+ __ StoreP(r8, FieldMemOperand(r7, FixedArray::kHeaderSize));
+ __ AddSmiLiteral(r1, r1, Smi::FromInt(1), r0);
+
+ __ bind(&arguments_test);
+ __ CmpP(r1, r4);
+ __ blt(&arguments_loop);
+
+ // Return and remove the on-stack parameters.
+ __ la(sp, MemOperand(sp, (3 * kPointerSize)));
+ __ Ret();
+
+ // Do the runtime call to allocate the arguments object.
+ // r4 = argument count (tagged)
+ __ bind(&runtime);
+ __ StoreP(r4, MemOperand(sp, 0 * kPointerSize)); // Patch argument count.
+ __ TailCallRuntime(Runtime::kNewSloppyArguments, 3, 1);
+}
+
+
+void LoadIndexedInterceptorStub::Generate(MacroAssembler* masm) {
+ // Return address is in lr.
+ Label slow;
+
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ Register key = LoadDescriptor::NameRegister();
+
+ // Check that the key is an array index, that is Uint32.
+ __ TestIfPositiveSmi(key, r0);
+ __ bne(&slow, Label::kNear);
+
+ // Everything is fine, call runtime.
+ __ Push(receiver, key); // Receiver, key.
+
+ // Perform tail call to the entry.
+ __ TailCallExternalReference(
+ ExternalReference(IC_Utility(IC::kLoadElementWithInterceptor),
+ masm->isolate()), 2, 1);
+
+ __ bind(&slow);
+ PropertyAccessCompiler::TailCallBuiltin(
+ masm, PropertyAccessCompiler::MissBuiltin(Code::KEYED_LOAD_IC));
+}
+
+
+void ArgumentsAccessStub::GenerateNewStrict(MacroAssembler* masm) {
+ // sp[0] : number of parameters
+ // sp[4] : receiver displacement
+ // sp[8] : function
+ // Check if the calling frame is an arguments adaptor frame.
+ Label adaptor_frame, try_allocate, runtime;
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r5, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ STATIC_ASSERT(StackFrame::ARGUMENTS_ADAPTOR < 0x3fffu);
+ __ CmpSmiLiteral(r5, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ beq(&adaptor_frame, Label::kNear);
+
+ // Get the length from the frame.
+ __ LoadP(r3, MemOperand(sp, 0));
+ __ b(&try_allocate, Label::kNear);
+
+ // Patch the arguments.length and the parameters pointer.
+ __ bind(&adaptor_frame);
+ __ LoadP(r3, MemOperand(r4, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ StoreP(r3, MemOperand(sp, 0));
+ __ SmiToPtrArrayOffset(r5, r3);
+ __ AddP(r5, r4);
+ __ AddP(r5, Operand(StandardFrameConstants::kCallerSPOffset));
+ __ StoreP(r5, MemOperand(sp, 1 * kPointerSize));
+
+ // Try the new space allocation. Start out with computing the size
+ // of the arguments object and the elements array in words.
+ Label add_arguments_object;
+ __ bind(&try_allocate);
+ __ CmpP(r3, Operand::Zero());
+ __ beq(&add_arguments_object, Label::kNear);
+ __ SmiUntag(r3);
+ __ AddP(r3, Operand(FixedArray::kHeaderSize / kPointerSize));
+ __ bind(&add_arguments_object);
+ __ AddP(r3, Operand(Heap::kStrictArgumentsObjectSize / kPointerSize));
+
+ // Do the allocation of both objects in one go.
+ __ Allocate(r3, r2, r4, r5, &runtime,
+ static_cast<AllocationFlags>(TAG_OBJECT | SIZE_IN_WORDS));
+
+ // Get the arguments boilerplate from the current native context.
+ __ LoadP(r6,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ __ LoadP(r6, FieldMemOperand(r6, GlobalObject::kNativeContextOffset));
+ __ LoadP(
+ r6,
+ MemOperand(r6, Context::SlotOffset(Context::STRICT_ARGUMENTS_MAP_INDEX)));
+
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kMapOffset));
+ __ LoadRoot(r5, Heap::kEmptyFixedArrayRootIndex);
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kPropertiesOffset));
+ __ StoreP(r5, FieldMemOperand(r2, JSObject::kElementsOffset));
+
+ // Get the length (smi tagged) and set that as an in-object property too.
+ STATIC_ASSERT(Heap::kArgumentsLengthIndex == 0);
+ __ LoadP(r3, MemOperand(sp, 0 * kPointerSize));
+ __ AssertSmi(r3);
+ __ StoreP(r3,
+ FieldMemOperand(r2, JSObject::kHeaderSize +
+ Heap::kArgumentsLengthIndex * kPointerSize));
+
+ // If there are no actual arguments, we're done.
+ Label done;
+ __ CmpP(r3, Operand::Zero());
+ __ beq(&done);
+
+ // Get the parameters pointer from the stack.
+ __ LoadP(r4, MemOperand(sp, 1 * kPointerSize));
+
+ // Set up the elements pointer in the allocated arguments object and
+ // initialize the header in the elements fixed array.
+ __ AddP(r6, r2, Operand(Heap::kStrictArgumentsObjectSize));
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kElementsOffset));
+ __ LoadRoot(r5, Heap::kFixedArrayMapRootIndex);
+ __ StoreP(r5, FieldMemOperand(r6, FixedArray::kMapOffset));
+ __ StoreP(r3, FieldMemOperand(r6, FixedArray::kLengthOffset));
+ // Untag the length for the loop.
+ __ SmiUntag(r3);
+
+ // Copy the fixed array slots.
+ Label loop;
+ // Set up r6 to point to the first array slot.
+ __ AddP(r6, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ bind(&loop);
+ // Pre-decrement r4 with kPointerSize on each iteration.
+ // Pre-decrement in order to skip receiver.
+ __ LoadP(r5, MemOperand(r4, -kPointerSize));
+ __ lay(r4, MemOperand(r4, -kPointerSize));
+ // Post-increment r6 with kPointerSize on each iteration.
+ __ StoreP(r5, MemOperand(r6));
+ __ AddP(r6, Operand(kPointerSize));
+ __ SubP(r3, Operand(1));
+ __ CmpP(r3, Operand::Zero());
+ __ bne(&loop);
+
+ // Return and remove the on-stack parameters.
+ __ bind(&done);
+ __ la(sp, MemOperand(sp, (3 * kPointerSize)));
+ __ Ret();
+
+ // Do the runtime call to allocate the arguments object.
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kNewStrictArguments, 3, 1);
+}
+
+
+void RestParamAccessStub::GenerateNew(MacroAssembler* masm) {
+ // Stack layout on entry.
+ // sp[0] : language mode
+ // sp[4] : index of rest parameter
+ // sp[8] : number of parameters
+ // sp[12] : receiver displacement
+
+ Label runtime;
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r5, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(r5, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ bne(&runtime, Label::kNear);
+
+ // Patch the arguments.length and the parameters pointer.
+ __ LoadP(r3, MemOperand(r4, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ StoreP(r3, MemOperand(sp, 2 * kPointerSize));
+ __ SmiToPtrArrayOffset(r5, r3);
+ __ AddP(r5, r4, r5);
+ __ AddP(r5, r5, Operand(StandardFrameConstants::kCallerSPOffset));
+ __ StoreP(r5, MemOperand(sp, 3 * kPointerSize));
+
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kNewRestParam, 4, 1);
+}
+
+
+void RegExpExecStub::Generate(MacroAssembler* masm) {
+// Just jump directly to runtime if native RegExp is not selected at compile
+// time or if regexp entry in generated code is turned off runtime switch or
+// at compilation.
+#ifdef V8_INTERPRETED_REGEXP
+ __ TailCallRuntime(Runtime::kRegExpExec, 4, 1);
+#else // V8_INTERPRETED_REGEXP
+
+ // Stack frame on entry.
+ // sp[0]: last_match_info (expected JSArray)
+ // sp[4]: previous index
+ // sp[8]: subject string
+ // sp[12]: JSRegExp object
+
+ const int kLastMatchInfoOffset = 0 * kPointerSize;
+ const int kPreviousIndexOffset = 1 * kPointerSize;
+ const int kSubjectOffset = 2 * kPointerSize;
+ const int kJSRegExpOffset = 3 * kPointerSize;
+
+ Label runtime, br_over, encoding_type_UC16;
+
+ // Allocation of registers for this function. These are in callee save
+ // registers and will be preserved by the call to the native RegExp code, as
+ // this code is called using the normal C calling convention. When calling
+ // directly from generated code the native RegExp code will not do a GC and
+ // therefore the content of these registers are safe to use after the call.
+ Register subject = r6;
+ Register regexp_data = r7;
+ Register last_match_info_elements = r8;
+ Register code = r9;
+
+ __ CleanseP(r14);
+
+ // Ensure register assigments are consistent with callee save masks
+ DCHECK(subject.bit() & kCalleeSaved);
+ DCHECK(regexp_data.bit() & kCalleeSaved);
+ DCHECK(last_match_info_elements.bit() & kCalleeSaved);
+ DCHECK(code.bit() & kCalleeSaved);
+
+ // Ensure that a RegExp stack is allocated.
+ ExternalReference address_of_regexp_stack_memory_address =
+ ExternalReference::address_of_regexp_stack_memory_address(isolate());
+ ExternalReference address_of_regexp_stack_memory_size =
+ ExternalReference::address_of_regexp_stack_memory_size(isolate());
+ __ mov(r2, Operand(address_of_regexp_stack_memory_size));
+ __ LoadAndTestP(r2, MemOperand(r2));
+ __ beq(&runtime);
+
+ // Check that the first argument is a JSRegExp object.
+ __ LoadP(r2, MemOperand(sp, kJSRegExpOffset));
+ __ JumpIfSmi(r2, &runtime);
+ __ CompareObjectType(r2, r3, r3, JS_REGEXP_TYPE);
+ __ bne(&runtime);
+
+ // Check that the RegExp has been compiled (data contains a fixed array).
+ __ LoadP(regexp_data, FieldMemOperand(r2, JSRegExp::kDataOffset));
+ if (FLAG_debug_code) {
+ __ TestIfSmi(regexp_data);
+ __ Check(ne, kUnexpectedTypeForRegExpDataFixedArrayExpected, cr0);
+ __ CompareObjectType(regexp_data, r2, r2, FIXED_ARRAY_TYPE);
+ __ Check(eq, kUnexpectedTypeForRegExpDataFixedArrayExpected);
+ }
+
+ // regexp_data: RegExp data (FixedArray)
+ // Check the type of the RegExp. Only continue if type is JSRegExp::IRREGEXP.
+ __ LoadP(r2, FieldMemOperand(regexp_data, JSRegExp::kDataTagOffset));
+ // DCHECK(Smi::FromInt(JSRegExp::IRREGEXP) < (char *)0xffffu);
+ __ CmpSmiLiteral(r2, Smi::FromInt(JSRegExp::IRREGEXP), r0);
+ __ bne(&runtime);
+
+ // regexp_data: RegExp data (FixedArray)
+ // Check that the number of captures fit in the static offsets vector buffer.
+ __ LoadP(r4,
+ FieldMemOperand(regexp_data, JSRegExp::kIrregexpCaptureCountOffset));
+ // Check (number_of_captures + 1) * 2 <= offsets vector size
+ // Or number_of_captures * 2 <= offsets vector size - 2
+ // SmiToShortArrayOffset accomplishes the multiplication by 2 and
+ // SmiUntag (which is a nop for 32-bit).
+ __ SmiToShortArrayOffset(r4, r4);
+ STATIC_ASSERT(Isolate::kJSRegexpStaticOffsetsVectorSize >= 2);
+ __ CmpLogicalP(r4, Operand(Isolate::kJSRegexpStaticOffsetsVectorSize - 2));
+ __ bgt(&runtime);
+
+ // Reset offset for possibly sliced string.
+ __ LoadImmP(ip, Operand::Zero());
+ __ LoadP(subject, MemOperand(sp, kSubjectOffset));
+ __ JumpIfSmi(subject, &runtime);
+ __ LoadRR(r5, subject); // Make a copy of the original subject string.
+ __ LoadP(r2, FieldMemOperand(subject, HeapObject::kMapOffset));
+ __ LoadlB(r2, FieldMemOperand(r2, Map::kInstanceTypeOffset));
+ // subject: subject string
+ // r5: subject string
+ // r2: subject string instance type
+ // regexp_data: RegExp data (FixedArray)
+ // Handle subject string according to its encoding and representation:
+ // (1) Sequential string? If yes, go to (5).
+ // (2) Anything but sequential or cons? If yes, go to (6).
+ // (3) Cons string. If the string is flat, replace subject with first string.
+ // Otherwise bailout.
+ // (4) Is subject external? If yes, go to (7).
+ // (5) Sequential string. Load regexp code according to encoding.
+ // (E) Carry on.
+ /// [...]
+
+ // Deferred code at the end of the stub:
+ // (6) Not a long external string? If yes, go to (8).
+ // (7) External string. Make it, offset-wise, look like a sequential string.
+ // Go to (5).
+ // (8) Short external string or not a string? If yes, bail out to runtime.
+ // (9) Sliced string. Replace subject with parent. Go to (4).
+
+ Label seq_string /* 5 */, external_string /* 7 */, check_underlying /* 4 */,
+ not_seq_nor_cons /* 6 */, not_long_external /* 8 */;
+
+ // (1) Sequential string? If yes, go to (5).
+ STATIC_ASSERT((kIsNotStringMask | kStringRepresentationMask |
+ kShortExternalStringMask) == 0x93);
+ __ mov(r3, Operand(kIsNotStringMask | kStringRepresentationMask |
+ kShortExternalStringMask));
+ __ AndP(r3, r2);
+ STATIC_ASSERT((kStringTag | kSeqStringTag) == 0);
+ __ beq(&seq_string/*, cr0*/); // Go to (5).
+
+ // (2) Anything but sequential or cons? If yes, go to (6).
+ STATIC_ASSERT(kConsStringTag < kExternalStringTag);
+ STATIC_ASSERT(kSlicedStringTag > kExternalStringTag);
+ STATIC_ASSERT(kIsNotStringMask > kExternalStringTag);
+ STATIC_ASSERT(kShortExternalStringTag > kExternalStringTag);
+ STATIC_ASSERT(kExternalStringTag < 0xffffu);
+ __ CmpP(r3, Operand(kExternalStringTag));
+ __ bge(¬_seq_nor_cons); // Go to (6).
+
+ // (3) Cons string. Check that it's flat.
+ // Replace subject with first string and reload instance type.
+ __ LoadP(r2, FieldMemOperand(subject, ConsString::kSecondOffset));
+ __ CompareRoot(r2, Heap::kempty_stringRootIndex);
+ __ bne(&runtime);
+ __ LoadP(subject, FieldMemOperand(subject, ConsString::kFirstOffset));
+
+ // (4) Is subject external? If yes, go to (7).
+ __ bind(&check_underlying);
+ __ LoadP(r2, FieldMemOperand(subject, HeapObject::kMapOffset));
+ __ LoadlB(r2, FieldMemOperand(r2, Map::kInstanceTypeOffset));
+ STATIC_ASSERT(kSeqStringTag == 0);
+ STATIC_ASSERT(kStringRepresentationMask == 3);
+ __ tmll(r2, Operand(kStringRepresentationMask));
+ // The underlying external string is never a short external string.
+ STATIC_ASSERT(ExternalString::kMaxShortLength < ConsString::kMinLength);
+ STATIC_ASSERT(ExternalString::kMaxShortLength < SlicedString::kMinLength);
+ __ bne(&external_string/*, cr0*/); // Go to (7).
+
+ // (5) Sequential string. Load regexp code according to encoding.
+ __ bind(&seq_string);
+ // subject: sequential subject string (or look-alike, external string)
+ // r5: original subject string
+ // Load previous index and check range before r5 is overwritten. We have to
+ // use r5 instead of subject here because subject might have been only made
+ // to look like a sequential string when it actually is an external string.
+ __ LoadP(r3, MemOperand(sp, kPreviousIndexOffset));
+ __ JumpIfNotSmi(r3, &runtime);
+ __ LoadP(r5, FieldMemOperand(r5, String::kLengthOffset));
+ __ CmpLogicalP(r5, r3);
+ __ ble(&runtime);
+ __ SmiUntag(r3);
+
+ STATIC_ASSERT(4 == kOneByteStringTag);
+ STATIC_ASSERT(kTwoByteStringTag == 0);
+ STATIC_ASSERT(kStringEncodingMask == 4);
+ __ ExtractBitMask(r5, r2, kStringEncodingMask, SetRC);
+ __ beq(&encoding_type_UC16 /*, cr0*/, Label::kNear);
+ __ LoadP(code,
+ FieldMemOperand(regexp_data, JSRegExp::kDataOneByteCodeOffset));
+ __ b(&br_over, Label::kNear);
+ __ bind(&encoding_type_UC16);
+ __ LoadP(code, FieldMemOperand(regexp_data, JSRegExp::kDataUC16CodeOffset));
+ __ bind(&br_over);
+
+ // (E) Carry on. String handling is done.
+ // code: irregexp code
+ // Check that the irregexp code has been generated for the actual string
+ // encoding. If it has, the field contains a code object otherwise it contains
+ // a smi (code flushing support).
+ __ JumpIfSmi(code, &runtime);
+
+ // r3: previous index
+ // r5: encoding of subject string (1 if one_byte, 0 if two_byte);
+ // code: Address of generated regexp code
+ // subject: Subject string
+ // regexp_data: RegExp data (FixedArray)
+ // All checks done. Now push arguments for native regexp code.
+ __ IncrementCounter(isolate()->counters()->regexp_entry_native(), 1, r2, r4);
+
+ // Isolates: note we add an additional parameter here (isolate pointer).
+ const int kRegExpExecuteArguments = 10;
+ const int kParameterRegisters = 5;
+ __ EnterExitFrame(false, kRegExpExecuteArguments - kParameterRegisters);
+
+ // Stack pointer now points to cell where return address is to be written.
+ // Arguments are before that on the stack or in registers.
+
+ // Argument 10 (in stack parameter area): Pass current isolate address.
+ __ mov(r2, Operand(ExternalReference::isolate_address(isolate())));
+ __ StoreP(r2, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize + 4 * kPointerSize));
+
+ // Argument 9 is a dummy that reserves the space used for
+ // the return address added by the ExitFrame in native calls.
+ __ mov(r2, Operand::Zero());
+ __ StoreP(r2, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize + 3 * kPointerSize));
+
+ // Argument 8: Indicate that this is a direct call from JavaScript.
+ __ mov(r2, Operand(1));
+ __ StoreP(r2, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize + 2 * kPointerSize));
+
+ // Argument 7: Start (high end) of backtracking stack memory area.
+ __ mov(r2, Operand(address_of_regexp_stack_memory_address));
+ __ LoadP(r2, MemOperand(r2, 0));
+ __ mov(r1, Operand(address_of_regexp_stack_memory_size));
+ __ LoadP(r1, MemOperand(r1, 0));
+ __ AddP(r2, r1);
+ __ StoreP(r2, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize + 1 * kPointerSize));
+
+ // Argument 6: Set the number of capture registers to zero to force
+ // global egexps to behave as non-global. This does not affect non-global
+ // regexps.
+ __ mov(r2, Operand::Zero());
+ __ StoreP(r2, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize + 0 * kPointerSize));
+
+ // Argument 1 (r2): Subject string.
+ // Load the length from the original subject string from the previous stack
+ // frame. Therefore we have to use fp, which points exactly to 15 pointer
+ // sizes below the previous sp. (Because creating a new stack frame pushes
+ // the previous fp onto the stack and moves up sp by 2 * kPointerSize and
+ // 13 registers saved on the stack previously)
+ __ LoadP(r2, MemOperand(fp, kSubjectOffset + 2 * kPointerSize));
+
+ // Argument 2 (r3): Previous index.
+ // Already there
+ __ AddP(r1, subject, Operand(SeqString::kHeaderSize - kHeapObjectTag));
+
+ // Argument 5 (r6): static offsets vector buffer.
+ __ mov(r6,
+ Operand(ExternalReference::address_of_static_offsets_vector(isolate())));
+
+ // For arguments 4 (r5) and 3 (r4) get string length, calculate start of data
+ // and calculate the shift of the index (0 for one-byte and 1 for two byte).
+ __ XorP(r5, Operand(1));
+ // If slice offset is not 0, load the length from the original sliced string.
+ // Argument 3, r4: Start of string data
+ // Prepare start and end index of the input.
+ __ ShiftLeftP(ip, ip, r5);
+ __ AddP(ip, r1, ip);
+ __ ShiftLeftP(r4, r3, r5);
+ __ AddP(r4, ip, r4);
+
+ // Argument 4, r5: End of string data
+ __ LoadP(r1, FieldMemOperand(r2, String::kLengthOffset));
+ __ SmiUntag(r1);
+ __ ShiftLeftP(r0, r1, r5);
+ __ AddP(r5, ip, r0);
+
+
+ // Locate the code entry and call it.
+ __ AddP(code, Operand(Code::kHeaderSize - kHeapObjectTag));
+
+
+#if ABI_USES_FUNCTION_DESCRIPTORS && defined(USE_SIMULATOR)
+ // Even Simulated AIX/S390X Linux uses a function descriptor for the
+ // RegExp routine. Extract the instruction address here since
+ // DirectCEntryStub::GenerateCall will not do it for calls out to
+ // what it thinks is C code compiled for the simulator/host
+ // platform.
+ __ LoadP(code, MemOperand(code, 0)); // Instruction address
+#endif
+
+ DirectCEntryStub stub(isolate());
+ stub.GenerateCall(masm, code);
+
+ __ LeaveExitFrame(false, no_reg, true);
+
+ // r2: result (int32)
+ // subject: subject string -- needed to reload
+ __ LoadP(subject, MemOperand(sp, kSubjectOffset));
+
+ // regexp_data: RegExp data (callee saved)
+ // last_match_info_elements: Last match info elements (callee saved)
+ // Check the result.
+ Label success;
+ __ Cmp32(r2, Operand(1));
+ // We expect exactly one result since we force the called regexp to behave
+ // as non-global.
+ __ beq(&success);
+ Label failure;
+ __ Cmp32(r2, Operand(NativeRegExpMacroAssembler::FAILURE));
+ __ beq(&failure);
+ __ Cmp32(r2, Operand(NativeRegExpMacroAssembler::EXCEPTION));
+ // If not exception it can only be retry. Handle that in the runtime system.
+ __ bne(&runtime);
+ // Result must now be exception. If there is no pending exception already a
+ // stack overflow (on the backtrack stack) was detected in RegExp code but
+ // haven't created the exception yet. Handle that in the runtime system.
+ // TODO(592): Rerunning the RegExp to get the stack overflow exception.
+ __ mov(r3, Operand(isolate()->factory()->the_hole_value()));
+ __ mov(r4, Operand(ExternalReference(Isolate::kPendingExceptionAddress,
+ isolate())));
+ __ LoadP(r2, MemOperand(r4, 0));
+ __ CmpP(r2, r3);
+ __ beq(&runtime);
+
+ // For exception, throw the exception again.
+ __ TailCallRuntime(Runtime::kRegExpExecReThrow, 4, 1);
+
+ __ bind(&failure);
+ // For failure and exception return null.
+ __ mov(r2, Operand(isolate()->factory()->null_value()));
+ __ la(sp, MemOperand(sp, (4 * kPointerSize)));
+ __ Ret();
+
+ // Process the result from the native regexp code.
+ __ bind(&success);
+ __ LoadP(r3,
+ FieldMemOperand(regexp_data, JSRegExp::kIrregexpCaptureCountOffset));
+ // Calculate number of capture registers (number_of_captures + 1) * 2.
+ // SmiToShortArrayOffset accomplishes the multiplication by 2 and
+ // SmiUntag (which is a nop for 32-bit).
+ __ SmiToShortArrayOffset(r3, r3);
+ __ AddP(r3, Operand(2));
+
+ __ LoadP(r2, MemOperand(sp, kLastMatchInfoOffset));
+ __ JumpIfSmi(r2, &runtime);
+ __ CompareObjectType(r2, r4, r4, JS_ARRAY_TYPE);
+ __ bne(&runtime);
+ // Check that the JSArray is in fast case.
+ __ LoadP(last_match_info_elements,
+ FieldMemOperand(r2, JSArray::kElementsOffset));
+ __ LoadP(r2,
+ FieldMemOperand(last_match_info_elements, HeapObject::kMapOffset));
+ __ CompareRoot(r2, Heap::kFixedArrayMapRootIndex);
+ __ bne(&runtime);
+ // Check that the last match info has space for the capture registers and the
+ // additional information.
+ __ LoadP(r2,
+ FieldMemOperand(last_match_info_elements, FixedArray::kLengthOffset));
+ __ AddP(r4, r3, Operand(RegExpImpl::kLastMatchOverhead));
+ __ SmiUntag(r0, r2);
+ __ CmpP(r4, r0);
+ __ bgt(&runtime);
+
+ // r3: number of capture registers
+ // subject: subject string
+ // Store the capture count.
+ __ SmiTag(r4, r3);
+ __ StoreP(r4, FieldMemOperand(last_match_info_elements,
+ RegExpImpl::kLastCaptureCountOffset));
+ // Store last subject and last input.
+ __ StoreP(subject,
+ FieldMemOperand(last_match_info_elements,
+ RegExpImpl::kLastSubjectOffset));
+ __ LoadRR(r4, subject);
+ __ RecordWriteField(last_match_info_elements, RegExpImpl::kLastSubjectOffset,
+ subject, r9, kLRHasNotBeenSaved, kDontSaveFPRegs);
+ __ LoadRR(subject, r4);
+ __ StoreP(subject, FieldMemOperand(last_match_info_elements,
+ RegExpImpl::kLastInputOffset));
+ __ RecordWriteField(last_match_info_elements, RegExpImpl::kLastInputOffset,
+ subject, r9, kLRHasNotBeenSaved, kDontSaveFPRegs);
+
+ // Get the static offsets vector filled by the native regexp code.
+ ExternalReference address_of_static_offsets_vector =
+ ExternalReference::address_of_static_offsets_vector(isolate());
+ __ mov(r4, Operand(address_of_static_offsets_vector));
+
+ // r3: number of capture registers
+ // r4: offsets vector
+ Label next_capture;
+ // Capture register counter starts from number of capture registers and
+ // counts down until wraping after zero.
+ __ AddP(
+ r2, last_match_info_elements,
+ Operand(RegExpImpl::kFirstCaptureOffset - kHeapObjectTag - kPointerSize));
+ __ AddP(r4, Operand(-kIntSize)); // bias down for lwzu
+ __ bind(&next_capture);
+ // Read the value from the static offsets vector buffer.
+ __ ly(r5, MemOperand(r4, kIntSize));
+ __ lay(r4, MemOperand(r4, kIntSize));
+ // Store the smi value in the last match info.
+ __ SmiTag(r5);
+ __ StoreP(r5, MemOperand(r2, kPointerSize));
+ __ lay(r2, MemOperand(r2, kPointerSize));
+ __ BranchOnCount(r3, &next_capture);
+
+ // Return last match info.
+ __ LoadP(r2, MemOperand(sp, kLastMatchInfoOffset));
+ __ la(sp, MemOperand(sp, (4 * kPointerSize)));
+ __ Ret();
+
+ // Do the runtime call to execute the regexp.
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kRegExpExec, 4, 1);
+
+ // Deferred code for string handling.
+ // (6) Not a long external string? If yes, go to (8).
+ __ bind(¬_seq_nor_cons);
+ // Compare flags are still set.
+ __ bgt(¬_long_external); // Go to (8).
+
+ // (7) External string. Make it, offset-wise, look like a sequential string.
+ __ bind(&external_string);
+ __ LoadP(r2, FieldMemOperand(subject, HeapObject::kMapOffset));
+ __ LoadlB(r2, FieldMemOperand(r2, Map::kInstanceTypeOffset));
+ if (FLAG_debug_code) {
+ // Assert that we do not have a cons or slice (indirect strings) here.
+ // Sequential strings have already been ruled out.
+ STATIC_ASSERT(kIsIndirectStringMask == 1);
+ __ tmll(r2, Operand(kIsIndirectStringMask));
+ __ Assert(eq, kExternalStringExpectedButNotFound, cr0);
+ }
+ __ LoadP(subject,
+ FieldMemOperand(subject, ExternalString::kResourceDataOffset));
+ // Move the pointer so that offset-wise, it looks like a sequential string.
+ STATIC_ASSERT(SeqTwoByteString::kHeaderSize == SeqOneByteString::kHeaderSize);
+ __ SubP(subject, subject,
+ Operand(SeqTwoByteString::kHeaderSize - kHeapObjectTag));
+ __ b(&seq_string); // Go to (5).
+
+ // (8) Short external string or not a string? If yes, bail out to runtime.
+ __ bind(¬_long_external);
+ STATIC_ASSERT(kNotStringTag != 0 && kShortExternalStringTag != 0);
+ __ mov(r0, Operand(kIsNotStringMask | kShortExternalStringMask));
+ __ AndP(r0, r3);
+ __ bne(&runtime/*, cr0*/);
+
+ // (9) Sliced string. Replace subject with parent. Go to (4).
+ // Load offset into ip and replace subject string with parent.
+ __ LoadP(ip, FieldMemOperand(subject, SlicedString::kOffsetOffset));
+ __ SmiUntag(ip);
+ __ LoadP(subject, FieldMemOperand(subject, SlicedString::kParentOffset));
+ __ b(&check_underlying); // Go to (4).
+#endif // V8_INTERPRETED_REGEXP
+}
+
+
+static void CallStubInRecordCallTarget(MacroAssembler* masm, CodeStub* stub) {
+ // r2 : number of arguments to the construct function
+ // r4 : Feedback vector
+ // r5 : slot in feedback vector (Smi)
+ // r3 : the function to call
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Number-of-arguments register must be smi-tagged to call out.
+ __ SmiTag(r2);
+ __ Push(r5, r4, r3, r2);
+
+ __ CallStub(stub);
+
+ __ Pop(r5, r4, r3, r2);
+ __ SmiUntag(r2);
+}
+
+
+static void GenerateRecordCallTarget(MacroAssembler* masm) {
+ // Cache the called function in a feedback vector slot. Cache states
+ // are uninitialized, monomorphic (indicated by a JSFunction), and
+ // megamorphic.
+ // r2 : number of arguments to the construct function
+ // r3 : the function to call
+ // r4 : Feedback vector
+ // r5 : slot in feedback vector (Smi)
+ Label initialize, done, miss, megamorphic, not_array_function;
+
+ DCHECK_EQ(*TypeFeedbackVector::MegamorphicSentinel(masm->isolate()),
+ masm->isolate()->heap()->megamorphic_symbol());
+ DCHECK_EQ(*TypeFeedbackVector::UninitializedSentinel(masm->isolate()),
+ masm->isolate()->heap()->uninitialized_symbol());
+
+ // Load the cache state into r6.
+ __ SmiToPtrArrayOffset(r6, r5);
+ __ AddP(r6, r4, r6);
+ __ LoadP(r6, FieldMemOperand(r6, FixedArray::kHeaderSize));
+
+ // A monomorphic cache hit or an already megamorphic state: invoke the
+ // function without changing the state.
+ // We don't know if r6 is a WeakCell or a Symbol, but it's harmless to read at
+ // this position in a symbol (see static asserts in type-feedback-vector.h).
+ Label check_allocation_site;
+ Register feedback_map = r7;
+ Register weak_value = r8;
+ __ LoadP(weak_value, FieldMemOperand(r6, WeakCell::kValueOffset));
+ __ CmpP(r3, weak_value);
+ __ beq(&done);
+ __ CompareRoot(r6, Heap::kmegamorphic_symbolRootIndex);
+ __ beq(&done);
+ __ LoadP(feedback_map, FieldMemOperand(r6, HeapObject::kMapOffset));
+ __ CompareRoot(feedback_map, Heap::kWeakCellMapRootIndex);
+ __ bne(FLAG_pretenuring_call_new ? &miss : &check_allocation_site);
+
+ // If the weak cell is cleared, we have a new chance to become monomorphic.
+ __ JumpIfSmi(weak_value, &initialize);
+ __ b(&megamorphic);
+
+ if (!FLAG_pretenuring_call_new) {
+ __ bind(&check_allocation_site);
+ // If we came here, we need to see if we are the array function.
+ // If we didn't have a matching function, and we didn't find the megamorph
+ // sentinel, then we have in the slot either some other function or an
+ // AllocationSite.
+ __ CompareRoot(feedback_map, Heap::kAllocationSiteMapRootIndex);
+ __ bne(&miss);
+
+ // Make sure the function is the Array() function
+ __ LoadGlobalFunction(Context::ARRAY_FUNCTION_INDEX, r6);
+ __ CmpP(r3, r6);
+ __ bne(&megamorphic);
+ __ b(&done);
+ }
+
+ __ bind(&miss);
+
+ // A monomorphic miss (i.e, here the cache is not uninitialized) goes
+ // megamorphic.
+ __ CompareRoot(r6, Heap::kuninitialized_symbolRootIndex);
+ __ beq(&initialize);
+ // MegamorphicSentinel is an immortal immovable object (undefined) so no
+ // write-barrier is needed.
+ __ bind(&megamorphic);
+ __ SmiToPtrArrayOffset(r6, r5);
+ __ AddP(r6, r4, r6);
+ __ LoadRoot(ip, Heap::kmegamorphic_symbolRootIndex);
+ __ StoreP(ip, FieldMemOperand(r6, FixedArray::kHeaderSize));
+ __ jmp(&done);
+
+ // An uninitialized cache is patched with the function
+ __ bind(&initialize);
+
+ if (!FLAG_pretenuring_call_new) {
+ // Make sure the function is the Array() function.
+ __ LoadGlobalFunction(Context::ARRAY_FUNCTION_INDEX, r6);
+ __ CmpP(r3, r6);
+ __ bne(¬_array_function);
+
+ // The target function is the Array constructor,
+ // Create an AllocationSite if we don't already have it, store it in the
+ // slot.
+ CreateAllocationSiteStub create_stub(masm->isolate());
+ CallStubInRecordCallTarget(masm, &create_stub);
+ __ b(&done);
+
+ __ bind(¬_array_function);
+ }
+
+ CreateWeakCellStub create_stub(masm->isolate());
+ CallStubInRecordCallTarget(masm, &create_stub);
+ __ bind(&done);
+}
+
+
+static void EmitContinueIfStrictOrNative(MacroAssembler* masm, Label* cont) {
+ // Do not transform the receiver for strict mode functions and natives.
+ __ LoadP(r5, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadlW(r6, FieldMemOperand(r5, SharedFunctionInfo::kCompilerHintsOffset));
+ __ TestBit(r6,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kStrictModeFunction,
+#else
+ SharedFunctionInfo::kStrictModeFunction + kSmiTagSize,
+#endif
+ r0);
+ __ bne(cont/*, cr0*/);
+
+ // Do not transform the receiver for native.
+ __ TestBit(r6,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kNative,
+#else
+ SharedFunctionInfo::kNative + kSmiTagSize,
+#endif
+ r0);
+ __ bne(cont/*, cr0*/);
+}
+
+
+static void EmitSlowCase(MacroAssembler* masm, int argc, Label* non_function) {
+ // Check for function proxy.
+ STATIC_ASSERT(JS_FUNCTION_PROXY_TYPE < 0xffffu);
+ __ CmpP(r6, Operand(JS_FUNCTION_PROXY_TYPE));
+ __ bne(non_function);
+ __ push(r3); // put proxy as additional argument
+ __ LoadImmP(r2, Operand(argc + 1));
+ __ LoadImmP(r4, Operand::Zero());
+ __ GetBuiltinFunction(r3, Builtins::CALL_FUNCTION_PROXY);
+ {
+ Handle<Code> adaptor =
+ masm->isolate()->builtins()->ArgumentsAdaptorTrampoline();
+ __ Jump(adaptor, RelocInfo::CODE_TARGET);
+ }
+
+ // CALL_NON_FUNCTION expects the non-function callee as receiver (instead
+ // of the original receiver from the call site).
+ __ bind(non_function);
+ __ StoreP(r3, MemOperand(sp, argc * kPointerSize), r0);
+ __ LoadImmP(r2, Operand(argc)); // Set up the number of arguments.
+ __ LoadImmP(r4, Operand::Zero());
+ __ GetBuiltinFunction(r3, Builtins::CALL_NON_FUNCTION);
+ __ Jump(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET);
+}
+
+
+static void EmitWrapCase(MacroAssembler* masm, int argc, Label* cont) {
+ // Wrap the receiver and patch it back onto the stack.
+ {
+ FrameScope frame_scope(masm, StackFrame::INTERNAL);
+ __ Push(r3, r5);
+ __ InvokeBuiltin(Builtins::TO_OBJECT, CALL_FUNCTION);
+ __ pop(r3);
+ }
+ __ StoreP(r2, MemOperand(sp, argc * kPointerSize));
+ __ b(cont);
+}
+
+
+static void CallFunctionNoFeedback(MacroAssembler* masm, int argc,
+ bool needs_checks, bool call_as_method) {
+ // r3 : the function to call
+ Label slow, non_function, wrap, cont;
+
+ if (needs_checks) {
+ // Check that the function is really a JavaScript function.
+ // r3: pushed function (to be verified)
+ __ JumpIfSmi(r3, &non_function);
+
+ // Goto slow case if we do not have a function.
+ __ CompareObjectType(r3, r6, r6, JS_FUNCTION_TYPE);
+ __ bne(&slow);
+ }
+
+ // Fast-case: Invoke the function now.
+ // r3: pushed function
+ ParameterCount actual(argc);
+
+ if (call_as_method) {
+ if (needs_checks) {
+ EmitContinueIfStrictOrNative(masm, &cont);
+ }
+
+ // Compute the receiver in sloppy mode.
+ __ LoadP(r5, MemOperand(sp, argc * kPointerSize));
+
+ if (needs_checks) {
+ __ JumpIfSmi(r5, &wrap);
+ __ CompareObjectType(r5, r6, r6, FIRST_SPEC_OBJECT_TYPE);
+ __ blt(&wrap);
+ } else {
+ __ b(&wrap);
+ }
+
+ __ bind(&cont);
+ }
+
+ __ InvokeFunction(r3, actual, JUMP_FUNCTION, NullCallWrapper());
+
+ if (needs_checks) {
+ // Slow-case: Non-function called.
+ __ bind(&slow);
+ EmitSlowCase(masm, argc, &non_function);
+ }
+
+ if (call_as_method) {
+ __ bind(&wrap);
+ EmitWrapCase(masm, argc, &cont);
+ }
+}
+
+
+void CallFunctionStub::Generate(MacroAssembler* masm) {
+ CallFunctionNoFeedback(masm, argc(), NeedsChecks(), CallAsMethod());
+}
+
+
+void CallConstructStub::Generate(MacroAssembler* masm) {
+ // r2 : number of arguments
+ // r3 : the function to call
+ // r4 : feedback vector
+ // r5 : (only if r4 is not the megamorphic symbol) slot in feedback
+ // vector (Smi)
+ Label slow, non_function_call;
+
+ // Check that the function is not a smi.
+ __ JumpIfSmi(r3, &non_function_call);
+ // Check that the function is a JSFunction.
+ __ CompareObjectType(r3, r6, r6, JS_FUNCTION_TYPE);
+ __ bne(&slow, Label::kNear);
+
+ if (RecordCallTarget()) {
+ GenerateRecordCallTarget(masm);
+
+ __ SmiToPtrArrayOffset(r7, r5);
+ __ AddP(r7, r4, r7);
+ if (FLAG_pretenuring_call_new) {
+ // Put the AllocationSite from the feedback vector into r4.
+ // By adding kPointerSize we encode that we know the AllocationSite
+ // entry is at the feedback vector slot given by r5 + 1.
+ __ LoadP(r4, FieldMemOperand(r7, FixedArray::kHeaderSize + kPointerSize));
+ } else {
+ Label feedback_register_initialized;
+ // Put the AllocationSite from the feedback vector into r4, or undefined.
+ __ LoadP(r4, FieldMemOperand(r7, FixedArray::kHeaderSize));
+ __ LoadP(r7, FieldMemOperand(r4, AllocationSite::kMapOffset));
+ __ CompareRoot(r7, Heap::kAllocationSiteMapRootIndex);
+ __ beq(&feedback_register_initialized, Label::kNear);
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ bind(&feedback_register_initialized);
+ }
+
+ __ AssertUndefinedOrAllocationSite(r4, r7);
+ }
+
+ // Pass function as original constructor.
+ if (IsSuperConstructorCall()) {
+ __ ShiftLeftP(r6, r2, Operand(kPointerSizeLog2));
+ __ AddP(r6, r6, Operand(kPointerSize));
+ __ LoadP(r5, MemOperand(sp, r6));
+ } else {
+ __ LoadRR(r5, r3);
+ }
+
+ // Jump to the function-specific construct stub.
+ Register jmp_reg = r6;
+ __ LoadP(jmp_reg, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(jmp_reg,
+ FieldMemOperand(jmp_reg, SharedFunctionInfo::kConstructStubOffset));
+ // TODO(joransiu): Fold AddP into Jump
+ __ AddP(ip, jmp_reg, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ JumpToJSEntry(ip);
+
+ // r2: number of arguments
+ // r3: called object
+ // r6: object type
+ Label do_call;
+ __ bind(&slow);
+ STATIC_ASSERT(JS_FUNCTION_PROXY_TYPE < 0xffffu);
+ __ CmpP(r6, Operand(JS_FUNCTION_PROXY_TYPE));
+ __ bne(&non_function_call);
+ __ GetBuiltinFunction(r3, Builtins::CALL_FUNCTION_PROXY_AS_CONSTRUCTOR);
+ __ b(&do_call);
+
+ __ bind(&non_function_call);
+ __ GetBuiltinFunction(r3, Builtins::CALL_NON_FUNCTION_AS_CONSTRUCTOR);
+ __ bind(&do_call);
+ // Set expected number of arguments to zero (not changing r2).
+ __ LoadImmP(r4, Operand::Zero());
+ __ Jump(masm->isolate()->builtins()->ArgumentsAdaptorTrampoline(),
+ RelocInfo::CODE_TARGET);
+}
+
+
+static void EmitLoadTypeFeedbackVector(MacroAssembler* masm, Register vector) {
+ __ LoadP(vector, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadP(vector,
+ FieldMemOperand(vector, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(vector,
+ FieldMemOperand(vector, SharedFunctionInfo::kFeedbackVectorOffset));
+}
+
+
+void CallIC_ArrayStub::Generate(MacroAssembler* masm) {
+ // r3 - function
+ // r5 - slot id
+ // r4 - vector
+ Label miss;
+ int argc = arg_count();
+ ParameterCount actual(argc);
+
+ __ LoadGlobalFunction(Context::ARRAY_FUNCTION_INDEX, r6);
+ __ CmpP(r3, r6);
+ __ bne(&miss, Label::kNear);
+
+ __ mov(r2, Operand(arg_count()));
+ __ SmiToPtrArrayOffset(r8, r5);
+ __ AddP(r8, r4, r8);
+ __ LoadP(r6, FieldMemOperand(r8, FixedArray::kHeaderSize));
+
+ // Verify that r6 contains an AllocationSite
+ __ LoadP(r7, FieldMemOperand(r6, HeapObject::kMapOffset));
+ __ CompareRoot(r7, Heap::kAllocationSiteMapRootIndex);
+ __ bne(&miss, Label::kNear);
+
+ // Increment the call count for monomorphic function calls.
+ const int count_offset = FixedArray::kHeaderSize + kPointerSize;
+ __ LoadP(r5, FieldMemOperand(r8, count_offset));
+ __ AddSmiLiteral(r5, r5, Smi::FromInt(CallICNexus::kCallCountIncrement), r0);
+ __ StoreP(r5, FieldMemOperand(r8, count_offset), r0);
+
+ __ LoadRR(r4, r6);
+ __ LoadRR(r5, r3);
+ ArrayConstructorStub stub(masm->isolate(), arg_count());
+ __ TailCallStub(&stub);
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+
+ // The slow case, we need this no matter what to complete a call after a miss.
+ CallFunctionNoFeedback(masm, arg_count(), true, CallAsMethod());
+
+ // Unreachable.
+ __ stop("Unexpected code address");
+}
+
+
+void CallICStub::Generate(MacroAssembler* masm) {
+ // r3 - function
+ // r5 - slot id (Smi)
+ // r4 - vector
+ const int with_types_offset =
+ FixedArray::OffsetOfElementAt(TypeFeedbackVector::kWithTypesIndex);
+ const int generic_offset =
+ FixedArray::OffsetOfElementAt(TypeFeedbackVector::kGenericCountIndex);
+ Label extra_checks_or_miss, slow_start;
+ Label slow, non_function, wrap, cont;
+ Label have_js_function;
+ int argc = arg_count();
+ ParameterCount actual(argc);
+
+ // The checks. First, does r3 match the recorded monomorphic target?
+ __ SmiToPtrArrayOffset(r8, r5);
+ __ AddP(r8, r4, r8);
+ __ LoadP(r6, FieldMemOperand(r8, FixedArray::kHeaderSize));
+
+ // We don't know that we have a weak cell. We might have a private symbol
+ // or an AllocationSite, but the memory is safe to examine.
+ // AllocationSite::kTransitionInfoOffset - contains a Smi or pointer to
+ // FixedArray.
+ // WeakCell::kValueOffset - contains a JSFunction or Smi(0)
+ // Symbol::kHashFieldSlot - if the low bit is 1, then the hash is not
+ // computed, meaning that it can't appear to be a pointer. If the low bit is
+ // 0, then hash is computed, but the 0 bit prevents the field from appearing
+ // to be a pointer.
+ STATIC_ASSERT(WeakCell::kSize >= kPointerSize);
+ STATIC_ASSERT(AllocationSite::kTransitionInfoOffset ==
+ WeakCell::kValueOffset &&
+ WeakCell::kValueOffset == Symbol::kHashFieldSlot);
+
+ __ LoadP(r7, FieldMemOperand(r6, WeakCell::kValueOffset));
+ __ CmpP(r3, r7);
+ __ bne(&extra_checks_or_miss, Label::kNear);
+
+ // The compare above could have been a SMI/SMI comparison. Guard against this
+ // convincing us that we have a monomorphic JSFunction.
+ __ JumpIfSmi(r3, &extra_checks_or_miss);
+
+ // Increment the call count for monomorphic function calls.
+ const int count_offset = FixedArray::kHeaderSize + kPointerSize;
+ __ LoadP(r5, FieldMemOperand(r8, count_offset));
+ __ AddSmiLiteral(r5, r5, Smi::FromInt(CallICNexus::kCallCountIncrement), r0);
+ __ StoreP(r5, FieldMemOperand(r8, count_offset), r0);
+
+ __ bind(&have_js_function);
+ if (CallAsMethod()) {
+ EmitContinueIfStrictOrNative(masm, &cont);
+ // Compute the receiver in sloppy mode.
+ __ LoadP(r5, MemOperand(sp, argc * kPointerSize));
+
+ __ JumpIfSmi(r5, &wrap);
+ __ CompareObjectType(r5, r6, r6, FIRST_SPEC_OBJECT_TYPE);
+ __ blt(&wrap, Label::kNear);
+
+ __ bind(&cont);
+ }
+
+ __ InvokeFunction(r3, actual, JUMP_FUNCTION, NullCallWrapper());
+
+ __ bind(&slow);
+ EmitSlowCase(masm, argc, &non_function);
+
+ if (CallAsMethod()) {
+ __ bind(&wrap);
+ EmitWrapCase(masm, argc, &cont);
+ }
+
+ __ bind(&extra_checks_or_miss);
+ Label uninitialized, miss;
+
+ __ CompareRoot(r6, Heap::kmegamorphic_symbolRootIndex);
+ __ beq(&slow_start, Label::kNear);
+
+ // The following cases attempt to handle MISS cases without going to the
+ // runtime.
+ if (FLAG_trace_ic) {
+ __ b(&miss);
+ }
+
+ __ CompareRoot(r6, Heap::kuninitialized_symbolRootIndex);
+ __ beq(&uninitialized);
+
+ // We are going megamorphic. If the feedback is a JSFunction, it is fine
+ // to handle it here. More complex cases are dealt with in the runtime.
+ __ AssertNotSmi(r6);
+ __ CompareObjectType(r6, r7, r7, JS_FUNCTION_TYPE);
+ __ bne(&miss);
+ __ LoadRoot(ip, Heap::kmegamorphic_symbolRootIndex);
+ __ StoreP(ip, FieldMemOperand(r8, FixedArray::kHeaderSize), r0);
+ // We have to update statistics for runtime profiling.
+ __ LoadP(r6, FieldMemOperand(r4, with_types_offset));
+ __ SubSmiLiteral(r6, r6, Smi::FromInt(1), r0);
+ __ StoreP(r6, FieldMemOperand(r4, with_types_offset));
+ __ LoadP(r6, FieldMemOperand(r4, generic_offset));
+ __ AddSmiLiteral(r6, r6, Smi::FromInt(1), r0);
+ __ StoreP(r6, FieldMemOperand(r4, generic_offset));
+ __ b(&slow_start);
+
+ __ bind(&uninitialized);
+
+ // We are going monomorphic, provided we actually have a JSFunction.
+ __ JumpIfSmi(r3, &miss);
+
+ // Goto miss case if we do not have a function.
+ __ CompareObjectType(r3, r6, r6, JS_FUNCTION_TYPE);
+ __ bne(&miss);
+
+ // Make sure the function is not the Array() function, which requires special
+ // behavior on MISS.
+ __ LoadGlobalFunction(Context::ARRAY_FUNCTION_INDEX, r6);
+ __ CmpP(r3, r6);
+ __ beq(&miss);
+
+ // Update stats.
+ // TODO(joransiu): Exploit ASI if possible
+ __ LoadP(r6, FieldMemOperand(r4, with_types_offset));
+ __ AddSmiLiteral(r6, r6, Smi::FromInt(1), r0);
+ __ StoreP(r6, FieldMemOperand(r4, with_types_offset));
+
+ // Initialize the call counter.
+ __ LoadSmiLiteral(r7, Smi::FromInt(CallICNexus::kCallCountIncrement));
+ __ StoreP(r7, FieldMemOperand(r8, count_offset), r0);
+
+ // Store the function. Use a stub since we need a frame for allocation.
+ // r4 - vector
+ // r5 - slot
+ // r3 - function
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ CreateWeakCellStub create_stub(masm->isolate());
+ __ Push(r3);
+ __ CallStub(&create_stub);
+ __ Pop(r3);
+ }
+
+ __ b(&have_js_function);
+
+ // We are here because tracing is on or we encountered a MISS case we can't
+ // handle here.
+ __ bind(&miss);
+ GenerateMiss(masm);
+
+ // the slow case
+ __ bind(&slow_start);
+ // Check that the function is really a JavaScript function.
+ // r3: pushed function (to be verified)
+ __ JumpIfSmi(r3, &non_function);
+
+ // Goto slow case if we do not have a function.
+ __ CompareObjectType(r3, r6, r6, JS_FUNCTION_TYPE);
+ __ bne(&slow);
+ __ b(&have_js_function);
+}
+
+
+void CallICStub::GenerateMiss(MacroAssembler* masm) {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Push the function and feedback info.
+ __ Push(r3, r4, r5);
+
+ // Call the entry.
+ IC::UtilityId id = GetICState() == DEFAULT ? IC::kCallIC_Miss
+ : IC::kCallIC_Customization_Miss;
+
+ ExternalReference miss = ExternalReference(IC_Utility(id), masm->isolate());
+ __ CallExternalReference(miss, 3);
+
+ // Move result to r3 and exit the internal frame.
+ __ LoadRR(r3, r2);
+}
+
+
+// StringCharCodeAtGenerator
+void StringCharCodeAtGenerator::GenerateFast(MacroAssembler* masm) {
+ // If the receiver is a smi trigger the non-string case.
+ if (check_mode_ == RECEIVER_IS_UNKNOWN) {
+ __ JumpIfSmi(object_, receiver_not_string_);
+
+ // Fetch the instance type of the receiver into result register.
+ __ LoadP(result_, FieldMemOperand(object_, HeapObject::kMapOffset));
+ __ LoadlB(result_, FieldMemOperand(result_, Map::kInstanceTypeOffset));
+ // If the receiver is not a string trigger the non-string case.
+ __ mov(r0, Operand(kIsNotStringMask));
+ __ AndP(r0, result_);
+ __ bne(receiver_not_string_ /*, cr0*/);
+ }
+
+ // If the index is non-smi trigger the non-smi case.
+ __ JumpIfNotSmi(index_, &index_not_smi_);
+ __ bind(&got_smi_index_);
+
+ // Check for index out of range.
+ __ LoadP(ip, FieldMemOperand(object_, String::kLengthOffset));
+ __ CmpLogicalP(ip, index_);
+ __ ble(index_out_of_range_);
+
+ __ SmiUntag(index_);
+
+ StringCharLoadGenerator::Generate(masm, object_, index_, result_,
+ &call_runtime_);
+
+ __ SmiTag(result_);
+ __ bind(&exit_);
+}
+
+
+void StringCharCodeAtGenerator::GenerateSlow(
+ MacroAssembler* masm, EmbedMode embed_mode,
+ const RuntimeCallHelper& call_helper) {
+ __ Abort(kUnexpectedFallthroughToCharCodeAtSlowCase);
+
+ // Index is not a smi.
+ __ bind(&index_not_smi_);
+ // If index is a heap number, try converting it to an integer.
+ __ CheckMap(index_, result_, Heap::kHeapNumberMapRootIndex, index_not_number_,
+ DONT_DO_SMI_CHECK);
+ call_helper.BeforeCall(masm);
+ if (embed_mode == PART_OF_IC_HANDLER) {
+ __ Push(LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister(), object_, index_);
+ } else {
+ // index_ is consumed by runtime conversion function.
+ __ Push(object_, index_);
+ }
+ if (index_flags_ == STRING_INDEX_IS_NUMBER) {
+ __ CallRuntime(Runtime::kNumberToIntegerMapMinusZero, 1);
+ } else {
+ DCHECK(index_flags_ == STRING_INDEX_IS_ARRAY_INDEX);
+ // NumberToSmi discards numbers that are not exact integers.
+ __ CallRuntime(Runtime::kNumberToSmi, 1);
+ }
+ // Save the conversion result before the pop instructions below
+ // have a chance to overwrite it.
+ __ Move(index_, r2);
+ if (embed_mode == PART_OF_IC_HANDLER) {
+ __ Pop(LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister(), object_);
+ } else {
+ __ pop(object_);
+ }
+ // Reload the instance type.
+ __ LoadP(result_, FieldMemOperand(object_, HeapObject::kMapOffset));
+ __ LoadlB(result_, FieldMemOperand(result_, Map::kInstanceTypeOffset));
+ call_helper.AfterCall(masm);
+ // If index is still not a smi, it must be out of range.
+ __ JumpIfNotSmi(index_, index_out_of_range_);
+ // Otherwise, return to the fast path.
+ __ b(&got_smi_index_);
+
+ // Call runtime. We get here when the receiver is a string and the
+ // index is a number, but the code of getting the actual character
+ // is too complex (e.g., when the string needs to be flattened).
+ __ bind(&call_runtime_);
+ call_helper.BeforeCall(masm);
+ __ SmiTag(index_);
+ __ Push(object_, index_);
+ __ CallRuntime(Runtime::kStringCharCodeAtRT, 2);
+ __ Move(result_, r2);
+ call_helper.AfterCall(masm);
+ __ b(&exit_);
+
+ __ Abort(kUnexpectedFallthroughFromCharCodeAtSlowCase);
+}
+
+
+// -------------------------------------------------------------------------
+// StringCharFromCodeGenerator
+
+void StringCharFromCodeGenerator::GenerateFast(MacroAssembler* masm) {
+ // Fast case of Heap::LookupSingleCharacterStringFromCode.
+ DCHECK(base::bits::IsPowerOfTwo32(String::kMaxOneByteCharCode + 1));
+ __ LoadSmiLiteral(r0, Smi::FromInt(~String::kMaxOneByteCharCode));
+ __ OrP(r0, Operand(kSmiTagMask));
+ __ AndP(r0, code_);
+ __ CmpP(r0, Operand::Zero());
+ __ bne(&slow_case_);
+
+ __ LoadRoot(result_, Heap::kSingleCharacterStringCacheRootIndex);
+ // At this point code register contains smi tagged one-byte char code.
+ __ LoadRR(r0, code_);
+ __ SmiToPtrArrayOffset(code_, code_);
+ __ AddP(result_, code_);
+ __ LoadRR(code_, r0);
+ __ LoadP(result_, FieldMemOperand(result_, FixedArray::kHeaderSize));
+ __ CompareRoot(result_, Heap::kUndefinedValueRootIndex);
+ __ beq(&slow_case_);
+ __ bind(&exit_);
+}
+
+
+void StringCharFromCodeGenerator::GenerateSlow(
+ MacroAssembler* masm, const RuntimeCallHelper& call_helper) {
+ __ Abort(kUnexpectedFallthroughToCharFromCodeSlowCase);
+
+ __ bind(&slow_case_);
+ call_helper.BeforeCall(masm);
+ __ push(code_);
+ __ CallRuntime(Runtime::kCharFromCode, 1);
+ __ Move(result_, r2);
+ call_helper.AfterCall(masm);
+ __ b(&exit_);
+
+ __ Abort(kUnexpectedFallthroughFromCharFromCodeSlowCase);
+}
+
+
+enum CopyCharactersFlags { COPY_ASCII = 1, DEST_ALWAYS_ALIGNED = 2 };
+
+
+void StringHelper::GenerateCopyCharacters(MacroAssembler* masm, Register dest,
+ Register src, Register count,
+ Register scratch,
+ String::Encoding encoding) {
+ if (FLAG_debug_code) {
+ // Check that destination is word aligned.
+ __ mov(r0, Operand(kPointerAlignmentMask));
+ __ AndP(r0, dest);
+ __ Check(eq, kDestinationOfCopyNotAligned, cr0);
+ }
+
+ // Nothing to do for zero characters.
+ Label done;
+ if (encoding == String::TWO_BYTE_ENCODING) {
+ // double the length
+ __ AddP(count, count, count);
+ __ beq(&done, Label::kNear);
+ } else {
+ __ CmpP(count, Operand::Zero());
+ __ beq(&done, Label::kNear);
+ }
+
+ // Copy count bytes from src to dst.
+ Label byte_loop;
+ // TODO(joransiu): Convert into MVC loop
+ __ bind(&byte_loop);
+ __ LoadlB(scratch, MemOperand(src));
+ __ la(src, MemOperand(src, 1));
+ __ stc(scratch, MemOperand(dest));
+ __ la(dest, MemOperand(dest, 1));
+ __ BranchOnCount(count, &byte_loop);
+
+ __ bind(&done);
+}
+
+
+void SubStringStub::Generate(MacroAssembler* masm) {
+ Label runtime;
+
+ // Stack frame on entry.
+ // lr: return address
+ // sp[0]: to
+ // sp[4]: from
+ // sp[8]: string
+
+ // This stub is called from the native-call %_SubString(...), so
+ // nothing can be assumed about the arguments. It is tested that:
+ // "string" is a sequential string,
+ // both "from" and "to" are smis, and
+ // 0 <= from <= to <= string.length.
+ // If any of these assumptions fail, we call the runtime system.
+
+ const int kToOffset = 0 * kPointerSize;
+ const int kFromOffset = 1 * kPointerSize;
+ const int kStringOffset = 2 * kPointerSize;
+
+ __ LoadP(r4, MemOperand(sp, kToOffset));
+ __ LoadP(r5, MemOperand(sp, kFromOffset));
+
+ // If either to or from had the smi tag bit set, then fail to generic runtime
+ __ JumpIfNotSmi(r4, &runtime);
+ __ JumpIfNotSmi(r5, &runtime);
+ __ SmiUntag(r4);
+ __ SmiUntag(r5);
+ // Both r4 and r5 are untagged integers.
+
+ // We want to bailout to runtime here if From is negative.
+ __ blt(&runtime /*, cr0*/); // From < 0.
+
+ __ CmpLogicalP(r5, r4);
+ __ bgt(&runtime); // Fail if from > to.
+ __ SubP(r4, r4, r5);
+
+ // Make sure first argument is a string.
+ __ LoadP(r2, MemOperand(sp, kStringOffset));
+ __ JumpIfSmi(r2, &runtime);
+ Condition is_string = masm->IsObjectStringType(r2, r3);
+ __ b(NegateCondition(is_string), &runtime /*, cr0*/);
+
+ Label single_char;
+ __ CmpP(r4, Operand(1));
+ __ b(eq, &single_char);
+
+ // Short-cut for the case of trivial substring.
+ Label return_r2;
+ // r2: original string
+ // r4: result string length
+ __ LoadP(r6, FieldMemOperand(r2, String::kLengthOffset));
+ __ SmiUntag(r0, r6);
+ __ CmpLogicalP(r4, r0);
+ // Return original string.
+ __ beq(&return_r2);
+ // Longer than original string's length or negative: unsafe arguments.
+ __ bgt(&runtime);
+ // Shorter than original string's length: an actual substring.
+
+ // Deal with different string types: update the index if necessary
+ // and put the underlying string into r7.
+ // r2: original string
+ // r3: instance type
+ // r4: length
+ // r5: from index (untagged)
+ Label underlying_unpacked, sliced_string, seq_or_external_string;
+ // If the string is not indirect, it can only be sequential or external.
+ STATIC_ASSERT(kIsIndirectStringMask == (kSlicedStringTag & kConsStringTag));
+ STATIC_ASSERT(kIsIndirectStringMask != 0);
+ __ mov(r0, Operand(kIsIndirectStringMask));
+ __ AndP(r0, r3);
+ __ beq(&seq_or_external_string /*, cr0*/);
+
+ __ mov(r0, Operand(kSlicedNotConsMask));
+ __ AndP(r0, r3);
+ __ bne(&sliced_string /*, cr0*/);
+ // Cons string. Check whether it is flat, then fetch first part.
+ __ LoadP(r7, FieldMemOperand(r2, ConsString::kSecondOffset));
+ __ CompareRoot(r7, Heap::kempty_stringRootIndex);
+ __ bne(&runtime);
+ __ LoadP(r7, FieldMemOperand(r2, ConsString::kFirstOffset));
+ // Update instance type.
+ __ LoadP(r3, FieldMemOperand(r7, HeapObject::kMapOffset));
+ __ LoadlB(r3, FieldMemOperand(r3, Map::kInstanceTypeOffset));
+ __ b(&underlying_unpacked);
+
+ __ bind(&sliced_string);
+ // Sliced string. Fetch parent and correct start index by offset.
+ __ LoadP(r7, FieldMemOperand(r2, SlicedString::kParentOffset));
+ __ LoadP(r6, FieldMemOperand(r2, SlicedString::kOffsetOffset));
+ __ SmiUntag(r3, r6);
+ __ AddP(r5, r3); // Add offset to index.
+ // Update instance type.
+ __ LoadP(r3, FieldMemOperand(r7, HeapObject::kMapOffset));
+ __ LoadlB(r3, FieldMemOperand(r3, Map::kInstanceTypeOffset));
+ __ b(&underlying_unpacked);
+
+ __ bind(&seq_or_external_string);
+ // Sequential or external string. Just move string to the expected register.
+ __ LoadRR(r7, r2);
+
+ __ bind(&underlying_unpacked);
+
+ if (FLAG_string_slices) {
+ Label copy_routine;
+ // r7: underlying subject string
+ // r3: instance type of underlying subject string
+ // r4: length
+ // r5: adjusted start index (untagged)
+ __ CmpP(r4, Operand(SlicedString::kMinLength));
+ // Short slice. Copy instead of slicing.
+ __ blt(©_routine);
+ // Allocate new sliced string. At this point we do not reload the instance
+ // type including the string encoding because we simply rely on the info
+ // provided by the original string. It does not matter if the original
+ // string's encoding is wrong because we always have to recheck encoding of
+ // the newly created string's parent anyways due to externalized strings.
+ Label two_byte_slice, set_slice_header;
+ STATIC_ASSERT((kStringEncodingMask & kOneByteStringTag) != 0);
+ STATIC_ASSERT((kStringEncodingMask & kTwoByteStringTag) == 0);
+ __ mov(r0, Operand(kStringEncodingMask));
+ __ AndP(r0, r3);
+ __ beq(&two_byte_slice /*, cr0*/);
+ __ AllocateOneByteSlicedString(r2, r4, r8, r9, &runtime);
+ __ b(&set_slice_header);
+ __ bind(&two_byte_slice);
+ __ AllocateTwoByteSlicedString(r2, r4, r8, r9, &runtime);
+ __ bind(&set_slice_header);
+ __ SmiTag(r5);
+ __ StoreP(r7, FieldMemOperand(r2, SlicedString::kParentOffset));
+ __ StoreP(r5, FieldMemOperand(r2, SlicedString::kOffsetOffset));
+ __ b(&return_r2);
+
+ __ bind(©_routine);
+ }
+
+ // r7: underlying subject string
+ // r3: instance type of underlying subject string
+ // r4: length
+ // r5: adjusted start index (untagged)
+ Label two_byte_sequential, sequential_string, allocate_result;
+ STATIC_ASSERT(kExternalStringTag != 0);
+ STATIC_ASSERT(kSeqStringTag == 0);
+ __ mov(r0, Operand(kExternalStringTag));
+ __ AndP(r0, r3);
+ __ beq(&sequential_string /*, cr0*/);
+
+ // Handle external string.
+ // Rule out short external strings.
+ STATIC_ASSERT(kShortExternalStringTag != 0);
+ __ mov(r0, Operand(kShortExternalStringTag));
+ __ AndP(r0, r3);
+ __ bne(&runtime /*, cr0*/);
+ __ LoadP(r7, FieldMemOperand(r7, ExternalString::kResourceDataOffset));
+ // r7 already points to the first character of underlying string.
+ __ b(&allocate_result);
+
+ __ bind(&sequential_string);
+ // Locate first character of underlying subject string.
+ STATIC_ASSERT(SeqTwoByteString::kHeaderSize == SeqOneByteString::kHeaderSize);
+ __ AddP(r7, Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+
+ __ bind(&allocate_result);
+ // Sequential acii string. Allocate the result.
+ STATIC_ASSERT((kOneByteStringTag & kStringEncodingMask) != 0);
+ __ mov(r0, Operand(kStringEncodingMask));
+ __ AndP(r0, r3);
+ __ beq(&two_byte_sequential /*, cr0*/);
+
+ // Allocate and copy the resulting one-byte string.
+ __ AllocateOneByteString(r2, r4, r6, r8, r9, &runtime);
+
+ // Locate first character of substring to copy.
+ __ AddP(r7, r5);
+ // Locate first character of result.
+ __ AddP(r3, r2, Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+
+ // r2: result string
+ // r3: first character of result string
+ // r4: result string length
+ // r7: first character of substring to copy
+ STATIC_ASSERT((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);
+ StringHelper::GenerateCopyCharacters(masm, r3, r7, r4, r5,
+ String::ONE_BYTE_ENCODING);
+ __ b(&return_r2);
+
+ // Allocate and copy the resulting two-byte string.
+ __ bind(&two_byte_sequential);
+ __ AllocateTwoByteString(r2, r4, r6, r8, r9, &runtime);
+
+ // Locate first character of substring to copy.
+ __ ShiftLeftP(r3, r5, Operand(1));
+ __ AddP(r7, r3);
+ // Locate first character of result.
+ __ AddP(r3, r2, Operand(SeqTwoByteString::kHeaderSize - kHeapObjectTag));
+
+ // r2: result string.
+ // r3: first character of result.
+ // r4: result length.
+ // r7: first character of substring to copy.
+ STATIC_ASSERT((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
+ StringHelper::GenerateCopyCharacters(masm, r3, r7, r4, r5,
+ String::TWO_BYTE_ENCODING);
+
+ __ bind(&return_r2);
+ Counters* counters = isolate()->counters();
+ __ IncrementCounter(counters->sub_string_native(), 1, r5, r6);
+ __ Drop(3);
+ __ Ret();
+
+ // Just jump to runtime to create the sub string.
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kSubStringRT, 3, 1);
+
+ __ bind(&single_char);
+ // r2: original string
+ // r3: instance type
+ // r4: length
+ // r5: from index (untagged)
+ __ SmiTag(r5, r5);
+ StringCharAtGenerator generator(r2, r5, r4, r2, &runtime, &runtime, &runtime,
+ STRING_INDEX_IS_NUMBER, RECEIVER_IS_STRING);
+ generator.GenerateFast(masm);
+ __ Drop(3);
+ __ Ret();
+ generator.SkipSlow(masm, &runtime);
+}
+
+
+void ToNumberStub::Generate(MacroAssembler* masm) {
+ // The ToNumber stub takes one argument in r2.
+ Label not_smi;
+ __ JumpIfNotSmi(r2, ¬_smi);
+ __ b(r14);
+ __ bind(¬_smi);
+
+ Label not_heap_number;
+ __ LoadP(r3, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ LoadlB(r3, FieldMemOperand(r3, Map::kInstanceTypeOffset));
+ // r2: object
+ // r3: instance type.
+ __ CmpP(r3, Operand(HEAP_NUMBER_TYPE));
+ __ bne(¬_heap_number, Label::kNear);
+ __ b(r14);
+ __ bind(¬_heap_number);
+
+ Label not_string, slow_string;
+ __ CmpLogicalP(r3, Operand(FIRST_NONSTRING_TYPE));
+ __ bge(¬_string, Label::kNear);
+ // Check if string has a cached array index.
+ __ LoadlW(r4, FieldMemOperand(r2, String::kHashFieldOffset));
+ __ AndP(r0, r4, Operand(String::kContainsCachedArrayIndexMask));
+ __ bne(&slow_string, Label::kNear);
+ __ IndexFromHash(r4, r2);
+ __ b(r14);
+ __ bind(&slow_string);
+ __ push(r2); // Push argument.
+ __ TailCallRuntime(Runtime::kStringToNumber, 1, 1);
+ __ bind(¬_string);
+
+ Label not_oddball;
+ __ CmpP(r3, Operand(ODDBALL_TYPE));
+ __ bne(¬_oddball, Label::kNear);
+ __ LoadP(r2, FieldMemOperand(r2, Oddball::kToNumberOffset));
+ __ b(r14);
+ __ bind(¬_oddball);
+
+ __ push(r2); // Push argument.
+ __ InvokeBuiltin(Builtins::TO_NUMBER, JUMP_FUNCTION);
+}
+
+
+void StringHelper::GenerateFlatOneByteStringEquals(MacroAssembler* masm,
+ Register left,
+ Register right,
+ Register scratch1,
+ Register scratch2) {
+ Register length = scratch1;
+
+ // Compare lengths.
+ Label strings_not_equal, check_zero_length;
+ __ LoadP(length, FieldMemOperand(left, String::kLengthOffset));
+ __ LoadP(scratch2, FieldMemOperand(right, String::kLengthOffset));
+ __ CmpP(length, scratch2);
+ __ beq(&check_zero_length);
+ __ bind(&strings_not_equal);
+ __ LoadSmiLiteral(r2, Smi::FromInt(NOT_EQUAL));
+ __ Ret();
+
+ // Check if the length is zero.
+ Label compare_chars;
+ __ bind(&check_zero_length);
+ STATIC_ASSERT(kSmiTag == 0);
+ __ CmpP(length, Operand::Zero());
+ __ bne(&compare_chars);
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ Ret();
+
+ // Compare characters.
+ __ bind(&compare_chars);
+ GenerateOneByteCharsCompareLoop(masm, left, right, length, scratch2,
+ &strings_not_equal);
+
+ // Characters are equal.
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ Ret();
+}
+
+
+void StringHelper::GenerateCompareFlatOneByteStrings(
+ MacroAssembler* masm, Register left, Register right, Register scratch1,
+ Register scratch2, Register scratch3) {
+ Label skip, result_not_equal, compare_lengths;
+ // Find minimum length and length difference.
+ __ LoadP(scratch1, FieldMemOperand(left, String::kLengthOffset));
+ __ LoadP(scratch2, FieldMemOperand(right, String::kLengthOffset));
+ __ SubP(scratch3, scratch1, scratch2/*, LeaveOE, SetRC*/);
+ // Removing RC looks okay here.
+ Register length_delta = scratch3;
+ __ ble(&skip, Label::kNear);
+ __ LoadRR(scratch1, scratch2);
+ __ bind(&skip);
+ Register min_length = scratch1;
+ STATIC_ASSERT(kSmiTag == 0);
+ __ CmpP(min_length, Operand::Zero());
+ __ beq(&compare_lengths);
+
+ // Compare loop.
+ GenerateOneByteCharsCompareLoop(masm, left, right, min_length, scratch2,
+ &result_not_equal);
+
+ // Compare lengths - strings up to min-length are equal.
+ __ bind(&compare_lengths);
+ DCHECK(Smi::FromInt(EQUAL) == static_cast<Smi*>(0));
+ // Use length_delta as result if it's zero.
+ __ LoadRR(r2, length_delta);
+ __ CmpP(length_delta, Operand::Zero());
+ __ bind(&result_not_equal);
+ // Conditionally update the result based either on length_delta or
+ // the last comparion performed in the loop above.
+ Label less_equal, equal;
+ __ ble(&less_equal);
+ __ LoadSmiLiteral(r2, Smi::FromInt(GREATER));
+ __ Ret();
+ __ bind(&less_equal);
+ __ beq(&equal);
+ __ LoadSmiLiteral(r2, Smi::FromInt(LESS));
+ __ bind(&equal);
+ __ Ret();
+}
+
+
+void StringHelper::GenerateOneByteCharsCompareLoop(
+ MacroAssembler* masm, Register left, Register right, Register length,
+ Register scratch1, Label* chars_not_equal) {
+ // Change index to run from -length to -1 by adding length to string
+ // start. This means that loop ends when index reaches zero, which
+ // doesn't need an additional compare.
+ __ SmiUntag(length);
+ __ AddP(scratch1, length,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ AddP(left, scratch1);
+ __ AddP(right, scratch1);
+ __ LoadComplementRR(length, length);
+ Register index = length; // index = -length;
+
+ // Compare loop.
+ Label loop;
+ __ bind(&loop);
+ __ LoadlB(scratch1, MemOperand(left, index));
+ __ LoadlB(r0, MemOperand(right, index));
+ __ CmpP(scratch1, r0);
+ __ bne(chars_not_equal);
+ __ AddP(index, Operand(1));
+ __ CmpP(index, Operand::Zero());
+ __ bne(&loop);
+}
+
+
+void StringCompareStub::Generate(MacroAssembler* masm) {
+ Label runtime;
+
+ Counters* counters = isolate()->counters();
+
+ // Stack frame on entry.
+ // sp[0]: right string
+ // sp[4]: left string
+ __ LoadP(r2, MemOperand(sp)); // Load right in r2, left in r3.
+ __ LoadP(r3, MemOperand(sp, kPointerSize));
+
+ Label not_same;
+ __ CmpP(r2, r3);
+ __ bne(¬_same);
+ STATIC_ASSERT(EQUAL == 0);
+ STATIC_ASSERT(kSmiTag == 0);
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ IncrementCounter(counters->string_compare_native(), 1, r3, r4);
+ __ la(sp, MemOperand(sp, (2 * kPointerSize)));
+ __ Ret();
+
+ __ bind(¬_same);
+
+ // Check that both objects are sequential one-byte strings.
+ __ JumpIfNotBothSequentialOneByteStrings(r3, r2, r4, r5, &runtime);
+
+ // Compare flat one-byte strings natively. Remove arguments from stack first.
+ __ IncrementCounter(counters->string_compare_native(), 1, r4, r5);
+ __ la(sp, MemOperand(sp, (2 * kPointerSize)));
+ StringHelper::GenerateCompareFlatOneByteStrings(masm, r3, r2, r4, r5, r6);
+
+ // Call the runtime; it returns -1 (less), 0 (equal), or 1 (greater)
+ // tagged as a small integer.
+ __ bind(&runtime);
+ __ TailCallRuntime(Runtime::kStringCompareRT, 2, 1);
+}
+
+
+void BinaryOpICWithAllocationSiteStub::Generate(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r3 : left
+ // -- r2 : right
+ // r3: second string
+ // -----------------------------------
+
+ // Load r4 with the allocation site. We stick an undefined dummy value here
+ // and replace it with the real allocation site later when we instantiate this
+ // stub in BinaryOpICWithAllocationSiteStub::GetCodeCopyFromTemplate().
+ __ Move(r4, handle(isolate()->heap()->undefined_value()));
+
+ // Make sure that we actually patched the allocation site.
+ if (FLAG_debug_code) {
+ __ TestIfSmi(r4);
+ __ Assert(ne, kExpectedAllocationSite, cr0);
+ __ push(r4);
+ __ LoadP(r4, FieldMemOperand(r4, HeapObject::kMapOffset));
+ __ CompareRoot(r4, Heap::kAllocationSiteMapRootIndex);
+ __ pop(r4);
+ __ Assert(eq, kExpectedAllocationSite);
+ }
+
+ // Tail call into the stub that handles binary operations with allocation
+ // sites.
+ BinaryOpWithAllocationSiteStub stub(isolate(), state());
+ __ TailCallStub(&stub);
+}
+
+
+void CompareICStub::GenerateSmis(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::SMI);
+ Label miss;
+ __ OrP(r4, r3, r2);
+ __ JumpIfNotSmi(r4, &miss);
+
+ if (GetCondition() == eq) {
+ // For equality we do not care about the sign of the result.
+ // __ sub(r2, r2, r3, SetCC);
+ __ SubP(r2, r2, r3);
+ } else {
+ // Untag before subtracting to avoid handling overflow.
+ __ SmiUntag(r3);
+ __ SmiUntag(r2);
+ __ SubP(r2, r3, r2);
+ }
+ __ Ret();
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateNumbers(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::NUMBER);
+
+ Label generic_stub;
+ Label unordered, maybe_undefined1, maybe_undefined2;
+ Label miss;
+ Label equal, less_than;
+
+ if (left() == CompareICState::SMI) {
+ __ JumpIfNotSmi(r3, &miss);
+ }
+ if (right() == CompareICState::SMI) {
+ __ JumpIfNotSmi(r2, &miss);
+ }
+
+ // Inlining the double comparison and falling back to the general compare
+ // stub if NaN is involved.
+ // Load left and right operand.
+ Label done, left, left_smi, right_smi;
+ __ JumpIfSmi(r2, &right_smi);
+ __ CheckMap(r2, r4, Heap::kHeapNumberMapRootIndex, &maybe_undefined1,
+ DONT_DO_SMI_CHECK);
+ __ LoadF(d1, FieldMemOperand(r2, HeapNumber::kValueOffset));
+ __ b(&left);
+ __ bind(&right_smi);
+ __ SmiToDouble(d1, r2);
+
+ __ bind(&left);
+ __ JumpIfSmi(r3, &left_smi);
+ __ CheckMap(r3, r4, Heap::kHeapNumberMapRootIndex, &maybe_undefined2,
+ DONT_DO_SMI_CHECK);
+ __ LoadF(d0, FieldMemOperand(r3, HeapNumber::kValueOffset));
+ __ b(&done);
+ __ bind(&left_smi);
+ __ SmiToDouble(d0, r3);
+
+ __ bind(&done);
+
+ // Compare operands
+ __ cdbr(d0, d1);
+
+ // Don't base result on status bits when a NaN is involved.
+ __ bunordered(&unordered);
+
+ // Return a result of -1, 0, or 1, based on status bits.
+ __ beq(&equal);
+ __ blt(&less_than);
+ // assume greater than
+ __ LoadImmP(r2, Operand(GREATER));
+ __ Ret();
+ __ bind(&equal);
+ __ LoadImmP(r2, Operand(EQUAL));
+ __ Ret();
+ __ bind(&less_than);
+ __ LoadImmP(r2, Operand(LESS));
+ __ Ret();
+
+ __ bind(&unordered);
+ __ bind(&generic_stub);
+ CompareICStub stub(isolate(), op(), strength(), CompareICState::GENERIC,
+ CompareICState::GENERIC, CompareICState::GENERIC);
+ __ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
+
+ __ bind(&maybe_undefined1);
+ if (Token::IsOrderedRelationalCompareOp(op())) {
+ __ CompareRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ bne(&miss);
+ __ JumpIfSmi(r3, &unordered);
+ __ CompareObjectType(r3, r4, r4, HEAP_NUMBER_TYPE);
+ __ bne(&maybe_undefined2);
+ __ b(&unordered);
+ }
+
+ __ bind(&maybe_undefined2);
+ if (Token::IsOrderedRelationalCompareOp(op())) {
+ __ CompareRoot(r3, Heap::kUndefinedValueRootIndex);
+ __ beq(&unordered);
+ }
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateInternalizedStrings(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::INTERNALIZED_STRING);
+ Label miss, not_equal;
+
+ // Registers containing left and right operands respectively.
+ Register left = r3;
+ Register right = r2;
+ Register tmp1 = r4;
+ Register tmp2 = r5;
+
+ // Check that both operands are heap objects.
+ __ JumpIfEitherSmi(left, right, &miss);
+
+ // Check that both operands are symbols.
+ __ LoadP(tmp1, FieldMemOperand(left, HeapObject::kMapOffset));
+ __ LoadP(tmp2, FieldMemOperand(right, HeapObject::kMapOffset));
+ __ LoadlB(tmp1, FieldMemOperand(tmp1, Map::kInstanceTypeOffset));
+ __ LoadlB(tmp2, FieldMemOperand(tmp2, Map::kInstanceTypeOffset));
+ STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
+ __ OrP(tmp1, tmp1, tmp2);
+ __ AndP(r0, tmp1, Operand(kIsNotStringMask | kIsNotInternalizedMask));
+ __ bne(&miss/*, cr0*/);
+
+ // Internalized strings are compared by identity.
+ __ CmpP(left, right);
+ __ bne(¬_equal);
+ // Make sure r2 is non-zero. At this point input operands are
+ // guaranteed to be non-zero.
+ DCHECK(right.is(r2));
+ STATIC_ASSERT(EQUAL == 0);
+ STATIC_ASSERT(kSmiTag == 0);
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ bind(¬_equal);
+ __ Ret();
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateUniqueNames(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::UNIQUE_NAME);
+ DCHECK(GetCondition() == eq);
+ Label miss;
+
+ // Registers containing left and right operands respectively.
+ Register left = r3;
+ Register right = r2;
+ Register tmp1 = r4;
+ Register tmp2 = r5;
+
+ // Check that both operands are heap objects.
+ __ JumpIfEitherSmi(left, right, &miss);
+
+ // Check that both operands are unique names. This leaves the instance
+ // types loaded in tmp1 and tmp2.
+ __ LoadP(tmp1, FieldMemOperand(left, HeapObject::kMapOffset));
+ __ LoadP(tmp2, FieldMemOperand(right, HeapObject::kMapOffset));
+ __ LoadlB(tmp1, FieldMemOperand(tmp1, Map::kInstanceTypeOffset));
+ __ LoadlB(tmp2, FieldMemOperand(tmp2, Map::kInstanceTypeOffset));
+
+ __ JumpIfNotUniqueNameInstanceType(tmp1, &miss);
+ __ JumpIfNotUniqueNameInstanceType(tmp2, &miss);
+
+ // Unique names are compared by identity.
+ __ CmpP(left, right);
+ __ bne(&miss);
+ // Make sure r2 is non-zero. At this point input operands are
+ // guaranteed to be non-zero.
+ DCHECK(right.is(r2));
+ STATIC_ASSERT(EQUAL == 0);
+ STATIC_ASSERT(kSmiTag == 0);
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ Ret();
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateStrings(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::STRING);
+ Label miss, not_identical, is_symbol;
+
+ bool equality = Token::IsEqualityOp(op());
+
+ // Registers containing left and right operands respectively.
+ Register left = r3;
+ Register right = r2;
+ Register tmp1 = r4;
+ Register tmp2 = r5;
+ Register tmp3 = r6;
+ Register tmp4 = r7;
+
+ // Check that both operands are heap objects.
+ __ JumpIfEitherSmi(left, right, &miss);
+
+ // Check that both operands are strings. This leaves the instance
+ // types loaded in tmp1 and tmp2.
+ __ LoadP(tmp1, FieldMemOperand(left, HeapObject::kMapOffset));
+ __ LoadP(tmp2, FieldMemOperand(right, HeapObject::kMapOffset));
+ __ LoadlB(tmp1, FieldMemOperand(tmp1, Map::kInstanceTypeOffset));
+ __ LoadlB(tmp2, FieldMemOperand(tmp2, Map::kInstanceTypeOffset));
+ STATIC_ASSERT(kNotStringTag != 0);
+ __ OrP(tmp3, tmp1, tmp2);
+ __ AndP(r0, tmp3, Operand(kIsNotStringMask));
+ __ bne(&miss /*, cr0*/);
+ // TODO(JOHN): might be a problem b/c cr0 is not set
+
+ // Fast check for identical strings.
+ __ CmpP(left, right);
+ STATIC_ASSERT(EQUAL == 0);
+ STATIC_ASSERT(kSmiTag == 0);
+ __ bne(¬_identical);
+ __ LoadSmiLiteral(r2, Smi::FromInt(EQUAL));
+ __ Ret();
+ __ bind(¬_identical);
+
+ // Handle not identical strings.
+
+ // Check that both strings are internalized strings. If they are, we're done
+ // because we already know they are not identical. We know they are both
+ // strings.
+ if (equality) {
+ DCHECK(GetCondition() == eq);
+ STATIC_ASSERT(kInternalizedTag == 0);
+ __ OrP(tmp3, tmp1, tmp2);
+ __ AndP(r0, tmp3, Operand(kIsNotInternalizedMask));
+ __ bne(&is_symbol/*, cr0*/);
+ // Make sure r2 is non-zero. At this point input operands are
+ // guaranteed to be non-zero.
+ DCHECK(right.is(r2));
+ __ Ret();
+ __ bind(&is_symbol);
+ }
+
+ // Check that both strings are sequential one-byte.
+ Label runtime;
+ __ JumpIfBothInstanceTypesAreNotSequentialOneByte(tmp1, tmp2, tmp3, tmp4,
+ &runtime);
+
+ // Compare flat one-byte strings. Returns when done.
+ if (equality) {
+ StringHelper::GenerateFlatOneByteStringEquals(masm, left, right, tmp1,
+ tmp2);
+ } else {
+ StringHelper::GenerateCompareFlatOneByteStrings(masm, left, right, tmp1,
+ tmp2, tmp3);
+ }
+
+ // Handle more complex cases in runtime.
+ __ bind(&runtime);
+ __ Push(left, right);
+ if (equality) {
+ __ TailCallRuntime(Runtime::kStringEquals, 2, 1);
+ } else {
+ __ TailCallRuntime(Runtime::kStringCompareRT, 2, 1);
+ }
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateObjects(MacroAssembler* masm) {
+ DCHECK(state() == CompareICState::OBJECT);
+ Label miss;
+ __ AndP(r4, r3, r2);
+ __ JumpIfSmi(r4, &miss);
+
+ __ CompareObjectType(r2, r4, r4, JS_OBJECT_TYPE);
+ __ bne(&miss);
+ __ CompareObjectType(r3, r4, r4, JS_OBJECT_TYPE);
+ __ bne(&miss);
+
+ DCHECK(GetCondition() == eq);
+ __ SubP(r2, r2, r3);
+ __ Ret();
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+void CompareICStub::GenerateKnownObjects(MacroAssembler* masm) {
+ Label miss;
+ Handle<WeakCell> cell = Map::WeakCellForMap(known_map_);
+ __ AndP(r4, r3, r2);
+ __ JumpIfSmi(r4, &miss);
+ __ GetWeakValue(r6, cell);
+ __ LoadP(r4, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ LoadP(r5, FieldMemOperand(r3, HeapObject::kMapOffset));
+ __ CmpP(r4, r6);
+ __ bne(&miss);
+ __ CmpP(r5, r6);
+ __ bne(&miss);
+
+ __ SubP(r2, r2, r3);
+ __ Ret();
+
+ __ bind(&miss);
+ GenerateMiss(masm);
+}
+
+
+
+void CompareICStub::GenerateMiss(MacroAssembler* masm) {
+ {
+ // Call the runtime system in a fresh internal frame.
+ ExternalReference miss =
+ ExternalReference(IC_Utility(IC::kCompareIC_Miss), isolate());
+
+ FrameScope scope(masm, StackFrame::INTERNAL);
+ __ Push(r3, r2);
+ __ Push(r3, r2);
+ __ LoadSmiLiteral(r0, Smi::FromInt(op()));
+ __ push(r0);
+ __ CallExternalReference(miss, 3);
+ // Compute the entry point of the rewritten stub.
+ __ AddP(r4, r2, Operand(Code::kHeaderSize - kHeapObjectTag));
+ // Restore registers.
+ __ Pop(r3, r2);
+ }
+
+ __ JumpToJSEntry(r4);
+}
+
+
+// This stub is paired with DirectCEntryStub::GenerateCall
+void DirectCEntryStub::Generate(MacroAssembler* masm) {
+ __ CleanseP(r14);
+
+ // Statement positions are expected to be recorded when the target
+ // address is loaded.
+ __ positions_recorder()->WriteRecordedPositions();
+
+ __ b(ip); // Callee will return to R14 directly
+}
+
+
+void DirectCEntryStub::GenerateCall(MacroAssembler* masm, Register target) {
+#if ABI_USES_FUNCTION_DESCRIPTORS && !defined(USE_SIMULATOR)
+ // Native AIX/S390X Linux use a function descriptor.
+ __ LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(target, kPointerSize));
+ __ LoadP(target, MemOperand(target, 0)); // Instruction address
+#else
+ // ip needs to be set for DirectCEentryStub::Generate, and also
+ // for ABI_TOC_ADDRESSABILITY_VIA_IP.
+ __ Move(ip, target);
+#endif
+
+ __ call(GetCode(), RelocInfo::CODE_TARGET); // Call the stub.
+}
+
+
+void NameDictionaryLookupStub::GenerateNegativeLookup(
+ MacroAssembler* masm, Label* miss, Label* done, Register receiver,
+ Register properties, Handle<Name> name, Register scratch0) {
+ DCHECK(name->IsUniqueName());
+ // If names of slots in range from 1 to kProbes - 1 for the hash value are
+ // not equal to the name and kProbes-th slot is not used (its name is the
+ // undefined value), it guarantees the hash table doesn't contain the
+ // property. It's true even if some slots represent deleted properties
+ // (their names are the hole value).
+ for (int i = 0; i < kInlinedProbes; i++) {
+ // scratch0 points to properties hash.
+ // Compute the masked index: (hash + i + i * i) & mask.
+ Register index = scratch0;
+ // Capacity is smi 2^n.
+ __ LoadP(index, FieldMemOperand(properties, kCapacityOffset));
+ __ SubP(index, Operand(1));
+ __ LoadSmiLiteral(
+ ip, Smi::FromInt(name->Hash() + NameDictionary::GetProbeOffset(i)));
+ __ AndP(index, ip);
+
+ // Scale the index by multiplying by the entry size.
+ STATIC_ASSERT(NameDictionary::kEntrySize == 3);
+ __ ShiftLeftP(ip, index, Operand(1));
+ __ AddP(index, ip); // index *= 3.
+
+ Register entity_name = scratch0;
+ // Having undefined at this place means the name is not contained.
+ Register tmp = properties;
+ __ SmiToPtrArrayOffset(ip, index);
+ __ AddP(tmp, properties, ip);
+ __ LoadP(entity_name, FieldMemOperand(tmp, kElementsStartOffset));
+
+ DCHECK(!tmp.is(entity_name));
+ __ CompareRoot(entity_name, Heap::kUndefinedValueRootIndex);
+ __ beq(done);
+
+ // Stop if found the property.
+ __ CmpP(entity_name, Operand(Handle<Name>(name)));
+ __ beq(miss);
+
+ Label good;
+ __ CompareRoot(entity_name, Heap::kTheHoleValueRootIndex);
+ __ beq(&good);
+
+ // Check if the entry name is not a unique name.
+ __ LoadP(entity_name, FieldMemOperand(entity_name, HeapObject::kMapOffset));
+ __ LoadlB(entity_name,
+ FieldMemOperand(entity_name, Map::kInstanceTypeOffset));
+ __ JumpIfNotUniqueNameInstanceType(entity_name, miss);
+ __ bind(&good);
+
+ // Restore the properties.
+ __ LoadP(properties,
+ FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+ }
+
+ const int spill_mask = (r0.bit() | r8.bit() | r7.bit() | r6.bit() | r5.bit() |
+ r4.bit() | r3.bit() | r2.bit());
+
+ __ LoadRR(r0, r14);
+ __ MultiPush(spill_mask);
+
+ __ LoadP(r2, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
+ __ mov(r3, Operand(Handle<Name>(name)));
+ NameDictionaryLookupStub stub(masm->isolate(), NEGATIVE_LOOKUP);
+ __ CallStub(&stub);
+ __ CmpP(r2, Operand::Zero());
+
+ __ MultiPop(spill_mask); // MultiPop does not touch condition flags
+ __ LoadRR(r14, r0);
+
+ __ beq(done);
+ __ bne(miss);
+}
+
+
+// Probe the name dictionary in the |elements| register. Jump to the
+// |done| label if a property with the given name is found. Jump to
+// the |miss| label otherwise.
+// If lookup was successful |scratch2| will be equal to elements + 4 * index.
+void NameDictionaryLookupStub::GeneratePositiveLookup(
+ MacroAssembler* masm, Label* miss, Label* done, Register elements,
+ Register name, Register scratch1, Register scratch2) {
+ DCHECK(!elements.is(scratch1));
+ DCHECK(!elements.is(scratch2));
+ DCHECK(!name.is(scratch1));
+ DCHECK(!name.is(scratch2));
+
+ __ AssertName(name);
+
+ // Compute the capacity mask.
+ __ LoadP(scratch1, FieldMemOperand(elements, kCapacityOffset));
+ __ SmiUntag(scratch1); // convert smi to int
+ __ SubP(scratch1, Operand(1));
+
+ // Generate an unrolled loop that performs a few probes before
+ // giving up. Measurements done on Gmail indicate that 2 probes
+ // cover ~93% of loads from dictionaries.
+ for (int i = 0; i < kInlinedProbes; i++) {
+ // Compute the masked index: (hash + i + i * i) & mask.
+ __ LoadlW(scratch2, FieldMemOperand(name, String::kHashFieldOffset));
+ if (i > 0) {
+ // Add the probe offset (i + i * i) left shifted to avoid right shifting
+ // the hash in a separate instruction. The value hash + i + i * i is right
+ // shifted in the following and instruction.
+ DCHECK(NameDictionary::GetProbeOffset(i) <
+ 1 << (32 - Name::kHashFieldOffset));
+ __ AddP(scratch2,
+ Operand(NameDictionary::GetProbeOffset(i) << Name::kHashShift));
+ }
+ __ srl(scratch2, Operand(String::kHashShift));
+ __ AndP(scratch2, scratch1);
+
+ // Scale the index by multiplying by the element size.
+ DCHECK(NameDictionary::kEntrySize == 3);
+ // scratch2 = scratch2 * 3.
+ __ ShiftLeftP(ip, scratch2, Operand(1));
+ __ AddP(scratch2, ip);
+
+ // Check if the key is identical to the name.
+ __ ShiftLeftP(ip, scratch2, Operand(kPointerSizeLog2));
+ __ AddP(scratch2, elements, ip);
+ __ LoadP(ip, FieldMemOperand(scratch2, kElementsStartOffset));
+ __ CmpP(name, ip);
+ __ beq(done);
+ }
+
+ const int spill_mask = (r0.bit() | r8.bit() | r7.bit() | r6.bit() |
+ r5.bit() | r4.bit() | r3.bit() | r2.bit()) &
+ ~(scratch1.bit() | scratch2.bit());
+
+ __ LoadRR(r0, r14);
+ __ MultiPush(spill_mask);
+ if (name.is(r2)) {
+ DCHECK(!elements.is(r3));
+ __ LoadRR(r3, name);
+ __ LoadRR(r2, elements);
+ } else {
+ __ LoadRR(r2, elements);
+ __ LoadRR(r3, name);
+ }
+ NameDictionaryLookupStub stub(masm->isolate(), POSITIVE_LOOKUP);
+ __ CallStub(&stub);
+ __ LoadRR(r1, r2);
+ __ LoadRR(scratch2, r4);
+ __ MultiPop(spill_mask);
+ __ LoadRR(r14, r0);
+
+ __ CmpP(r1, Operand::Zero());
+ __ bne(done);
+ __ beq(miss);
+}
+
+
+void NameDictionaryLookupStub::Generate(MacroAssembler* masm) {
+ // This stub overrides SometimesSetsUpAFrame() to return false. That means
+ // we cannot call anything that could cause a GC from this stub.
+ // Registers:
+ // result: NameDictionary to probe
+ // r3: key
+ // dictionary: NameDictionary to probe.
+ // index: will hold an index of entry if lookup is successful.
+ // might alias with result_.
+ // Returns:
+ // result_ is zero if lookup failed, non zero otherwise.
+
+ Register result = r2;
+ Register dictionary = r2;
+ Register key = r3;
+ Register index = r4;
+ Register mask = r5;
+ Register hash = r6;
+ Register undefined = r7;
+ Register entry_key = r8;
+ Register scratch = r8;
+
+ Label in_dictionary, maybe_in_dictionary, not_in_dictionary;
+
+ __ LoadP(mask, FieldMemOperand(dictionary, kCapacityOffset));
+ __ SmiUntag(mask);
+ __ SubP(mask, Operand(1));
+
+ __ LoadlW(hash, FieldMemOperand(key, String::kHashFieldOffset));
+
+ __ LoadRoot(undefined, Heap::kUndefinedValueRootIndex);
+
+ for (int i = kInlinedProbes; i < kTotalProbes; i++) {
+ // Compute the masked index: (hash + i + i * i) & mask.
+ // Capacity is smi 2^n.
+ if (i > 0) {
+ // Add the probe offset (i + i * i) left shifted to avoid right shifting
+ // the hash in a separate instruction. The value hash + i + i * i is right
+ // shifted in the following and instruction.
+ DCHECK(NameDictionary::GetProbeOffset(i) <
+ 1 << (32 - Name::kHashFieldOffset));
+ __ AddP(index, hash,
+ Operand(NameDictionary::GetProbeOffset(i) << Name::kHashShift));
+ } else {
+ __ LoadRR(index, hash);
+ }
+ __ ShiftRight(r0, index, Operand(String::kHashShift));
+ __ AndP(index, r0, mask);
+
+ // Scale the index by multiplying by the entry size.
+ DCHECK(NameDictionary::kEntrySize == 3);
+ __ ShiftLeftP(scratch, index, Operand(1));
+ __ AddP(index, scratch); // index *= 3.
+
+ __ ShiftLeftP(scratch, index, Operand(kPointerSizeLog2));
+ __ AddP(index, dictionary, scratch);
+ __ LoadP(entry_key, FieldMemOperand(index, kElementsStartOffset));
+
+ // Having undefined at this place means the name is not contained.
+ __ CmpP(entry_key, undefined);
+ __ beq(¬_in_dictionary);
+
+ // Stop if found the property.
+ __ CmpP(entry_key, key);
+ __ beq(&in_dictionary);
+
+ if (i != kTotalProbes - 1 && mode() == NEGATIVE_LOOKUP) {
+ // Check if the entry name is not a unique name.
+ __ LoadP(entry_key, FieldMemOperand(entry_key, HeapObject::kMapOffset));
+ __ LoadlB(entry_key,
+ FieldMemOperand(entry_key, Map::kInstanceTypeOffset));
+ __ JumpIfNotUniqueNameInstanceType(entry_key, &maybe_in_dictionary);
+ }
+ }
+
+ __ bind(&maybe_in_dictionary);
+ // If we are doing negative lookup then probing failure should be
+ // treated as a lookup success. For positive lookup probing failure
+ // should be treated as lookup failure.
+ if (mode() == POSITIVE_LOOKUP) {
+ __ LoadImmP(result, Operand::Zero());
+ __ Ret();
+ }
+
+ __ bind(&in_dictionary);
+ __ LoadImmP(result, Operand(1));
+ __ Ret();
+
+ __ bind(¬_in_dictionary);
+ __ LoadImmP(result, Operand::Zero());
+ __ Ret();
+}
+
+
+void StoreBufferOverflowStub::GenerateFixedRegStubsAheadOfTime(
+ Isolate* isolate) {
+ StoreBufferOverflowStub stub1(isolate, kDontSaveFPRegs);
+ stub1.GetCode();
+ // Hydrogen code stubs need stub2 at snapshot time.
+ StoreBufferOverflowStub stub2(isolate, kSaveFPRegs);
+ stub2.GetCode();
+}
+
+
+// Takes the input in 3 registers: address_ value_ and object_. A pointer to
+// the value has just been written into the object, now this stub makes sure
+// we keep the GC informed. The word in the object where the value has been
+// written is in the address register.
+void RecordWriteStub::Generate(MacroAssembler* masm) {
+ Label skip_to_incremental_noncompacting;
+ Label skip_to_incremental_compacting;
+
+ // The first two branch instructions are generated with labels so as to
+ // get the offset fixed up correctly by the bind(Label*) call. We patch
+ // it back and forth between branch condition True and False
+ // when we start and stop incremental heap marking.
+ // See RecordWriteStub::Patch for details.
+
+ // Clear the bit, branch on True for NOP action initially
+ __ b(CC_NOP, &skip_to_incremental_noncompacting);
+ __ b(CC_NOP, &skip_to_incremental_compacting);
+
+ if (remembered_set_action() == EMIT_REMEMBERED_SET) {
+ __ RememberedSetHelper(object(), address(), value(), save_fp_regs_mode(),
+ MacroAssembler::kReturnAtEnd);
+ }
+ __ Ret();
+
+ __ bind(&skip_to_incremental_noncompacting);
+ GenerateIncremental(masm, INCREMENTAL);
+
+ __ bind(&skip_to_incremental_compacting);
+ GenerateIncremental(masm, INCREMENTAL_COMPACTION);
+
+ // Initial mode of the stub is expected to be STORE_BUFFER_ONLY.
+ // Will be checked in IncrementalMarking::ActivateGeneratedStub.
+ // patching not required on S390 as the initial path is effectively NOP
+}
+
+
+void RecordWriteStub::GenerateIncremental(MacroAssembler* masm, Mode mode) {
+ regs_.Save(masm);
+
+ if (remembered_set_action() == EMIT_REMEMBERED_SET) {
+ Label dont_need_remembered_set;
+
+ __ LoadP(regs_.scratch0(), MemOperand(regs_.address(), 0));
+ __ JumpIfNotInNewSpace(regs_.scratch0(), // Value.
+ regs_.scratch0(), &dont_need_remembered_set);
+
+ __ CheckPageFlag(regs_.object(), regs_.scratch0(),
+ 1 << MemoryChunk::SCAN_ON_SCAVENGE, ne,
+ &dont_need_remembered_set);
+
+ // First notify the incremental marker if necessary, then update the
+ // remembered set.
+ CheckNeedsToInformIncrementalMarker(
+ masm, kUpdateRememberedSetOnNoNeedToInformIncrementalMarker, mode);
+ InformIncrementalMarker(masm);
+ regs_.Restore(masm);
+ __ RememberedSetHelper(object(), address(), value(), save_fp_regs_mode(),
+ MacroAssembler::kReturnAtEnd);
+
+ __ bind(&dont_need_remembered_set);
+ }
+
+ CheckNeedsToInformIncrementalMarker(
+ masm, kReturnOnNoNeedToInformIncrementalMarker, mode);
+ InformIncrementalMarker(masm);
+ regs_.Restore(masm);
+ __ Ret();
+}
+
+
+void RecordWriteStub::InformIncrementalMarker(MacroAssembler* masm) {
+ regs_.SaveCallerSaveRegisters(masm, save_fp_regs_mode());
+ int argument_count = 3;
+ __ PrepareCallCFunction(argument_count, regs_.scratch0());
+ Register address =
+ r2.is(regs_.address()) ? regs_.scratch0() : regs_.address();
+ DCHECK(!address.is(regs_.object()));
+ DCHECK(!address.is(r2));
+ __ LoadRR(address, regs_.address());
+ __ LoadRR(r2, regs_.object());
+ __ LoadRR(r3, address);
+ __ mov(r4, Operand(ExternalReference::isolate_address(isolate())));
+
+ AllowExternalCallThatCantCauseGC scope(masm);
+ __ CallCFunction(
+ ExternalReference::incremental_marking_record_write_function(isolate()),
+ argument_count);
+ regs_.RestoreCallerSaveRegisters(masm, save_fp_regs_mode());
+}
+
+
+void RecordWriteStub::CheckNeedsToInformIncrementalMarker(
+ MacroAssembler* masm, OnNoNeedToInformIncrementalMarker on_no_need,
+ Mode mode) {
+ Label on_black;
+ Label need_incremental;
+ Label need_incremental_pop_scratch;
+
+ DCHECK((~Page::kPageAlignmentMask & 0xffff) == 0);
+ __ AndP(regs_.scratch0(), regs_.object(), Operand(~Page::kPageAlignmentMask));
+ __ LoadP(
+ regs_.scratch1(),
+ MemOperand(regs_.scratch0(), MemoryChunk::kWriteBarrierCounterOffset));
+ __ SubP(regs_.scratch1(), regs_.scratch1(), Operand(1));
+ __ StoreP(
+ regs_.scratch1(),
+ MemOperand(regs_.scratch0(), MemoryChunk::kWriteBarrierCounterOffset));
+ __ CmpP(regs_.scratch1(), Operand::Zero()); // S390, we could do better here
+ __ blt(&need_incremental);
+
+ // Let's look at the color of the object: If it is not black we don't have
+ // to inform the incremental marker.
+ __ JumpIfBlack(regs_.object(), regs_.scratch0(), regs_.scratch1(), &on_black);
+
+ regs_.Restore(masm);
+ if (on_no_need == kUpdateRememberedSetOnNoNeedToInformIncrementalMarker) {
+ __ RememberedSetHelper(object(), address(), value(), save_fp_regs_mode(),
+ MacroAssembler::kReturnAtEnd);
+ } else {
+ __ Ret();
+ }
+
+ __ bind(&on_black);
+
+ // Get the value from the slot.
+ __ LoadP(regs_.scratch0(), MemOperand(regs_.address(), 0));
+
+ if (mode == INCREMENTAL_COMPACTION) {
+ Label ensure_not_white;
+
+ __ CheckPageFlag(regs_.scratch0(), // Contains value.
+ regs_.scratch1(), // Scratch.
+ MemoryChunk::kEvacuationCandidateMask, eq,
+ &ensure_not_white);
+
+ __ CheckPageFlag(regs_.object(),
+ regs_.scratch1(), // Scratch.
+ MemoryChunk::kSkipEvacuationSlotsRecordingMask, eq,
+ &need_incremental);
+
+ __ bind(&ensure_not_white);
+ }
+
+ // We need extra registers for this, so we push the object and the address
+ // register temporarily.
+ __ Push(regs_.object(), regs_.address());
+ __ EnsureNotWhite(regs_.scratch0(), // The value.
+ regs_.scratch1(), // Scratch.
+ regs_.object(), // Scratch.
+ regs_.address(), // Scratch.
+ &need_incremental_pop_scratch);
+ __ Pop(regs_.object(), regs_.address());
+
+ regs_.Restore(masm);
+ if (on_no_need == kUpdateRememberedSetOnNoNeedToInformIncrementalMarker) {
+ __ RememberedSetHelper(object(), address(), value(), save_fp_regs_mode(),
+ MacroAssembler::kReturnAtEnd);
+ } else {
+ __ Ret();
+ }
+
+ __ bind(&need_incremental_pop_scratch);
+ __ Pop(regs_.object(), regs_.address());
+
+ __ bind(&need_incremental);
+
+ // Fall through when we need to inform the incremental marker.
+}
+
+
+void StoreArrayLiteralElementStub::Generate(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : element value to store
+ // -- r5 : element index as smi
+ // -- sp[0] : array literal index in function as smi
+ // -- sp[4] : array literal
+ // clobbers r2, r4, r6
+ // -----------------------------------
+
+ Label element_done;
+ Label double_elements;
+ Label smi_element;
+ Label slow_elements;
+ Label fast_elements;
+
+ // Get array literal index, array literal and its map.
+ __ LoadP(r6, MemOperand(sp, 0 * kPointerSize));
+ __ LoadP(r3, MemOperand(sp, 1 * kPointerSize));
+ __ LoadP(r4, FieldMemOperand(r3, JSObject::kMapOffset));
+
+ __ CheckFastElements(r4, r7, &double_elements);
+ // FAST_*_SMI_ELEMENTS or FAST_*_ELEMENTS
+ __ JumpIfSmi(r2, &smi_element);
+ __ CheckFastSmiElements(r4, r7, &fast_elements);
+
+ // Store into the array literal requires a elements transition. Call into
+ // the runtime.
+ __ bind(&slow_elements);
+ // call.
+ __ Push(r3, r5, r2);
+ __ LoadP(r7, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadP(r7, FieldMemOperand(r7, JSFunction::kLiteralsOffset));
+ __ Push(r7, r6);
+ __ TailCallRuntime(Runtime::kStoreArrayLiteralElement, 5, 1);
+
+ // Array literal has ElementsKind of FAST_*_ELEMENTS and value is an object.
+ __ bind(&fast_elements);
+ __ LoadP(r7, FieldMemOperand(r3, JSObject::kElementsOffset));
+ __ SmiToPtrArrayOffset(r8, r5);
+ __ AddP(r8, r7);
+ __ StoreP(r2, MemOperand(r8, FixedArray::kHeaderSize - kHeapObjectTag));
+ __ lay(r8, MemOperand(r8, FixedArray::kHeaderSize - kHeapObjectTag));
+
+ // Update the write barrier for the array store.
+ __ RecordWrite(r7, r8, r2, kLRHasNotBeenSaved, kDontSaveFPRegs,
+ EMIT_REMEMBERED_SET, OMIT_SMI_CHECK);
+ __ Ret();
+
+ // Array literal has ElementsKind of FAST_*_SMI_ELEMENTS or FAST_*_ELEMENTS,
+ // and value is Smi.
+ __ bind(&smi_element);
+ __ LoadP(r7, FieldMemOperand(r3, JSObject::kElementsOffset));
+ __ SmiToPtrArrayOffset(r8, r5);
+ __ AddP(r8, r7);
+ __ StoreP(r2, FieldMemOperand(r8, FixedArray::kHeaderSize));
+ __ Ret();
+
+ // Array literal has ElementsKind of FAST_DOUBLE_ELEMENTS.
+ __ bind(&double_elements);
+ __ LoadP(r7, FieldMemOperand(r3, JSObject::kElementsOffset));
+ __ StoreNumberToDoubleElements(r2, r5, r7, r8, d0, &slow_elements);
+ __ Ret();
+}
+
+
+void StubFailureTrampolineStub::Generate(MacroAssembler* masm) {
+ CEntryStub ces(isolate(), 1, kSaveFPRegs);
+ __ Call(ces.GetCode(), RelocInfo::CODE_TARGET);
+ int parameter_count_offset =
+ StubFailureTrampolineFrame::kCallerStackParameterCountFrameOffset;
+ __ LoadP(r3, MemOperand(fp, parameter_count_offset));
+ if (function_mode() == JS_FUNCTION_STUB_MODE) {
+ __ AddP(r3, Operand(1));
+ }
+ masm->LeaveFrame(StackFrame::STUB_FAILURE_TRAMPOLINE);
+ __ ShiftLeftP(r3, r3, Operand(kPointerSizeLog2));
+ __ la(sp, MemOperand(r3, sp));
+ __ Ret();
+}
+
+
+void LoadICTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
+ LoadICStub stub(isolate(), state());
+ stub.GenerateForTrampoline(masm);
+}
+
+
+void KeyedLoadICTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
+ KeyedLoadICStub stub(isolate(), state());
+ stub.GenerateForTrampoline(masm);
+}
+
+
+void CallICTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, r4);
+ CallICStub stub(isolate(), state());
+ __ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
+}
+
+
+void CallIC_ArrayTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, r4);
+ CallIC_ArrayStub stub(isolate(), state());
+ __ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
+}
+
+
+void LoadICStub::Generate(MacroAssembler* masm) { GenerateImpl(masm, false); }
+
+
+void LoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
+ GenerateImpl(masm, true);
+}
+
+
+static void HandleArrayCases(MacroAssembler* masm, Register receiver,
+ Register key, Register vector, Register slot,
+ Register feedback, Register receiver_map,
+ Register scratch1, Register scratch2,
+ bool is_polymorphic, Label* miss) {
+ // feedback initially contains the feedback array
+ Label next_loop, prepare_next;
+ Label start_polymorphic;
+
+ Register cached_map = scratch1;
+
+ __ LoadP(cached_map,
+ FieldMemOperand(feedback, FixedArray::OffsetOfElementAt(0)));
+ __ LoadP(cached_map, FieldMemOperand(cached_map, WeakCell::kValueOffset));
+ __ CmpP(receiver_map, cached_map);
+ __ bne(&start_polymorphic, Label::kNear);
+ // found, now call handler.
+ Register handler = feedback;
+ __ LoadP(handler,
+ FieldMemOperand(feedback, FixedArray::OffsetOfElementAt(1)));
+ __ AddP(ip, handler, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ Jump(ip);
+
+
+ Register length = scratch2;
+ __ bind(&start_polymorphic);
+ __ LoadP(length, FieldMemOperand(feedback, FixedArray::kLengthOffset));
+ if (!is_polymorphic) {
+ // If the IC could be monomorphic we have to make sure we don't go past the
+ // end of the feedback array.
+ __ CmpSmiLiteral(length, Smi::FromInt(2), r0);
+ __ beq(miss);
+ }
+
+ Register too_far = length;
+ Register pointer_reg = feedback;
+
+ // +-----+------+------+-----+-----+ ... ----+
+ // | map | len | wm0 | h0 | wm1 | hN |
+ // +-----+------+------+-----+-----+ ... ----+
+ // 0 1 2 len-1
+ // ^ ^
+ // | |
+ // pointer_reg too_far
+ // aka feedback scratch2
+ // also need receiver_map
+ // use cached_map (scratch1) to look in the weak map values.
+ __ SmiToPtrArrayOffset(r0, length);
+ __ AddP(too_far, feedback, r0);
+ __ AddP(too_far, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ AddP(pointer_reg, feedback,
+ Operand(FixedArray::OffsetOfElementAt(2) - kHeapObjectTag));
+
+ __ bind(&next_loop);
+ __ LoadP(cached_map, MemOperand(pointer_reg));
+ __ LoadP(cached_map, FieldMemOperand(cached_map, WeakCell::kValueOffset));
+ __ CmpP(receiver_map, cached_map);
+ __ bne(&prepare_next, Label::kNear);
+ __ LoadP(handler, MemOperand(pointer_reg, kPointerSize));
+ __ AddP(ip, handler, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ Jump(ip);
+
+ __ bind(&prepare_next);
+ __ AddP(pointer_reg, Operand(kPointerSize * 2));
+ __ CmpP(pointer_reg, too_far);
+ __ blt(&next_loop, Label::kNear);
+
+ // We exhausted our array of map handler pairs.
+ __ b(miss);
+}
+
+
+static void HandleMonomorphicCase(MacroAssembler* masm, Register receiver,
+ Register receiver_map, Register feedback,
+ Register vector, Register slot,
+ Register scratch, Label* compare_map,
+ Label* load_smi_map, Label* try_array) {
+ __ JumpIfSmi(receiver, load_smi_map);
+ __ LoadP(receiver_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ bind(compare_map);
+ Register cached_map = scratch;
+ // Move the weak map into the weak_cell register.
+ __ LoadP(cached_map, FieldMemOperand(feedback, WeakCell::kValueOffset));
+ __ CmpP(cached_map, receiver_map);
+ __ bne(try_array);
+ Register handler = feedback;
+ __ SmiToPtrArrayOffset(r1, slot);
+ __ LoadP(handler,
+ FieldMemOperand(r1, vector, FixedArray::kHeaderSize + kPointerSize));
+ __ AddP(ip, handler, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ Jump(ip);
+}
+
+
+void LoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // r3
+ Register name = LoadWithVectorDescriptor::NameRegister(); // r4
+ Register vector = LoadWithVectorDescriptor::VectorRegister(); // r5
+ Register slot = LoadWithVectorDescriptor::SlotRegister(); // r2
+ Register feedback = r6;
+ Register receiver_map = r7;
+ Register scratch1 = r8;
+
+ __ SmiToPtrArrayOffset(r1, slot);
+ __ LoadP(feedback, FieldMemOperand(r1, vector, FixedArray::kHeaderSize));
+
+ // Try to quickly handle the monomorphic case without knowing for sure
+ // if we have a weak cell in feedback. We do know it's safe to look
+ // at WeakCell::kValueOffset.
+ Label try_array, load_smi_map, compare_map;
+ Label not_array, miss;
+ HandleMonomorphicCase(masm, receiver, receiver_map, feedback, vector, slot,
+ scratch1, &compare_map, &load_smi_map, &try_array);
+
+ // Is it a fixed array?
+ __ bind(&try_array);
+ __ LoadP(scratch1, FieldMemOperand(feedback, HeapObject::kMapOffset));
+ __ CompareRoot(scratch1, Heap::kFixedArrayMapRootIndex);
+ __ bne(¬_array, Label::kNear);
+ HandleArrayCases(masm, receiver, name, vector, slot, feedback, receiver_map,
+ scratch1, r9, true, &miss);
+
+ __ bind(¬_array);
+ __ CompareRoot(feedback, Heap::kmegamorphic_symbolRootIndex);
+ __ bne(&miss);
+ Code::Flags code_flags = Code::RemoveTypeAndHolderFromFlags(
+ Code::ComputeHandlerFlags(Code::LOAD_IC));
+ masm->isolate()->stub_cache()->GenerateProbe(masm, Code::LOAD_IC, code_flags,
+ false, receiver, name, feedback,
+ receiver_map, scratch1, r9);
+
+ __ bind(&miss);
+ LoadIC::GenerateMiss(masm);
+
+ __ bind(&load_smi_map);
+ __ LoadRoot(receiver_map, Heap::kHeapNumberMapRootIndex);
+ __ b(&compare_map);
+}
+
+
+void KeyedLoadICStub::Generate(MacroAssembler* masm) {
+ GenerateImpl(masm, false);
+}
+
+
+void KeyedLoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
+ GenerateImpl(masm, true);
+}
+
+
+void KeyedLoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // r3
+ Register key = LoadWithVectorDescriptor::NameRegister(); // r4
+ Register vector = LoadWithVectorDescriptor::VectorRegister(); // r5
+ Register slot = LoadWithVectorDescriptor::SlotRegister(); // r2
+ Register feedback = r6;
+ Register receiver_map = r7;
+ Register scratch1 = r8;
+
+ __ SmiToPtrArrayOffset(r1, slot);
+ __ LoadP(feedback, FieldMemOperand(r1, vector, FixedArray::kHeaderSize));
+
+ // Try to quickly handle the monomorphic case without knowing for sure
+ // if we have a weak cell in feedback. We do know it's safe to look
+ // at WeakCell::kValueOffset.
+ Label try_array, load_smi_map, compare_map;
+ Label not_array, miss;
+ HandleMonomorphicCase(masm, receiver, receiver_map, feedback, vector, slot,
+ scratch1, &compare_map, &load_smi_map, &try_array);
+
+ __ bind(&try_array);
+ // Is it a fixed array?
+ __ LoadP(scratch1, FieldMemOperand(feedback, HeapObject::kMapOffset));
+ __ CompareRoot(scratch1, Heap::kFixedArrayMapRootIndex);
+ __ bne(¬_array);
+
+ // We have a polymorphic element handler.
+ Label polymorphic, try_poly_name;
+ __ bind(&polymorphic);
+ HandleArrayCases(masm, receiver, key, vector, slot, feedback, receiver_map,
+ scratch1, r9, true, &miss);
+
+ __ bind(¬_array);
+ // Is it generic?
+ __ CompareRoot(feedback, Heap::kmegamorphic_symbolRootIndex);
+ __ bne(&try_poly_name);
+ Handle<Code> megamorphic_stub =
+ KeyedLoadIC::ChooseMegamorphicStub(masm->isolate(), GetExtraICState());
+ __ Jump(megamorphic_stub, RelocInfo::CODE_TARGET);
+
+ __ bind(&try_poly_name);
+ // We might have a name in feedback, and a fixed array in the next slot.
+ __ CmpP(key, feedback);
+ __ bne(&miss);
+ // If the name comparison succeeded, we know we have a fixed array with
+ // at least one map/handler pair.
+ __ SmiToPtrArrayOffset(r1, slot);
+ __ LoadP(feedback,
+ FieldMemOperand(r1, vector, FixedArray::kHeaderSize + kPointerSize));
+ HandleArrayCases(masm, receiver, key, vector, slot, feedback, receiver_map,
+ scratch1, r9, false, &miss);
+
+ __ bind(&miss);
+ KeyedLoadIC::GenerateMiss(masm);
+
+ __ bind(&load_smi_map);
+ __ LoadRoot(receiver_map, Heap::kHeapNumberMapRootIndex);
+ __ b(&compare_map);
+}
+
+
+void VectorStoreICTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, VectorStoreICDescriptor::VectorRegister());
+ VectorStoreICStub stub(isolate(), state());
+ stub.GenerateForTrampoline(masm);
+}
+
+
+void VectorKeyedStoreICTrampolineStub::Generate(MacroAssembler* masm) {
+ EmitLoadTypeFeedbackVector(masm, VectorStoreICDescriptor::VectorRegister());
+ VectorKeyedStoreICStub stub(isolate(), state());
+ stub.GenerateForTrampoline(masm);
+}
+
+
+void VectorStoreICStub::Generate(MacroAssembler* masm) {
+ GenerateImpl(masm, false);
+}
+
+
+void VectorStoreICStub::GenerateForTrampoline(MacroAssembler* masm) {
+ GenerateImpl(masm, true);
+}
+
+
+void VectorStoreICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Label miss;
+
+ // TODO(mvstanton): Implement.
+ __ bind(&miss);
+ StoreIC::GenerateMiss(masm);
+}
+
+
+void VectorKeyedStoreICStub::Generate(MacroAssembler* masm) {
+ GenerateImpl(masm, false);
+}
+
+
+void VectorKeyedStoreICStub::GenerateForTrampoline(MacroAssembler* masm) {
+ GenerateImpl(masm, true);
+}
+
+
+void VectorKeyedStoreICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Label miss;
+
+ // TODO(mvstanton): Implement.
+ __ bind(&miss);
+ KeyedStoreIC::GenerateMiss(masm);
+}
+
+
+void ProfileEntryHookStub::MaybeCallEntryHook(MacroAssembler* masm) {
+ if (masm->isolate()->function_entry_hook() != NULL) {
+ PredictableCodeSizeScope predictable(masm,
+#if V8_TARGET_ARCH_S390X
+ 40);
+#elif V8_HOST_ARCH_S390
+ 36);
+#else
+ 32);
+#endif
+ ProfileEntryHookStub stub(masm->isolate());
+ __ CleanseP(r14);
+ __ Push(r14, ip);
+ __ CallStub(&stub); // BRASL
+ __ Pop(r14, ip);
+ }
+}
+
+
+void ProfileEntryHookStub::Generate(MacroAssembler* masm) {
+ // The entry hook is a "push lr" instruction (LAY+ST/STG), followed by a call.
+#if V8_TARGET_ARCH_S390X
+ const int32_t kReturnAddressDistanceFromFunctionStart =
+ Assembler::kCallTargetAddressOffset + 18; // LAY + STG * 2
+#elif V8_HOST_ARCH_S390
+ const int32_t kReturnAddressDistanceFromFunctionStart =
+ Assembler::kCallTargetAddressOffset + 18; // NILH + LAY + ST * 2
+#else
+ const int32_t kReturnAddressDistanceFromFunctionStart =
+ Assembler::kCallTargetAddressOffset + 14; // LAY + ST * 2
+#endif
+
+ // This should contain all kJSCallerSaved registers.
+ const RegList kSavedRegs = kJSCallerSaved | // Caller saved registers.
+ r7.bit(); // Saved stack pointer.
+
+ // We also save r14+ip, so count here is one higher than the mask indicates.
+ const int32_t kNumSavedRegs = kNumJSCallerSaved + 3;
+
+ // Save all caller-save registers as this may be called from anywhere.
+ __ CleanseP(r14);
+ __ LoadRR(ip, r14);
+ __ MultiPush(kSavedRegs | ip.bit());
+
+ // Compute the function's address for the first argument.
+
+ __ SubP(r2, ip, Operand(kReturnAddressDistanceFromFunctionStart));
+
+ // The caller's return address is two slots above the saved temporaries.
+ // Grab that for the second argument to the hook.
+ __ lay(r3, MemOperand(sp, kNumSavedRegs * kPointerSize));
+
+ // Align the stack if necessary.
+ int frame_alignment = masm->ActivationFrameAlignment();
+ if (frame_alignment > kPointerSize) {
+ __ LoadRR(r7, sp);
+ DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
+ __ ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
+ }
+
+#if !defined(USE_SIMULATOR)
+ uintptr_t entry_hook =
+ reinterpret_cast<uintptr_t>(isolate()->function_entry_hook());
+ __ mov(ip, Operand(entry_hook));
+
+#if ABI_USES_FUNCTION_DESCRIPTORS
+ // Function descriptor
+ __ LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(ip, kPointerSize));
+ __ LoadP(ip, MemOperand(ip, 0));
+// ip already set.
+#endif
+#endif
+
+ // zLinux ABI requires caller's frame to have sufficient space for callee
+ // preserved regsiter save area.
+ __ LoadImmP(r0, Operand::Zero());
+ __ StoreP(r0, MemOperand(sp, -kCalleeRegisterSaveAreaSize -
+ kNumRequiredStackFrameSlots * kPointerSize));
+ __ lay(sp, MemOperand(sp, -kCalleeRegisterSaveAreaSize -
+ kNumRequiredStackFrameSlots * kPointerSize));
+#if defined(USE_SIMULATOR)
+ // Under the simulator we need to indirect the entry hook through a
+ // trampoline function at a known address.
+ // It additionally takes an isolate as a third parameter
+ __ mov(r4, Operand(ExternalReference::isolate_address(isolate())));
+
+ ApiFunction dispatcher(FUNCTION_ADDR(EntryHookTrampoline));
+ __ mov(ip, Operand(ExternalReference(
+ &dispatcher, ExternalReference::BUILTIN_CALL, isolate())));
+#endif
+ __ Call(ip);
+
+ // zLinux ABI requires caller's frame to have sufficient space for callee
+ // preserved regsiter save area.
+ __ la(sp, MemOperand(sp, kCalleeRegisterSaveAreaSize +
+ kNumRequiredStackFrameSlots * kPointerSize));
+
+ // Restore the stack pointer if needed.
+ if (frame_alignment > kPointerSize) {
+ __ LoadRR(sp, r7);
+ }
+
+ // Also pop lr to get Ret(0).
+ __ MultiPop(kSavedRegs | ip.bit());
+ __ LoadRR(r14, ip);
+ __ Ret();
+}
+
+
+template <class T>
+static void CreateArrayDispatch(MacroAssembler* masm,
+ AllocationSiteOverrideMode mode) {
+ if (mode == DISABLE_ALLOCATION_SITES) {
+ T stub(masm->isolate(), GetInitialFastElementsKind(), mode);
+ __ TailCallStub(&stub);
+ } else if (mode == DONT_OVERRIDE) {
+ int last_index =
+ GetSequenceIndexFromFastElementsKind(TERMINAL_FAST_ELEMENTS_KIND);
+ for (int i = 0; i <= last_index; ++i) {
+ ElementsKind kind = GetFastElementsKindFromSequenceIndex(i);
+ __ CmpP(r5, Operand(kind));
+ T stub(masm->isolate(), kind);
+ __ TailCallStub(&stub, eq);
+ }
+
+ // If we reached this point there is a problem.
+ __ Abort(kUnexpectedElementsKindInArrayConstructor);
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+static void CreateArrayDispatchOneArgument(MacroAssembler* masm,
+ AllocationSiteOverrideMode mode) {
+ // r4 - allocation site (if mode != DISABLE_ALLOCATION_SITES)
+ // r5 - kind (if mode != DISABLE_ALLOCATION_SITES)
+ // r2 - number of arguments
+ // r3 - constructor?
+ // sp[0] - last argument
+ Label normal_sequence;
+ if (mode == DONT_OVERRIDE) {
+ DCHECK(FAST_SMI_ELEMENTS == 0);
+ DCHECK(FAST_HOLEY_SMI_ELEMENTS == 1);
+ DCHECK(FAST_ELEMENTS == 2);
+ DCHECK(FAST_HOLEY_ELEMENTS == 3);
+ DCHECK(FAST_DOUBLE_ELEMENTS == 4);
+ DCHECK(FAST_HOLEY_DOUBLE_ELEMENTS == 5);
+
+ // is the low bit set? If so, we are holey and that is good.
+ __ AndP(r0, r5, Operand(1));
+ __ bne(&normal_sequence/*, cr0*/);
+ }
+
+ // look at the first argument
+ __ LoadP(r7, MemOperand(sp, 0));
+ __ CmpP(r7, Operand::Zero());
+ __ beq(&normal_sequence);
+
+ if (mode == DISABLE_ALLOCATION_SITES) {
+ ElementsKind initial = GetInitialFastElementsKind();
+ ElementsKind holey_initial = GetHoleyElementsKind(initial);
+
+ ArraySingleArgumentConstructorStub stub_holey(
+ masm->isolate(), holey_initial, DISABLE_ALLOCATION_SITES);
+ __ TailCallStub(&stub_holey);
+
+ __ bind(&normal_sequence);
+ ArraySingleArgumentConstructorStub stub(masm->isolate(), initial,
+ DISABLE_ALLOCATION_SITES);
+ __ TailCallStub(&stub);
+ } else if (mode == DONT_OVERRIDE) {
+ // We are going to create a holey array, but our kind is non-holey.
+ // Fix kind and retry (only if we have an allocation site in the slot).
+ __ AddP(r5, r5, Operand(1));
+ if (FLAG_debug_code) {
+ __ LoadP(r7, FieldMemOperand(r4, 0));
+ __ CompareRoot(r7, Heap::kAllocationSiteMapRootIndex);
+ __ Assert(eq, kExpectedAllocationSite);
+ }
+
+ // Save the resulting elements kind in type info. We can't just store r5
+ // in the AllocationSite::transition_info field because elements kind is
+ // restricted to a portion of the field...upper bits need to be left alone.
+ STATIC_ASSERT(AllocationSite::ElementsKindBits::kShift == 0);
+ __ LoadP(r6, FieldMemOperand(r4, AllocationSite::kTransitionInfoOffset));
+ __ AddSmiLiteral(r6, r6, Smi::FromInt(kFastElementsKindPackedToHoley), r0);
+ __ StoreP(r6, FieldMemOperand(r4, AllocationSite::kTransitionInfoOffset));
+
+ __ bind(&normal_sequence);
+ int last_index =
+ GetSequenceIndexFromFastElementsKind(TERMINAL_FAST_ELEMENTS_KIND);
+ for (int i = 0; i <= last_index; ++i) {
+ ElementsKind kind = GetFastElementsKindFromSequenceIndex(i);
+ __ CmpP(r5, Operand(kind));
+ ArraySingleArgumentConstructorStub stub(masm->isolate(), kind);
+ __ TailCallStub(&stub, eq);
+ }
+
+ // If we reached this point there is a problem.
+ __ Abort(kUnexpectedElementsKindInArrayConstructor);
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+template<class T>
+static void ArrayConstructorStubAheadOfTimeHelper(Isolate* isolate) {
+ int to_index =
+ GetSequenceIndexFromFastElementsKind(TERMINAL_FAST_ELEMENTS_KIND);
+ for (int i = 0; i <= to_index; ++i) {
+ ElementsKind kind = GetFastElementsKindFromSequenceIndex(i);
+ T stub(isolate, kind);
+ stub.GetCode();
+ if (AllocationSite::GetMode(kind) != DONT_TRACK_ALLOCATION_SITE) {
+ T stub1(isolate, kind, DISABLE_ALLOCATION_SITES);
+ stub1.GetCode();
+ }
+ }
+}
+
+
+void ArrayConstructorStubBase::GenerateStubsAheadOfTime(Isolate* isolate) {
+ ArrayConstructorStubAheadOfTimeHelper<ArrayNoArgumentConstructorStub>(
+ isolate);
+ ArrayConstructorStubAheadOfTimeHelper<ArraySingleArgumentConstructorStub>(
+ isolate);
+ ArrayConstructorStubAheadOfTimeHelper<ArrayNArgumentsConstructorStub>(
+ isolate);
+}
+
+
+void InternalArrayConstructorStubBase::GenerateStubsAheadOfTime(
+ Isolate* isolate) {
+ ElementsKind kinds[2] = {FAST_ELEMENTS, FAST_HOLEY_ELEMENTS};
+ for (int i = 0; i < 2; i++) {
+ // For internal arrays we only need a few things
+ InternalArrayNoArgumentConstructorStub stubh1(isolate, kinds[i]);
+ stubh1.GetCode();
+ InternalArraySingleArgumentConstructorStub stubh2(isolate, kinds[i]);
+ stubh2.GetCode();
+ InternalArrayNArgumentsConstructorStub stubh3(isolate, kinds[i]);
+ stubh3.GetCode();
+ }
+}
+
+
+void ArrayConstructorStub::GenerateDispatchToArrayStub(
+ MacroAssembler* masm, AllocationSiteOverrideMode mode) {
+ if (argument_count() == ANY) {
+ Label not_zero_case, not_one_case;
+ __ CmpP(r2, Operand::Zero());
+ __ bne(¬_zero_case);
+ CreateArrayDispatch<ArrayNoArgumentConstructorStub>(masm, mode);
+
+ __ bind(¬_zero_case);
+ __ CmpP(r2, Operand(1));
+ __ bgt(¬_one_case);
+ CreateArrayDispatchOneArgument(masm, mode);
+
+ __ bind(¬_one_case);
+ CreateArrayDispatch<ArrayNArgumentsConstructorStub>(masm, mode);
+ } else if (argument_count() == NONE) {
+ CreateArrayDispatch<ArrayNoArgumentConstructorStub>(masm, mode);
+ } else if (argument_count() == ONE) {
+ CreateArrayDispatchOneArgument(masm, mode);
+ } else if (argument_count() == MORE_THAN_ONE) {
+ CreateArrayDispatch<ArrayNArgumentsConstructorStub>(masm, mode);
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+void ArrayConstructorStub::Generate(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : argc (only if argument_count() == ANY)
+ // -- r3 : constructor
+ // -- r4 : AllocationSite or undefined
+ // -- r5 : original constructor
+ // -- sp[0] : return address
+ // -- sp[4] : last argument
+ // -----------------------------------
+
+ if (FLAG_debug_code) {
+ // The array construct code is only set for the global and natives
+ // builtin Array functions which always have maps.
+
+ // Initial map for the builtin Array function should be a map.
+ __ LoadP(r6, FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ // Will both indicate a NULL and a Smi.
+ __ TestIfSmi(r6);
+ __ Assert(ne, kUnexpectedInitialMapForArrayFunction, cr0);
+ __ CompareObjectType(r6, r6, r7, MAP_TYPE);
+ __ Assert(eq, kUnexpectedInitialMapForArrayFunction);
+
+ // We should either have undefined in r4 or a valid AllocationSite
+ __ AssertUndefinedOrAllocationSite(r4, r6);
+ }
+
+ Label subclassing;
+ __ CmpP(r5, r3);
+ __ bne(&subclassing, Label::kNear);
+
+ Label no_info;
+ // Get the elements kind and case on that.
+ __ CompareRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ beq(&no_info);
+
+ __ LoadP(r5, FieldMemOperand(r4, AllocationSite::kTransitionInfoOffset));
+ __ SmiUntag(r5);
+ STATIC_ASSERT(AllocationSite::ElementsKindBits::kShift == 0);
+ __ AndP(r5, Operand(AllocationSite::ElementsKindBits::kMask));
+ GenerateDispatchToArrayStub(masm, DONT_OVERRIDE);
+
+ __ bind(&no_info);
+ GenerateDispatchToArrayStub(masm, DISABLE_ALLOCATION_SITES);
+
+ __ bind(&subclassing);
+ __ push(r3);
+ __ push(r5);
+
+ // Adjust argc.
+ switch (argument_count()) {
+ case ANY:
+ case MORE_THAN_ONE:
+ __ AddP(r2, Operand(2));
+ break;
+ case NONE:
+ __ LoadImmP(r2, Operand(2));
+ break;
+ case ONE:
+ __ LoadImmP(r2, Operand(3));
+ break;
+ }
+
+ __ JumpToExternalReference(
+ ExternalReference(Runtime::kArrayConstructorWithSubclassing, isolate()));
+}
+
+
+void InternalArrayConstructorStub::GenerateCase(MacroAssembler* masm,
+ ElementsKind kind) {
+ __ CmpLogicalP(r2, Operand(1));
+
+ InternalArrayNoArgumentConstructorStub stub0(isolate(), kind);
+ __ TailCallStub(&stub0, lt);
+
+ InternalArrayNArgumentsConstructorStub stubN(isolate(), kind);
+ __ TailCallStub(&stubN, gt);
+
+ if (IsFastPackedElementsKind(kind)) {
+ // We might need to create a holey array
+ // look at the first argument
+ __ LoadP(r5, MemOperand(sp, 0));
+ __ CmpP(r5, Operand::Zero());
+
+ InternalArraySingleArgumentConstructorStub stub1_holey(
+ isolate(), GetHoleyElementsKind(kind));
+ __ TailCallStub(&stub1_holey, ne);
+ }
+
+ InternalArraySingleArgumentConstructorStub stub1(isolate(), kind);
+ __ TailCallStub(&stub1);
+}
+
+
+void InternalArrayConstructorStub::Generate(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- r2 : argc
+ // -- r3 : constructor
+ // -- sp[0] : return address
+ // -- sp[4] : last argument
+ // -----------------------------------
+
+ if (FLAG_debug_code) {
+ // The array construct code is only set for the global and natives
+ // builtin Array functions which always have maps.
+
+ // Initial map for the builtin Array function should be a map.
+ __ LoadP(r5, FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ // Will both indicate a NULL and a Smi.
+ __ TestIfSmi(r5);
+ __ Assert(ne, kUnexpectedInitialMapForArrayFunction, cr0);
+ __ CompareObjectType(r5, r5, r6, MAP_TYPE);
+ __ Assert(eq, kUnexpectedInitialMapForArrayFunction);
+ }
+
+ // Figure out the right elements kind
+ __ LoadP(r5, FieldMemOperand(r3, JSFunction::kPrototypeOrInitialMapOffset));
+ // Load the map's "bit field 2" into |result|.
+ __ LoadlB(r5, FieldMemOperand(r5, Map::kBitField2Offset));
+ // Retrieve elements_kind from bit field 2.
+ __ DecodeField<Map::ElementsKindBits>(r5);
+
+ if (FLAG_debug_code) {
+ Label done;
+ __ CmpP(r5, Operand(FAST_ELEMENTS));
+ __ beq(&done);
+ __ CmpP(r5, Operand(FAST_HOLEY_ELEMENTS));
+ __ Assert(eq, kInvalidElementsKindForInternalArrayOrInternalPackedArray);
+ __ bind(&done);
+ }
+
+ Label fast_elements_case;
+ __ CmpP(r5, Operand(FAST_ELEMENTS));
+ __ beq(&fast_elements_case);
+ GenerateCase(masm, FAST_HOLEY_ELEMENTS);
+
+ __ bind(&fast_elements_case);
+ GenerateCase(masm, FAST_ELEMENTS);
+}
+
+
+static int AddressOffset(ExternalReference ref0, ExternalReference ref1) {
+ return ref0.address() - ref1.address();
+}
+
+
+// Calls an API function. Allocates HandleScope, extracts returned value
+// from handle and propagates exceptions. Restores context. stack_space
+// - space to be unwound on exit (includes the call JS arguments space and
+// the additional space allocated for the fast call).
+static void CallApiFunctionAndReturn(MacroAssembler* masm,
+ Register function_address,
+ ExternalReference thunk_ref,
+ int stack_space,
+ MemOperand* stack_space_operand,
+ MemOperand return_value_operand,
+ MemOperand* context_restore_operand) {
+ Isolate* isolate = masm->isolate();
+ ExternalReference next_address =
+ ExternalReference::handle_scope_next_address(isolate);
+ const int kNextOffset = 0;
+ const int kLimitOffset = AddressOffset(
+ ExternalReference::handle_scope_limit_address(isolate), next_address);
+ const int kLevelOffset = AddressOffset(
+ ExternalReference::handle_scope_level_address(isolate), next_address);
+
+ // Additional parameter is the address of the actual callback.
+ DCHECK(function_address.is(r3) || function_address.is(r4));
+ Register scratch = r5;
+
+ __ mov(scratch, Operand(ExternalReference::is_profiling_address(isolate)));
+ __ LoadlB(scratch, MemOperand(scratch, 0));
+ __ CmpP(scratch, Operand::Zero());
+
+ Label profiler_disabled;
+ Label end_profiler_check;
+ __ beq(&profiler_disabled, Label::kNear);
+ __ mov(scratch, Operand(thunk_ref));
+ __ b(&end_profiler_check, Label::kNear);
+ __ bind(&profiler_disabled);
+ __ LoadRR(scratch, function_address);
+ __ bind(&end_profiler_check);
+
+ // Allocate HandleScope in callee-save registers.
+ // r9 - next_address
+ // r6 - next_address->kNextOffset
+ // r7 - next_address->kLimitOffset
+ // r8 - next_address->kLevelOffset
+ __ mov(r9, Operand(next_address));
+ __ LoadP(r6, MemOperand(r9, kNextOffset));
+ __ LoadP(r7, MemOperand(r9, kLimitOffset));
+ __ LoadlW(r8, MemOperand(r9, kLevelOffset));
+ __ AddP(r8, Operand(1));
+ __ StoreW(r8, MemOperand(r9, kLevelOffset));
+
+ if (FLAG_log_timer_events) {
+ FrameScope frame(masm, StackFrame::MANUAL);
+ __ PushSafepointRegisters();
+ __ PrepareCallCFunction(1, r2);
+ __ mov(r2, Operand(ExternalReference::isolate_address(isolate)));
+ __ CallCFunction(ExternalReference::log_enter_external_function(isolate),
+ 1);
+ __ PopSafepointRegisters();
+ }
+
+ // Native call returns to the DirectCEntry stub which redirects to the
+ // return address pushed on stack (could have moved after GC).
+ // DirectCEntry stub itself is generated early and never moves.
+ DirectCEntryStub stub(isolate);
+ stub.GenerateCall(masm, scratch);
+
+ if (FLAG_log_timer_events) {
+ FrameScope frame(masm, StackFrame::MANUAL);
+ __ PushSafepointRegisters();
+ __ PrepareCallCFunction(1, r2);
+ __ mov(r2, Operand(ExternalReference::isolate_address(isolate)));
+ __ CallCFunction(ExternalReference::log_leave_external_function(isolate),
+ 1);
+ __ PopSafepointRegisters();
+ }
+
+ Label promote_scheduled_exception;
+ Label delete_allocated_handles;
+ Label leave_exit_frame;
+ Label return_value_loaded;
+
+ // load value from ReturnValue
+ __ LoadP(r2, return_value_operand);
+ __ bind(&return_value_loaded);
+ // No more valid handles (the result handle was the last one). Restore
+ // previous handle scope.
+ __ StoreP(r6, MemOperand(r9, kNextOffset));
+ if (__ emit_debug_code()) {
+ __ LoadlW(r3, MemOperand(r9, kLevelOffset));
+ __ CmpP(r3, r8);
+ __ Check(eq, kUnexpectedLevelAfterReturnFromApiCall);
+ }
+ __ SubP(r8, Operand(1));
+ __ StoreW(r8, MemOperand(r9, kLevelOffset));
+ __ CmpP(r7, MemOperand(r9, kLimitOffset));
+ __ bne(&delete_allocated_handles, Label::kNear);
+
+ // Leave the API exit frame.
+ __ bind(&leave_exit_frame);
+ bool restore_context = context_restore_operand != NULL;
+ if (restore_context) {
+ __ LoadP(cp, *context_restore_operand);
+ }
+ // LeaveExitFrame expects unwind space to be in a register.
+ if (stack_space_operand != NULL) {
+ __ l(r6, *stack_space_operand);
+ } else {
+ __ mov(r6, Operand(stack_space));
+ }
+ __ LeaveExitFrame(false, r6, !restore_context, stack_space_operand != NULL);
+
+ // Check if the function scheduled an exception.
+ __ mov(r7, Operand(ExternalReference::scheduled_exception_address(isolate)));
+ __ LoadP(r7, MemOperand(r7));
+ __ CompareRoot(r7, Heap::kTheHoleValueRootIndex);
+ __ bne(&promote_scheduled_exception, Label::kNear);
+
+ __ b(r14);
+
+ // Re-throw by promoting a scheduled exception.
+ __ bind(&promote_scheduled_exception);
+ __ TailCallRuntime(Runtime::kPromoteScheduledException, 0, 1);
+
+ // HandleScope limit has changed. Delete allocated extensions.
+ __ bind(&delete_allocated_handles);
+ __ StoreP(r7, MemOperand(r9, kLimitOffset));
+ __ LoadRR(r6, r2);
+ __ PrepareCallCFunction(1, r7);
+ __ mov(r2, Operand(ExternalReference::isolate_address(isolate)));
+ __ CallCFunction(ExternalReference::delete_handle_scope_extensions(isolate),
+ 1);
+ __ LoadRR(r2, r6);
+ __ b(&leave_exit_frame, Label::kNear);
+}
+
+
+static void CallApiFunctionStubHelper(MacroAssembler* masm,
+ const ParameterCount& argc,
+ bool return_first_arg,
+ bool call_data_undefined) {
+ // ----------- S t a t e -------------
+ // -- r2 : callee
+ // -- r6 : call_data
+ // -- r4 : holder
+ // -- r3 : api_function_address
+ // -- r5 : number of arguments if argc is a register
+ // -- cp : context
+ // --
+ // -- sp[0] : last argument
+ // -- ...
+ // -- sp[(argc - 1)* 4] : first argument
+ // -- sp[argc * 4] : receiver
+ // -----------------------------------
+
+ Register callee = r2;
+ Register call_data = r6;
+ Register holder = r4;
+ Register api_function_address = r3;
+ Register context = cp;
+
+ typedef FunctionCallbackArguments FCA;
+
+ STATIC_ASSERT(FCA::kContextSaveIndex == 6);
+ STATIC_ASSERT(FCA::kCalleeIndex == 5);
+ STATIC_ASSERT(FCA::kDataIndex == 4);
+ STATIC_ASSERT(FCA::kReturnValueOffset == 3);
+ STATIC_ASSERT(FCA::kReturnValueDefaultValueIndex == 2);
+ STATIC_ASSERT(FCA::kIsolateIndex == 1);
+ STATIC_ASSERT(FCA::kHolderIndex == 0);
+ STATIC_ASSERT(FCA::kArgsLength == 7);
+
+ DCHECK(argc.is_immediate() || r2.is(argc.reg()));
+
+ // context save
+ __ push(context);
+ // load context from callee
+ __ LoadP(context, FieldMemOperand(callee, JSFunction::kContextOffset));
+
+ // callee
+ __ push(callee);
+
+ // call data
+ __ push(call_data);
+
+ Register scratch = call_data;
+ if (!call_data_undefined) {
+ __ LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
+ }
+ // return value
+ __ push(scratch);
+ // return value default
+ __ push(scratch);
+ // isolate
+ __ mov(scratch, Operand(ExternalReference::isolate_address(masm->isolate())));
+ __ push(scratch);
+ // holder
+ __ push(holder);
+
+ // Prepare arguments.
+ __ LoadRR(scratch, sp);
+
+ // Allocate the v8::Arguments structure in the arguments' space since
+ // it's not controlled by GC.
+ // S390 LINUX ABI:
+ //
+ // Create 5 extra slots on stack:
+ // [0] space for DirectCEntryStub's LR save
+ // [1-4] FunctionCallbackInfo
+ const int kApiStackSpace = 5;
+ const int kFunctionCallbackInfoOffset =
+ (kStackFrameExtraParamSlot + 1) * kPointerSize;
+
+ FrameScope frame_scope(masm, StackFrame::MANUAL);
+ __ EnterExitFrame(false, kApiStackSpace);
+
+ DCHECK(!api_function_address.is(r2) && !scratch.is(r2));
+ // r2 = FunctionCallbackInfo&
+ // Arguments is after the return address.
+ __ AddP(r2, sp, Operand(kFunctionCallbackInfoOffset));
+ // FunctionCallbackInfo::implicit_args_
+ __ StoreP(scratch, MemOperand(r2, 0 * kPointerSize));
+ if (argc.is_immediate()) {
+ // FunctionCallbackInfo::values_
+ __ AddP(ip, scratch,
+ Operand((FCA::kArgsLength - 1 + argc.immediate()) * kPointerSize));
+ __ StoreP(ip, MemOperand(r2, 1 * kPointerSize));
+ // FunctionCallbackInfo::length_ = argc
+ __ LoadImmP(ip, Operand(argc.immediate()));
+ __ StoreW(ip, MemOperand(r2, 2 * kPointerSize));
+ // FunctionCallbackInfo::is_construct_call_ = 0
+ __ LoadImmP(ip, Operand::Zero());
+ __ StoreW(ip, MemOperand(r2, 2 * kPointerSize + kIntSize));
+ } else {
+ __ ShiftLeftP(ip, argc.reg(), Operand(kPointerSizeLog2));
+ __ AddP(ip, ip, Operand((FCA::kArgsLength - 1) * kPointerSize));
+ // FunctionCallbackInfo::values_
+ __ AddP(r0, scratch, ip);
+ __ StoreP(r0, MemOperand(r2, 1 * kPointerSize));
+ // FunctionCallbackInfo::length_ = argc
+ __ StoreW(argc.reg(), MemOperand(r2, 2 * kPointerSize));
+ // FunctionCallbackInfo::is_construct_call_
+ __ StoreW(ip, MemOperand(r2, 2 * kPointerSize + kIntSize));
+ }
+
+ ExternalReference thunk_ref =
+ ExternalReference::invoke_function_callback(masm->isolate());
+
+ AllowExternalCallThatCantCauseGC scope(masm);
+ MemOperand context_restore_operand(
+ fp, (2 + FCA::kContextSaveIndex) * kPointerSize);
+ // Stores return the first js argument
+ int return_value_offset = 0;
+ if (return_first_arg) {
+ return_value_offset = 2 + FCA::kArgsLength;
+ } else {
+ return_value_offset = 2 + FCA::kReturnValueOffset;
+ }
+ MemOperand return_value_operand(fp, return_value_offset * kPointerSize);
+ int stack_space = 0;
+ MemOperand is_construct_call_operand =
+ MemOperand(sp, kFunctionCallbackInfoOffset + 2 * kPointerSize + kIntSize);
+ MemOperand* stack_space_operand = &is_construct_call_operand;
+ if (argc.is_immediate()) {
+ stack_space = argc.immediate() + FCA::kArgsLength + 1;
+ stack_space_operand = NULL;
+ }
+ CallApiFunctionAndReturn(masm, api_function_address, thunk_ref, stack_space,
+ stack_space_operand, return_value_operand,
+ &context_restore_operand);
+}
+
+
+void CallApiFunctionStub::Generate(MacroAssembler* masm) {
+ bool call_data_undefined = this->call_data_undefined();
+ CallApiFunctionStubHelper(masm, ParameterCount(r6), false,
+ call_data_undefined);
+}
+
+
+void CallApiAccessorStub::Generate(MacroAssembler* masm) {
+ bool is_store = this->is_store();
+ int argc = this->argc();
+ bool call_data_undefined = this->call_data_undefined();
+ CallApiFunctionStubHelper(masm, ParameterCount(argc), is_store,
+ call_data_undefined);
+}
+
+
+void CallApiGetterStub::Generate(MacroAssembler* masm) {
+ // ----------- S t a t e -------------
+ // -- sp[0] : name
+ // -- sp[4 - kArgsLength*4] : PropertyCallbackArguments object
+ // -- ...
+ // -- r4 : api_function_address
+ // -----------------------------------
+
+ Register api_function_address = ApiGetterDescriptor::function_address();
+ DCHECK(api_function_address.is(r4));
+
+ __ LoadRR(r2, sp); // r0 = Handle<Name>
+ __ AddP(r3, r2, Operand(1 * kPointerSize)); // r3 = PCA
+
+// If ABI passes Handles (pointer-sized struct) in a register:
+//
+// Create 2 extra slots on stack:
+// [0] space for DirectCEntryStub's LR save
+// [1] AccessorInfo&
+//
+// Otherwise:
+//
+// Create 3 extra slots on stack:
+// [0] space for DirectCEntryStub's LR save
+// [1] copy of Handle (first arg)
+// [2] AccessorInfo&
+#if ABI_PASSES_HANDLES_IN_REGS
+ const int kAccessorInfoSlot = kStackFrameExtraParamSlot + 1;
+ const int kApiStackSpace = 2;
+#else
+ const int kArg0Slot = kStackFrameExtraParamSlot + 1;
+ const int kAccessorInfoSlot = kArg0Slot + 1;
+ const int kApiStackSpace = 3;
+#endif
+
+ FrameScope frame_scope(masm, StackFrame::MANUAL);
+ __ EnterExitFrame(false, kApiStackSpace);
+
+#if !ABI_PASSES_HANDLES_IN_REGS
+ // pass 1st arg by reference
+ __ StoreP(r2, MemOperand(sp, kArg0Slot * kPointerSize));
+ __ AddP(r2, sp, Operand(kArg0Slot * kPointerSize));
+#endif
+
+ // Create PropertyAccessorInfo instance on the stack above the exit frame with
+ // r3 (internal::Object** args_) as the data.
+ __ StoreP(r3, MemOperand(sp, kAccessorInfoSlot * kPointerSize));
+ // r3 = AccessorInfo&
+ __ AddP(r3, sp, Operand(kAccessorInfoSlot * kPointerSize));
+
+ const int kStackUnwindSpace = PropertyCallbackArguments::kArgsLength + 1;
+
+ ExternalReference thunk_ref =
+ ExternalReference::invoke_accessor_getter_callback(isolate());
+ CallApiFunctionAndReturn(masm, api_function_address, thunk_ref,
+ kStackUnwindSpace, NULL,
+ MemOperand(fp, 6 * kPointerSize), NULL);
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/code-stubs-s390.h
@@ -0,0 +1,500 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_CODE_STUBS_S390_H_
+#define V8_S390_CODE_STUBS_S390_H_
+
+
+namespace v8 {
+namespace internal {
+
+
+void ArrayNativeCode(MacroAssembler* masm, Label* call_generic_code);
+
+
+class StringHelper : public AllStatic {
+ public:
+ // Generate code for copying a large number of characters. This function
+ // is allowed to spend extra time setting up conditions to make copying
+ // faster. Copying of overlapping regions is not supported.
+ // Dest register ends at the position after the last character written.
+ static void GenerateCopyCharacters(MacroAssembler* masm, Register dest,
+ Register src, Register count,
+ Register scratch,
+ String::Encoding encoding);
+
+ // Compares two flat one-byte strings and returns result in r0.
+ static void GenerateCompareFlatOneByteStrings(MacroAssembler* masm,
+ Register left, Register right,
+ Register scratch1,
+ Register scratch2,
+ Register scratch3);
+
+ // Compares two flat one-byte strings for equality and returns result in r0.
+ static void GenerateFlatOneByteStringEquals(MacroAssembler* masm,
+ Register left, Register right,
+ Register scratch1,
+ Register scratch2);
+
+ private:
+ static void GenerateOneByteCharsCompareLoop(MacroAssembler* masm,
+ Register left, Register right,
+ Register length,
+ Register scratch1,
+ Label* chars_not_equal);
+
+ DISALLOW_IMPLICIT_CONSTRUCTORS(StringHelper);
+};
+
+
+class StoreRegistersStateStub : public PlatformCodeStub {
+ public:
+ explicit StoreRegistersStateStub(Isolate* isolate)
+ : PlatformCodeStub(isolate) {}
+
+ static void GenerateAheadOfTime(Isolate* isolate);
+ private:
+ DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
+ DEFINE_PLATFORM_CODE_STUB(StoreRegistersState, PlatformCodeStub);
+};
+
+
+class RestoreRegistersStateStub : public PlatformCodeStub {
+ public:
+ explicit RestoreRegistersStateStub(Isolate* isolate)
+ : PlatformCodeStub(isolate) {}
+
+ static void GenerateAheadOfTime(Isolate* isolate);
+ private:
+ DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
+ DEFINE_PLATFORM_CODE_STUB(RestoreRegistersState, PlatformCodeStub);
+};
+
+
+class RecordWriteStub : public PlatformCodeStub {
+ public:
+ RecordWriteStub(Isolate* isolate, Register object, Register value,
+ Register address, RememberedSetAction remembered_set_action,
+ SaveFPRegsMode fp_mode)
+ : PlatformCodeStub(isolate),
+ regs_(object, // An input reg.
+ address, // An input reg.
+ value) { // One scratch reg.
+ minor_key_ = ObjectBits::encode(object.code()) |
+ ValueBits::encode(value.code()) |
+ AddressBits::encode(address.code()) |
+ RememberedSetActionBits::encode(remembered_set_action) |
+ SaveFPRegsModeBits::encode(fp_mode);
+ }
+
+ RecordWriteStub(uint32_t key, Isolate* isolate)
+ : PlatformCodeStub(key, isolate), regs_(object(), address(), value()) {}
+
+ enum Mode { STORE_BUFFER_ONLY, INCREMENTAL, INCREMENTAL_COMPACTION };
+
+ bool SometimesSetsUpAFrame() override { return false; }
+
+ // Patch an always taken branch into a NOP branch
+ static void PatchBranchCondMask(MacroAssembler* masm, int pos, Condition c) {
+ int32_t instrLen = masm->instr_length_at(pos);
+ DCHECK(instrLen == 4 || instrLen == 6);
+
+ if (instrLen == 4) {
+ // BRC - Branch Mask @ Bits 23-20
+ FourByteInstr updatedMask = static_cast<FourByteInstr>(c) << 20;
+ masm->instr_at_put<FourByteInstr>(pos,
+ (masm->instr_at(pos) & ~kFourByteBrCondMask) | updatedMask);
+ } else {
+ // BRCL - Branch Mask @ Bits 39-36
+ SixByteInstr updatedMask = static_cast<SixByteInstr>(c) << 36;
+ masm->instr_at_put<SixByteInstr>(pos,
+ (masm->instr_at(pos) & ~kSixByteBrCondMask) | updatedMask);
+ }
+ }
+
+ static bool isBranchNop(SixByteInstr instr, int instrLength) {
+ if ((4 == instrLength && 0 == (instr & kFourByteBrCondMask)) ||
+ // BRC - Check for 0x0 mask condition.
+ (6 == instrLength && 0 == (instr & kSixByteBrCondMask))) {
+ // BRCL - Check for 0x0 mask condition
+ return true;
+ }
+ return false;
+ }
+
+ static Mode GetMode(Code* stub) {
+ int32_t first_instr_length = Instruction::InstructionLength(
+ stub->instruction_start());
+ int32_t second_instr_length = Instruction::InstructionLength(
+ stub->instruction_start() + first_instr_length);
+
+ uint64_t first_instr = Assembler::instr_at(stub->instruction_start());
+ uint64_t second_instr = Assembler::instr_at(stub->instruction_start() +
+ first_instr_length);
+
+ DCHECK(first_instr_length == 4 || first_instr_length == 6);
+ DCHECK(second_instr_length == 4 || second_instr_length == 6);
+
+ bool isFirstInstrNOP = isBranchNop(first_instr, first_instr_length);
+ bool isSecondInstrNOP = isBranchNop(second_instr, second_instr_length);
+
+ // STORE_BUFFER_ONLY has NOP on both branches
+ if (isSecondInstrNOP && isFirstInstrNOP)
+ return STORE_BUFFER_ONLY;
+ // INCREMENTAL_COMPACTION has NOP on second branch.
+ else if (isFirstInstrNOP && !isSecondInstrNOP)
+ return INCREMENTAL_COMPACTION;
+ // INCREMENTAL has NOP on first branch.
+ else if (!isFirstInstrNOP && isSecondInstrNOP)
+ return INCREMENTAL;
+
+ DCHECK(false);
+ return STORE_BUFFER_ONLY;
+ }
+
+ static void Patch(Code* stub, Mode mode) {
+ MacroAssembler masm(NULL, stub->instruction_start(),
+ stub->instruction_size());
+
+ // Get instruction lengths of two branches
+ int32_t first_instr_length = masm.instr_length_at(0);
+ int32_t second_instr_length = masm.instr_length_at(first_instr_length);
+
+ switch (mode) {
+ case STORE_BUFFER_ONLY:
+ DCHECK(GetMode(stub) == INCREMENTAL ||
+ GetMode(stub) == INCREMENTAL_COMPACTION);
+
+ PatchBranchCondMask(&masm, 0, CC_NOP);
+ PatchBranchCondMask(&masm, first_instr_length, CC_NOP);
+ break;
+ case INCREMENTAL:
+ DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
+ PatchBranchCondMask(&masm, 0, CC_ALWAYS);
+ break;
+ case INCREMENTAL_COMPACTION:
+ DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
+ PatchBranchCondMask(&masm, first_instr_length, CC_ALWAYS);
+ break;
+ }
+ DCHECK(GetMode(stub) == mode);
+ CpuFeatures::FlushICache(stub->instruction_start(),
+ first_instr_length + second_instr_length);
+ }
+
+ DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
+
+ private:
+ // This is a helper class for freeing up 3 scratch registers. The input is
+ // two registers that must be preserved and one scratch register provided by
+ // the caller.
+ class RegisterAllocation {
+ public:
+ RegisterAllocation(Register object, Register address, Register scratch0)
+ : object_(object), address_(address), scratch0_(scratch0) {
+ DCHECK(!AreAliased(scratch0, object, address, no_reg));
+ scratch1_ = GetRegisterThatIsNotOneOf(object_, address_, scratch0_);
+ }
+
+ void Save(MacroAssembler* masm) {
+ DCHECK(!AreAliased(object_, address_, scratch1_, scratch0_));
+ // We don't have to save scratch0_ because it was given to us as
+ // a scratch register.
+ masm->push(scratch1_);
+ }
+
+ void Restore(MacroAssembler* masm) { masm->pop(scratch1_); }
+
+ // If we have to call into C then we need to save and restore all caller-
+ // saved registers that were not already preserved. The scratch registers
+ // will be restored by other means so we don't bother pushing them here.
+ void SaveCallerSaveRegisters(MacroAssembler* masm, SaveFPRegsMode mode) {
+ masm->push(r14);
+ masm->MultiPush(kJSCallerSaved & ~scratch1_.bit());
+ if (mode == kSaveFPRegs) {
+ // Save all volatile FP registers except d0.
+ masm->SaveFPRegs(sp, 1, DoubleRegister::kNumVolatileRegisters - 1);
+ }
+ }
+
+ inline void RestoreCallerSaveRegisters(MacroAssembler* masm,
+ SaveFPRegsMode mode) {
+ if (mode == kSaveFPRegs) {
+ // Restore all volatile FP registers except d0.
+ masm->RestoreFPRegs(sp, 1, DoubleRegister::kNumVolatileRegisters - 1);
+ }
+ masm->MultiPop(kJSCallerSaved & ~scratch1_.bit());
+ masm->pop(r14);
+ }
+
+ inline Register object() { return object_; }
+ inline Register address() { return address_; }
+ inline Register scratch0() { return scratch0_; }
+ inline Register scratch1() { return scratch1_; }
+
+ private:
+ Register object_;
+ Register address_;
+ Register scratch0_;
+ Register scratch1_;
+
+ friend class RecordWriteStub;
+ };
+
+ enum OnNoNeedToInformIncrementalMarker {
+ kReturnOnNoNeedToInformIncrementalMarker,
+ kUpdateRememberedSetOnNoNeedToInformIncrementalMarker
+ };
+
+ inline Major MajorKey() const final { return RecordWrite; }
+
+ void Generate(MacroAssembler* masm) override;
+ void GenerateIncremental(MacroAssembler* masm, Mode mode);
+ void CheckNeedsToInformIncrementalMarker(
+ MacroAssembler* masm, OnNoNeedToInformIncrementalMarker on_no_need,
+ Mode mode);
+ void InformIncrementalMarker(MacroAssembler* masm);
+
+ void Activate(Code* code) override {
+ code->GetHeap()->incremental_marking()->ActivateGeneratedStub(code);
+ }
+
+ Register object() const {
+ return Register::from_code(ObjectBits::decode(minor_key_));
+ }
+
+ Register value() const {
+ return Register::from_code(ValueBits::decode(minor_key_));
+ }
+
+ Register address() const {
+ return Register::from_code(AddressBits::decode(minor_key_));
+ }
+
+ RememberedSetAction remembered_set_action() const {
+ return RememberedSetActionBits::decode(minor_key_);
+ }
+
+ SaveFPRegsMode save_fp_regs_mode() const {
+ return SaveFPRegsModeBits::decode(minor_key_);
+ }
+
+ class ObjectBits : public BitField<int, 0, 5> {};
+ class ValueBits : public BitField<int, 5, 5> {};
+ class AddressBits : public BitField<int, 10, 5> {};
+ class RememberedSetActionBits : public BitField<RememberedSetAction, 15, 1> {
+ };
+ class SaveFPRegsModeBits : public BitField<SaveFPRegsMode, 16, 1> {};
+
+ Label slow_;
+ RegisterAllocation regs_;
+
+ DISALLOW_COPY_AND_ASSIGN(RecordWriteStub);
+};
+
+
+// Trampoline stub to call into native code. To call safely into native code
+// in the presence of compacting GC (which can move code objects) we need to
+// keep the code which called into native pinned in the memory. Currently the
+// simplest approach is to generate such stub early enough so it can never be
+// moved by GC
+class DirectCEntryStub : public PlatformCodeStub {
+ public:
+ explicit DirectCEntryStub(Isolate* isolate) : PlatformCodeStub(isolate) {}
+ void GenerateCall(MacroAssembler* masm, Register target);
+
+ private:
+ bool NeedsImmovableCode() override { return true; }
+
+ DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
+ DEFINE_PLATFORM_CODE_STUB(DirectCEntry, PlatformCodeStub);
+};
+
+
+class NameDictionaryLookupStub : public PlatformCodeStub {
+ public:
+ enum LookupMode { POSITIVE_LOOKUP, NEGATIVE_LOOKUP };
+
+ NameDictionaryLookupStub(Isolate* isolate, LookupMode mode)
+ : PlatformCodeStub(isolate) {
+ minor_key_ = LookupModeBits::encode(mode);
+ }
+
+ static void GenerateNegativeLookup(MacroAssembler* masm, Label* miss,
+ Label* done, Register receiver,
+ Register properties, Handle<Name> name,
+ Register scratch0);
+
+ static void GeneratePositiveLookup(MacroAssembler* masm, Label* miss,
+ Label* done, Register elements,
+ Register name, Register r0, Register r1);
+
+ bool SometimesSetsUpAFrame() override { return false; }
+
+ private:
+ static const int kInlinedProbes = 4;
+ static const int kTotalProbes = 20;
+
+ static const int kCapacityOffset =
+ NameDictionary::kHeaderSize +
+ NameDictionary::kCapacityIndex * kPointerSize;
+
+ static const int kElementsStartOffset =
+ NameDictionary::kHeaderSize +
+ NameDictionary::kElementsStartIndex * kPointerSize;
+
+ LookupMode mode() const { return LookupModeBits::decode(minor_key_); }
+
+ class LookupModeBits : public BitField<LookupMode, 0, 1> {};
+
+ DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
+ DEFINE_PLATFORM_CODE_STUB(NameDictionaryLookup, PlatformCodeStub);
+};
+
+
+class FloatingPointHelper : public AllStatic {
+ public:
+ enum Destination {
+ kFPRegisters,
+ kCoreRegisters
+ };
+
+
+ // Loads smis from r0 and r1 (right and left in binary operations) into
+ // floating point registers. Depending on the destination the values ends up
+ // either d7 and d6 or in r2/r3 and r0/r1 respectively. If the destination is
+ // floating point registers VFP3 must be supported. If core registers are
+ // requested when VFP3 is supported d6 and d7 will be scratched.
+ static void LoadSmis(MacroAssembler* masm,
+ Register scratch1,
+ Register scratch2);
+
+ // Loads objects from r0 and r1 (right and left in binary operations) into
+ // floating point registers. Depending on the destination the values ends up
+ // either d7 and d6 or in r2/r3 and r0/r1 respectively. If the destination is
+ // floating point registers VFP3 must be supported. If core registers are
+ // requested when VFP3 is supported d6 and d7 will still be scratched. If
+ // either r0 or r1 is not a number (not smi and not heap number object) the
+ // not_number label is jumped to with r0 and r1 intact.
+ static void LoadOperands(MacroAssembler* masm,
+ Register heap_number_map,
+ Register scratch1,
+ Register scratch2,
+ Label* not_number);
+
+ // Convert the smi or heap number in object to an int32 using the rules
+ // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
+ // and brought into the range -2^31 .. +2^31 - 1.
+ static void ConvertNumberToInt32(MacroAssembler* masm,
+ Register object,
+ Register dst,
+ Register heap_number_map,
+ Register scratch1,
+ Register scratch2,
+ Register scratch3,
+ DoubleRegister double_scratch,
+ Label* not_int32);
+
+ // Converts the integer (untagged smi) in |src| to a double, storing
+ // the result to |double_dst|
+ static void ConvertIntToDouble(MacroAssembler* masm,
+ Register src,
+ DoubleRegister double_dst);
+
+ // Converts the unsigned integer (untagged smi) in |src| to
+ // a double, storing the result to |double_dst|
+ static void ConvertUnsignedIntToDouble(MacroAssembler* masm,
+ Register src,
+ DoubleRegister double_dst);
+
+ // Converts the integer (untagged smi) in |src| to
+ // a float, storing the result in |dst|
+ static void ConvertIntToFloat(MacroAssembler* masm,
+ const DoubleRegister dst,
+ const Register src);
+
+ // Load the number from object into double_dst in the double format.
+ // Control will jump to not_int32 if the value cannot be exactly represented
+ // by a 32-bit integer.
+ // Floating point value in the 32-bit integer range that are not exact integer
+ // won't be loaded.
+ static void LoadNumberAsInt32Double(MacroAssembler* masm,
+ Register object,
+ DoubleRegister double_dst,
+ DoubleRegister double_scratch,
+ Register heap_number_map,
+ Register scratch1,
+ Register scratch2,
+ Label* not_int32);
+
+ // Loads the number from object into dst as a 32-bit integer.
+ // Control will jump to not_int32 if the object cannot be exactly represented
+ // by a 32-bit integer.
+ // Floating point value in the 32-bit integer range that are not exact integer
+ // won't be converted.
+ // scratch3 is not used when VFP3 is supported.
+ static void LoadNumberAsInt32(MacroAssembler* masm,
+ Register object,
+ Register dst,
+ Register heap_number_map,
+ Register scratch1,
+ Register scratch2,
+ Register scratch3,
+ DoubleRegister double_scratch0,
+ DoubleRegister double_scratch1,
+ Label* not_int32);
+
+ // Generate non VFP3 code to check if a double can be exactly represented by a
+ // 32-bit integer. This does not check for 0 or -0, which need
+ // to be checked for separately.
+ // Control jumps to not_int32 if the value is not a 32-bit integer, and falls
+ // through otherwise.
+ // src1 and src2 will be cloberred.
+ //
+ // Expected input:
+ // - src1: higher (exponent) part of the double value.
+ // - src2: lower (mantissa) part of the double value.
+ // Output status:
+ // - dst: 32 higher bits of the mantissa. (mantissa[51:20])
+ // - src2: contains 1.
+ // - other registers are clobbered.
+ static void DoubleIs32BitInteger(MacroAssembler* masm,
+ Register src1,
+ Register src2,
+ Register dst,
+ Register scratch,
+ Label* not_int32);
+
+ // Generates code to call a C function to do a double operation using core
+ // registers. (Used when VFP3 is not supported.)
+ // This code never falls through, but returns with a heap number containing
+ // the result in r0.
+ // Register heapnumber_result must be a heap number in which the
+ // result of the operation will be stored.
+ // Requires the following layout on entry:
+ // r0: Left value (least significant part of mantissa).
+ // r1: Left value (sign, exponent, top of mantissa).
+ // r2: Right value (least significant part of mantissa).
+ // r3: Right value (sign, exponent, top of mantissa).
+ static void CallCCodeForDoubleOperation(MacroAssembler* masm,
+ Token::Value op,
+ Register heap_number_result,
+ Register scratch);
+
+ private:
+ static void LoadNumber(MacroAssembler* masm,
+ Register object,
+ DoubleRegister dst,
+ Register heap_number_map,
+ Register scratch1,
+ Register scratch2,
+ Label* not_number);
+};
+}
+} // namespace v8::internal
+
+#endif // V8_S390_CODE_STUBS_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/codegen-s390.cc
@@ -0,0 +1,703 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/codegen.h"
+#include "src/macro-assembler.h"
+#include "src/s390/simulator-s390.h"
+
+namespace v8 {
+namespace internal {
+
+
+#define __ masm.
+
+
+#if defined(USE_SIMULATOR)
+byte* fast_exp_s390_machine_code = NULL;
+double fast_exp_simulator(double x) {
+ return Simulator::current(Isolate::Current())
+ ->CallFPReturnsDouble(fast_exp_s390_machine_code, x, 0);
+}
+#endif
+
+
+UnaryMathFunction CreateExpFunction() {
+ if (!FLAG_fast_math) return &std::exp;
+ size_t actual_size;
+ byte* buffer =
+ static_cast<byte*>(base::OS::Allocate(1 * KB, &actual_size, true));
+ if (buffer == NULL) return &std::exp;
+ ExternalReference::InitializeMathExpData();
+
+ MacroAssembler masm(NULL, buffer, static_cast<int>(actual_size));
+
+ {
+ DoubleRegister input = d0;
+ DoubleRegister result = d2;
+ DoubleRegister double_scratch1 = d3;
+ DoubleRegister double_scratch2 = d4;
+ Register temp1 = r6;
+ Register temp2 = r7;
+ Register temp3 = r8;
+
+ __ Push(temp3, temp2, temp1);
+ MathExpGenerator::EmitMathExp(&masm, input, result, double_scratch1,
+ double_scratch2, temp1, temp2, temp3);
+ __ Pop(temp3, temp2, temp1);
+ __ ldr(d0, result);
+ __ Ret();
+ }
+
+ CodeDesc desc;
+ masm.GetCode(&desc);
+#if !ABI_USES_FUNCTION_DESCRIPTORS
+ DCHECK(!RelocInfo::RequiresRelocation(desc));
+#endif
+
+ CpuFeatures::FlushICache(buffer, actual_size);
+ base::OS::ProtectCode(buffer, actual_size);
+
+#if !defined(USE_SIMULATOR)
+ return FUNCTION_CAST<UnaryMathFunction>(buffer);
+#else
+ fast_exp_s390_machine_code = buffer;
+ return &fast_exp_simulator;
+#endif
+}
+
+
+UnaryMathFunction CreateSqrtFunction() {
+#if defined(USE_SIMULATOR)
+ return &std::sqrt;
+#else
+ size_t actual_size;
+ byte* buffer =
+ static_cast<byte*>(base::OS::Allocate(1 * KB, &actual_size, true));
+ if (buffer == NULL) return &std::sqrt;
+
+ MacroAssembler masm(NULL, buffer, static_cast<int>(actual_size));
+
+ __ MovFromFloatParameter(d0);
+ __ sqdbr(d0, d0);
+ __ MovToFloatResult(d0);
+ __ Ret();
+
+ CodeDesc desc;
+ masm.GetCode(&desc);
+#if !ABI_USES_FUNCTION_DESCRIPTORS
+ DCHECK(!RelocInfo::RequiresRelocation(desc));
+#endif
+
+ CpuFeatures::FlushICache(buffer, actual_size);
+ base::OS::ProtectCode(buffer, actual_size);
+ return FUNCTION_CAST<UnaryMathFunction>(buffer);
+#endif
+}
+
+#undef __
+
+
+// -------------------------------------------------------------------------
+// Platform-specific RuntimeCallHelper functions.
+
+void StubRuntimeCallHelper::BeforeCall(MacroAssembler* masm) const {
+ masm->EnterFrame(StackFrame::INTERNAL);
+ DCHECK(!masm->has_frame());
+ masm->set_has_frame(true);
+}
+
+
+void StubRuntimeCallHelper::AfterCall(MacroAssembler* masm) const {
+ masm->LeaveFrame(StackFrame::INTERNAL);
+ DCHECK(masm->has_frame());
+ masm->set_has_frame(false);
+}
+
+
+// -------------------------------------------------------------------------
+// Code generators
+
+#define __ ACCESS_MASM(masm)
+
+void ElementsTransitionGenerator::GenerateMapChangeElementsTransition(
+ MacroAssembler* masm, Register receiver, Register key, Register value,
+ Register target_map, AllocationSiteMode mode,
+ Label* allocation_memento_found) {
+ Register scratch_elements = r6;
+ DCHECK(!AreAliased(receiver, key, value, target_map, scratch_elements));
+
+ if (mode == TRACK_ALLOCATION_SITE) {
+ DCHECK(allocation_memento_found != NULL);
+ __ JumpIfJSArrayHasAllocationMemento(receiver, scratch_elements,
+ allocation_memento_found);
+ }
+
+ // Set transitioned map.
+ __ StoreP(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ RecordWriteField(receiver, HeapObject::kMapOffset, target_map, r1,
+ kLRHasNotBeenSaved, kDontSaveFPRegs, EMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+}
+
+
+void ElementsTransitionGenerator::GenerateSmiToDouble(
+ MacroAssembler* masm, Register receiver, Register key, Register value,
+ Register target_map, AllocationSiteMode mode, Label* fail) {
+ // lr contains the return address
+ Label loop, entry, convert_hole, gc_required, only_change_map, done;
+ Register elements = r6;
+ Register length = r7;
+ Register array = r8;
+ Register array_end = array;
+
+ // target_map parameter can be clobbered.
+ Register scratch1 = target_map;
+ Register scratch2 = r1;
+
+ // Verify input registers don't conflict with locals.
+ DCHECK(!AreAliased(receiver, key, value, target_map, elements, length, array,
+ scratch2));
+
+ if (mode == TRACK_ALLOCATION_SITE) {
+ __ JumpIfJSArrayHasAllocationMemento(receiver, elements, fail);
+ }
+
+ // Check for empty arrays, which only require a map transition and no changes
+ // to the backing store.
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ CompareRoot(elements, Heap::kEmptyFixedArrayRootIndex);
+ __ beq(&only_change_map, Label::kNear);
+
+ // Preserve lr and use r14 as a temporary register.
+ __ push(r14);
+
+ __ LoadP(length, FieldMemOperand(elements, FixedArray::kLengthOffset));
+ // length: number of elements (smi-tagged)
+
+ // Allocate new FixedDoubleArray.
+ __ SmiToDoubleArrayOffset(r14, length);
+ __ AddP(r14, Operand(FixedDoubleArray::kHeaderSize));
+ __ Allocate(r14, array, r9, scratch2, &gc_required, DOUBLE_ALIGNMENT);
+
+ // Set destination FixedDoubleArray's length and map.
+ __ LoadRoot(scratch2, Heap::kFixedDoubleArrayMapRootIndex);
+ __ StoreP(length, MemOperand(array, FixedDoubleArray::kLengthOffset));
+ // Update receiver's map.
+ __ StoreP(scratch2, MemOperand(array, HeapObject::kMapOffset));
+
+ __ StoreP(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ RecordWriteField(receiver,
+ HeapObject::kMapOffset,
+ target_map,
+ scratch2,
+ kLRHasBeenSaved,
+ kDontSaveFPRegs,
+ OMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+ // Replace receiver's backing store with newly created FixedDoubleArray.
+ __ AddP(scratch1, array, Operand(kHeapObjectTag));
+ __ StoreP(scratch1, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ RecordWriteField(receiver,
+ JSObject::kElementsOffset,
+ scratch1,
+ scratch2,
+ kLRHasBeenSaved,
+ kDontSaveFPRegs,
+ EMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+
+ // Prepare for conversion loop.
+ __ AddP(target_map, elements,
+ Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ AddP(r9, array, Operand(FixedDoubleArray::kHeaderSize));
+ __ SmiToDoubleArrayOffset(array, length);
+ __ AddP(array_end, r9, array);
+// Repurpose registers no longer in use.
+#if V8_TARGET_ARCH_S390X
+ Register hole_int64 = elements;
+#else
+ Register hole_lower = elements;
+ Register hole_upper = length;
+#endif
+ // scratch1: begin of source FixedArray element fields, not tagged
+ // hole_lower: kHoleNanLower32 OR hol_int64
+ // hole_upper: kHoleNanUpper32
+ // array_end: end of destination FixedDoubleArray, not tagged
+ // scratch2: begin of FixedDoubleArray element fields, not tagged
+
+ __ b(&entry, Label::kNear);
+
+ __ bind(&only_change_map);
+ __ StoreP(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ RecordWriteField(receiver, HeapObject::kMapOffset, target_map, scratch2,
+ kLRHasNotBeenSaved, kDontSaveFPRegs, OMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+ __ b(&done, Label::kNear);
+
+ // Call into runtime if GC is required.
+ __ bind(&gc_required);
+ __ pop(r14);
+ __ b(fail);
+
+ // Convert and copy elements.
+ __ bind(&loop);
+ __ LoadP(r14, MemOperand(scratch1));
+ __ la(scratch1, MemOperand(scratch1, kPointerSize));
+ // r1: current element
+ __ UntagAndJumpIfNotSmi(r14, r14, &convert_hole);
+
+ // Normal smi, convert to double and store.
+ __ ConvertIntToDouble(r14, d0);
+ __ StoreF(d0, MemOperand(r9, 0));
+ __ la(r9, MemOperand(r9, 8));
+
+ __ b(&entry, Label::kNear);
+
+ // Hole found, store the-hole NaN.
+ __ bind(&convert_hole);
+ if (FLAG_debug_code) {
+ // Restore a "smi-untagged" heap object.
+ __ LoadP(r1, MemOperand(r5, -kPointerSize));
+ __ CompareRoot(r1, Heap::kTheHoleValueRootIndex);
+ __ Assert(eq, kObjectFoundInSmiOnlyArray);
+ }
+#if V8_TARGET_ARCH_S390X
+ __ stg(hole_int64, MemOperand(r9, 0));
+#else
+ // TODO(joransiu): Check if this works
+ __ StoreW(hole_upper, MemOperand(r9, Register::kExponentOffset));
+ __ StoreW(hole_lower, MemOperand(r9, Register::kMantissaOffset));
+#endif
+ __ AddP(r9, Operand(8));
+
+ __ bind(&entry);
+ __ CmpP(r9, array_end);
+ __ blt(&loop);
+
+ __ pop(r14);
+ __ bind(&done);
+}
+
+
+void ElementsTransitionGenerator::GenerateDoubleToObject(
+ MacroAssembler* masm, Register receiver, Register key, Register value,
+ Register target_map, AllocationSiteMode mode, Label* fail) {
+ // Register lr contains the return address.
+ Label loop, convert_hole, gc_required, only_change_map;
+ Register elements = r6;
+ Register array = r8;
+ Register length = r7;
+ Register scratch = r1;
+
+ // Verify input registers don't conflict with locals.
+ DCHECK(!AreAliased(receiver, key, value, target_map, elements, array, length,
+ scratch));
+
+ if (mode == TRACK_ALLOCATION_SITE) {
+ __ JumpIfJSArrayHasAllocationMemento(receiver, elements, fail);
+ }
+
+ // Check for empty arrays, which only require a map transition and no changes
+ // to the backing store.
+ __ LoadP(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ CompareRoot(elements, Heap::kEmptyFixedArrayRootIndex);
+ __ beq(&only_change_map);
+
+ __ Push(target_map, receiver, key, value);
+ __ LoadP(length, FieldMemOperand(elements, FixedArray::kLengthOffset));
+ // elements: source FixedDoubleArray
+ // length: number of elements (smi-tagged)
+
+ // Allocate new FixedArray.
+ // Re-use value and target_map registers, as they have been saved on the
+ // stack.
+ Register array_size = value;
+ Register allocate_scratch = target_map;
+ __ LoadImmP(array_size, Operand(FixedDoubleArray::kHeaderSize));
+ __ SmiToPtrArrayOffset(r0, length);
+ __ AddP(array_size, r0);
+ __ Allocate(array_size, array, allocate_scratch, scratch, &gc_required,
+ NO_ALLOCATION_FLAGS);
+ // array: destination FixedArray, not tagged as heap object
+ // Set destination FixedDoubleArray's length and map.
+ __ LoadRoot(scratch, Heap::kFixedArrayMapRootIndex);
+ __ StoreP(length, MemOperand(array, FixedDoubleArray::kLengthOffset));
+ __ StoreP(scratch, MemOperand(array, HeapObject::kMapOffset));
+ __ AddP(array, Operand(kHeapObjectTag));
+
+ // Prepare for conversion loop.
+ Register src_elements = elements;
+ Register dst_elements = target_map;
+ Register dst_end = length;
+ Register heap_number_map = scratch;
+ __ AddP(src_elements,
+ Operand(FixedDoubleArray::kHeaderSize - kHeapObjectTag));
+ __ SmiToPtrArrayOffset(length, length);
+ __ LoadRoot(r9, Heap::kTheHoleValueRootIndex);
+
+ Label initialization_loop, loop_done;
+ __ ShiftRightP(r0, length, Operand(kPointerSizeLog2));
+ __ beq(&loop_done, Label::kNear/*, cr0*/);
+
+ // Allocating heap numbers in the loop below can fail and cause a jump to
+ // gc_required. We can't leave a partly initialized FixedArray behind,
+ // so pessimistically fill it with holes now.
+ __ AddP(dst_elements, array,
+ Operand(FixedArray::kHeaderSize - kHeapObjectTag - kPointerSize));
+ __ bind(&initialization_loop);
+ __ StoreP(r9, MemOperand(dst_elements, kPointerSize));
+ __ lay(dst_elements, MemOperand(dst_elements, kPointerSize));
+ __ BranchOnCount(r0, &initialization_loop);
+
+ __ AddP(dst_elements, array,
+ Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ AddP(dst_end, dst_elements, length);
+ __ LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
+ // Using offsetted addresses in src_elements to fully take advantage of
+ // post-indexing.
+ // dst_elements: begin of destination FixedArray element fields, not tagged
+ // src_elements: begin of source FixedDoubleArray element fields,
+ // not tagged, +4
+ // dst_end: end of destination FixedArray, not tagged
+ // array: destination FixedArray
+ // r9: the-hole pointer
+ // heap_number_map: heap number map
+ __ b(&loop, Label::kNear);
+
+ // Call into runtime if GC is required.
+ __ bind(&gc_required);
+ __ Pop(target_map, receiver, key, value);
+ __ b(fail);
+
+ // Replace the-hole NaN with the-hole pointer.
+ __ bind(&convert_hole);
+ __ StoreP(r9, MemOperand(dst_elements));
+ __ AddP(dst_elements, Operand(kPointerSize));
+ __ CmpLogicalP(dst_elements, dst_end);
+ __ bge(&loop_done);
+
+ __ bind(&loop);
+ Register upper_bits = key;
+ __ LoadlW(upper_bits, MemOperand(src_elements, Register::kExponentOffset));
+ __ AddP(src_elements, Operand(kDoubleSize));
+ // upper_bits: current element's upper 32 bit
+ // src_elements: address of next element's upper 32 bit
+ __ Cmp32(upper_bits, Operand(kHoleNanUpper32));
+ __ beq(&convert_hole, Label::kNear);
+
+ // Non-hole double, copy value into a heap number.
+ Register heap_number = receiver;
+ Register scratch2 = value;
+ __ AllocateHeapNumber(heap_number, scratch2, r1, heap_number_map,
+ &gc_required);
+ // heap_number: new heap number
+#if V8_TARGET_ARCH_S390X
+ __ lg(scratch2, MemOperand(src_elements, -kDoubleSize));
+ // subtract tag for std
+ __ AddP(upper_bits, heap_number, Operand(-kHeapObjectTag));
+ __ stg(scratch2, MemOperand(upper_bits, HeapNumber::kValueOffset));
+#else
+ __ LoadlW(scratch2,
+ MemOperand(src_elements, Register::kMantissaOffset - kDoubleSize));
+ __ LoadlW(upper_bits,
+ MemOperand(src_elements, Register::kExponentOffset - kDoubleSize));
+ __ StoreW(scratch2,
+ FieldMemOperand(heap_number, HeapNumber::kMantissaOffset));
+ __ StoreW(upper_bits,
+ FieldMemOperand(heap_number, HeapNumber::kExponentOffset));
+#endif
+ __ LoadRR(scratch2, dst_elements);
+ __ StoreP(heap_number, MemOperand(dst_elements));
+ __ AddP(dst_elements, Operand(kPointerSize));
+ __ RecordWrite(array, scratch2, heap_number, kLRHasNotBeenSaved,
+ kDontSaveFPRegs, EMIT_REMEMBERED_SET, OMIT_SMI_CHECK);
+ __ CmpLogicalP(dst_elements, dst_end);
+ __ blt(&loop);
+ __ bind(&loop_done);
+
+ __ Pop(target_map, receiver, key, value);
+ // Replace receiver's backing store with newly created and filled FixedArray.
+ __ StoreP(array, FieldMemOperand(receiver, JSObject::kElementsOffset));
+ __ RecordWriteField(receiver, JSObject::kElementsOffset, array, scratch,
+ kLRHasNotBeenSaved, kDontSaveFPRegs, EMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+
+ __ bind(&only_change_map);
+ // Update receiver's map.
+ __ StoreP(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
+ __ RecordWriteField(receiver, HeapObject::kMapOffset, target_map, scratch,
+ kLRHasNotBeenSaved, kDontSaveFPRegs, OMIT_REMEMBERED_SET,
+ OMIT_SMI_CHECK);
+}
+
+
+// assume ip can be used as a scratch register below
+void StringCharLoadGenerator::Generate(MacroAssembler* masm, Register string,
+ Register index, Register result,
+ Label* call_runtime) {
+ // Fetch the instance type of the receiver into result register.
+ __ LoadP(result, FieldMemOperand(string, HeapObject::kMapOffset));
+ __ LoadlB(result, FieldMemOperand(result, Map::kInstanceTypeOffset));
+
+ // We need special handling for indirect strings.
+ Label check_sequential;
+ __ mov(r0, Operand(kIsIndirectStringMask));
+ __ AndP(r0, result);
+ __ beq(&check_sequential, Label::kNear/*, cr0*/);
+
+ // Dispatch on the indirect string shape: slice or cons.
+ Label cons_string;
+ __ mov(ip, Operand(kSlicedNotConsMask));
+ __ LoadRR(r0, result);
+ __ AndP(r0, ip/*, SetRC*/); // Should be okay to remove RC
+ __ beq(&cons_string , Label::kNear/*, cr0*/);
+
+ // Handle slices.
+ Label indirect_string_loaded;
+ __ LoadP(result, FieldMemOperand(string, SlicedString::kOffsetOffset));
+ __ LoadP(string, FieldMemOperand(string, SlicedString::kParentOffset));
+ __ SmiUntag(ip, result);
+ __ AddP(index, ip);
+ __ b(&indirect_string_loaded, Label::kNear);
+
+ // Handle cons strings.
+ // Check whether the right hand side is the empty string (i.e. if
+ // this is really a flat string in a cons string). If that is not
+ // the case we would rather go to the runtime system now to flatten
+ // the string.
+ __ bind(&cons_string);
+ __ LoadP(result, FieldMemOperand(string, ConsString::kSecondOffset));
+ __ CompareRoot(result, Heap::kempty_stringRootIndex);
+ __ bne(call_runtime);
+ // Get the first of the two strings and load its instance type.
+ __ LoadP(string, FieldMemOperand(string, ConsString::kFirstOffset));
+
+ __ bind(&indirect_string_loaded);
+ __ LoadP(result, FieldMemOperand(string, HeapObject::kMapOffset));
+ __ LoadlB(result, FieldMemOperand(result, Map::kInstanceTypeOffset));
+
+ // Distinguish sequential and external strings. Only these two string
+ // representations can reach here (slices and flat cons strings have been
+ // reduced to the underlying sequential or external string).
+ Label external_string, check_encoding;
+ __ bind(&check_sequential);
+ STATIC_ASSERT(kSeqStringTag == 0);
+ __ mov(r0, Operand(kStringRepresentationMask));
+ __ AndP(r0, result);
+ __ bne(&external_string, Label::kNear);
+
+ // Prepare sequential strings
+ STATIC_ASSERT(SeqTwoByteString::kHeaderSize == SeqOneByteString::kHeaderSize);
+ __ AddP(string, Operand(SeqTwoByteString::kHeaderSize - kHeapObjectTag));
+ __ b(&check_encoding, Label::kNear);
+
+ // Handle external strings.
+ __ bind(&external_string);
+ if (FLAG_debug_code) {
+ // Assert that we do not have a cons or slice (indirect strings) here.
+ // Sequential strings have already been ruled out.
+ __ mov(r0, Operand(kIsIndirectStringMask));
+ __ AndP(r0, result);
+ __ Assert(eq, kExternalStringExpectedButNotFound, cr0);
+ }
+ // Rule out short external strings.
+ STATIC_ASSERT(kShortExternalStringTag != 0);
+ __ mov(r0, Operand(kShortExternalStringMask));
+ __ AndP(r0, result);
+ __ bne(call_runtime /*, cr0*/);
+ __ LoadP(string,
+ FieldMemOperand(string, ExternalString::kResourceDataOffset));
+
+ Label one_byte, done;
+ __ bind(&check_encoding);
+ STATIC_ASSERT(kTwoByteStringTag == 0);
+ __ mov(r0, Operand(kStringEncodingMask));
+ __ AndP(r0, result);
+ __ bne(&one_byte, Label::kNear);
+ // Two-byte string.
+ __ ShiftLeftP(result, index, Operand(1));
+ __ LoadLogicalHalfWordP(result, MemOperand(string, result));
+ __ b(&done, Label::kNear);
+ __ bind(&one_byte);
+ // One-byte string.
+ __ LoadlB(result, MemOperand(string, index));
+ __ bind(&done);
+}
+
+
+static MemOperand ExpConstant(int index, Register base) {
+ return MemOperand(base, index * kDoubleSize);
+}
+
+
+void MathExpGenerator::EmitMathExp(MacroAssembler* masm, DoubleRegister input,
+ DoubleRegister result,
+ DoubleRegister double_scratch1,
+ DoubleRegister double_scratch2,
+ Register temp1, Register temp2,
+ Register temp3) {
+ DCHECK(!input.is(result));
+ DCHECK(!input.is(double_scratch1));
+ DCHECK(!input.is(double_scratch2));
+ DCHECK(!result.is(double_scratch1));
+ DCHECK(!result.is(double_scratch2));
+ DCHECK(!double_scratch1.is(double_scratch2));
+ DCHECK(!temp1.is(temp2));
+ DCHECK(!temp1.is(temp3));
+ DCHECK(!temp2.is(temp3));
+ DCHECK(ExternalReference::math_exp_constants(0).address() != NULL);
+ DCHECK(!masm->serializer_enabled()); // External references not serializable.
+
+ Label zero, infinity, done;
+
+ __ mov(temp3, Operand(ExternalReference::math_exp_constants(0)));
+
+ __ LoadF(double_scratch1, ExpConstant(0, temp3));
+ __ cdbr(double_scratch1, input);
+ __ ldr(result, input);
+ __ bunordered(&done, Label::kNear);
+ __ bge(&zero, Label::kNear);
+
+ __ LoadF(double_scratch2, ExpConstant(1, temp3));
+ __ cdbr(input, double_scratch2);
+ __ bge(&infinity, Label::kNear);
+
+ __ LoadF(double_scratch1, ExpConstant(3, temp3));
+ __ LoadF(result, ExpConstant(4, temp3));
+ // @TODO(Tara): verify madbr for correctness and use here instead of mdbr,adbr
+ __ mdbr(double_scratch1, input);
+ __ adbr(double_scratch1, result);
+
+ // Move low word of double_scratch1 to temp2
+ __ lgdr(temp2, double_scratch1);
+ __ nihf(temp2, Operand::Zero());
+
+ __ sdbr(double_scratch1, result);
+ __ LoadF(result, ExpConstant(6, temp3));
+ __ LoadF(double_scratch2, ExpConstant(5, temp3));
+ __ mdbr(double_scratch1, double_scratch2);
+ __ sdbr(double_scratch1, input);
+ __ sdbr(result, double_scratch1);
+ __ ldr(double_scratch2, double_scratch1);
+ __ mdbr(double_scratch2, double_scratch2);
+ __ mdbr(result, double_scratch2);
+ __ LoadF(double_scratch2, ExpConstant(7, temp3));
+ __ mdbr(result, double_scratch2);
+ __ sdbr(result, double_scratch1);
+ __ LoadF(double_scratch2, ExpConstant(8, temp3));
+ __ adbr(result, double_scratch2);
+ __ ShiftRight(temp1, temp2, Operand(11));
+ __ AndP(temp2, Operand(0x7ff));
+ __ AddP(temp1, Operand(0x3ff));
+
+ // Must not call ExpConstant() after overwriting temp3!
+ __ mov(temp3, Operand(ExternalReference::math_exp_log_table()));
+ __ ShiftLeft(temp2, temp2, Operand(3));
+
+ __ lg(temp2, MemOperand(temp2, temp3));
+ __ sllg(temp1, temp1, Operand(52));
+ __ ogr(temp2, temp1);
+ __ ldgr(double_scratch1, temp2);
+
+ __ mdbr(result, double_scratch1);
+ __ b(&done, Label::kNear);
+
+ __ bind(&zero);
+ __ lzdr(kDoubleRegZero);
+ __ ldr(result, kDoubleRegZero);
+ __ b(&done, Label::kNear);
+
+ __ bind(&infinity);
+ __ LoadF(result, ExpConstant(2, temp3));
+
+ __ bind(&done);
+}
+
+#undef __
+
+
+CodeAgingHelper::CodeAgingHelper() {
+ DCHECK(young_sequence_.length() == kNoCodeAgeSequenceLength);
+ // Since patcher is a large object, allocate it dynamically when needed,
+ // to avoid overloading the stack in stress conditions.
+ // DONT_FLUSH is used because the CodeAgingHelper is initialized early in
+ // the process, before ARM simulator ICache is setup.
+ SmartPointer<CodePatcher> patcher(new CodePatcher(
+ young_sequence_.start(), young_sequence_.length(),
+ CodePatcher::DONT_FLUSH));
+ PredictableCodeSizeScope scope(patcher->masm(), young_sequence_.length());
+ patcher->masm()->PushFixedFrame(r3);
+ patcher->masm()->la(fp,
+ MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+}
+
+
+#ifdef DEBUG
+bool CodeAgingHelper::IsOld(byte* candidate) const {
+ return Assembler::IsNop(Assembler::instr_at(candidate));
+}
+#endif
+
+
+bool Code::IsYoungSequence(Isolate* isolate, byte* sequence) {
+ bool result = isolate->code_aging_helper()->IsYoung(sequence);
+ DCHECK(result || isolate->code_aging_helper()->IsOld(sequence));
+ return result;
+}
+
+
+void Code::GetCodeAgeAndParity(Isolate* isolate, byte* sequence, Age* age,
+ MarkingParity* parity) {
+ if (IsYoungSequence(isolate, sequence)) {
+ *age = kNoAgeCodeAge;
+ *parity = NO_MARKING_PARITY;
+ } else {
+ Code* code = NULL;
+ Address target_address =
+ Assembler::target_address_at(sequence + kCodeAgingTargetDelta, code);
+ Code* stub = GetCodeFromTargetAddress(target_address);
+ GetCodeAgeAndParity(stub, age, parity);
+ }
+}
+
+
+void Code::PatchPlatformCodeAge(Isolate* isolate, byte* sequence, Code::Age age,
+ MarkingParity parity) {
+ uint32_t young_length = isolate->code_aging_helper()->young_sequence_length();
+ if (age == kNoAgeCodeAge) {
+ isolate->code_aging_helper()->CopyYoungSequenceTo(sequence);
+ CpuFeatures::FlushICache(sequence, young_length);
+ } else {
+ // FIXED_SEQUENCE
+ Code* stub = GetCodeAgeStub(isolate, age, parity);
+ CodePatcher patcher(sequence, young_length);
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(patcher.masm());
+ intptr_t target = reinterpret_cast<intptr_t>(stub->instruction_start());
+ // We need to push lr on stack so that GenerateMakeCodeYoungAgainCommon
+ // knows where to pick up the return address
+ //
+ // Since we can no longer guarentee ip will hold the branch address
+ // because of BRASL, use Call so that GenerateMakeCodeYoungAgainCommon
+ // can calculate the branch address offset
+ patcher.masm()->nop(); // marker to detect sequence (see IsOld)
+ patcher.masm()->CleanseP(r14);
+ patcher.masm()->Push(r14);
+ patcher.masm()->mov(r2, Operand(target));
+ patcher.masm()->Call(r2);
+ for (int i = 0;
+ i < kNoCodeAgeSequenceLength - kCodeAgingSequenceLength; i += 2) {
+ // TODO(joransiu): Create nop function to pad
+ // (kNoCodeAgeSequenceLength - kCodeAgingSequenceLength) bytes.
+ patcher.masm()->nop(); // 2-byte nops().
+ }
+ }
+}
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/codegen-s390.h
@@ -0,0 +1,47 @@
+// Copyright 2011 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_CODEGEN_S390_H_
+#define V8_S390_CODEGEN_S390_H_
+
+#include "src/ast.h"
+#include "src/macro-assembler.h"
+
+namespace v8 {
+namespace internal {
+
+
+enum TypeofState { INSIDE_TYPEOF, NOT_INSIDE_TYPEOF };
+
+
+class StringCharLoadGenerator : public AllStatic {
+ public:
+ // Generates the code for handling different string types and loading the
+ // indexed character into |result|. We expect |index| as untagged input and
+ // |result| as untagged output.
+ static void Generate(MacroAssembler* masm, Register string, Register index,
+ Register result, Label* call_runtime);
+
+ private:
+ DISALLOW_COPY_AND_ASSIGN(StringCharLoadGenerator);
+};
+
+class MathExpGenerator : public AllStatic {
+ public:
+ // Register input isn't modified. All other registers are clobbered.
+ static void EmitMathExp(MacroAssembler* masm, DoubleRegister input,
+ DoubleRegister result, DoubleRegister double_scratch1,
+ DoubleRegister double_scratch2, Register temp1,
+ Register temp2, Register temp3);
+
+ private:
+ DISALLOW_COPY_AND_ASSIGN(MathExpGenerator);
+};
+}
+} // namespace v8::internal
+
+#endif // V8_S390_CODEGEN_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/constants-s390.cc
@@ -0,0 +1,91 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/s390/constants-s390.h"
+
+
+namespace v8 {
+namespace internal {
+
+// These register names are defined in a way to match the native disassembler
+// formatting. See for example the command "objdump -d <binary file>".
+const char* Registers::names_[kNumRegisters] = {
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "fp", "ip", "r13", "r14", "sp"
+};
+
+
+// List of alias names which can be used when referring to PPC registers.
+const Registers::RegisterAlias Registers::aliases_[] = {{10, "sl"},
+ {11, "r11"},
+ {12, "r12"},
+ {13, "r13"},
+ {14, "r14"},
+ {15, "r15"},
+ {kNoRegister, NULL}};
+
+
+const char* Registers::Name(int reg) {
+ const char* result;
+ if ((0 <= reg) && (reg < kNumRegisters)) {
+ result = names_[reg];
+ } else {
+ result = "noreg";
+ }
+ return result;
+}
+
+
+const char* FPRegisters::names_[kNumFPRegisters] = {
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
+};
+
+
+const char* FPRegisters::Name(int reg) {
+ DCHECK((0 <= reg) && (reg < kNumFPRegisters));
+ return names_[reg];
+}
+
+
+int FPRegisters::Number(const char* name) {
+ for (int i = 0; i < kNumFPRegisters; i++) {
+ if (strcmp(names_[i], name) == 0) {
+ return i;
+ }
+ }
+
+ // No register with the requested name found.
+ return kNoRegister;
+}
+
+
+int Registers::Number(const char* name) {
+ // Look through the canonical names.
+ for (int i = 0; i < kNumRegisters; i++) {
+ if (strcmp(names_[i], name) == 0) {
+ return i;
+ }
+ }
+
+ // Look through the alias names.
+ int i = 0;
+ while (aliases_[i].reg != kNoRegister) {
+ if (strcmp(aliases_[i].name, name) == 0) {
+ return aliases_[i].reg;
+ }
+ i++;
+ }
+
+ // No register with the requested name found.
+ return kNoRegister;
+}
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/constants-s390.h
@@ -0,0 +1,1715 @@
+// Copyright 2011 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_CONSTANTS_S390_H_
+#define V8_S390_CONSTANTS_S390_H_
+
+// Get the standard printf format macros for C99 stdint types.
+#ifndef __STDC_FORMAT_MACROS
+#define __STDC_FORMAT_MACROS
+#endif
+#include <inttypes.h>
+
+namespace v8 {
+namespace internal {
+
+// Number of registers
+const int kNumRegisters = 16;
+
+// FP support.
+const int kNumFPDoubleRegisters = 16;
+const int kNumFPRegisters = kNumFPDoubleRegisters;
+
+const int kNoRegister = -1;
+
+// sign-extend the least significant 16-bits of value <imm>
+#define SIGN_EXT_IMM16(imm) ((static_cast<int>(imm) << 16) >> 16)
+
+// sign-extend the least significant 26-bits of value <imm>
+#define SIGN_EXT_IMM26(imm) ((static_cast<int>(imm) << 6) >> 6)
+
+// -----------------------------------------------------------------------------
+// Conditions.
+
+// Defines constants and accessor classes to assemble, disassemble and
+// simulate z/Architecture instructions.
+//
+// Section references in the code refer to the "z/Architecture Principles
+// Of Operation" http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr009.pdf
+//
+
+// Constants for specific fields are defined in their respective named enums.
+// General constants are in an anonymous enum in class Instr.
+enum Condition {
+ kNoCondition = -1,
+ eq = 0x8, // Equal.
+ ne = 0x7, // Not equal.
+ ge = 0xa, // Greater or equal.
+ lt = 0x4, // Less than.
+ gt = 0x2, // Greater than.
+ le = 0xc, // Less then or equal
+ al = 0xf, // Always.
+
+ CC_NOP = 0x0, // S390 NOP
+ CC_EQ = 0x08, // S390 condition code 0b1000
+ CC_LT = 0x04, // S390 condition code 0b0100
+ CC_LE = CC_EQ | CC_LT, // S390 condition code 0b1100
+ CC_GT = 0x02, // S390 condition code 0b0010
+ CC_GE = CC_EQ | CC_GT, // S390 condition code 0b1010
+ CC_OF = 0x01, // S390 condition code 0b0001
+ CC_NOF = 0x0E, // S390 condition code 0b1110
+ CC_ALWAYS = 0x0F, // S390 always taken branch
+ unordered = CC_OF, // Floating-point unordered
+ ordered = CC_NOF, // floating-point ordered
+ overflow = CC_OF, // Summary overflow
+ nooverflow = CC_NOF,
+
+ mask0x0 = 0, // no jumps
+ mask0x1 = 1,
+ mask0x2 = 2,
+ mask0x3 = 3,
+ mask0x4 = 4,
+ mask0x5 = 5,
+ mask0x6 = 6,
+ mask0x7 = 7,
+ mask0x8 = 8,
+ mask0x9 = 9,
+ mask0xA = 10,
+ mask0xB = 11,
+ mask0xC = 12,
+ mask0xD = 13,
+ mask0xE = 14,
+ mask0xF = 15,
+
+ // Rounding modes for floating poing facility
+ CURRENT_ROUNDING_MODE = 0,
+ ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0 = 1,
+ ROUND_TO_PREPARE_FOR_SHORTER_PRECISION = 3,
+ ROUND_TO_NEAREST_WITH_TIES_TO_EVEN = 4,
+ ROUND_TOWARD_0 = 5,
+ ROUND_TOWARD_PLUS_INFINITE = 6,
+ ROUND_TOWARD_MINUS_INFINITE = 7
+};
+
+
+inline Condition NegateCondition(Condition cond) {
+ DCHECK(cond != al);
+ switch (cond) {
+ case eq: return ne;
+ case ne: return eq;
+ case ge: return lt;
+ case gt: return le;
+ case le: return gt;
+ case lt: return ge;
+ case lt|gt: return eq;
+ case le|ge: return CC_OF;
+ case CC_OF: return CC_NOF;
+ default:
+ DCHECK(false);
+ }
+ return al;
+}
+
+
+// Commute a condition such that {a cond b == b cond' a}.
+inline Condition CommuteCondition(Condition cond) {
+ switch (cond) {
+ case lt: return gt;
+ case gt: return lt;
+ case ge: return le;
+ case le: return ge;
+ case eq: return eq;
+ case ne: return ne;
+ default:
+ DCHECK(false);
+ return cond;
+ }
+}
+
+// -----------------------------------------------------------------------------
+// Instructions encoding.
+
+// Instr is merely used by the Assembler to distinguish 32bit integers
+// representing instructions from usual 32 bit values.
+// Instruction objects are pointers to 32bit values, and provide methods to
+// access the various ISA fields.
+typedef int32_t Instr;
+typedef uint16_t TwoByteInstr;
+typedef uint32_t FourByteInstr;
+typedef uint64_t SixByteInstr;
+
+// Opcodes as defined in Appendix B-2 table
+enum Opcode {
+ A = 0x5A, // Add (32)
+ ADB = 0xED1A, // Add (long BFP)
+ ADBR = 0xB31A, // Add (long BFP)
+ ADTR = 0xB3D2, // Add (long DFP)
+ ADTRA = 0xB3D2, // Add (long DFP)
+ AEB = 0xED0A, // Add (short BFP)
+ AEBR = 0xB30A, // Add (short BFP)
+ AFI = 0xC29, // Add Immediate (32)
+ AG = 0xE308, // Add (64)
+ AGF = 0xE318, // Add (64<-32)
+ AGFI = 0xC28, // Add Immediate (64<-32)
+ AGFR = 0xB918, // Add (64<-32)
+ AGHI = 0xA7B, // Add Halfword Immediate (64)
+ AGHIK = 0xECD9, // Add Immediate (64<-16)
+ AGR = 0xB908, // Add (64)
+ AGRK = 0xB9E8, // Add (64)
+ AGSI = 0xEB7A, // Add Immediate (64<-8)
+ AH = 0x4A, // Add Halfword
+ AHHHR = 0xB9C8, // Add High (32)
+ AHHLR = 0xB9D8, // Add High (32)
+ AHI = 0xA7A, // Add Halfword Immediate (32)
+ AHIK = 0xECD8, // Add Immediate (32<-16)
+ AHY = 0xE37A, // Add Halfword
+ AIH = 0xCC8, // Add Immediate High (32)
+ AL = 0x5E, // Add Logical (32)
+ ALC = 0xE398, // Add Logical With Carry (32)
+ ALCG = 0xE388, // Add Logical With Carry (64)
+ ALCGR = 0xB988, // Add Logical With Carry (64)
+ ALCR = 0xB998, // Add Logical With Carry (32)
+ ALFI = 0xC2B, // Add Logical Immediate (32)
+ ALG = 0xE30A, // Add Logical (64)
+ ALGF = 0xE31A, // Add Logical (64<-32)
+ ALGFI = 0xC2A, // Add Logical Immediate (64<-32)
+ ALGFR = 0xB91A, // Add Logical (64<-32)
+ ALGHSIK = 0xECDB, // Add Logical With Signed Immediate (64<-16)
+ ALGR = 0xB90A, // Add Logical (64)
+ ALGRK = 0xB9EA, // Add Logical (64)
+ ALGSI = 0xEB7E, // Add Logical With Signed Immediate (64<-8)
+ ALHHHR = 0xB9CA, // Add Logical High (32)
+ ALHHLR = 0xB9DA, // Add Logical High (32)
+ ALHSIK = 0xECDA, // Add Logical With Signed Immediate (32<-16)
+ ALR = 0x1E, // Add Logical (32)
+ ALRK = 0xB9FA, // Add Logical (32)
+ ALSI = 0xEB6E, // Add Logical With Signed Immediate (32<-8)
+ ALSIH = 0xCCA, // Add Logical With Signed Immediate High (32)
+ ALSIHN = 0xCCB, // Add Logical With Signed Immediate High (32)
+ ALY = 0xE35E, // Add Logical (32)
+ AP = 0xFA, // Add Decimal
+ AR = 0x1A, // Add (32)
+ ARK = 0xB9F8, // Add (32)
+ ASI = 0xEB6A, // Add Immediate (32<-8)
+ AXBR = 0xB34A, // Add (extended BFP)
+ AXTR = 0xB3DA, // Add (extended DFP)
+ AXTRA = 0xB3DA, // Add (extended DFP)
+ AY = 0xE35A, // Add (32)
+ BAL = 0x45, // Branch And Link
+ BALR = 0x05, // Branch And Link
+ BAS = 0x4D, // Branch And Save
+ BASR = 0x0D, // Branch And Save
+ BASSM = 0x0C, // Branch And Save And Set Mode
+ BC = 0x47, // Branch On Condition
+ BCR = 0x07, // Branch On Condition
+ BCT = 0x46, // Branch On Count (32)
+ BCTG = 0xE346, // Branch On Count (64)
+ BCTGR = 0xB946, // Branch On Count (64)
+ BCTR = 0x06, // Branch On Count (32)
+ BPP = 0xC7, // Branch Prediction Preload
+ BPRP = 0xC5, // Branch Prediction Relative Preload
+ BRAS = 0xA75, // Branch Relative And Save
+ BRASL = 0xC05, // Branch Relative And Save Long
+ BRC = 0xA74, // Branch Relative On Condition
+ BRCL = 0xC04, // Branch Relative On Condition Long
+ BRCT = 0xA76, // Branch Relative On Count (32)
+ BRCTG = 0xA77, // Branch Relative On Count (64)
+ BRCTH = 0xCC6, // Branch Relative On Count High (32)
+ BRXH = 0x84, // Branch Relative On Index High (32)
+ BRXHG = 0xEC44, // Branch Relative On Index High (64)
+ BRXLE = 0x85, // Branch Relative On Index Low Or Eq. (32)
+ BRXLG = 0xEC45, // Branch Relative On Index Low Or Eq. (64)
+ BSM = 0x0B, // Branch And Set Mode
+ BXH = 0x86, // Branch On Index High (32)
+ BXHG = 0xEB44, // Branch On Index High (64)
+ BXLE = 0x87, // Branch On Index Low Or Equal (32)
+ BXLEG = 0xEB45, // Branch On Index Low Or Equal (64)
+ C = 0x59, // Compare (32)
+ CDB = 0xED19, // Compare (long BFP)
+ CDBR = 0xB319, // Compare (long BFP)
+ CDFBR = 0xB395, // Convert From Fixed (32 to long BFP)
+ CDFBRA = 0xB395, // Convert From Fixed (32 to long BFP)
+ CDFTR = 0xB951, // Convert From Fixed (32 to long DFP)
+ CDGBR = 0xB3A5, // Convert From Fixed (64 to long BFP)
+ CDGBRA = 0xB3A5, // Convert From Fixed (64 to long BFP)
+ CDGTR = 0xB3F1, // Convert From Fixed (64 to long DFP)
+ CDGTRA = 0xB3F1, // Convert From Fixed (64 to long DFP)
+ CDLFBR = 0xB391, // Convert From Logical (32 to long BFP)
+ CDLFTR = 0xB953, // Convert From Logical (32 to long DFP)
+ CDLGBR = 0xB3A1, // Convert From Logical (64 to long BFP)
+ CDLGTR = 0xB952, // Convert From Logical (64 to long DFP)
+ CDS = 0xBB, // Compare Double And Swap (32)
+ CDSG = 0xEB3E, // Compare Double And Swap (64)
+ CDSTR = 0xB3F3, // Convert From Signed Packed (64 to long DFP)
+ CDSY = 0xEB31, // Compare Double And Swap (32)
+ CDTR = 0xB3E4, // Compare (long DFP)
+ CDUTR = 0xB3F2, // Convert From Unsigned Packed (64 to long DFP)
+ CDZT = 0xEDAA, // Convert From Zoned (to long DFP)
+ CEB = 0xED09, // Compare (short BFP)
+ CEBR = 0xB309, // Compare (short BFP)
+ CEDTR = 0xB3F4, // Compare Biased Exponent (long DFP)
+ CEFBR = 0xB394, // Convert From Fixed (32 to short BFP)
+ CEFBRA = 0xB394, // Convert From Fixed (32 to short BFP)
+ CEGBR = 0xB3A4, // Convert From Fixed (64 to short BFP)
+ CEGBRA = 0xB3A4, // Convert From Fixed (64 to short BFP)
+ CELFBR = 0xB390, // Convert From Logical (32 to short BFP)
+ CELGBR = 0xB3A0, // Convert From Logical (64 to short BFP)
+ CEXTR = 0xB3FC, // Compare Biased Exponent (extended DFP)
+ CFC = 0xB21A, // Compare And Form Codeword
+ CFDBR = 0xB399, // Convert To Fixed (long BFP to 32)
+ CFDBRA = 0xB399, // Convert To Fixed (long BFP to 32)
+ CFDR = 0xB3B9, // Convert To Fixed (long HFP to 32)
+ CFDTR = 0xB941, // Convert To Fixed (long DFP to 32)
+ CFEBR = 0xB398, // Convert To Fixed (short BFP to 32)
+ CFEBRA = 0xB398, // Convert To Fixed (short BFP to 32)
+ CFER = 0xB3B8, // Convert To Fixed (short HFP to 32)
+ CFI = 0xC2D, // Compare Immediate (32)
+ CFXBR = 0xB39A, // Convert To Fixed (extended BFP to 32)
+ CFXBRA = 0xB39A, // Convert To Fixed (extended BFP to 32)
+ CFXR = 0xB3BA, // Convert To Fixed (extended HFP to 32)
+ CFXTR = 0xB949, // Convert To Fixed (extended DFP to 32)
+ CG = 0xE320, // Compare (64)
+ CGDBR = 0xB3A9, // Convert To Fixed (long BFP to 64)
+ CGDBRA = 0xB3A9, // Convert To Fixed (long BFP to 64)
+ CGDR = 0xB3C9, // Convert To Fixed (long HFP to 64)
+ CGDTR = 0xB3E1, // Convert To Fixed (long DFP to 64)
+ CGDTRA = 0xB3E1, // Convert To Fixed (long DFP to 64)
+ CGEBR = 0xB3A8, // Convert To Fixed (short BFP to 64)
+ CGEBRA = 0xB3A8, // Convert To Fixed (short BFP to 64)
+ CGER = 0xB3C8, // Convert To Fixed (short HFP to 64)
+ CGF = 0xE330, // Compare (64<-32)
+ CGFI = 0xC2C, // Compare Immediate (64<-32)
+ CGFR = 0xB930, // Compare (64<-32)
+ CGFRL = 0xC6C, // Compare Relative Long (64<-32)
+ CGH = 0xE334, // Compare Halfword (64<-16)
+ CGHI = 0xA7F, // Compare Halfword Immediate (64<-16)
+ CGHRL = 0xC64, // Compare Halfword Relative Long (64<-16)
+ CGHSI = 0xE558, // Compare Halfword Immediate (64<-16)
+ CGIB = 0xECFC, // Compare Immediate And Branch (64<-8)
+ CGIJ = 0xEC7C, // Compare Immediate And Branch Relative (64<-8)
+ CGIT = 0xEC70, // Compare Immediate And Trap (64<-16)
+ CGR = 0xB920, // Compare (64)
+ CGRB = 0xECE4, // Compare And Branch (64)
+ CGRJ = 0xEC64, // Compare And Branch Relative (64)
+ CGRL = 0xC68, // Compare Relative Long (64)
+ CGRT = 0xB960, // Compare And Trap (64)
+ CGXBR = 0xB3AA, // Convert To Fixed (extended BFP to 64)
+ CGXBRA = 0xB3AA, // Convert To Fixed (extended BFP to 64)
+ CGXR = 0xB3CA, // Convert To Fixed (extended HFP to 64)
+ CGXTR = 0xB3E9, // Convert To Fixed (extended DFP to 64)
+ CGXTRA = 0xB3E9, // Convert To Fixed (extended DFP to 64)
+ CH = 0x49, // Compare Halfword (32<-16)
+ CHF = 0xE3CD, // Compare High (32)
+ CHHR = 0xB9CD, // Compare High (32)
+ CHHSI = 0xE554, // Compare Halfword Immediate (16)
+ CHI = 0xA7E, // Compare Halfword Immediate (32<-16)
+ CHLR = 0xB9DD, // Compare High (32)
+ CHRL = 0xC65, // Compare Halfword Relative Long (32<-16)
+ CHSI = 0xE55C, // Compare Halfword Immediate (32<-16)
+ CHY = 0xE379, // Compare Halfword (32<-16)
+ CIB = 0xECFE, // Compare Immediate And Branch (32<-8)
+ CIH = 0xCCD, // Compare Immediate High (32)
+ CIJ = 0xEC7E, // Compare Immediate And Branch Relative (32<-8)
+ CIT = 0xEC72, // Compare Immediate And Trap (32<-16)
+ CKSM = 0xB241, // Checksum
+ CL = 0x55, // Compare Logical (32)
+ CLC = 0xD5, // Compare Logical (character)
+ CLCL = 0x0F, // Compare Logical Long
+ CLCLE = 0xA9, // Compare Logical Long Extended
+ CLCLU = 0xEB8F, // Compare Logical Long Unicode
+ CLFDBR = 0xB39D, // Convert To Logical (long BFP to 32)
+ CLFDTR = 0xB943, // Convert To Logical (long DFP to 32)
+ CLFEBR = 0xB39C, // Convert To Logical (short BFP to 32)
+ CLFHSI = 0xE55D, // Compare Logical Immediate (32<-16)
+ CLFI = 0xC2F, // Compare Logical Immediate (32)
+ CLFIT = 0xEC73, // Compare Logical Immediate And Trap (32<-16)
+ CLFXBR = 0xB39E, // Convert To Logical (extended BFP to 32)
+ CLFXTR = 0xB94B, // Convert To Logical (extended DFP to 32)
+ CLG = 0xE321, // Compare Logical (64)
+ CLGDBR = 0xB3AD, // Convert To Logical (long BFP to 64)
+ CLGDTR = 0xB942, // Convert To Logical (long DFP to 64)
+ CLGEBR = 0xB3AC, // Convert To Logical (short BFP to 64)
+ CLGF = 0xE331, // Compare Logical (64<-32)
+ CLGFI = 0xC2E, // Compare Logical Immediate (64<-32)
+ CLGR = 0xB921, // Compare Logical (64)
+ CLI = 0x95, // Compare Logical Immediate (8)
+ CLIY = 0xEB55, // Compare Logical Immediate (8)
+ CLR = 0x15, // Compare Logical (32)
+ CLY = 0xE355, // Compare Logical (32)
+ CD = 0x69, // Compare (LH)
+ CDR = 0x29, // Compare (LH)
+ CR = 0x19, // Compare (32)
+ CSST = 0xC82, // Compare And Swap And Store
+ CSXTR = 0xB3EB, // Convert To Signed Packed (extended DFP to 128)
+ CSY = 0xEB14, // Compare And Swap (32)
+ CU12 = 0xB2A7, // Convert Utf-8 To Utf-16
+ CU14 = 0xB9B0, // Convert Utf-8 To Utf-32
+ CU21 = 0xB2A6, // Convert Utf-16 To Utf-8
+ CU24 = 0xB9B1, // Convert Utf-16 To Utf-32
+ CU41 = 0xB9B2, // Convert Utf-32 To Utf-8
+ CU42 = 0xB9B3, // Convert Utf-32 To Utf-16
+ CUDTR = 0xB3E2, // Convert To Unsigned Packed (long DFP to 64)
+ CUSE = 0xB257, // Compare Until Substring Equal
+ CUTFU = 0xB2A7, // Convert Utf-8 To Unicode
+ CUUTF = 0xB2A6, // Convert Unicode To Utf-8
+ CUXTR = 0xB3EA, // Convert To Unsigned Packed (extended DFP to 128)
+ CVB = 0x4F, // Convert To Binary (32)
+ CVBG = 0xE30E, // Convert To Binary (64)
+ CVBY = 0xE306, // Convert To Binary (32)
+ CVD = 0x4E, // Convert To Decimal (32)
+ CVDG = 0xE32E, // Convert To Decimal (64)
+ CVDY = 0xE326, // Convert To Decimal (32)
+ CXBR = 0xB349, // Compare (extended BFP)
+ CXFBR = 0xB396, // Convert From Fixed (32 to extended BFP)
+ CXFBRA = 0xB396, // Convert From Fixed (32 to extended BFP)
+ CXFTR = 0xB959, // Convert From Fixed (32 to extended DFP)
+ CXGBR = 0xB3A6, // Convert From Fixed (64 to extended BFP)
+ CXGBRA = 0xB3A6, // Convert From Fixed (64 to extended BFP)
+ CXGTR = 0xB3F9, // Convert From Fixed (64 to extended DFP)
+ CXGTRA = 0xB3F9, // Convert From Fixed (64 to extended DFP)
+ CXLFBR = 0xB392, // Convert From Logical (32 to extended BFP)
+ CXLFTR = 0xB95B, // Convert From Logical (32 to extended DFP)
+ CXLGBR = 0xB3A2, // Convert From Logical (64 to extended BFP)
+ CXLGTR = 0xB95A, // Convert From Logical (64 to extended DFP)
+ CXSTR = 0xB3FB, // Convert From Signed Packed (128 to extended DFP)
+ CXTR = 0xB3EC, // Compare (extended DFP)
+ CXUTR = 0xB3FA, // Convert From Unsigned Packed (128 to ext. DFP)
+ CXZT = 0xEDAB, // Convert From Zoned (to extended DFP)
+ CY = 0xE359, // Compare (32)
+ CZDT = 0xEDA8, // Convert To Zoned (from long DFP)
+ CZXT = 0xEDA9, // Convert To Zoned (from extended DFP)
+ D = 0x5D, // Divide (32<-64)
+ DDB = 0xED1D, // Divide (long BFP)
+ DDBR = 0xB31D, // Divide (long BFP)
+ DDTR = 0xB3D1, // Divide (long DFP)
+ DDTRA = 0xB3D1, // Divide (long DFP)
+ DEB = 0xED0D, // Divide (short BFP)
+ DEBR = 0xB30D, // Divide (short BFP)
+ DIDBR = 0xB35B, // Divide To Integer (long BFP)
+ DIEBR = 0xB353, // Divide To Integer (short BFP)
+ DL = 0xE397, // Divide Logical (32<-64)
+ DLG = 0xE387, // Divide Logical (64<-128)
+ DLGR = 0xB987, // Divide Logical (64<-128)
+ DLR = 0xB997, // Divide Logical (32<-64)
+ DP = 0xFD, // Divide Decimal
+ DR = 0x1D, // Divide (32<-64)
+ DSG = 0xE30D, // Divide Single (64)
+ DSGF = 0xE31D, // Divide Single (64<-32)
+ DSGFR = 0xB91D, // Divide Single (64<-32)
+ DSGR = 0xB90D, // Divide Single (64)
+ DXBR = 0xB34D, // Divide (extended BFP)
+ DXTR = 0xB3D9, // Divide (extended DFP)
+ DXTRA = 0xB3D9, // Divide (extended DFP)
+ EAR = 0xB24F, // Extract Access
+ ECAG = 0xEB4C, // Extract Cache Attribute
+ ECTG = 0xC81, // Extract Cpu Time
+ ED = 0xDE, // Edit
+ EDMK = 0xDF, // Edit And Mark
+ EEDTR = 0xB3E5, // Extract Biased Exponent (long DFP to 64)
+ EEXTR = 0xB3ED, // Extract Biased Exponent (extended DFP to 64)
+ EFPC = 0xB38C, // Extract Fpc
+ EPSW = 0xB98D, // Extract Psw
+ ESDTR = 0xB3E7, // Extract Significance (long DFP)
+ ESXTR = 0xB3EF, // Extract Significance (extended DFP)
+ ETND = 0xB2EC, // Extract Transaction Nesting Depth
+ EX = 0x44, // Execute
+ EXRL = 0xC60, // Execute Relative Long
+ FIDBR = 0xB35F, // Load Fp Integer (long BFP)
+ FIDBRA = 0xB35F, // Load Fp Integer (long BFP)
+ FIDTR = 0xB3D7, // Load Fp Integer (long DFP)
+ FIEBR = 0xB357, // Load Fp Integer (short BFP)
+ FIEBRA = 0xB357, // Load Fp Integer (short BFP)
+ FIXBR = 0xB347, // Load Fp Integer (extended BFP)
+ FIXBRA = 0xB347, // Load Fp Integer (extended BFP)
+ FIXTR = 0xB3DF, // Load Fp Integer (extended DFP)
+ FLOGR = 0xB983, // Find Leftmost One
+ HSCH = 0xB231, // Halt Subchannel
+ IC_z = 0x43, // Insert Character
+ ICM = 0xBF, // Insert Characters Under Mask (low)
+ ICMH = 0xEB80, // Insert Characters Under Mask (high)
+ ICMY = 0xEB81, // Insert Characters Under Mask (low)
+ ICY = 0xE373, // Insert Character
+ IEDTR = 0xB3F6, // Insert Biased Exponent (64 to long DFP)
+ IEXTR = 0xB3FE, // Insert Biased Exponent (64 to extended DFP)
+ IIHF = 0xC08, // Insert Immediate (high)
+ IIHH = 0xA50, // Insert Immediate (high high)
+ IIHL = 0xA51, // Insert Immediate (high low)
+ IILF = 0xC09, // Insert Immediate (low)
+ IILH = 0xA52, // Insert Immediate (low high)
+ IILL = 0xA53, // Insert Immediate (low low)
+ IPM = 0xB222, // Insert Program Mask
+ KDB = 0xED18, // Compare And Signal (long BFP)
+ KDBR = 0xB318, // Compare And Signal (long BFP)
+ KDTR = 0xB3E0, // Compare And Signal (long DFP)
+ KEB = 0xED08, // Compare And Signal (short BFP)
+ KEBR = 0xB308, // Compare And Signal (short BFP)
+ KIMD = 0xB93E, // Compute Intermediate Message Digest
+ KLMD = 0xB93F, // Compute Last Message Digest
+ KM = 0xB92E, // Cipher Message
+ KMAC = 0xB91E, // Compute Message Authentication Code
+ KMC = 0xB92F, // Cipher Message With Chaining
+ KMCTR = 0xB92D, // Cipher Message With Counter
+ KMF = 0xB92A, // Cipher Message With Cfb
+ KMO = 0xB92B, // Cipher Message With Ofb
+ KXBR = 0xB348, // Compare And Signal (extended BFP)
+ KXTR = 0xB3E8, // Compare And Signal (extended DFP)
+ L = 0x58, // Load (32)
+ LA = 0x41, // Load Address
+ LAA = 0xEBF8, // Load And Add (32)
+ LAAG = 0xEBE8, // Load And Add (64)
+ LAAL = 0xEBFA, // Load And Add Logical (32)
+ LAALG = 0xEBEA, // Load And Add Logical (64)
+ LAE = 0x51, // Load Address Extended
+ LAEY = 0xE375, // Load Address Extended
+ LAN = 0xEBF4, // Load And And (32)
+ LANG = 0xEBE4, // Load And And (64)
+ LAO = 0xEBF6, // Load And Or (32)
+ LAOG = 0xEBE6, // Load And Or (64)
+ LARL = 0xC00, // Load Address Relative Long
+ LAT = 0xE39F, // Load And Trap (32L<-32)
+ LAX = 0xEBF7, // Load And Exclusive Or (32)
+ LAXG = 0xEBE7, // Load And Exclusive Or (64)
+ LAY = 0xE371, // Load Address
+ LB = 0xE376, // Load Byte (32)
+ LBH = 0xE3C0, // Load Byte High (32<-8)
+ LBR = 0xB926, // Load Byte (32)
+ LCDBR = 0xB313, // Load Complement (long BFP)
+ LCDFR = 0xB373, // Load Complement (long)
+ LCEBR = 0xB303, // Load Complement (short BFP)
+ LCGFR = 0xB913, // Load Complement (64<-32)
+ LCGR = 0xB903, // Load Complement (64)
+ LCR = 0x13, // Load Complement (32)
+ LCXBR = 0xB343, // Load Complement (extended BFP)
+ LD = 0x68, // Load (long)
+ LDEB = 0xED04, // Load Lengthened (short to long BFP)
+ LDEBR = 0xB304, // Load Lengthened (short to long BFP)
+ LDETR = 0xB3D4, // Load Lengthened (short to long DFP)
+ LDGR = 0xB3C1, // Load Fpr From Gr (64 to long)
+ LDR = 0x28, // Load (long)
+ LDXBR = 0xB345, // Load Rounded (extended to long BFP)
+ LDXBRA = 0xB345, // Load Rounded (extended to long BFP)
+ LDXTR = 0xB3DD, // Load Rounded (extended to long DFP)
+ LDY = 0xED65, // Load (long)
+ LE = 0x78, // Load (short)
+ LEDBR = 0xB344, // Load Rounded (long to short BFP)
+ LEDBRA = 0xB344, // Load Rounded (long to short BFP)
+ LEDTR = 0xB3D5, // Load Rounded (long to short DFP)
+ LER = 0x38, // Load (short)
+ LEXBR = 0xB346, // Load Rounded (extended to short BFP)
+ LEXBRA = 0xB346, // Load Rounded (extended to short BFP)
+ LEY = 0xED64, // Load (short)
+ LFAS = 0xB2BD, // Load Fpc And Signal
+ LFH = 0xE3CA, // Load High (32)
+ LFHAT = 0xE3C8, // Load High And Trap (32H<-32)
+ LFPC = 0xB29D, // Load Fpc
+ LG = 0xE304, // Load (64)
+ LGAT = 0xE385, // Load And Trap (64)
+ LGB = 0xE377, // Load Byte (64)
+ LGBR = 0xB906, // Load Byte (64)
+ LGDR = 0xB3CD, // Load Gr From Fpr (long to 64)
+ LGF = 0xE314, // Load (64<-32)
+ LGFI = 0xC01, // Load Immediate (64<-32)
+ LGFR = 0xB914, // Load (64<-32)
+ LGFRL = 0xC4C, // Load Relative Long (64<-32)
+ LGH = 0xE315, // Load Halfword (64)
+ LGHI = 0xA79, // Load Halfword Immediate (64)
+ LGHR = 0xB907, // Load Halfword (64)
+ LGHRL = 0xC44, // Load Halfword Relative Long (64<-16)
+ LGR = 0xB904, // Load (64)
+ LGRL = 0xC48, // Load Relative Long (64)
+ LH = 0x48, // Load Halfword (32)
+ LHH = 0xE3C4, // Load Halfword High (32<-16)
+ LHI = 0xA78, // Load Halfword Immediate (32)
+ LHR = 0xB927, // Load Halfword (32)
+ LHRL = 0xC45, // Load Halfword Relative Long (32<-16)
+ LHY = 0xE378, // Load Halfword (32)
+ LLC = 0xE394, // Load Logical Character (32)
+ LLCH = 0xE3C2, // Load Logical Character High (32<-8)
+ LLCR = 0xB994, // Load Logical Character (32)
+ LLGC = 0xE390, // Load Logical Character (64)
+ LLGCR = 0xB984, // Load Logical Character (64)
+ LLGF = 0xE316, // Load Logical (64<-32)
+ LLGFAT = 0xE39D, // Load Logical And Trap (64<-32)
+ LLGFR = 0xB916, // Load Logical (64<-32)
+ LLGFRL = 0xC4E, // Load Logical Relative Long (64<-32)
+ LLGH = 0xE391, // Load Logical Halfword (64)
+ LLGHR = 0xB985, // Load Logical Halfword (64)
+ LLGHRL = 0xC46, // Load Logical Halfword Relative Long (64<-16)
+ LLGT = 0xE317, // Load Logical Thirty One Bits
+ LLGTAT = 0xE39C, // Load Logical Thirty One Bits And Trap (64<-31)
+ LLGTR = 0xB917, // Load Logical Thirty One Bits
+ LLH = 0xE395, // Load Logical Halfword (32)
+ LLHH = 0xE3C6, // Load Logical Halfword High (32<-16)
+ LLHR = 0xB995, // Load Logical Halfword (32)
+ LLHRL = 0xC42, // Load Logical Halfword Relative Long (32<-16)
+ LLIHF = 0xC0E, // Load Logical Immediate (high)
+ LLIHH = 0xA5C, // Load Logical Immediate (high high)
+ LLIHL = 0xA5D, // Load Logical Immediate (high low)
+ LLILF = 0xC0F, // Load Logical Immediate (low)
+ LLILH = 0xA5E, // Load Logical Immediate (low high)
+ LLILL = 0xA5F, // Load Logical Immediate (low low)
+ LM = 0x98, // Load Multiple (32)
+ LMD = 0xEF, // Load Multiple Disjoint
+ LMG = 0xEB04, // Load Multiple (64)
+ LMH = 0xEB96, // Load Multiple High
+ LMY = 0xEB98, // Load Multiple (32)
+ LNDBR = 0xB311, // Load Negative (long BFP)
+ LNDFR = 0xB371, // Load Negative (long)
+ LNEBR = 0xB301, // Load Negative (short BFP)
+ LNGFR = 0xB911, // Load Negative (64<-32)
+ LNGR = 0xB901, // Load Negative (64)
+ LNR = 0x11, // Load Negative (32)
+ LNXBR = 0xB341, // Load Negative (extended BFP)
+ LOC = 0xEBF2, // Load On Condition (32)
+ LOCG = 0xEBE2, // Load On Condition (64)
+ LOCGR = 0xB9E2, // Load On Condition (64)
+ LOCR = 0xB9F2, // Load On Condition (32)
+ LPD = 0xC84, // Load Pair Disjoint (32)
+ LPDBR = 0xB310, // Load Positive (long BFP)
+ LPDFR = 0xB370, // Load Positive (long)
+ LPDG = 0xC85, // Load Pair Disjoint (64)
+ LPEBR = 0xB300, // Load Positive (short BFP)
+ LPGFR = 0xB910, // Load Positive (64<-32)
+ LPGR = 0xB900, // Load Positive (64)
+ LPQ = 0xE38F, // Load Pair From Quadword
+ LPR = 0x10, // Load Positive (32)
+ LPXBR = 0xB340, // Load Positive (extended BFP)
+ LR = 0x18, // Load (32)
+ LRL = 0xC4D, // Load Relative Long (32)
+ LRV = 0xE31E, // Load Reversed (32)
+ LRVG = 0xE30F, // Load Reversed (64)
+ LRVGR = 0xB90F, // Load Reversed (64)
+ LRVH = 0xE31F, // Load Reversed (16)
+ LRVR = 0xB91F, // Load Reversed (32)
+ LT = 0xE312, // Load And Test (32)
+ LTDBR = 0xB312, // Load And Test (long BFP)
+ LTDTR = 0xB3D6, // Load And Test (long DFP)
+ LTEBR = 0xB302, // Load And Test (short BFP)
+ LTG = 0xE302, // Load And Test (64)
+ LTGF = 0xE332, // Load And Test (64<-32)
+ LTGFR = 0xB912, // Load And Test (64<-32)
+ LTGR = 0xB902, // Load And Test (64)
+ LTR = 0x12, // Load And Test (32)
+ LTXBR = 0xB342, // Load And Test (extended BFP)
+ LTXTR = 0xB3DE, // Load And Test (extended DFP)
+ LXDB = 0xED05, // Load Lengthened (long to extended BFP)
+ LXDBR = 0xB305, // Load Lengthened (long to extended BFP)
+ LXDTR = 0xB3DC, // Load Lengthened (long to extended DFP)
+ LXEB = 0xED06, // Load Lengthened (short to extended BFP)
+ LXEBR = 0xB306, // Load Lengthened (short to extended BFP)
+ LXR = 0xB365, // Load (extended)
+ LY = 0xE358, // Load (32)
+ LZDR = 0xB375, // Load Zero (long)
+ LZER = 0xB374, // Load Zero (short)
+ LZXR = 0xB376, // Load Zero (extended)
+ M = 0x5C, // Multiply (64<-32)
+ MADB = 0xED1E, // Multiply And Add (long BFP)
+ MADBR = 0xB31E, // Multiply And Add (long BFP)
+ MAEB = 0xED0E, // Multiply And Add (short BFP)
+ MAEBR = 0xB30E, // Multiply And Add (short BFP)
+ MC = 0xAF, // Monitor Call
+ MDB = 0xED1C, // Multiply (long BFP)
+ MDBR = 0xB31C, // Multiply (long BFP)
+ MDEB = 0xED0C, // Multiply (short to long BFP)
+ MDEBR = 0xB30C, // Multiply (short to long BFP)
+ MDTR = 0xB3D0, // Multiply (long DFP)
+ MDTRA = 0xB3D0, // Multiply (long DFP)
+ MEEB = 0xED17, // Multiply (short BFP)
+ MEEBR = 0xB317, // Multiply (short BFP)
+ MFY = 0xE35C, // Multiply (64<-32)
+ MGHI = 0xA7D, // Multiply Halfword Immediate (64)
+ MH = 0x4C, // Multiply Halfword (32)
+ MHI = 0xA7C, // Multiply Halfword Immediate (32)
+ MHY = 0xE37C, // Multiply Halfword (32)
+ ML = 0xE396, // Multiply Logical (64<-32)
+ MLG = 0xE386, // Multiply Logical (128<-64)
+ MLGR = 0xB986, // Multiply Logical (128<-64)
+ MLR = 0xB996, // Multiply Logical (64<-32)
+ MP = 0xFC, // Multiply Decimal
+ MR = 0x1C, // Multiply (64<-32)
+ MS = 0x71, // Multiply Single (32)
+ MSCH = 0xB232, // Modify Subchannel
+ MSDB = 0xED1F, // Multiply And Subtract (long BFP)
+ MSDBR = 0xB31F, // Multiply And Subtract (long BFP)
+ MSEB = 0xED0F, // Multiply And Subtract (short BFP)
+ MSEBR = 0xB30F, // Multiply And Subtract (short BFP)
+ MSFI = 0xC21, // Multiply Single Immediate (32)
+ MSG = 0xE30C, // Multiply Single (64)
+ MSGF = 0xE31C, // Multiply Single (64<-32)
+ MSGFI = 0xC20, // Multiply Single Immediate (64<-32)
+ MSGFR = 0xB91C, // Multiply Single (64<-32)
+ MSGR = 0xB90C, // Multiply Single (64)
+ MSR = 0xB252, // Multiply Single (32)
+ MSY = 0xE351, // Multiply Single (32)
+ MVC = 0xD2, // Move (character)
+ MVCP = 0xDA, // Move To Primary
+ MVCDK = 0xE50F, // Move To Primary
+ MVCIN = 0xE8, // Move Inverse
+ MVCL = 0x0E, // Move Long
+ MVCLE = 0xA8, // Move Long Extended
+ MVCLU = 0xEB8E, // Move Long Unicode
+ MVGHI = 0xE548, // Move (64<-16)
+ MVHHI = 0xE544, // Move (16<-16)
+ MVHI = 0xE54C, // Move (32<-16)
+ MVI = 0x92, // Move (immediate)
+ MVIY = 0xEB52, // Move (immediate)
+ MVN = 0xD1, // Move Numerics
+ MVO = 0xF1, // Move With Offset
+ MVST = 0xB255, // Move String
+ MVZ = 0xD3, // Move Zones
+ MXBR = 0xB34C, // Multiply (extended BFP)
+ MXDB = 0xED07, // Multiply (long to extended BFP)
+ MXDBR = 0xB307, // Multiply (long to extended BFP)
+ MXTR = 0xB3D8, // Multiply (extended DFP)
+ MXTRA = 0xB3D8, // Multiply (extended DFP)
+ N = 0x54, // And (32)
+ NC = 0xD4, // And (character)
+ NG = 0xE380, // And (64)
+ NGR = 0xB980, // And (64)
+ NGRK = 0xB9E4, // And (64)
+ NI = 0x94, // And (immediate)
+ NIAI = 0xB2FA, // Next Instruction Access Intent Ie Eh
+ NIHF = 0xC0A, // And Immediate (high)
+ NIHH = 0xA54, // And Immediate (high high)
+ NIHL = 0xA55, // And Immediate (high low)
+ NILF = 0xC0B, // And Immediate (low)
+ NILH = 0xA56, // And Immediate (low high)
+ NILL = 0xA57, // And Immediate (low low)
+ NIY = 0xEB54, // And (immediate)
+ NR = 0x14, // And (32)
+ NRK = 0xB9F4, // And (32)
+ NTSTG = 0xE325, // Nontransactional Store Rxy Tx ¤9 A Sp St B2
+ NY = 0xE354, // And (32)
+ O = 0x56, // Or (32)
+ OC = 0xD6, // Or (character)
+ OG = 0xE381, // Or (64)
+ OGR = 0xB981, // Or (64)
+ OGRK = 0xB9E6, // Or (64)
+ OI = 0x96, // Or (immediate)
+ OIHF = 0xC0C, // Or Immediate (high)
+ OIHH = 0xA58, // Or Immediate (high high)
+ OIHL = 0xA59, // Or Immediate (high low)
+ OILF = 0xC0D, // Or Immediate (low)
+ OILH = 0xA5A, // Or Immediate (low high)
+ OILL = 0xA5B, // Or Immediate (low low)
+ OIY = 0xEB56, // Or (immediate)
+ OR = 0x16, // Or (32)
+ ORK = 0xB9F6, // Or (32)
+ OY = 0xE356, // Or (32)
+ PACK = 0xF2, // Pack
+ PCC = 0xB92C, // Perform Cryptographic Computation
+ PFD = 0xE336, // Prefetch Data
+ PFDRL = 0xC62, // Prefetch Data Relative Long
+ PFPO = 0x010A, // Perform Floating-POINT Operation
+ PKA = 0xE9, // Pack Ascii
+ PKU = 0xE1, // Pack Unicode
+ PLO = 0xEE, // Perform Locked Operation
+ // POPCNT = 0xB9E1, // Population Count
+ PPA = 0xB2E8, // Perform Processor Assist
+ QADTR = 0xB3F5, // Quantize (long DFP)
+ QAXTR = 0xB3FD, // Quantize (extended DFP)
+ RCHP = 0xB23B, // Reset Channel Path
+ RISBG = 0xEC55, // Rotate Then Insert Selected Bits
+ RISBGN = 0xEC59, // Rotate Then Insert Selected Bits
+ RISBHG = 0xEC5D, // Rotate Then Insert Selected Bits High
+ RISBLG = 0xEC51, // Rotate Then Insert Selected Bits Low
+ RLL = 0xEB1D, // Rotate Left Single Logical (32)
+ RLLG = 0xEB1C, // Rotate Left Single Logical (64)
+ RNSBG = 0xEC54, // Rotate Then And Selected Bits
+ ROSBG = 0xEC56, // Rotate Then Or Selected Bits
+ RRDTR = 0xB3F7, // Reround (long DFP)
+ RRXTR = 0xB3FF, // Reround (extended DFP)
+ RSCH = 0xB238, // Resume Subchannel
+ RXSBG = 0xEC57, // Rotate Then Exclusive Or Selected Bits
+ S = 0x5B, // Subtract (32)
+ SAL = 0xB237, // Set Address Limit
+ SAR = 0xB24E, // Set Access
+ SCHM = 0xB23C, // Set Channel Monitor
+ SDB = 0xED1B, // Subtract (long BFP)
+ SDBR = 0xB31B, // Subtract (long BFP)
+ SDTR = 0xB3D3, // Subtract (long DFP)
+ SDTRA = 0xB3D3, // Subtract (long DFP)
+ SEB = 0xED0B, // Subtract (short BFP)
+ SEBR = 0xB30B, // Subtract (short BFP)
+ SFASR = 0xB385, // Set Fpc And Signal
+ SFPC = 0xB384, // Set Fpc
+ SG = 0xE309, // Subtract (64)
+ SGF = 0xE319, // Subtract (64<-32)
+ SGFR = 0xB919, // Subtract (64<-32)
+ SGR = 0xB909, // Subtract (64)
+ SGRK = 0xB9E9, // Subtract (64)
+ SH = 0x4B, // Subtract Halfword
+ SHHHR = 0xB9C9, // Subtract High (32)
+ SHHLR = 0xB9D9, // Subtract High (32)
+ SHY = 0xE37B, // Subtract Halfword
+ SL = 0x5F, // Subtract Logical (32)
+ SLA = 0x8B, // Shift Left Single (32)
+ SLAG = 0xEB0B, // Shift Left Single (64)
+ SLAK = 0xEBDD, // Shift Left Single (32)
+ SLB = 0xE399, // Subtract Logical With Borrow (32)
+ SLBG = 0xE389, // Subtract Logical With Borrow (64)
+ SLBGR = 0xB989, // Subtract Logical With Borrow (64)
+ SLBR = 0xB999, // Subtract Logical With Borrow (32)
+ SLDA = 0x8F, // Shift Left Double
+ SLDL = 0x8D, // Shift Left Double Logical
+ SLDT = 0xED40, // Shift Significand Left (long DFP)
+ SLFI = 0xC25, // Subtract Logical Immediate (32)
+ SLG = 0xE30B, // Subtract Logical (64)
+ SLGF = 0xE31B, // Subtract Logical (64<-32)
+ SLGFI = 0xC24, // Subtract Logical Immediate (64<-32)
+ SLGFR = 0xB91B, // Subtract Logical (64<-32)
+ SLGR = 0xB90B, // Subtract Logical (64)
+ SLGRK = 0xB9EB, // Subtract Logical (64)
+ SLHHHR = 0xB9CB, // Subtract Logical High (32)
+ SLHHLR = 0xB9DB, // Subtract Logical High (32)
+ SLL = 0x89, // Shift Left Single Logical (32)
+ SLLG = 0xEB0D, // Shift Left Single Logical (64)
+ SLLK = 0xEBDF, // Shift Left Single Logical (32)
+ SLR = 0x1F, // Subtract Logical (32)
+ SLRK = 0xB9FB, // Subtract Logical (32)
+ SLXT = 0xED48, // Shift Significand Left (extended DFP)
+ SLY = 0xE35F, // Subtract Logical (32)
+ SP = 0xFB, // Subtract Decimal
+ SPM = 0x04, // Set Program Mask
+ SQDB = 0xED15, // Square Root (long BFP)
+ SQDBR = 0xB315, // Square Root (long BFP)
+ SQEB = 0xED14, // Square Root (short BFP)
+ SQEBR = 0xB314, // Square Root (short BFP)
+ SQXBR = 0xB316, // Square Root (extended BFP)
+ SR = 0x1B, // Subtract (32)
+ SRA = 0x8A, // Shift Right Single (32)
+ SRAG = 0xEB0A, // Shift Right Single (64)
+ SRAK = 0xEBDC, // Shift Right Single (32)
+ SRDA = 0x8E, // Shift Right Double
+ SRDL = 0x8C, // Shift Right Double Logical
+ SRDT = 0xED41, // Shift Significand Right (long DFP)
+ SRK = 0xB9F9, // Subtract (32)
+ SRL = 0x88, // Shift Right Single Logical (32)
+ SRLG = 0xEB0C, // Shift Right Single Logical (64)
+ SRLK = 0xEBDE, // Shift Right Single Logical (32)
+ SRNM = 0xB299, // Set BFP Rounding Mode (2 bit)
+ SRNMB = 0xB2B8, // Set BFP Rounding Mode (3 bit)
+ SRNMT = 0xB2B9, // Set DFP Rounding Mode
+ SRP = 0xF0, // Shift And Round Decimal
+ SRST = 0xB25E, // Search String
+ SRSTU = 0xB9BE, // Search String Unicode
+ SRXT = 0xED49, // Shift Significand Right (extended DFP)
+ SSCH = 0xB233, // Start Subchannel
+ ST = 0x50, // Store (32)
+ STC = 0x42, // Store Character
+ STCH = 0xE3C3, // Store Character High (8)
+ STCK = 0xB205, // Store Clock
+ STCKE = 0xB278, // Store Clock Extended
+ STCKF = 0xB27C, // Store Clock Fast
+ STCM = 0xBE, // Store Characters Under Mask (low)
+ STCMH = 0xEB2C, // Store Characters Under Mask (high)
+ STCMY = 0xEB2D, // Store Characters Under Mask (low)
+ STCPS = 0xB23A, // Store Channel Path Status
+ STCRW = 0xB239, // Store Channel Report Word
+ STCY = 0xE372, // Store Character
+ STD = 0x60, // Store (long)
+ STDY = 0xED67, // Store (long)
+ STE = 0x70, // Store (short)
+ STEY = 0xED66, // Store (short)
+ STFH = 0xE3CB, // Store High (32)
+ STFLE = 0xB2B0, // Store Facility List Extended
+ STFPC = 0xB29C, // Store Fpc
+ STG = 0xE324, // Store (64)
+ STGRL = 0xC4B, // Store Relative Long (64)
+ STH = 0x40, // Store Halfword
+ STHH = 0xE3C7, // Store Halfword High (16)
+ STHRL = 0xC47, // Store Halfword Relative Long
+ STHY = 0xE370, // Store Halfword
+ STM = 0x90, // Store Multiple (32)
+ STMG = 0xEB24, // Store Multiple (64)
+ STMH = 0xEB26, // Store Multiple High
+ STMY = 0xEB90, // Store Multiple (32)
+ STOC = 0xEBF3, // Store On Condition (32)
+ STOCG = 0xEBE3, // Store On Condition (64)
+ STPQ = 0xE38E, // Store Pair To Quadword
+ STRL = 0xC4F, // Store Relative Long (32)
+ STRV = 0xE33E, // Store Reversed (32)
+ STRVG = 0xE32F, // Store Reversed (64)
+ STRVH = 0xE33F, // Store Reversed (16)
+ STSCH = 0xB234, // Store Subchannel
+ STY = 0xE350, // Store (32)
+ SVC = 0x0A, // Supervisor Call
+ SXBR = 0xB34B, // Subtract (extended BFP)
+ SXTR = 0xB3DB, // Subtract (extended DFP)
+ SXTRA = 0xB3DB, // Subtract (extended DFP)
+ SY = 0xE35B, // Subtract (32)
+ TABORT = 0xB2FC, // Transaction Abort
+ TBDR = 0xB351, // Convert HFP To BFP (long)
+ TBEDR = 0xB350, // Convert HFP To BFP (long to short)
+ TBEGIN = 0xE560, // Transaction Begin
+ TBEGINC = 0xE561, // Transaction Begin
+ TCDB = 0xED11, // Test Data Class (long BFP)
+ TCEB = 0xED10, // Test Data Class (short BFP)
+ TCXB = 0xED12, // Test Data Class (extended BFP)
+ TDCDT = 0xED54, // Test Data Class (long DFP)
+ TDCET = 0xED50, // Test Data Class (short DFP)
+ TDCXT = 0xED58, // Test Data Class (extended DFP)
+ TDGDT = 0xED55, // Test Data Group (long DFP)
+ TDGET = 0xED51, // Test Data Group (short DFP)
+ TDGXT = 0xED59, // Test Data Group (extended DFP)
+ TEND = 0xB2F8, // Transaction End
+ THDER = 0xB358, // Convert BFP To HFP (short to long)
+ THDR = 0xB359, // Convert BFP To HFP (long)
+ TM = 0x91, // Test Under Mask Si C A B1
+ TMH = 0xA70, // Test Under Mask High
+ TMHH = 0xA72, // Test Under Mask (high high)
+ TMHL = 0xA73, // Test Under Mask (high low)
+ TML = 0xA71, // Test Under Mask Low
+ TMLH = 0xA70, // Test Under Mask (low high)
+ TMLL = 0xA71, // Test Under Mask (low low)
+ TMY = 0xEB51, // Test Under Mask
+ TP = 0xEBC0, // Test Decimal
+ TPI = 0xB236, // Test Pending Interruption
+ TR = 0xDC, // Translate
+ TRAP4 = 0xB2FF, // Trap (4)
+ TRE = 0xB2A5, // Translate Extended
+ TROO = 0xB993, // Translate One To One
+ TROT = 0xB992, // Translate One To Two
+ TRT = 0xDD, // Translate And Test
+ TRTE = 0xB9BF, // Translate And Test Extended
+ TRTO = 0xB991, // Translate Two To One
+ TRTR = 0xD0, // Translate And Test Reverse
+ TRTRE = 0xB9BD, // Translate And Test Reverse Extended
+ TRTT = 0xB990, // Translate Two To Two
+ TS = 0x93, // Test And Set
+ TSCH = 0xB235, // Test Subchannel
+ UNPK = 0xF3, // Unpack
+ UNPKA = 0xEA, // Unpack Ascii
+ UNPKU = 0xE2, // Unpack Unicode
+ UPT = 0x0102, // Update Tree
+ X = 0x57, // Exclusive Or (32)
+ XC = 0xD7, // Exclusive Or (character)
+ XG = 0xE382, // Exclusive Or (64)
+ XGR = 0xB982, // Exclusive Or (64)
+ XGRK = 0xB9E7, // Exclusive Or (64)
+ XI = 0x97, // Exclusive Or (immediate)
+ XIHF = 0xC06, // Exclusive Or Immediate (high)
+ XILF = 0xC07, // Exclusive Or Immediate (low)
+ XIY = 0xEB57, // Exclusive Or (immediate)
+ XR = 0x17, // Exclusive Or (32)
+ XRK = 0xB9F7, // Exclusive Or (32)
+ XSCH = 0xB276, // Cancel Subchannel
+ XY = 0xE357, // Exclusive Or (32)
+ ZAP = 0xF8, // Zero And Add
+ BKPT = 0x0001 // GDB Software Breakpoint
+};
+
+// Instruction encoding bits and masks.
+enum {
+ // Instruction encoding bit
+ B1 = 1 << 1,
+ B4 = 1 << 4,
+ B5 = 1 << 5,
+ B7 = 1 << 7,
+ B8 = 1 << 8,
+ B9 = 1 << 9,
+ B12 = 1 << 12,
+ B18 = 1 << 18,
+ B19 = 1 << 19,
+ B20 = 1 << 20,
+ B22 = 1 << 22,
+ B23 = 1 << 23,
+ B24 = 1 << 24,
+ B25 = 1 << 25,
+ B26 = 1 << 26,
+ B27 = 1 << 27,
+ B28 = 1 << 28,
+
+ B6 = 1 << 6,
+ B10 = 1 << 10,
+ B11 = 1 << 11,
+ B16 = 1 << 16,
+ B17 = 1 << 17,
+ B21 = 1 << 21,
+
+ // Instruction bit masks
+ kCondMask = 0x1F << 21,
+ kOff12Mask = (1 << 12) - 1,
+ kImm24Mask = (1 << 24) - 1,
+ kOff16Mask = (1 << 16) - 1,
+ kImm16Mask = (1 << 16) - 1,
+ kImm26Mask = (1 << 26) - 1,
+ kBOfieldMask = 0x1f << 21,
+ kOpcodeMask = 0x3f << 26,
+ kExt2OpcodeMask = 0x1f << 1,
+ kExt5OpcodeMask = 0x3 << 2,
+ kBIMask = 0x1F << 16,
+ kBDMask = 0x14 << 2,
+ kAAMask = 0x01 << 1,
+ kLKMask = 0x01,
+ kRCMask = 0x01,
+ kTOMask = 0x1f << 21
+};
+
+// S390 instructions requires bigger shifts,
+// make them macros instead of enum because of the typing issue
+#define B32 ((uint64_t)1<<32)
+#define B36 ((uint64_t)1<<36)
+#define B40 ((uint64_t)1<<40)
+const FourByteInstr kFourByteBrCondMask = 0xF << 20;
+const SixByteInstr kSixByteBrCondMask = static_cast<SixByteInstr>(0xF) << 36;
+
+// -----------------------------------------------------------------------------
+// Addressing modes and instruction variants.
+
+// Overflow Exception
+enum OEBit {
+ SetOE = 1 << 10, // Set overflow exception
+ LeaveOE = 0 << 10 // No overflow exception
+};
+
+// Record bit
+enum RCBit { // Bit 0
+ SetRC = 1, // LT,GT,EQ,SO
+ LeaveRC = 0 // None
+};
+
+// Link bit
+enum LKBit { // Bit 0
+ SetLK = 1, // Load effective address of next instruction
+ LeaveLK = 0 // No action
+};
+
+enum BOfield { // Bits 25-21
+ DCBNZF = 0 << 21, // Decrement CTR; branch if CTR != 0 and condition false
+ DCBEZF = 2 << 21, // Decrement CTR; branch if CTR == 0 and condition false
+ BF = 4 << 21, // Branch if condition false
+ DCBNZT = 8 << 21, // Decrement CTR; branch if CTR != 0 and condition true
+ DCBEZT = 10 << 21, // Decrement CTR; branch if CTR == 0 and condition true
+ BT = 12 << 21, // Branch if condition true
+ DCBNZ = 16 << 21, // Decrement CTR; branch if CTR != 0
+ DCBEZ = 18 << 21, // Decrement CTR; branch if CTR == 0
+ BA = 20 << 21 // Branch always
+};
+
+#ifdef _AIX
+#undef CR_LT
+#undef CR_GT
+#undef CR_EQ
+#undef CR_SO
+#endif
+
+enum CRBit { CR_LT = 0, CR_GT = 1, CR_EQ = 2, CR_SO = 3, CR_FU = 3 };
+
+#define CRWIDTH 4
+
+// -----------------------------------------------------------------------------
+// Supervisor Call (svc) specific support.
+
+// Special Software Interrupt codes when used in the presence of the PPC
+// simulator.
+// svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for
+// standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature.
+enum SoftwareInterruptCodes {
+ // transition to C code
+ kCallRtRedirected = 0x0010,
+ // break point
+ kBreakpoint = 0x0000,
+ // stop
+ kStopCode = 1 << 23
+};
+const uint32_t kStopCodeMask = kStopCode - 1;
+const uint32_t kMaxStopCode = kStopCode - 1;
+const int32_t kDefaultStopCode = -1;
+
+// FP rounding modes.
+enum FPRoundingMode {
+ RN = 0, // Round to Nearest.
+ RZ = 1, // Round towards zero.
+ RP = 2, // Round towards Plus Infinity.
+ RM = 3, // Round towards Minus Infinity.
+
+ // Aliases.
+ kRoundToNearest = RN,
+ kRoundToZero = RZ,
+ kRoundToPlusInf = RP,
+ kRoundToMinusInf = RM
+};
+
+const uint32_t kFPRoundingModeMask = 3;
+
+enum CheckForInexactConversion {
+ kCheckForInexactConversion,
+ kDontCheckForInexactConversion
+};
+
+// -----------------------------------------------------------------------------
+// Specific instructions, constants, and masks.
+// These constants are declared in assembler-arm.cc, as they use named registers
+// and other constants.
+
+
+// Add(sp, sp, 4) instruction (aka Pop())
+extern const Instr kPopInstruction;
+
+// str(r, MemOperand(sp, 4, NegPreIndex), al) instruction (aka push(r))
+// register r is not encoded.
+extern const Instr kPushRegPattern;
+
+// ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r))
+// register r is not encoded.
+extern const Instr kPopRegPattern;
+
+// use TRAP4 to indicate redirection call for simulation mode
+const Instr rtCallRedirInstr = TRAP4;
+
+// -----------------------------------------------------------------------------
+// Instruction abstraction.
+
+
+// The class Instruction enables access to individual fields defined in the PPC
+// architecture instruction set encoding.
+// Note that the Assembler uses typedef int32_t Instr.
+//
+// Example: Test whether the instruction at ptr does set the condition code
+// bits.
+//
+// bool InstructionSetsConditionCodes(byte* ptr) {
+// Instruction* instr = Instruction::At(ptr);
+// int type = instr->TypeValue();
+// return ((type == 0) || (type == 1)) && instr->HasS();
+// }
+//
+class Instruction {
+ public:
+ enum { kInstrSize = 4, kInstrSizeLog2 = 2, kPCReadOffset = 8 };
+
+ // S390 Opcode Format Types
+ // Based on the first byte of the opcode, we can determine how to extract
+ // the entire opcode of the instruction. The various favours include:
+ enum OpcodeFormatType {
+ ONE_BYTE_OPCODE, // One Byte - Bits 0 to 7
+ TWO_BYTE_OPCODE, // Two Bytes - Bits 0 to 15
+ TWO_BYTE_DISJOINT_OPCODE, // Two Bytes - Bits 0 to 7, 40 to 47
+ THREE_NIBBLE_OPCODE // Three Nibbles - Bits 0 to 7, 12 to 15
+ };
+
+ // Helper macro to define static accessors.
+ // We use the cast to char* trick to bypass the strict anti-aliasing rules.
+ #define DECLARE_STATIC_TYPED_ACCESSOR(return_type, Name) \
+ static inline return_type Name(Instr instr) { \
+ char* temp = reinterpret_cast<char*>(&instr); \
+ return reinterpret_cast<Instruction*>(temp)->Name(); \
+ }
+
+ #define DECLARE_STATIC_ACCESSOR(Name) DECLARE_STATIC_TYPED_ACCESSOR(int, Name)
+
+ // Get the raw instruction bits.
+ template<typename T>
+ inline T InstructionBits() const {
+ return Instruction::InstructionBits<T>(reinterpret_cast<const byte*>(this));
+ }
+ inline Instr InstructionBits() const {
+ return *reinterpret_cast<const Instr*>(this);
+ }
+
+ // Set the raw instruction bits to value.
+ template<typename T>
+ inline void SetInstructionBits(T value) const {
+ Instruction::SetInstructionBits<T>(
+ reinterpret_cast<const byte*>(this), value);
+ }
+ inline void SetInstructionBits(Instr value) {
+ *reinterpret_cast<Instr*>(this) = value;
+ }
+
+ // Read one particular bit out of the instruction bits.
+ inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; }
+
+ // Read a bit field's value out of the instruction bits.
+ inline int Bits(int hi, int lo) const {
+ return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1);
+ }
+
+ // Read bits according to instruction type
+ template<typename T, typename U>
+ inline U Bits(int hi, int lo) const {
+ return (InstructionBits<T>() >> lo) & ((2 << (hi - lo)) - 1);
+ }
+
+ // Read a bit field out of the instruction bits.
+ inline int BitField(int hi, int lo) const {
+ return InstructionBits() & (((2 << (hi - lo)) - 1) << lo);
+ }
+
+ // Determine the instruction length
+ inline int InstructionLength() {
+ return Instruction::InstructionLength(reinterpret_cast<const byte*>(this));
+ }
+ // Extract the Instruction Opcode
+ inline Opcode S390OpcodeValue() {
+ return Instruction::S390OpcodeValue(reinterpret_cast<const byte*>(this));
+ }
+
+ // Static support.
+
+ // Read one particular bit out of the instruction bits.
+ static inline int Bit(Instr instr, int nr) { return (instr >> nr) & 1; }
+
+ // Read the value of a bit field out of the instruction bits.
+ static inline int Bits(Instr instr, int hi, int lo) {
+ return (instr >> lo) & ((2 << (hi - lo)) - 1);
+ }
+
+ // Read a bit field out of the instruction bits.
+ static inline int BitField(Instr instr, int hi, int lo) {
+ return instr & (((2 << (hi - lo)) - 1) << lo);
+ }
+
+ // Determine the instruction length of the given instruction
+ static inline int InstructionLength(const byte *instr) {
+ // Length can be determined by the first nibble.
+ // 0x0 to 0x3 => 2-bytes
+ // 0x4 to 0xB => 4-bytes
+ // 0xC to 0xF => 6-bytes
+ byte topNibble = (*instr >> 4) & 0xF;
+ if (topNibble <= 3)
+ return 2;
+ else if (topNibble <= 0xB)
+ return 4;
+ return 6;
+ }
+
+ // Returns the instruction bits of the given instruction
+ static inline uint64_t InstructionBits(const byte *instr) {
+ int length = InstructionLength(instr);
+ if (2 == length)
+ return static_cast<uint64_t>(InstructionBits<TwoByteInstr>(instr));
+ else if (4 == length)
+ return static_cast<uint64_t>(InstructionBits<FourByteInstr>(instr));
+ else
+ return InstructionBits<SixByteInstr>(instr);
+ }
+
+ // Extract the raw instruction bits
+ template <typename T>
+ static inline T InstructionBits(const byte *instr) {
+ #if !V8_TARGET_LITTLE_ENDIAN
+ if (sizeof(T) <= 4) {
+ return *reinterpret_cast<const T*>(instr);
+ } else {
+ // We cannot read 8-byte instructon address directly, because for a
+ // six-byte instruction, the extra 2-byte address might not be
+ // allocated.
+ uint64_t fourBytes = *reinterpret_cast<const uint32_t*>(instr);
+ uint16_t twoBytes = *reinterpret_cast<const uint16_t*>(instr + 4);
+ return (fourBytes << 16 | twoBytes);
+ }
+ #else
+ // Even on little endian hosts (simulation), the instructions
+ // are stored as big-endian in order to decode the opcode and
+ // instruction length.
+ T instr_bits = 0;
+
+ // 6-byte instrs are represented by uint64_t
+ uint32_t size = (sizeof(T) == 8)? 6 : sizeof(T);
+
+ for (T i = 0; i < size; i++) {
+ instr_bits <<= 8;
+ instr_bits |= *(instr + i);
+ }
+ return instr_bits;
+ #endif
+ }
+
+ // Set the Instruction Bits to value
+ template <typename T>
+ static inline void SetInstructionBits(byte *instr, T value) {
+#if V8_TARGET_LITTLE_ENDIAN
+ // The instruction bits are stored in big endian format even on little
+ // endian hosts, in order to decode instruction length and opcode.
+ // The following code will reverse the bytes so that the stores later
+ // (which are in native endianess) will effectively save the instruction
+ // in big endian.
+ if (sizeof(T) == 2) {
+ // Two Byte Instruction
+ value = ((value & 0x00FF) << 8) | ((value & 0xFF00) >> 8);
+ } else if (sizeof(T) == 4) {
+ // Four Byte Instruction
+ value = ((value & 0x000000FF) << 24) | ((value & 0x0000FF00) << 8) |
+ ((value & 0x00FF0000) >> 8) | ((value & 0xFF000000) >> 24);
+ } else if (sizeof(T) == 8) {
+ // Six Byte Instruction
+ uint64_t orig_value = static_cast<uint64_t>(value);
+ value = (static_cast<uint64_t>(orig_value & 0xFF) << 40) |
+ (static_cast<uint64_t>((orig_value >> 8) & 0xFF) << 32) |
+ (static_cast<uint64_t>((orig_value >> 16) & 0xFF) << 24) |
+ (static_cast<uint64_t>((orig_value >> 24) & 0xFF) << 16) |
+ (static_cast<uint64_t>((orig_value >> 32) & 0xFF) << 8) |
+ (static_cast<uint64_t>((orig_value >> 40) & 0xFF));
+ }
+#endif
+ if (sizeof(T) <= 4) {
+ *reinterpret_cast<T*>(instr) = value;
+ } else {
+#if V8_TARGET_LITTLE_ENDIAN
+ uint64_t orig_value = static_cast<uint64_t>(value);
+ *reinterpret_cast<uint32_t*>(instr) = static_cast<uint32_t>(value);
+ *reinterpret_cast<uint16_t*>(instr + 4) =
+ static_cast<uint16_t>((orig_value >> 32) & 0xFFFF);
+#else
+ *reinterpret_cast<uint32_t*>(instr) = static_cast<uint32_t>(value >> 16);
+ *reinterpret_cast<uint16_t*>(instr + 4) =
+ static_cast<uint16_t>(value & 0xFFFF);
+#endif
+ }
+ }
+
+ // Get Instruction Format Type
+ static OpcodeFormatType getOpcodeFormatType(const byte *instr) {
+ const byte firstByte = *instr;
+ // Based on Figure B-3 in z/Architecture Principles of
+ // Operation.
+
+ // 1-byte opcodes
+ // I, RR, RS, RSI, RX, SS Formats
+ if ((0x04 <= firstByte && 0x9B >= firstByte) ||
+ (0xA8 <= firstByte && 0xB1 >= firstByte) ||
+ (0xBA <= firstByte && 0xBF >= firstByte) ||
+ (0xC5 == firstByte) ||
+ (0xC7 == firstByte) ||
+ (0xD0 <= firstByte && 0xE2 >= firstByte) ||
+ (0xE8 <= firstByte && 0xEA >= firstByte) ||
+ (0xEE <= firstByte && 0xFD >= firstByte)) {
+ return ONE_BYTE_OPCODE;
+ }
+
+ // 2-byte opcodes
+ // E, IE, RRD, RRE, RRF, SIL, S, SSE Formats
+ if ((0x00 == firstByte) || // Software breakpoint 0x0001
+ (0x01 == firstByte) ||
+ (0xB2 == firstByte) ||
+ (0xB3 == firstByte) ||
+ (0xB9 == firstByte) ||
+ (0xE5 == firstByte)) {
+ return TWO_BYTE_OPCODE;
+ }
+
+ // 3-nibble opcodes
+ // RI, RIL, SSF Formats
+ if ((0xA5 == firstByte) ||
+ (0xA7 == firstByte) ||
+ (0xC0 <= firstByte && 0xCC >= firstByte)) { // C5,C7 handled above
+ return THREE_NIBBLE_OPCODE;
+ }
+ // Remaining ones are all TWO_BYTE_DISJOINT OPCODES.
+ DCHECK(InstructionLength(instr) == 6);
+ return TWO_BYTE_DISJOINT_OPCODE;
+ }
+
+ // Extract the full opcode from the instruction.
+ static inline Opcode S390OpcodeValue(const byte *instr) {
+ OpcodeFormatType opcodeType = getOpcodeFormatType(instr);
+
+ // The native instructions are encoded in big-endian format
+ // even if running on little-endian host. Hence, we need
+ // to ensure we use byte* based bit-wise logic.
+ switch (opcodeType) {
+ case ONE_BYTE_OPCODE:
+ // One Byte - Bits 0 to 7
+ return static_cast<Opcode>(*instr);
+ case TWO_BYTE_OPCODE:
+ // Two Bytes - Bits 0 to 15
+ return static_cast<Opcode>((*instr << 8) | (*(instr+1)));
+ case TWO_BYTE_DISJOINT_OPCODE:
+ // Two Bytes - Bits 0 to 7, 40 to 47
+ return static_cast<Opcode>((*instr << 8) | (*(instr+5) & 0xFF));
+ case THREE_NIBBLE_OPCODE:
+ // Three Nibbles - Bits 0 to 7, 12 to 15
+ return static_cast<Opcode>((*instr << 4) | (*(instr+1) & 0xF));
+ default:
+ break;
+ }
+
+ UNREACHABLE();
+ return static_cast<Opcode>(-1);
+ }
+
+ // PowerPC
+ inline int RSValue() const { return Bits(25, 21); }
+ inline int RTValue() const { return Bits(25, 21); }
+ inline int RAValue() const { return Bits(20, 16); }
+ DECLARE_STATIC_ACCESSOR(RAValue);
+ inline int RBValue() const { return Bits(15, 11); }
+ DECLARE_STATIC_ACCESSOR(RBValue);
+ inline int RCValue() const { return Bits(10, 6); }
+ DECLARE_STATIC_ACCESSOR(RCValue);
+ // end PowerPC
+
+ inline int OpcodeValue() const {
+ return static_cast<Opcode>(Bits(31, 26)); // PowerPC
+ }
+ inline Opcode OpcodeField() const {
+ return static_cast<Opcode>(BitField(24, 21));
+ }
+
+ // Fields used in Software interrupt instructions
+ inline SoftwareInterruptCodes SvcValue() const {
+ return static_cast<SoftwareInterruptCodes>(Bits<FourByteInstr, int>(15, 0));
+ }
+
+ // Instructions are read of out a code stream. The only way to get a
+ // reference to an instruction is to convert a pointer. There is no way
+ // to allocate or create instances of class Instruction.
+ // Use the At(pc) function to create references to Instruction.
+ static Instruction* At(byte* pc) {
+ return reinterpret_cast<Instruction*>(pc);
+ }
+
+
+ private:
+ // We need to prevent the creation of instances of class Instruction.
+ DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction);
+};
+
+// I Instruction -- suspect this will not be used,
+// but implement for completeness
+class IInstruction : Instruction {
+ public:
+ inline int IValue() const {
+ return Bits<TwoByteInstr, int>(7, 0);
+ }
+
+ inline int size() const { return 2; }
+};
+
+// RR Instruction
+class RRInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ // the high and low parameters of Bits is the number of bits from
+ // rightmost place
+ return Bits<TwoByteInstr, int>(7, 4);
+ }
+ inline int R2Value() const {
+ return Bits<TwoByteInstr, int>(3, 0);
+ }
+ inline Condition M1Value() const {
+ return static_cast<Condition>(Bits<TwoByteInstr, int>(7, 4));
+ }
+
+ inline int size() const { return 2; }
+};
+
+// RRE Instruction
+class RREInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(7, 4);
+ }
+ inline int R2Value() const {
+ return Bits<FourByteInstr, int>(3, 0);
+ }
+ inline int M3Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline int M4Value() const {
+ return Bits<FourByteInstr, int>(19, 16);
+ }
+ inline int size() const { return 4; }
+};
+
+// RRF Instruction
+class RRFInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(7, 4);
+ }
+ inline int R2Value() const {
+ return Bits<FourByteInstr, int>(3, 0);
+ }
+ inline int R3Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline int M3Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline int M4Value() const {
+ return Bits<FourByteInstr, int>(11, 8);
+ }
+ inline int size() const { return 4; }
+};
+
+// RRD Isntruction
+class RRDInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline int R2Value() const {
+ return Bits<FourByteInstr, int>(3, 0);
+ }
+ inline int R3Value() const {
+ return Bits<FourByteInstr, int>(7, 4);
+ }
+ inline int size() const { return 4; }
+};
+
+// RI Instruction
+class RIInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(23, 20);
+ }
+ inline int16_t I2Value() const {
+ return Bits<FourByteInstr, int16_t>(15, 0);
+ }
+ inline uint16_t I2UnsignedValue() const {
+ return Bits<FourByteInstr, uint16_t>(15, 0);
+ }
+ inline Condition M1Value() const {
+ return static_cast<Condition>(Bits<FourByteInstr, int>(23, 20));
+ }
+ inline int size() const { return 4; }
+};
+
+// RS Instruction
+class RSInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(23, 20);
+ }
+ inline int R3Value() const {
+ return Bits<FourByteInstr, int>(19, 16);
+ }
+ inline int B2Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline unsigned int D2Value() const {
+ return Bits<FourByteInstr, unsigned int>(11, 0);
+ }
+ inline int size() const { return 4; }
+};
+
+// RSY Instruction
+class RSYInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<SixByteInstr, int>(39, 36);
+ }
+ inline int R3Value() const {
+ return Bits<SixByteInstr, int>(35, 32);
+ }
+ inline int B2Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int32_t D2Value() const {
+ int32_t value = Bits<SixByteInstr, int32_t>(27, 16);
+ value += Bits<SixByteInstr, int8_t>(15, 8) << 12;
+ return value;
+ }
+ inline int size() const { return 6; }
+};
+
+// RX Instruction
+class RXInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<FourByteInstr, int>(23, 20);
+ }
+ inline int X2Value() const {
+ return Bits<FourByteInstr, int>(19, 16);
+ }
+ inline int B2Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline uint32_t D2Value() const {
+ return Bits<FourByteInstr, uint32_t>(11, 0);
+ }
+ inline int size() const { return 4; }
+};
+
+// RXY Instruction
+class RXYInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<SixByteInstr, int>(39, 36);
+ }
+ inline int X2Value() const {
+ return Bits<SixByteInstr, int>(35, 32);
+ }
+ inline int B2Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int32_t D2Value() const {
+ int32_t value = Bits<SixByteInstr, uint32_t>(27, 16);
+ value += Bits<SixByteInstr, int8_t>(15, 8) << 12;
+ return value;
+ }
+ inline int size() const { return 6; }
+};
+
+// RIL Instruction
+class RILInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<SixByteInstr, int>(39, 36);
+ }
+ inline int32_t I2Value() const {
+ return Bits<SixByteInstr, int32_t>(31, 0);
+ }
+ inline uint32_t I2UnsignedValue() const {
+ return Bits<SixByteInstr, uint32_t>(31, 0);
+ }
+ inline int size() const { return 6; }
+};
+
+// SI Instruction
+class SIInstruction : Instruction {
+ public:
+ inline int B1Value() const {
+ return Bits<FourByteInstr, int>(15, 12);
+ }
+ inline uint32_t D1Value() const {
+ return Bits<FourByteInstr, uint32_t>(11, 0);
+ }
+ inline uint8_t I2Value() const {
+ return Bits<FourByteInstr, uint8_t>(23, 16);
+ }
+ inline int size() const { return 4; }
+};
+
+// SIY Instruction
+class SIYInstruction : Instruction {
+ public:
+ inline int B1Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int32_t D1Value() const {
+ int32_t value = Bits<SixByteInstr, uint32_t>(27, 16);
+ value += Bits<SixByteInstr, int8_t>(15, 8) << 12;
+ return value;
+ }
+ inline uint8_t I2Value() const {
+ return Bits<SixByteInstr, uint8_t>(39, 32);
+ }
+ inline int size() const { return 6; }
+};
+
+// SIL Instruction
+class SILInstruction : Instruction {
+ public:
+ inline int B1Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int D1Value() const {
+ return Bits<SixByteInstr, int>(27, 16);
+ }
+ inline int I2Value() const {
+ return Bits<SixByteInstr, int>(15, 0);
+ }
+ inline int size() const { return 6; }
+};
+
+// SS Instruction
+class SSInstruction : Instruction {
+ public:
+ inline int B1Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int B2Value() const {
+ return Bits<SixByteInstr, int>(15, 12);
+ }
+ inline int D1Value() const {
+ return Bits<SixByteInstr, int>(27, 16);
+ }
+ inline int D2Value() const {
+ return Bits<SixByteInstr, int>(11, 0);
+ }
+ inline int Length() const {
+ return Bits<SixByteInstr, int>(39, 32);
+ }
+ inline int size() const { return 6; }
+};
+
+// RXE Instruction
+class RXEInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<SixByteInstr, int>(39, 36);
+ }
+ inline int X2Value() const {
+ return Bits<SixByteInstr, int>(35, 32);
+ }
+ inline int B2Value() const {
+ return Bits<SixByteInstr, int>(31, 28);
+ }
+ inline int D2Value() const {
+ return Bits<SixByteInstr, int>(27, 16);
+ }
+ inline int size() const {
+ return 6;
+ }
+};
+
+// RIE Instruction
+class RIEInstruction : Instruction {
+ public:
+ inline int R1Value() const {
+ return Bits<SixByteInstr, int>(39, 36);
+ }
+ inline int R2Value() const {
+ return Bits<SixByteInstr, int>(35, 32);
+ }
+ inline int I3Value() const {
+ return Bits<SixByteInstr, uint32_t>(31, 24);
+ }
+ inline int I4Value() const {
+ return Bits<SixByteInstr, uint32_t>(23, 16);
+ }
+ inline int I5Value() const {
+ return Bits<SixByteInstr, uint32_t>(15, 8);
+ }
+ inline int I6Value() const {
+ return static_cast<int32_t>(Bits<SixByteInstr, int16_t>(31, 16));
+ }
+ inline int size() const {
+ return 6;
+ }
+};
+
+// Helper functions for converting between register numbers and names.
+class Registers {
+ public:
+ // Return the name of the register.
+ static const char* Name(int reg);
+
+ // Lookup the register number for the name provided.
+ static int Number(const char* name);
+
+ struct RegisterAlias {
+ int reg;
+ const char* name;
+ };
+
+ private:
+ static const char* names_[kNumRegisters];
+ static const RegisterAlias aliases_[];
+};
+
+// Helper functions for converting between FP register numbers and names.
+class FPRegisters {
+ public:
+ // Return the name of the register.
+ static const char* Name(int reg);
+
+ // Lookup the register number for the name provided.
+ static int Number(const char* name);
+
+ private:
+ static const char* names_[kNumFPRegisters];
+};
+
+}
+} // namespace v8::internal
+
+#endif // V8_S390_CONSTANTS_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/cpu-s390.cc
@@ -0,0 +1,35 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+// CPU specific code for s390 independent of OS goes here.
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/assembler.h"
+#include "src/macro-assembler.h"
+#include "src/simulator.h" // for cache flushing.
+
+namespace v8 {
+namespace internal {
+
+void CpuFeatures::FlushICache(void* buffer, size_t size) {
+ // Nothing to do flushing no instructions.
+ if (size == 0) {
+ return;
+ }
+
+#if defined(USE_SIMULATOR)
+ // Not generating S390 instructions for C-code. This means that we are
+ // building an S390 emulator based target. We should notify the simulator
+ // that the Icache was flushed.
+ // None of this code ends up in the snapshot so there are no issues
+ // around whether or not to generate the code when building snapshots.
+ Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), buffer, size);
+#endif // USE_SIMULATOR
+}
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/debug-s390.cc
@@ -0,0 +1,281 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/codegen.h"
+#include "src/debug.h"
+
+namespace v8 {
+namespace internal {
+
+void BreakLocation::SetDebugBreakAtReturn() {
+ // Patch the code changing the return from JS function sequence from
+ // 31-bit:
+ // lr sp, fp 2-bytes
+ // l fp, 0(sp) 4-bytes
+ // l r14, 4(sp) 4-bytes
+ // la sp, <delta>(sp) 4-bytes
+ // br r14 2-bytes
+ //
+ // to a call to the debug break return code.
+ // this uses a FIXED_SEQUENCE to load a 32bit constant
+ //
+ // iilf r14, <address> 6-bytes
+ // basr r14, r14A 2-bytes
+ // bkpt (0x0001) 2-bytes
+ //
+ // The 64bit sequence is a bit longer:
+ // lgr sp, fp 4-bytes
+ // lg fp, 0(sp) 6-bytes
+ // lg r14, 8(sp) 6-bytes
+ // la sp, <delta>(sp) 4-bytes
+ // br r14 2-bytes
+ //
+ // Will be patched with:
+ // iihf r14, <high 32-bits address> 6-bytes
+ // iilf r14, <lower 32-bits address> 6-bytes
+ // basr r14, r14 2-bytes
+ // bkpt (0x0001) 2-bytes
+ CodePatcher patcher(pc(), Assembler::kJSReturnSequenceLength);
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(patcher.masm());
+// printf("SetDebugBreakAtReturn: pc=%08x\n", (unsigned int)pc());
+ patcher.masm()->mov(
+ v8::internal::r14,
+ Operand(reinterpret_cast<intptr_t>(debug_info_->GetIsolate()
+ ->builtins()
+ ->Return_DebugBreak()
+ ->entry())));
+ patcher.masm()->basr(v8::internal::r14, v8::internal::r14);
+ patcher.masm()->bkpt(0);
+}
+
+
+void BreakLocation::SetDebugBreakAtSlot() {
+ DCHECK(IsDebugBreakSlot());
+ // Patch the code changing the debug break slot code from
+ //
+ // oill r3, 0
+ // oill r3, 0
+ // oill r3, 0 64-bit only
+ // lr r0, r0 64-bit only
+ //
+ // to a call to the debug break code, using a FIXED_SEQUENCE.
+ //
+ // iilf r14, <address> 6-bytes
+ // basr r14, r14A 2-bytes
+ //
+ // The 64bit sequence has an extra iihf.
+ //
+ // iihf r14, <high 32-bits address> 6-bytes
+ // iilf r14, <lower 32-bits address> 6-bytes
+ // basr r14, r14 2-bytes
+ CodePatcher patcher(pc(), Assembler::kDebugBreakSlotLength);
+// printf("SetDebugBreakAtSlot: pc=%08x\n", (unsigned int)rinfo()->pc());
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(patcher.masm());
+ patcher.masm()->mov(
+ v8::internal::r14,
+ Operand(reinterpret_cast<intptr_t>(
+ debug_info_->GetIsolate()->builtins()->Slot_DebugBreak()->entry())));
+ patcher.masm()->basr(v8::internal::r14, v8::internal::r14);
+}
+
+
+#define __ ACCESS_MASM(masm)
+
+
+static void Generate_DebugBreakCallHelper(MacroAssembler* masm,
+ RegList object_regs,
+ RegList non_object_regs) {
+ {
+ FrameScope scope(masm, StackFrame::INTERNAL);
+
+ // Load padding words on stack.
+ __ LoadSmiLiteral(ip, Smi::FromInt(LiveEdit::kFramePaddingValue));
+ for (int i = 0; i < LiveEdit::kFramePaddingInitialSize; i++) {
+ __ push(ip);
+ }
+ __ LoadSmiLiteral(ip, Smi::FromInt(LiveEdit::kFramePaddingInitialSize));
+ __ push(ip);
+
+ // Store the registers containing live values on the expression stack to
+ // make sure that these are correctly updated during GC. Non object values
+ // are stored as a smi causing it to be untouched by GC.
+ DCHECK((object_regs & ~kJSCallerSaved) == 0);
+ DCHECK((non_object_regs & ~kJSCallerSaved) == 0);
+ DCHECK((object_regs & non_object_regs) == 0);
+ if ((object_regs | non_object_regs) != 0) {
+ for (int i = 0; i < kNumJSCallerSaved; i++) {
+ int r = JSCallerSavedCode(i);
+ Register reg = {r};
+ if ((non_object_regs & (1 << r)) != 0) {
+ if (FLAG_debug_code) {
+ __ TestUnsignedSmiCandidate(reg, r0);
+ __ Assert(eq, kUnableToEncodeValueAsSmi, cr0);
+ }
+ __ SmiTag(reg);
+ }
+ }
+ __ MultiPush(object_regs | non_object_regs);
+ }
+
+#ifdef DEBUG
+ __ RecordComment("// Calling from debug break to runtime - come in - over");
+#endif
+ __ mov(r2, Operand::Zero()); // no arguments
+ __ mov(r3, Operand(ExternalReference::debug_break(masm->isolate())));
+
+ CEntryStub ceb(masm->isolate(), 1);
+ __ CallStub(&ceb);
+
+ // Restore the register values from the expression stack.
+ if ((object_regs | non_object_regs) != 0) {
+ __ MultiPop(object_regs | non_object_regs);
+ for (int i = 0; i < kNumJSCallerSaved; i++) {
+ int r = JSCallerSavedCode(i);
+ Register reg = {r};
+ if ((non_object_regs & (1 << r)) != 0) {
+ __ SmiUntag(reg);
+ }
+ if (FLAG_debug_code &&
+ (((object_regs | non_object_regs) & (1 << r)) == 0)) {
+ __ mov(reg, Operand(kDebugZapValue));
+ }
+ }
+ }
+
+ // Don't bother removing padding bytes pushed on the stack
+ // as the frame is going to be restored right away.
+
+ // Leave the internal frame.
+ }
+
+ // Now that the break point has been handled, resume normal execution by
+ // jumping to the target address intended by the caller and that was
+ // overwritten by the address of DebugBreakXXX.
+ ExternalReference after_break_target =
+ ExternalReference::debug_after_break_target_address(masm->isolate());
+ __ mov(ip, Operand(after_break_target));
+ __ LoadP(ip, MemOperand(ip));
+ __ JumpToJSEntry(ip);
+}
+
+
+void DebugCodegen::GenerateCallICStubDebugBreak(MacroAssembler* masm) {
+ // Register state for CallICStub
+ // ----------- S t a t e -------------
+ // -- r3 : function
+ // -- r5 : slot in feedback array (smi)
+ // -----------------------------------
+ Generate_DebugBreakCallHelper(masm, r3.bit() | r5.bit(), 0);
+}
+
+
+void DebugCodegen::GenerateReturnDebugBreak(MacroAssembler* masm) {
+ // In places other than IC call sites it is expected that r2 is TOS which
+ // is an object - this is not generally the case so this should be used with
+ // care.
+ Generate_DebugBreakCallHelper(masm, r2.bit(), 0);
+}
+
+
+void DebugCodegen::GenerateCallFunctionStubDebugBreak(MacroAssembler* masm) {
+ // Register state for CallFunctionStub (from code-stubs-s390.cc).
+ // ----------- S t a t e -------------
+ // -- r3 : function
+ // -----------------------------------
+ Generate_DebugBreakCallHelper(masm, r3.bit(), 0);
+}
+
+
+void DebugCodegen::GenerateCallConstructStubDebugBreak(MacroAssembler* masm) {
+ // Calling convention for CallConstructStub (from code-stubs-s390.cc)
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments (not smi)
+ // -- r3 : constructor function
+ // -----------------------------------
+ Generate_DebugBreakCallHelper(masm, r3.bit(), r2.bit());
+}
+
+
+void DebugCodegen::GenerateCallConstructStubRecordDebugBreak(
+ MacroAssembler* masm) {
+ // Calling convention for CallConstructStub (from code-stubs-s390.cc)
+ // ----------- S t a t e -------------
+ // -- r2 : number of arguments (not smi)
+ // -- r3 : constructor function
+ // -- r4 : feedback array
+ // -- r5 : feedback slot (smi)
+ // -----------------------------------
+ Generate_DebugBreakCallHelper(masm, r3.bit() | r4.bit() | r5.bit(), r2.bit());
+}
+
+
+void DebugCodegen::GenerateSlot(MacroAssembler* masm) {
+ // Generate enough nop's to make space for a call instruction. Avoid emitting
+ // the trampoline pool in the debug break slot code.
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm);
+ Label check_codesize;
+ __ bind(&check_codesize);
+ __ RecordDebugBreakSlot();
+ for (int i = 0; i < Assembler::kDebugBreakSlotLength / 4; i++) {
+ __ nop(MacroAssembler::DEBUG_BREAK_NOP);
+ }
+ if (Assembler::kDebugBreakSlotLength % 4 != 0) {
+ __ nop(); // Generate a 2-byte NOP
+ }
+ DCHECK_EQ(Assembler::kDebugBreakSlotLength,
+ masm->SizeOfCodeGeneratedSince(&check_codesize));
+}
+
+
+void DebugCodegen::GenerateSlotDebugBreak(MacroAssembler* masm) {
+ // In the places where a debug break slot is inserted no registers can contain
+ // object pointers.
+ Generate_DebugBreakCallHelper(masm, 0, 0);
+}
+
+
+void DebugCodegen::GeneratePlainReturnLiveEdit(MacroAssembler* masm) {
+ __ Ret();
+}
+
+
+void DebugCodegen::GenerateFrameDropperLiveEdit(MacroAssembler* masm) {
+ ExternalReference restarter_frame_function_slot =
+ ExternalReference::debug_restarter_frame_function_pointer_address(
+ masm->isolate());
+ __ mov(ip, Operand(restarter_frame_function_slot));
+ __ LoadImmP(r3, Operand::Zero());
+ __ StoreP(r3, MemOperand(ip, 0));
+
+ // Load the function pointer off of our current stack frame.
+ __ LoadP(r3, MemOperand(fp, StandardFrameConstants::kConstantPoolOffset -
+ kPointerSize));
+
+ // Pop return address and frame
+ __ LeaveFrame(StackFrame::INTERNAL);
+
+ // Load context from the function.
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+
+ // Get function code.
+ __ LoadP(ip, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(ip, FieldMemOperand(ip, SharedFunctionInfo::kCodeOffset));
+ __ AddP(ip, Operand(Code::kHeaderSize - kHeapObjectTag));
+
+ // Re-run JSFunction, r3 is function, cp is context.
+ __ Jump(ip);
+}
+
+
+const bool LiveEdit::kFrameDropperSupported = true;
+
+#undef __
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/deoptimizer-s390.cc
@@ -0,0 +1,358 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#include "src/codegen.h"
+#include "src/deoptimizer.h"
+#include "src/full-codegen.h"
+#include "src/safepoint-table.h"
+
+namespace v8 {
+namespace internal {
+
+// LAY + LGHI/LHI + BRCL
+const int Deoptimizer::table_entry_size_ = 16;
+
+int Deoptimizer::patch_size() {
+#if V8_TARGET_ARCH_S390X
+ const int kCallInstructionSize = 16;
+#else
+ const int kCallInstructionSize = 10;
+#endif
+ return kCallInstructionSize;
+}
+
+
+void Deoptimizer::EnsureRelocSpaceForLazyDeoptimization(Handle<Code> code) {
+ // Empty because there is no need for relocation information for the code
+ // patching in Deoptimizer::PatchCodeForDeoptimization below.
+}
+
+
+void Deoptimizer::PatchCodeForDeoptimization(Isolate* isolate, Code* code) {
+ Address code_start_address = code->instruction_start();
+
+ // Invalidate the relocation information, as it will become invalid by the
+ // code patching below, and is not needed any more.
+ code->InvalidateRelocation();
+
+ if (FLAG_zap_code_space) {
+ // Fail hard and early if we enter this code object again.
+ byte* pointer = code->FindCodeAgeSequence();
+ if (pointer != NULL) {
+ pointer += kNoCodeAgeSequenceLength;
+ } else {
+ pointer = code->instruction_start();
+ }
+ CodePatcher patcher(pointer, 2);
+ patcher.masm()->bkpt(0);
+
+ DeoptimizationInputData* data =
+ DeoptimizationInputData::cast(code->deoptimization_data());
+ int osr_offset = data->OsrPcOffset()->value();
+ if (osr_offset > 0) {
+ CodePatcher osr_patcher(code->instruction_start() + osr_offset, 2);
+ osr_patcher.masm()->bkpt(0);
+ }
+ }
+
+ DeoptimizationInputData* deopt_data =
+ DeoptimizationInputData::cast(code->deoptimization_data());
+#ifdef DEBUG
+ Address prev_call_address = NULL;
+#endif
+ // For each LLazyBailout instruction insert a call to the corresponding
+ // deoptimization entry.
+ for (int i = 0; i < deopt_data->DeoptCount(); i++) {
+ if (deopt_data->Pc(i)->value() == -1) continue;
+ Address call_address = code_start_address + deopt_data->Pc(i)->value();
+ Address deopt_entry = GetDeoptimizationEntry(isolate, i, LAZY);
+ // We need calls to have a predictable size in the unoptimized code, but
+ // this is optimized code, so we don't have to have a predictable size.
+ int call_size_in_bytes = MacroAssembler::CallSizeNotPredictableCodeSize(
+ deopt_entry, kRelocInfo_NONEPTR);
+ DCHECK(call_size_in_bytes <= patch_size());
+ CodePatcher patcher(call_address, call_size_in_bytes); // FIXME: 2ND ARG
+ patcher.masm()->Call(deopt_entry, kRelocInfo_NONEPTR);
+ DCHECK(prev_call_address == NULL ||
+ call_address >= prev_call_address + patch_size());
+ DCHECK(call_address + patch_size() <= code->instruction_end());
+#ifdef DEBUG
+ prev_call_address = call_address;
+#endif
+ }
+}
+
+
+void Deoptimizer::FillInputFrame(Address tos, JavaScriptFrame* frame) {
+ // Set the register values. The values are not important as there are no
+ // callee saved registers in JavaScript frames, so all registers are
+ // spilled. Registers fp and sp are set to the correct values though.
+ // We ensure the values are Smis to avoid confusing the garbage
+ // collector in the event that any values are retreived and stored
+ // elsewhere.
+
+ for (int i = 0; i < Register::kNumRegisters; i++) {
+ input_->SetRegister(i, reinterpret_cast<intptr_t>(Smi::FromInt(i)));
+ }
+ input_->SetRegister(sp.code(), reinterpret_cast<intptr_t>(frame->sp()));
+ input_->SetRegister(fp.code(), reinterpret_cast<intptr_t>(frame->fp()));
+ for (int i = 0; i < DoubleRegister::NumAllocatableRegisters(); i++) {
+ input_->SetDoubleRegister(i, 0.0);
+ }
+
+ // Fill the frame content from the actual data on the frame.
+ for (unsigned i = 0; i < input_->GetFrameSize(); i += kPointerSize) {
+ input_->SetFrameSlot(
+ i, reinterpret_cast<intptr_t>(Memory::Address_at(tos + i)));
+ }
+}
+
+
+void Deoptimizer::SetPlatformCompiledStubRegisters(
+ FrameDescription* output_frame, CodeStubDescriptor* descriptor) {
+ ApiFunction function(descriptor->deoptimization_handler());
+ ExternalReference xref(&function, ExternalReference::BUILTIN_CALL, isolate_);
+ intptr_t handler = reinterpret_cast<intptr_t>(xref.address());
+ int params = descriptor->GetHandlerParameterCount();
+ output_frame->SetRegister(r2.code(), params);
+ output_frame->SetRegister(r3.code(), handler);
+}
+
+
+void Deoptimizer::CopyDoubleRegisters(FrameDescription* output_frame) {
+ for (int i = 0; i < DoubleRegister::kMaxNumRegisters; ++i) {
+ double double_value = input_->GetDoubleRegister(i);
+ output_frame->SetDoubleRegister(i, double_value);
+ }
+}
+
+
+bool Deoptimizer::HasAlignmentPadding(JSFunction* function) {
+ // There is no dynamic alignment padding on S390 in the input frame.
+ return false;
+}
+
+
+#define __ masm()->
+
+// This code tries to be close to ia32 code so that any changes can be
+// easily ported.
+void Deoptimizer::TableEntryGenerator::Generate() {
+ GeneratePrologue();
+
+ // Save all the registers onto the stack
+ const int kNumberOfRegisters = Register::kNumRegisters;
+
+ RegList restored_regs = kJSCallerSaved | kCalleeSaved;
+
+ const int kDoubleRegsSize =
+ kDoubleSize * DoubleRegister::kMaxNumAllocatableRegisters;
+
+ // Save all FPU registers before messing with them.
+ __ lay(sp, MemOperand(sp, -kDoubleRegsSize));
+ for (int i = 0; i < DoubleRegister::kMaxNumAllocatableRegisters; ++i) {
+ DoubleRegister fpu_reg = DoubleRegister::FromAllocationIndex(i);
+ int offset = i * kDoubleSize;
+ __ StoreF(fpu_reg, MemOperand(sp, offset));
+ }
+
+ // Push all GPRs onto the stack
+ __ lay(sp, MemOperand(sp, -kNumberOfRegisters * kPointerSize));
+ __ StoreMultipleP(r0, sp, MemOperand(sp)); // Save all 16 registers
+
+ __ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ __ StoreP(fp, MemOperand(ip));
+
+ const int kSavedRegistersAreaSize =
+ (kNumberOfRegisters * kPointerSize) + kDoubleRegsSize;
+
+ // Get the bailout id from the stack.
+ __ LoadP(r4, MemOperand(sp, kSavedRegistersAreaSize));
+
+ // Cleanse the Return address for 31-bit
+ __ CleanseP(r14);
+
+ // Get the address of the location in the code object (r5)(return
+ // address for lazy deoptimization) and compute the fp-to-sp delta in
+ // register r6.
+ __ LoadRR(r5, r14);
+ __ la(r6, MemOperand(sp, kSavedRegistersAreaSize + (1 * kPointerSize)));
+ __ SubP(r6, fp, r6);
+
+ // Allocate a new deoptimizer object.
+ // Pass six arguments in r2 to r7.
+ __ PrepareCallCFunction(6, r7);
+ __ LoadP(r2, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadImmP(r3, Operand(type())); // bailout type,
+ // r4: bailout id already loaded.
+ // r5: code address or 0 already loaded.
+ // r6: Fp-to-sp delta.
+ // Parm6: isolate is passed on the stack.
+ __ mov(r7, Operand(ExternalReference::isolate_address(isolate())));
+ __ StoreP(r7, MemOperand(sp, kStackFrameExtraParamSlot * kPointerSize));
+
+ // Call Deoptimizer::New().
+ {
+ AllowExternalCallThatCantCauseGC scope(masm());
+ __ CallCFunction(ExternalReference::new_deoptimizer_function(isolate()), 6);
+ }
+
+ // Preserve "deoptimizer" object in register r2 and get the input
+ // frame descriptor pointer to r3 (deoptimizer->input_);
+ __ LoadP(r3, MemOperand(r2, Deoptimizer::input_offset()));
+
+ // Copy core registers into FrameDescription::registers_[kNumRegisters].
+ DCHECK(Register::kNumRegisters == kNumberOfRegisters);
+ __ mvc(MemOperand(r3, FrameDescription::registers_offset()), MemOperand(sp),
+ kNumberOfRegisters * kPointerSize);
+
+ int double_regs_offset = FrameDescription::double_registers_offset();
+ // Copy VFP registers to
+ // double_registers_[DoubleRegister::kNumAllocatableRegisters]
+ __ mvc(MemOperand(r3, double_regs_offset),
+ MemOperand(sp, kNumberOfRegisters * kPointerSize),
+ DoubleRegister::NumAllocatableRegisters() * kDoubleSize);
+
+ // Remove the bailout id and the saved registers from the stack.
+ __ la(sp, MemOperand(sp, kSavedRegistersAreaSize + (1 * kPointerSize)));
+
+ // Compute a pointer to the unwinding limit in register r4; that is
+ // the first stack slot not part of the input frame.
+ __ LoadP(r4, MemOperand(r3, FrameDescription::frame_size_offset()));
+ __ AddP(r4, sp);
+
+ // Unwind the stack down to - but not including - the unwinding
+ // limit and copy the contents of the activation frame to the input
+ // frame description.
+ __ la(r5, MemOperand(r3, FrameDescription::frame_content_offset()));
+ Label pop_loop;
+ Label pop_loop_header;
+ __ b(&pop_loop_header, Label::kNear);
+ __ bind(&pop_loop);
+ __ pop(r6);
+ __ StoreP(r6, MemOperand(r5, 0));
+ __ la(r5, MemOperand(r5, kPointerSize));
+ __ bind(&pop_loop_header);
+ __ CmpP(r4, sp);
+ __ bne(&pop_loop);
+
+ // Compute the output frame in the deoptimizer.
+ __ push(r2); // Preserve deoptimizer object across call.
+ // r2: deoptimizer object; r3: scratch.
+ __ PrepareCallCFunction(1, r3);
+ // Call Deoptimizer::ComputeOutputFrames().
+ {
+ AllowExternalCallThatCantCauseGC scope(masm());
+ __ CallCFunction(
+ ExternalReference::compute_output_frames_function(isolate()), 1);
+ }
+ __ pop(r2); // Restore deoptimizer object (class Deoptimizer).
+
+ // Replace the current (input) frame with the output frames.
+ Label outer_push_loop, inner_push_loop, outer_loop_header, inner_loop_header;
+ // Outer loop state: r6 = current "FrameDescription** output_",
+ // r3 = one past the last FrameDescription**.
+ __ LoadlW(r3, MemOperand(r2, Deoptimizer::output_count_offset()));
+ __ LoadP(r6, MemOperand(r2, Deoptimizer::output_offset())); // r6 is output_.
+ __ ShiftLeftP(r3, r3, Operand(kPointerSizeLog2));
+ __ AddP(r3, r6, r3);
+ __ b(&outer_loop_header, Label::kNear);
+
+ __ bind(&outer_push_loop);
+ // Inner loop state: r4 = current FrameDescription*, r5 = loop index.
+ __ LoadP(r4, MemOperand(r6, 0)); // output_[ix]
+ __ LoadP(r5, MemOperand(r4, FrameDescription::frame_size_offset()));
+ __ b(&inner_loop_header, Label::kNear);
+
+ __ bind(&inner_push_loop);
+ __ AddP(r5, Operand(-sizeof(intptr_t)));
+ __ AddP(r8, r4, r5);
+ __ LoadP(r8, MemOperand(r8, FrameDescription::frame_content_offset()));
+ __ push(r8);
+
+ __ bind(&inner_loop_header);
+ __ CmpP(r5, Operand::Zero());
+ __ bne(&inner_push_loop); // test for gt?
+
+ __ AddP(r6, r6, Operand(kPointerSize));
+ __ bind(&outer_loop_header);
+ __ CmpP(r6, r3);
+ __ blt(&outer_push_loop);
+
+ __ LoadP(r3, MemOperand(r2, Deoptimizer::input_offset()));
+ for (int i = 0; i < DoubleRegister::kMaxNumAllocatableRegisters; ++i) {
+ const DoubleRegister dreg = DoubleRegister::FromAllocationIndex(i);
+ int src_offset = i * kDoubleSize + double_regs_offset;
+ __ ld(dreg, MemOperand(r3, src_offset));
+ }
+
+ // Push state, pc, and continuation from the last output frame.
+ __ LoadP(r8, MemOperand(r4, FrameDescription::state_offset()));
+ __ push(r8);
+ __ LoadP(r8, MemOperand(r4, FrameDescription::pc_offset()));
+ __ push(r8);
+ __ LoadP(r8, MemOperand(r4, FrameDescription::continuation_offset()));
+ __ push(r8);
+
+ // Restore the registers from the last output frame.
+ DCHECK(!(ip.bit() & restored_regs));
+ __ LoadRR(ip, r4);
+ for (int i = kNumberOfRegisters - 1; i >= 0; i--) {
+ int offset = (i * kPointerSize) + FrameDescription::registers_offset();
+ if ((restored_regs & (1 << i)) != 0) {
+ __ LoadP(ToRegister(i), MemOperand(ip, offset));
+ }
+ }
+
+ __ InitializeRootRegister();
+
+ __ pop(ip); // get continuation, leave pc on stack
+ __ pop(r14);
+ __ Jump(ip);
+ __ stop("Unreachable.");
+}
+
+
+void Deoptimizer::TableEntryGenerator::GeneratePrologue() {
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm());
+
+ // Create a sequence of deoptimization entries. Note that any
+ // registers may be still live.
+ Label done;
+ for (int i = 0; i < count(); i++) {
+ int start = masm()->pc_offset();
+ USE(start);
+ __ lay(sp, MemOperand(sp, -kPointerSize));
+ __ LoadImmP(ip, Operand(i));
+ __ b(&done);
+ int end = masm()->pc_offset();
+ USE(end);
+ DCHECK(masm()->pc_offset() - start == table_entry_size_);
+ }
+ __ bind(&done);
+ __ StoreP(ip, MemOperand(sp));
+}
+
+
+void FrameDescription::SetCallerPc(unsigned offset, intptr_t value) {
+ SetFrameSlot(offset, value);
+}
+
+
+void FrameDescription::SetCallerFp(unsigned offset, intptr_t value) {
+ SetFrameSlot(offset, value);
+}
+
+
+void FrameDescription::SetCallerConstantPool(unsigned offset, intptr_t value) {
+ // No out-of-line constant pool support.
+ UNREACHABLE();
+}
+
+
+#undef __
+}
+} // namespace v8::internal
--- /dev/null
+++ b/deps/v8/src/s390/disasm-s390.cc
@@ -0,0 +1,976 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+// A Disassembler object is used to disassemble a block of code instruction by
+// instruction. The default implementation of the NameConverter object can be
+// overriden to modify register names or to do symbol lookup on addresses.
+//
+// The example below will disassemble a block of code and print it to stdout.
+//
+// NameConverter converter;
+// Disassembler d(converter);
+// for (byte* pc = begin; pc < end;) {
+// v8::internal::EmbeddedVector<char, 256> buffer;
+// byte* prev_pc = pc;
+// pc += d.InstructionDecode(buffer, pc);
+// printf("%p %08x %s\n",
+// prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer);
+// }
+//
+// The Disassembler class also has a convenience method to disassemble a block
+// of code into a FILE*, meaning that the above functionality could also be
+// achieved by just calling Disassembler::Disassemble(stdout, begin, end);
+
+
+#include <assert.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/base/platform/platform.h"
+#include "src/disasm.h"
+#include "src/macro-assembler.h"
+#include "src/s390/constants-s390.h"
+
+
+namespace v8 {
+namespace internal {
+
+
+//------------------------------------------------------------------------------
+
+// Decoder decodes and disassembles instructions into an output buffer.
+// It uses the converter to convert register names and call destinations into
+// more informative description.
+class Decoder {
+ public:
+ Decoder(const disasm::NameConverter& converter, Vector<char> out_buffer)
+ : converter_(converter), out_buffer_(out_buffer), out_buffer_pos_(0) {
+ out_buffer_[out_buffer_pos_] = '\0';
+ }
+
+ ~Decoder() {}
+
+ // Writes one disassembled instruction into 'buffer' (0-terminated).
+ // Returns the length of the disassembled machine instruction in bytes.
+ int InstructionDecode(byte* instruction);
+
+ private:
+ // Bottleneck functions to print into the out_buffer.
+ void PrintChar(const char ch);
+ void Print(const char* str);
+
+ // Printing of common values.
+ void PrintRegister(int reg);
+ void PrintDRegister(int reg);
+ int FormatFPRegister(Instruction* instr, const char* format);
+ void PrintSoftwareInterrupt(SoftwareInterruptCodes svc);
+
+ // Handle formatting of instructions and their options.
+ int FormatRegister(Instruction* instr, const char* option);
+ int FormatFloatingRegister(Instruction* instr, const char* option);
+ int FormatMask(Instruction* instr, const char* option);
+ int FormatDisplacement(Instruction* instr, const char* option);
+ int FormatImmediate(Instruction* instr, const char* option);
+ int FormatOption(Instruction* instr, const char* option);
+ void Format(Instruction* instr, const char* format);
+ void Unknown(Instruction* instr);
+ void UnknownFormat(Instruction* instr, const char* opcname);
+
+ bool DecodeTwoByte(Instruction* instr);
+ bool DecodeFourByte(Instruction* instr);
+ bool DecodeSixByte(Instruction* instr);
+
+ const disasm::NameConverter& converter_;
+ Vector<char> out_buffer_;
+ int out_buffer_pos_;
+
+ DISALLOW_COPY_AND_ASSIGN(Decoder);
+};
+
+
+// Support for assertions in the Decoder formatting functions.
+#define STRING_STARTS_WITH(string, compare_string) \
+ (strncmp(string, compare_string, strlen(compare_string)) == 0)
+
+
+// Append the ch to the output buffer.
+void Decoder::PrintChar(const char ch) { out_buffer_[out_buffer_pos_++] = ch; }
+
+
+// Append the str to the output buffer.
+void Decoder::Print(const char* str) {
+ char cur = *str++;
+ while (cur != '\0' && (out_buffer_pos_ < (out_buffer_.length() - 1))) {
+ PrintChar(cur);
+ cur = *str++;
+ }
+ out_buffer_[out_buffer_pos_] = 0;
+}
+
+
+// Print the register name according to the active name converter.
+void Decoder::PrintRegister(int reg) {
+ Print(converter_.NameOfCPURegister(reg));
+}
+
+
+// Print the double FP register name according to the active name converter.
+void Decoder::PrintDRegister(int reg) { Print(FPRegisters::Name(reg)); }
+
+
+// Print SoftwareInterrupt codes. Factoring this out reduces the complexity of
+// the FormatOption method.
+void Decoder::PrintSoftwareInterrupt(SoftwareInterruptCodes svc) {
+ switch (svc) {
+ case kCallRtRedirected:
+ Print("call rt redirected");
+ return;
+ case kBreakpoint:
+ Print("breakpoint");
+ return;
+ default:
+ if (svc >= kStopCode) {
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d - 0x%x",
+ svc & kStopCodeMask, svc & kStopCodeMask);
+ } else {
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", svc);
+ }
+ return;
+ }
+}
+
+
+// Handle all register based formatting in this function to reduce the
+// complexity of FormatOption.
+int Decoder::FormatRegister(Instruction* instr, const char* format) {
+ DCHECK(format[0] == 'r');
+
+ if ((format[1] == 't') || (format[1] == 's')) { // 'rt & 'rs register
+ int reg = instr->RTValue();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == 'a') { // 'ra: RA register
+ int reg = instr->RAValue();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == 'b') { // 'rb: RB register
+ int reg = instr->RBValue();
+ PrintRegister(reg);
+ return 2;
+ // S390 specific instructions, and they can be refactored
+ } else if (format[1] == '1') { // 'r1: register resides in bit 8-11
+ RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr);
+ int reg = rrinstr->R1Value();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == '2') { // 'r2: register resides in bit 12-15
+ RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr);
+ int reg = rrinstr->R2Value();
+ // indicating it is a r0 for displacement, in which case the offset
+ // should be 0.
+ if (format[2] == 'd') {
+ if (reg == 0)
+ return 4;
+ PrintRegister(reg);
+ return 3;
+ } else {
+ PrintRegister(reg);
+ return 2;
+ }
+ } else if (format[1] == '3') { // 'r3: register resides in bit 16-19
+ RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr);
+ int reg = rsinstr->B2Value();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == '4') { // 'r4: register resides in bit 20-23
+ RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr);
+ int reg = rsinstr->B2Value();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == '5') { // 'r5: register resides in bit 24-28
+ RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr);
+ int reg = rreinstr->R1Value();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == '6') { // 'r6: register resides in bit 29-32
+ RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr);
+ int reg = rreinstr->R2Value();
+ PrintRegister(reg);
+ return 2;
+ } else if (format[1] == '7') { // 'r6: register resides in bit 32-35
+ SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr);
+ int reg = ssinstr->B2Value();
+ PrintRegister(reg);
+ return 2;
+ }
+
+ UNREACHABLE();
+ return -1;
+}
+
+
+int Decoder::FormatFloatingRegister(Instruction* instr, const char* format) {
+ DCHECK(format[0] == 'f');
+
+ // reuse 1, 5 and 6 because it is coresponding
+ if (format[1] == '1') { // 'r1: register resides in bit 8-11
+ RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr);
+ int reg = rrinstr->R1Value();
+ PrintDRegister(reg);
+ return 2;
+ } else if (format[1] == '2') { // 'f2: register resides in bit 12-15
+ RRInstruction* rrinstr = reinterpret_cast<RRInstruction*>(instr);
+ int reg = rrinstr->R2Value();
+ PrintDRegister(reg);
+ return 2;
+ } else if (format[1] == '3') { // 'f3: register resides in bit 16-19
+ RRDInstruction* rrdinstr = reinterpret_cast<RRDInstruction*>(instr);
+ int reg = rrdinstr->R1Value();
+ PrintDRegister(reg);
+ return 2;
+ } else if (format[1] == '5') { // 'f5: register resides in bit 24-28
+ RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr);
+ int reg = rreinstr->R1Value();
+ PrintDRegister(reg);
+ return 2;
+ } else if (format[1] == '6') { // 'f6: register resides in bit 29-32
+ RREInstruction* rreinstr = reinterpret_cast<RREInstruction*>(instr);
+ int reg = rreinstr->R2Value();
+ PrintDRegister(reg);
+ return 2;
+ }
+ UNREACHABLE();
+ return -1;
+}
+
+
+// Handle all FP register based formatting in this function to reduce the
+// complexity of FormatOption.
+int Decoder::FormatFPRegister(Instruction* instr, const char* format) {
+ DCHECK(format[0] == 'D');
+
+ int retval = 2;
+ int reg = -1;
+ if (format[1] == 't') {
+ reg = instr->RTValue();
+ } else if (format[1] == 'a') {
+ reg = instr->RAValue();
+ } else if (format[1] == 'b') {
+ reg = instr->RBValue();
+ } else if (format[1] == 'c') {
+ reg = instr->RCValue();
+ } else {
+ UNREACHABLE();
+ }
+
+ PrintDRegister(reg);
+
+ return retval;
+}
+
+
+// FormatOption takes a formatting string and interprets it based on
+// the current instructions. The format string points to the first
+// character of the option string (the option escape has already been
+// consumed by the caller.) FormatOption returns the number of
+// characters that were consumed from the formatting string.
+int Decoder::FormatOption(Instruction* instr, const char* format) {
+ switch (format[0]) {
+ case 'o': {
+ if (instr->Bit(10) == 1) {
+ Print("o");
+ }
+ return 1;
+ }
+ case '.': {
+ if (instr->Bit(0) == 1) {
+ Print(".");
+ } else {
+ Print(" "); // ensure consistent spacing
+ }
+ return 1;
+ }
+ case 'r': {
+ return FormatRegister(instr, format);
+ }
+ case 'f': {
+ return FormatFloatingRegister(instr, format);
+ }
+ case 'D': {
+ return FormatFPRegister(instr, format);
+ }
+ case 'i': { // int16
+ return FormatImmediate(instr, format);
+ }
+ case 'u': { // uint16
+ int32_t value = instr->Bits(15, 0);
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", value);
+ return 6;
+ }
+ case 'l': {
+ // Link (LK) Bit 0
+ if (instr->Bit(0) == 1) {
+ Print("l");
+ }
+ return 1;
+ }
+ case 'a': {
+ // Absolute Address Bit 1
+ if (instr->Bit(1) == 1) {
+ Print("a");
+ }
+ return 1;
+ }
+ case 't': { // 'target: target of branch instructions
+ // target26 or target16
+ DCHECK(STRING_STARTS_WITH(format, "target"));
+ if ((format[6] == '2') && (format[7] == '6')) {
+ int off = ((instr->Bits(25, 2)) << 8) >> 6;
+ out_buffer_pos_ += SNPrintF(
+ out_buffer_ + out_buffer_pos_, "%+d -> %s", off,
+ converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + off));
+ return 8;
+ } else if ((format[6] == '1') && (format[7] == '6')) {
+ int off = ((instr->Bits(15, 2)) << 18) >> 16;
+ out_buffer_pos_ += SNPrintF(
+ out_buffer_ + out_buffer_pos_, "%+d -> %s", off,
+ converter_.NameOfAddress(reinterpret_cast<byte*>(instr) + off));
+ return 8;
+ }
+ case 'm': {
+ return FormatMask(instr, format);
+ }
+ }
+ case 'd': { // ds value for offset
+ return FormatDisplacement(instr, format);
+ }
+ default: {
+ UNREACHABLE();
+ break;
+ }
+ }
+
+ UNREACHABLE();
+ return -1;
+}
+
+
+int Decoder::FormatMask(Instruction* instr, const char* format) {
+ DCHECK(format[0] == 'm');
+ int32_t value = 0;
+ if ((format[1] == '1')) { // prints the mask format in bit 8-12
+ value = reinterpret_cast<RRInstruction*>(instr)->R1Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "0x%x", value);
+ return 2;
+ } else if (format[1] == '2') { // mask format in bit 16 - 19
+ value = reinterpret_cast<RXInstruction*>(instr)->B2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "0x%x", value);
+ return 2;
+ }
+
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+}
+
+
+int Decoder::FormatDisplacement(Instruction* instr, const char* format) {
+ DCHECK(format[0] == 'd');
+
+ if (format[1] == '1') { // displacement in 20-31
+ RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr);
+ uint16_t value = rsinstr->D2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+
+ return 2;
+ } else if (format[1] == '2') { // displacement in 20-39
+ RXYInstruction* rxyinstr = reinterpret_cast<RXYInstruction*>(instr);
+ int32_t value = rxyinstr->D2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '4') { // SS displacement 2 36-47
+ SSInstruction* ssInstr = reinterpret_cast<SSInstruction*>(instr);
+ uint16_t value = ssInstr->D2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '3') { // SS displacement 1 20 - 32
+ SSInstruction* ssInstr = reinterpret_cast<SSInstruction*>(instr);
+ uint16_t value = ssInstr->D1Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else { // s390 specific
+ int32_t value = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3);
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 1;
+ }
+}
+
+
+int Decoder::FormatImmediate(Instruction *instr, const char* format) {
+ DCHECK(format[0] == 'i');
+
+ if (format[1] == '1') { // immediate in 16-31
+ RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr);
+ int16_t value = riinstr->I2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '2') { // immediate in 16-48
+ RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr);
+ int32_t value = rilinstr->I2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '3') { // immediate in I format
+ IInstruction* iinstr = reinterpret_cast<IInstruction*>(instr);
+ int8_t value = iinstr->IValue();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '4') { // immediate in 16-31, but outputs as offset
+ RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr);
+ int16_t value = riinstr->I2Value()*2;
+ if (value >= 0)
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+");
+ else
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*");
+
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d -> %s", value,
+ converter_.NameOfAddress(
+ reinterpret_cast<byte*>(instr) + value));
+ return 2;
+ } else if (format[1] == '5') { // immediate in 16-31, but outputs as offset
+ RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr);
+ int32_t value = rilinstr->I2Value()*2;
+ if (value >= 0)
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+");
+ else
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*");
+
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d -> %s", value,
+ converter_.NameOfAddress(
+ reinterpret_cast<byte*>(instr) + value));
+ return 2;
+ } else if (format[1] == '6') { // unsigned immediate in 16-31
+ RIInstruction* riinstr = reinterpret_cast<RIInstruction*>(instr);
+ uint16_t value = riinstr->I2UnsignedValue();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '7') { // unsigned immediate in 16-47
+ RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr);
+ uint32_t value = rilinstr->I2UnsignedValue();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '8') { // unsigned immediate in 8-15
+ SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr);
+ uint8_t value = ssinstr->Length();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == '9') { // unsigned immediate in 16-23
+ RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr);
+ uint8_t value = rie_instr->I3Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == 'a') { // unsigned immediate in 24-31
+ RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr);
+ uint8_t value = rie_instr->I4Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == 'b') { // unsigned immediate in 32-39
+ RIEInstruction* rie_instr = reinterpret_cast<RIEInstruction*>(instr);
+ uint8_t value = rie_instr->I5Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == 'c') { // signed immediate in 8-15
+ SSInstruction* ssinstr = reinterpret_cast<SSInstruction*>(instr);
+ int8_t value = ssinstr->Length();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == 'd') { // signed immediate in 32-47
+ SILInstruction* silinstr = reinterpret_cast<SILInstruction*>(instr);
+ int16_t value = silinstr->I2Value();
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d", value);
+ return 2;
+ } else if (format[1] == 'e') { // immediate in 16-47, but outputs as offset
+ RILInstruction* rilinstr = reinterpret_cast<RILInstruction*>(instr);
+ int32_t value = rilinstr->I2Value()*2;
+ if (value >= 0)
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*+");
+ else
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "*");
+
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%d -> %s", value,
+ converter_.NameOfAddress(
+ reinterpret_cast<byte*>(instr) + value));
+ return 2;
+ }
+
+ UNREACHABLE();
+ return -1;
+}
+
+
+// Format takes a formatting string for a whole instruction and prints it into
+// the output buffer. All escaped options are handed to FormatOption to be
+// parsed further.
+void Decoder::Format(Instruction* instr, const char* format) {
+ char cur = *format++;
+ while ((cur != 0) && (out_buffer_pos_ < (out_buffer_.length() - 1))) {
+ if (cur == '\'') { // Single quote is used as the formatting escape.
+ format += FormatOption(instr, format);
+ } else {
+ out_buffer_[out_buffer_pos_++] = cur;
+ }
+ cur = *format++;
+ }
+ out_buffer_[out_buffer_pos_] = '\0';
+}
+
+
+// The disassembler may end up decoding data inlined in the code. We do not want
+// it to crash if the data does not ressemble any known instruction.
+#define VERIFY(condition) \
+ if (!(condition)) { \
+ Unknown(instr); \
+ return; \
+ }
+
+
+// For currently unimplemented decodings the disassembler calls Unknown(instr)
+// which will just print "unknown" of the instruction bits.
+void Decoder::Unknown(Instruction* instr) {
+ Format(instr, "unknown");
+}
+
+
+// For currently unimplemented decodings the disassembler calls
+// UnknownFormat(instr) which will just print opcode name of the
+// instruction bits.
+void Decoder::UnknownFormat(Instruction* instr, const char* name) {
+ char buffer[100];
+ snprintf(buffer, sizeof(buffer), "%s (unknown-format)", name);
+ Format(instr, buffer);
+}
+
+
+// Disassembles Two Byte S390 Instructions
+// @return true if successfully decoded
+bool Decoder::DecodeTwoByte(Instruction* instr) {
+ // Print the Instruction bits.
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%04x ",
+ instr->InstructionBits<TwoByteInstr>());
+
+ Opcode opcode = instr->S390OpcodeValue();
+ switch (opcode) {
+ case SVC: Format(instr, "svc\t'i3"); break;
+ case AR: Format(instr, "ar\t'r1,'r2"); break;
+ case SR: Format(instr, "sr\t'r1,'r2"); break;
+ case MR: Format(instr, "mr\t'r1,'r2"); break;
+ case DR: Format(instr, "dr\t'r1,'r2"); break;
+ case OR: Format(instr, "or\t'r1,'r2"); break;
+ case NR: Format(instr, "nr\t'r1,'r2"); break;
+ case XR: Format(instr, "xr\t'r1,'r2"); break;
+ case LR: Format(instr, "lr\t'r1,'r2"); break;
+ case CR: Format(instr, "cr\t'r1,'r2"); break;
+ case CLR: Format(instr, "clr\t'r1,'r2"); break;
+ case BCR: Format(instr, "bcr\t'm1,'r2"); break;
+ case LTR: Format(instr, "ltr\t'r1,'r2"); break;
+ case ALR: Format(instr, "alr\t'r1,'r2"); break;
+ case SLR: Format(instr, "slr\t'r1,'r2"); break;
+ case LNR: Format(instr, "lnr\t'r1,'r2"); break;
+ case LCR: Format(instr, "lcr\t'r1,'r2"); break;
+ case BASR: Format(instr, "basr\t'r1,'r2"); break;
+ case LDR: Format(instr, "ldr\t'f1,'f2"); break;
+ case BKPT: Format(instr, "bkpt"); break;
+ default:
+ return false;
+ }
+ return true;
+}
+
+
+// Disassembles Four Byte S390 Instructions
+// @return true if successfully decoded
+bool Decoder::DecodeFourByte(Instruction* instr) {
+ // Print the Instruction bits.
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%08x ",
+ instr->InstructionBits<FourByteInstr>());
+
+ Opcode opcode = instr->S390OpcodeValue();
+ switch (opcode) {
+ case AHI: Format(instr, "ahi\t'r1,'i1"); break;
+ case AGHI: Format(instr, "aghi\t'r1,'i1"); break;
+ case LHI: Format(instr, "lhi\t'r1,'i1"); break;
+ case LGHI: Format(instr, "lghi\t'r1,'i1"); break;
+ case MHI: Format(instr, "mhi\t'r1,'i1"); break;
+ case MGHI: Format(instr, "mghi\t'r1,'i1"); break;
+ case CHI: Format(instr, "chi\t'r1,'i1"); break;
+ case CGHI: Format(instr, "cghi\t'r1,'i1"); break;
+ case BRAS: Format(instr, "bras\t'r1,'i1"); break;
+ case BRC: Format(instr, "brc\t'm1,'i4"); break;
+ case BRCT: Format(instr, "brct\t'r1,'i4"); break;
+ case BRCTG: Format(instr, "brctg\t'r1,'i4"); break;
+ case IIHH: Format(instr, "iihh\t'r1,'i1"); break;
+ case IIHL: Format(instr, "iihl\t'r1,'i1"); break;
+ case IILH: Format(instr, "iilh\t'r1,'i1"); break;
+ case IILL: Format(instr, "iill\t'r1,'i1"); break;
+ case OILL: Format(instr, "oill\t'r1,'i1"); break;
+ case TMLL: Format(instr, "tmll\t'r1,'i1"); break;
+ case STM: Format(instr, "stm\t'r1,'r2,'d1('r3)"); break;
+ case LM: Format(instr, "lm\t'r1,'r2,'d1('r3)"); break;
+ case SLL: Format(instr, "sll\t'r1,'d1('r3)"); break;
+ case SRL: Format(instr, "srl\t'r1,'d1('r3)"); break;
+ case SLA: Format(instr, "sla\t'r1,'d1('r3)"); break;
+ case SRA: Format(instr, "sra\t'r1,'d1('r3)"); break;
+ case AGR: Format(instr, "agr\t'r5,'r6"); break;
+ case AGFR: Format(instr, "agfr\t'r5,'r6"); break;
+ case ARK: Format(instr, "ark\t'r5,'r6,'r3"); break;
+ case AGRK: Format(instr, "agrk\t'r5,'r6,'r3"); break;
+ case SGR: Format(instr, "sgr\t'r5,'r6"); break;
+ case SGFR: Format(instr, "sgfr\t'r5,'r6"); break;
+ case SRK: Format(instr, "srk\t'r5,'r6,'r3"); break;
+ case SGRK: Format(instr, "sgrk\t'r5,'r6,'r3"); break;
+ case NGR: Format(instr, "ngr\t'r5,'r6"); break;
+ case NRK: Format(instr, "nrk\t'r5,'r6,'r3"); break;
+ case NGRK: Format(instr, "ngrk\t'r5,'r6,'r3"); break;
+ case NILL: Format(instr, "nill\t'r1,'i1"); break;
+ case NILH: Format(instr, "nilh\t'r1,'i1"); break;
+ case OGR: Format(instr, "ogr\t'r5,'r6"); break;
+ case ORK: Format(instr, "ork\t'r5,'r6,'r3"); break;
+ case OGRK: Format(instr, "ogrk\t'r5,'r6,'r3"); break;
+ case XGR: Format(instr, "xgr\t'r5,'r6"); break;
+ case XRK: Format(instr, "xrk\t'r5,'r6,'r3"); break;
+ case XGRK: Format(instr, "xgrk\t'r5,'r6,'r3"); break;
+ case CGR: Format(instr, "cgr\t'r5,'r6"); break;
+ case CLGR: Format(instr, "clgr\t'r5,'r6"); break;
+ case LLGFR: Format(instr, "llgfr\t'r5,'r6"); break;
+ case LBR: Format(instr, "lbr\t'r5,'r6"); break;
+ case LEDBR: Format(instr, "ledbr\t'f5,'f6"); break;
+ case LDEBR: Format(instr, "ldebr\t'f5,'f6"); break;
+ case LTGR: Format(instr, "ltgr\t'r5,'r6"); break;
+ case LGR: Format(instr, "lgr\t'r5,'r6"); break;
+ case LGDR: Format(instr, "lgdr\t'r5,'f6"); break;
+ case LGFR: Format(instr, "lgfr\t'r5,'r6"); break;
+ case LTGFR: Format(instr, "ltgfr\t'r5,'r6"); break;
+ case LCGR: Format(instr, "lcgr\t'r5,'r6"); break;
+ case MSR: Format(instr, "msr\t'r5,'r6"); break;
+ case LGBR: Format(instr, "lgbr\t'r5,'r6"); break;
+ case LGHR: Format(instr, "lghr\t'r5,'r6"); break;
+ case MSGR: Format(instr, "msgr\t'r5,'r6"); break;
+ case DSGR: Format(instr, "dsgr\t'r5,'r6"); break;
+ case LZDR: Format(instr, "lzdr\t'f5"); break;
+ case MLR: Format(instr, "mlr\t'r5,'r6"); break;
+ case MLGR: Format(instr, "mlgr\t'r5,'r6"); break;
+ case ALGR: Format(instr, "algr\t'r5,'r6"); break;
+ case ALRK: Format(instr, "alrk\t'r5,'r6,'r3"); break;
+ case ALGRK: Format(instr, "algrk\t'r5,'r6,'r3"); break;
+ case SLGR: Format(instr, "slgr\t'r5,'r6"); break;
+ case SLRK: Format(instr, "slrk\t'r5,'r6,'r3"); break;
+ case SLGRK: Format(instr, "slgrk\t'r5,'r6,'r3"); break;
+ case LHR: Format(instr, "lhr\t'r5,'r6"); break;
+ case LLHR: Format(instr, "llhr\t'r5,'r6"); break;
+ case LLGHR: Format(instr, "llghr\t'r5,'r6"); break;
+ case LNGR: Format(instr, "lngr\t'r5,'r6"); break;
+ case A: Format(instr, "a\t'r1,'d1('r2d,'r3)"); break;
+ case S: Format(instr, "s\t'r1,'d1('r2d,'r3)"); break;
+ case M: Format(instr, "m\t'r1,'d1('r2d,'r3)"); break;
+ case D: Format(instr, "d\t'r1,'d1('r2d,'r3)"); break;
+ case O: Format(instr, "o\t'r1,'d1('r2d,'r3)"); break;
+ case N: Format(instr, "n\t'r1,'d1('r2d,'r3)"); break;
+ case L: Format(instr, "l\t'r1,'d1('r2d,'r3)"); break;
+ case C: Format(instr, "c\t'r1,'d1('r2d,'r3)"); break;
+ case AH: Format(instr, "ah\t'r1,'d1('r2d,'r3)"); break;
+ case SH: Format(instr, "sh\t'r1,'d1('r2d,'r3)"); break;
+ case MH: Format(instr, "mh\t'r1,'d1('r2d,'r3)"); break;
+ case AL: Format(instr, "al\t'r1,'d1('r2d,'r3)"); break;
+ case SL: Format(instr, "sl\t'r1,'d1('r2d,'r3)"); break;
+ case LA: Format(instr, "la\t'r1,'d1('r2d,'r3)"); break;
+ case CH: Format(instr, "ch\t'r1,'d1('r2d,'r3)"); break;
+ case CL: Format(instr, "cl\t'r1,'d1('r2d,'r3)"); break;
+ case CLI: Format(instr, "cli\t'd1('r3),'i8"); break;
+ case TM: Format(instr, "tm\t'd1('r3),'i8"); break;
+ case BC: Format(instr, "bc\t'm1,'d1('r2d,'r3)"); break;
+ case BCT: Format(instr, "bct\t'r1,'d1('r2d,'r3)"); break;
+ case ST: Format(instr, "st\t'r1,'d1('r2d,'r3)"); break;
+ case STC: Format(instr, "stc\t'r1,'d1('r2d,'r3)"); break;
+ case IC_z: Format(instr, "ic\t'r1,'d1('r2d,'r3)"); break;
+ case LD: Format(instr, "ld\t'f1,'d1('r2d,'r3)"); break;
+ case LE: Format(instr, "le\t'f1,'d1('r2d,'r3)"); break;
+ case LDGR: Format(instr, "ldgr\t'f5,'r6"); break;
+ case STE:Format(instr, "ste\t'f1,'d1('r2d,'r3)"); break;
+ case STD:Format(instr, "std\t'f1,'d1('r2d,'r3)"); break;
+ case CFDBR: Format(instr, "cfdbr\t'r5,'m2,'f6"); break;
+ case CDFBR: Format(instr, "cdfbr\t'f5,'m2,'r6"); break;
+ case CFEBR: Format(instr, "cfebr\t'r5,'m2,'f6"); break;
+ case CEFBR: Format(instr, "cefbr\t'f5,'m2,'r6"); break;
+ case CGDBR: Format(instr, "cgdbr\t'r5,'m2,'f6"); break;
+ case CDGBR: Format(instr, "cdgbr\t'f5,'m2,'r6"); break;
+ case CDLFBR: Format(instr, "cdlfbr\t'f5,'m2,'r6"); break;
+ case CDLGBR: Format(instr, "cdlgbr\t'f5,'m2,'r6"); break;
+ case CLFDBR: Format(instr, "clfdbr\t'r5,'m2,'f6"); break;
+ case CLGDBR: Format(instr, "clgdbr\t'r5,'m2,'f6"); break;
+ case ADBR: Format(instr, "adbr\t'f5,'f6"); break;
+ case SDBR: Format(instr, "sdbr\t'f5,'f6"); break;
+ case MDBR: Format(instr, "mdbr\t'f5,'f6"); break;
+ case DDBR: Format(instr, "ddbr\t'f5,'f6"); break;
+ case CDBR: Format(instr, "cdbr\t'f5,'f6"); break;
+ case SQDBR: Format(instr, "sqdbr\t'f5,'f6"); break;
+ case LCDBR: Format(instr, "lcdbr\t'f5,'f6"); break;
+ case STH: Format(instr, "sth\t'r1,'d1('r2d,'r3)"); break;
+ case SRDA: Format(instr, "srda\t'r1,'d1"); break;
+ case MADBR: Format(instr, "madbr\t'f3,'f5,'f6"); break;
+ case MSDBR: Format(instr, "msdbr\t'f3,'f5,'f6"); break;
+ case FLOGR: Format(instr, "flogr\t'r5,'r6"); break;
+ // TRAP4 is used in calling to native function. it will not be generated
+ // in native code.
+ case TRAP4: {
+ Format(instr, "trap4"); break;
+ }
+ default:
+ return false;
+ }
+ return true;
+}
+
+
+// Disassembles Six Byte S390 Instructions
+// @return true if successfully decoded
+bool Decoder::DecodeSixByte(Instruction* instr) {
+ // Print the Instruction bits.
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_,
+ "%012" PRIx64 " ",
+ instr->InstructionBits<SixByteInstr>());
+
+ Opcode opcode = instr->S390OpcodeValue();
+ switch (opcode) {
+ case LLILF: Format(instr, "llilf\t'r1,'i7"); break;
+ case LLIHF: Format(instr, "llihf\t'r1,'i7"); break;
+ case AFI: Format(instr, "afi\t'r1,'i7"); break;
+ case ASI: Format(instr, "asi\t'd2('r3),'ic"); break;
+ case AGSI: Format(instr, "agsi\t'd2('r3),'ic"); break;
+ case ALFI: Format(instr, "alfi\t'r1,'i7"); break;
+ case AHIK: Format(instr, "ahik\t'r1,'r2,'i1"); break;
+ case AGHIK: Format(instr, "aghik\t'r1,'r2,'i1"); break;
+ case CLGFI: Format(instr, "clgfi\t'r1,'i7"); break;
+ case CLFI: Format(instr, "clfi\t'r1,'i7"); break;
+ case CFI: Format(instr, "cfi\t'r1,'i2"); break;
+ case CGFI: Format(instr, "cgfi\t'r1,'i2"); break;
+ case BRASL: Format(instr, "brasl\t'r1,'ie"); break;
+ case BRCL: Format(instr, "brcl\t'm1,'i5"); break;
+ case IIHF: Format(instr, "iihf\t'r1,'i7"); break;
+ case IILF: Format(instr, "iilf\t'r1,'i7"); break;
+ case XIHF: Format(instr, "xihf\t'r1,'i7"); break;
+ case XILF: Format(instr, "xilf\t'r1,'i7"); break;
+ case SLLK: Format(instr, "sllk\t'r1,'r2,'d2('r3)"); break;
+ case SLLG: Format(instr, "sllg\t'r1,'r2,'d2('r3)"); break;
+ case RLL: Format(instr, "rll\t'r1,'r2,'d2('r3)"); break;
+ case RLLG: Format(instr, "rllg\t'r1,'r2,'d2('r3)"); break;
+ case SRLK: Format(instr, "srlk\t'r1,'r2,'d2('r3)"); break;
+ case SRLG: Format(instr, "srlg\t'r1,'r2,'d2('r3)"); break;
+ case SLAK: Format(instr, "slak\t'r1,'r2,'d2('r3)"); break;
+ case SLAG: Format(instr, "slag\t'r1,'r2,'d2('r3)"); break;
+ case SRAK: Format(instr, "srak\t'r1,'r2,'d2('r3)"); break;
+ case SRAG: Format(instr, "srag\t'r1,'r2,'d2('r3)"); break;
+ case RISBG: Format(instr, "risbg\t'r1,'r2,'i9,'ia,'ib"); break;
+ case RISBGN: Format(instr, "risbgn\t'r1,'r2,'i9,'ia,'ib"); break;
+ case LMY: Format(instr, "lmy\t'r1,'r2,'d2('r3)"); break;
+ case LMG: Format(instr, "lmg\t'r1,'r2,'d2('r3)"); break;
+ case STMY: Format(instr, "stmy\t'r1,'r2,'d2('r3)"); break;
+ case STMG: Format(instr, "stmg\t'r1,'r2,'d2('r3)"); break;
+ case LT: Format(instr, "lt\t'r1,'d2('r2d,'r3)"); break;
+ case LTG: Format(instr, "ltg\t'r1,'d2('r2d,'r3)"); break;
+ case ML: Format(instr, "ml\t'r1,'d2('r2d,'r3)"); break;
+ case AY: Format(instr, "ay\t'r1,'d2('r2d,'r3)"); break;
+ case SY: Format(instr, "sy\t'r1,'d2('r2d,'r3)"); break;
+ case NY: Format(instr, "ny\t'r1,'d2('r2d,'r3)"); break;
+ case OY: Format(instr, "oy\t'r1,'d2('r2d,'r3)"); break;
+ case XY: Format(instr, "xy\t'r1,'d2('r2d,'r3)"); break;
+ case CY: Format(instr, "cy\t'r1,'d2('r2d,'r3)"); break;
+ case AHY: Format(instr, "ahy\t'r1,'d2('r2d,'r3)"); break;
+ case SHY: Format(instr, "shy\t'r1,'d2('r2d,'r3)"); break;
+ case LGH: Format(instr, "lgh\t'r1,'d2('r2d,'r3)"); break;
+ case AG: Format(instr, "ag\t'r1,'d2('r2d,'r3)"); break;
+ case AGF: Format(instr, "agf\t'r1,'d2('r2d,'r3)"); break;
+ case SG: Format(instr, "sg\t'r1,'d2('r2d,'r3)"); break;
+ case NG: Format(instr, "ng\t'r1,'d2('r2d,'r3)"); break;
+ case OG: Format(instr, "og\t'r1,'d2('r2d,'r3)"); break;
+ case XG: Format(instr, "xg\t'r1,'d2('r2d,'r3)"); break;
+ case CG: Format(instr, "cg\t'r1,'d2('r2d,'r3)"); break;
+ case LB: Format(instr, "lb\t'r1,'d2('r2d,'r3)"); break;
+ case LG: Format(instr, "lg\t'r1,'d2('r2d,'r3)"); break;
+ case LGF: Format(instr, "lgf\t'r1,'d2('r2d,'r3)"); break;
+ case LLGF: Format(instr, "llgf\t'r1,'d2('r2d,'r3)"); break;
+ case LY: Format(instr, "ly\t'r1,'d2('r2d,'r3)"); break;
+ case ALY: Format(instr, "aly\t'r1,'d2('r2d,'r3)"); break;
+ case ALG: Format(instr, "alg\t'r1,'d2('r2d,'r3)"); break;
+ case SLG: Format(instr, "slg\t'r1,'d2('r2d,'r3)"); break;
+ case SGF: Format(instr, "sgf\t'r1,'d2('r2d,'r3)"); break;
+ case SLY: Format(instr, "sly\t'r1,'d2('r2d,'r3)"); break;
+ case LLH: Format(instr, "llh\t'r1,'d2('r2d,'r3)"); break;
+ case LLGH: Format(instr, "llgh\t'r1,'d2('r2d,'r3)"); break;
+ case LLC: Format(instr, "llc\t'r1,'d2('r2d,'r3)"); break;
+ case LLGC: Format(instr, "llgc\t'r1,'d2('r2d,'r3)"); break;
+ case LDEB: Format(instr, "ldeb\t'f1,'d2('r2d,'r3)"); break;
+ case LAY: Format(instr, "lay\t'r1,'d2('r2d,'r3)"); break;
+ case LARL: Format(instr, "larl\t'r1,'i5"); break;
+ case LGB: Format(instr, "lgb\t'r1,'d2('r2d,'r3)"); break;
+ case CHY: Format(instr, "chy\t'r1,'d2('r2d,'r3)"); break;
+ case CLY: Format(instr, "cly\t'r1,'d2('r2d,'r3)"); break;
+ case CLIY: Format(instr, "cliy\t'd2('r3),'i8"); break;
+ case TMY: Format(instr, "tmy\t'd2('r3),'i8"); break;
+ case CLG: Format(instr, "clg\t'r1,'d2('r2d,'r3)"); break;
+ case BCTG: Format(instr, "bctg\t'r1,'d2('r2d,'r3)"); break;
+ case STY: Format(instr, "sty\t'r1,'d2('r2d,'r3)"); break;
+ case STG: Format(instr, "stg\t'r1,'d2('r2d,'r3)"); break;
+ case ICY: Format(instr, "icy\t'r1,'d2('r2d,'r3)"); break;
+ case MVC: Format(instr, "mvc\t'd3('i8,'r3),'d4('r7)"); break;
+ case MVHI: Format(instr, "mvhi\t'd3('r3),'id"); break;
+ case MVGHI: Format(instr, "mvghi\t'd3('r3),'id"); break;
+ case ALGFI: Format(instr, "algfi\t'r1,'i7"); break;
+ case SLGFI: Format(instr, "slgfi\t'r1,'i7"); break;
+ case SLFI: Format(instr, "slfi\t'r1,'i7"); break;
+ case NIHF: Format(instr, "nihf\t'r1,'i7"); break;
+ case NILF: Format(instr, "nilf\t'r1,'i7"); break;
+ case OIHF: Format(instr, "oihf\t'r1,'i7"); break;
+ case OILF: Format(instr, "oilf\t'r1,'i7"); break;
+ case MSFI: Format(instr, "msfi\t'r1,'i7"); break;
+ case MSGFI: Format(instr, "msgfi\t'r1,'i7"); break;
+ case LDY: Format(instr, "ldy\t'f1,'d2('r2d,'r3)"); break;
+ case LEY: Format(instr, "ley\t'f1,'d2('r2d,'r3)"); break;
+ case STEY: Format(instr, "stey\t'f1,'d2('r2d,'r3)"); break;
+ case STDY: Format(instr, "stdy\t'f1,'d2('r2d,'r3)"); break;
+ case ADB: Format(instr, "adb\t'r1,'d1('r2d, 'r3)"); break;
+ case SDB: Format(instr, "sdb\t'r1,'d1('r2d, 'r3)"); break;
+ case MDB: Format(instr, "mdb\t'r1,'d1('r2d, 'r3)"); break;
+ case DDB: Format(instr, "ddb\t'r1,'d1('r2d, 'r3)"); break;
+ case SQDB: Format(instr, "sqdb\t'r1,'d1('r2d, 'r3)"); break;
+ default:
+ return false;
+ }
+ return true;
+}
+
+#undef VERIFIY
+
+// Disassemble the instruction at *instr_ptr into the output buffer.
+int Decoder::InstructionDecode(byte* instr_ptr) {
+ Instruction* instr = Instruction::At(instr_ptr);
+ int instrLength = instr->InstructionLength();
+
+ if (2 == instrLength)
+ DecodeTwoByte(instr);
+ else if (4 == instrLength)
+ DecodeFourByte(instr);
+ else
+ DecodeSixByte(instr);
+
+ return instrLength;
+}
+
+
+} } // namespace v8::internal
+
+
+
+//------------------------------------------------------------------------------
+
+namespace disasm {
+
+
+const char* NameConverter::NameOfAddress(byte* addr) const {
+ v8::internal::SNPrintF(tmp_buffer_, "%p", addr);
+ return tmp_buffer_.start();
+}
+
+
+const char* NameConverter::NameOfConstant(byte* addr) const {
+ return NameOfAddress(addr);
+}
+
+
+const char* NameConverter::NameOfCPURegister(int reg) const {
+ return v8::internal::Registers::Name(reg);
+}
+
+const char* NameConverter::NameOfByteCPURegister(int reg) const {
+ UNREACHABLE(); // s390 does not have the concept of a byte register
+ return "nobytereg";
+}
+
+
+const char* NameConverter::NameOfXMMRegister(int reg) const {
+ UNREACHABLE(); // s390 does not have any XMM registers
+ // Perhaps update for VRs?? (PPC too)
+ return "noxmmreg";
+}
+
+const char* NameConverter::NameInCode(byte* addr) const {
+ // The default name converter is called for unknown code. So we will not try
+ // to access any memory.
+ return "";
+}
+
+
+//------------------------------------------------------------------------------
+
+Disassembler::Disassembler(const NameConverter& converter)
+ : converter_(converter) {}
+
+
+Disassembler::~Disassembler() {}
+
+
+int Disassembler::InstructionDecode(v8::internal::Vector<char> buffer,
+ byte* instruction) {
+ v8::internal::Decoder d(converter_, buffer);
+ return d.InstructionDecode(instruction);
+}
+
+
+// The PPC assembler does not currently use constant pools.
+int Disassembler::ConstantPoolSizeAt(byte* instruction) { return -1; }
+
+
+void Disassembler::Disassemble(FILE* f, byte* begin, byte* end) {
+ NameConverter converter;
+ Disassembler d(converter);
+ for (byte* pc = begin; pc < end;) {
+ v8::internal::EmbeddedVector<char, 128> buffer;
+ buffer[0] = '\0';
+ byte* prev_pc = pc;
+ pc += d.InstructionDecode(buffer, pc);
+ v8::internal::PrintF(f, "%p %08x %s\n", prev_pc,
+ *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
+ }
+}
+
+
+} // namespace disasm
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/frames-s390.cc
@@ -0,0 +1,39 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/assembler.h"
+#include "src/frames.h"
+#include "src/macro-assembler.h"
+#include "src/s390/assembler-s390.h"
+#include "src/s390/assembler-s390-inl.h"
+#include "src/s390/macro-assembler-s390.h"
+
+namespace v8 {
+namespace internal {
+
+
+Register JavaScriptFrame::fp_register() { return v8::internal::fp; }
+Register JavaScriptFrame::context_register() { return cp; }
+Register JavaScriptFrame::constant_pool_pointer_register() {
+ UNREACHABLE();
+ return no_reg;
+}
+
+
+Register StubFailureTrampolineFrame::fp_register() { return v8::internal::fp; }
+Register StubFailureTrampolineFrame::context_register() { return cp; }
+Register StubFailureTrampolineFrame::constant_pool_pointer_register() {
+ UNREACHABLE();
+ return no_reg;
+}
+
+
+}
+} // namespace v8::internal
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/frames-s390.h
@@ -0,0 +1,155 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_FRAMES_S390_H_
+#define V8_S390_FRAMES_S390_H_
+
+namespace v8 {
+namespace internal {
+
+
+// Register list in load/store instructions
+// Note that the bit values must match those used in actual instruction encoding
+const int kNumRegs = 16;
+
+
+// Caller-saved/arguments registers
+const RegList kJSCallerSaved = 1 << 1 | // r1
+ 1 << 2 | // r2 a1
+ 1 << 3 | // r3 a2
+ 1 << 4 | // r4 a3
+ 1 << 5; // r5 a4
+
+const int kNumJSCallerSaved = 5;
+
+// Return the code of the n-th caller-saved register available to JavaScript
+// e.g. JSCallerSavedReg(0) returns r0.code() == 0
+int JSCallerSavedCode(int n);
+
+
+// Callee-saved registers preserved when switching from C to JavaScript
+const RegList kCalleeSaved =
+ 1 << 6 | // r6 (argument passing in CEntryStub)
+ // (HandleScope logic in MacroAssembler)
+ 1 << 7 | // r7 (argument passing in CEntryStub)
+ // (HandleScope logic in MacroAssembler)
+ 1 << 8 | // r8 (argument passing in CEntryStub)
+ // (HandleScope logic in MacroAssembler)
+ 1 << 9 | // r9 (HandleScope logic in MacroAssembler)
+ 1 << 10 | // r10 (Roots register in Javascript)
+ 1 << 11 | // r11 (fp in Javascript)
+ 1 << 13; // r13 (cp in Javascript)
+
+const int kNumCalleeSaved = 7;
+
+// Number of registers for which space is reserved in safepoints. Must be a
+// multiple of 8.
+// TODO(regis): Only 8 registers may actually be sufficient. Revisit.
+const int kNumSafepointRegisters = 16;
+
+// Define the list of registers actually saved at safepoints.
+// Note that the number of saved registers may be smaller than the reserved
+// space, i.e. kNumSafepointSavedRegisters <= kNumSafepointRegisters.
+const RegList kSafepointSavedRegisters = kJSCallerSaved | kCalleeSaved;
+const int kNumSafepointSavedRegisters = kNumJSCallerSaved + kNumCalleeSaved;
+
+// The following constants describe the stack frame linkage area as
+// defined by the ABI.
+
+#if V8_TARGET_ARCH_S390X
+// [0] Back Chain
+// [1] Reserved for compiler use
+// [2] GPR 2
+// [3] GPR 3
+// ...
+// [15] GPR 15
+// [16] FPR 0
+// [17] FPR 2
+// [18] FPR 4
+// [19] FPR 6
+const int kNumRequiredStackFrameSlots = 20;
+const int kStackFrameRASlot = 14;
+const int kStackFrameSPSlot = 15;
+const int kStackFrameExtraParamSlot = 20;
+#else
+// [0] Back Chain
+// [1] Reserved for compiler use
+// [2] GPR 2
+// [3] GPR 3
+// ...
+// [15] GPR 15
+// [16..17] FPR 0
+// [18..19] FPR 2
+// [20..21] FPR 4
+// [22..23] FPR 6
+const int kNumRequiredStackFrameSlots = 24;
+const int kStackFrameRASlot = 14;
+const int kStackFrameSPSlot = 15;
+const int kStackFrameExtraParamSlot = 24;
+#endif
+
+// zLinux ABI requires caller frames to include sufficient space for
+// callee preserved register save area.
+#if V8_TARGET_ARCH_S390X
+const int kCalleeRegisterSaveAreaSize = 160;
+#elif V8_TARGET_ARCH_S390
+const int kCalleeRegisterSaveAreaSize = 96;
+#else
+const int kCalleeRegisterSaveAreaSize = 0;
+#endif
+
+// ----------------------------------------------------
+
+
+class EntryFrameConstants : public AllStatic {
+ public:
+ static const int kCallerFPOffset =
+ -(StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize);
+};
+
+
+class ExitFrameConstants : public AllStatic {
+ public:
+ static const int kFrameSize = 2 * kPointerSize;
+ static const int kConstantPoolOffset = 0; // Not used.
+ static const int kCodeOffset = -2 * kPointerSize;
+ static const int kSPOffset = -1 * kPointerSize;
+
+ // The caller fields are below the frame pointer on the stack.
+ static const int kCallerFPOffset = 0 * kPointerSize;
+ // The calling JS function is below FP.
+ static const int kCallerPCOffset = 1 * kPointerSize;
+
+ // FP-relative displacement of the caller's SP. It points just
+ // below the saved PC.
+ static const int kCallerSPDisplacement = 2 * kPointerSize;
+};
+
+
+class JavaScriptFrameConstants : public AllStatic {
+ public:
+ // FP-relative.
+ static const int kLocal0Offset = StandardFrameConstants::kExpressionsOffset;
+ static const int kLastParameterOffset = +2 * kPointerSize;
+ static const int kFunctionOffset = StandardFrameConstants::kMarkerOffset;
+
+ // Caller SP-relative.
+ static const int kParam0Offset = -2 * kPointerSize;
+ static const int kReceiverOffset = -1 * kPointerSize;
+};
+
+
+inline Object* JavaScriptFrame::function_slot_object() const {
+ const int offset = JavaScriptFrameConstants::kFunctionOffset;
+ return Memory::Object_at(fp() + offset);
+}
+
+
+}
+} // namespace v8::internal
+
+#endif // V8_S390_FRAMES_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/full-codegen-s390.cc
@@ -0,0 +1,5582 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/code-factory.h"
+#include "src/code-stubs.h"
+#include "src/codegen.h"
+#include "src/compiler.h"
+#include "src/debug.h"
+#include "src/full-codegen.h"
+#include "src/ic/ic.h"
+#include "src/parser.h"
+#include "src/scopes.h"
+
+#include "src/s390/code-stubs-s390.h"
+#include "src/s390/macro-assembler-s390.h"
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm_)
+
+// A patch site is a location in the code which it is possible to patch. This
+// class has a number of methods to emit the code which is patchable and the
+// method EmitPatchInfo to record a marker back to the patchable code. This
+// marker is a cmpi rx, #yyy instruction, and x * 0x0000ffff + yyy (raw 16 bit
+// immediate value is used) is the delta from the pc to the first instruction of
+// the patchable code.
+// See PatchInlinedSmiCode in ic-s390.cc for the code that patches it
+class JumpPatchSite BASE_EMBEDDED {
+ public:
+ explicit JumpPatchSite(MacroAssembler* masm) : masm_(masm) {
+#ifdef DEBUG
+ info_emitted_ = false;
+#endif
+ }
+
+ ~JumpPatchSite() { DCHECK(patch_site_.is_bound() == info_emitted_); }
+
+ // When initially emitting this ensure that a jump is always generated to skip
+ // the inlined smi code.
+ void EmitJumpIfNotSmi(Register reg, Label* target) {
+ DCHECK(!patch_site_.is_bound() && !info_emitted_);
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ __ bind(&patch_site_);
+ __ CmpP(reg, reg);
+ // Emit the Nop to make bigger place for patching on 31-bit
+ // as the TestIfSmi sequence uses 4-byte TMLL
+#ifndef V8_TARGET_ARCH_S390X
+ __ nop();
+#endif
+ __ beq(target); // Always taken before patched.
+ }
+
+ // When initially emitting this ensure that a jump is never generated to skip
+ // the inlined smi code.
+ void EmitJumpIfSmi(Register reg, Label* target) {
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ DCHECK(!patch_site_.is_bound() && !info_emitted_);
+ __ bind(&patch_site_);
+ __ CmpP(reg, reg);
+ // Emit the Nop to make bigger place for patching on 31-bit
+ // as the TestIfSmi sequence uses 4-byte TMLL
+#ifndef V8_TARGET_ARCH_S390X
+ __ nop();
+#endif
+ __ bne(target); // Never taken before patched.
+ }
+
+ void EmitPatchInfo() {
+ if (patch_site_.is_bound()) {
+ int delta_to_patch_site = masm_->SizeOfCodeGeneratedSince(&patch_site_);
+ DCHECK(is_int16(delta_to_patch_site));
+ __ chi(r0, Operand(delta_to_patch_site));
+#ifdef DEBUG
+ info_emitted_ = true;
+#endif
+ } else {
+ __ nop();
+ __ nop();
+ }
+ }
+
+ private:
+ MacroAssembler* masm_;
+ Label patch_site_;
+#ifdef DEBUG
+ bool info_emitted_;
+#endif
+};
+
+
+// Generate code for a JS function. On entry to the function the receiver
+// and arguments have been pushed on the stack left to right. The actual
+// argument count matches the formal parameter count expected by the
+// function.
+//
+// The live registers are:
+// o r3: the JS function object being called (i.e., ourselves)
+// o cp: our context
+// o fp: our caller's frame pointer
+// o sp: stack pointer
+// o lr: return address
+// o ip: our own function entry (required by the prologue)
+//
+// The function builds a JS frame. Please see JavaScriptFrameConstants in
+// frames-s390.h for its layout.
+void FullCodeGenerator::Generate() {
+ CompilationInfo* info = info_;
+ profiling_counter_ = isolate()->factory()->NewCell(
+ Handle<Smi>(Smi::FromInt(FLAG_interrupt_budget), isolate()));
+ SetFunctionPosition(function());
+ Comment cmnt(masm_, "[ function compiled by full code generator");
+
+ ProfileEntryHookStub::MaybeCallEntryHook(masm_);
+
+#ifdef DEBUG
+ if (strlen(FLAG_stop_at) > 0 &&
+ info->function()->name()->IsUtf8EqualTo(CStrVector(FLAG_stop_at))) {
+ __ stop("stop-at");
+ }
+#endif
+
+ // Sloppy mode functions and builtins need to replace the receiver with the
+ // global proxy when called as functions (without an explicit receiver
+ // object).
+ if (is_sloppy(info->language_mode()) && !info->is_native() &&
+ info->MayUseThis() && info->scope()->has_this_declaration()) {
+ Label ok;
+ int receiver_offset = info->scope()->num_parameters() * kPointerSize;
+ __ LoadP(r4, MemOperand(sp, receiver_offset), r0);
+ __ CompareRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ bne(&ok, Label::kNear);
+
+ __ LoadP(r4, GlobalObjectOperand());
+ __ LoadP(r4, FieldMemOperand(r4, GlobalObject::kGlobalProxyOffset));
+
+ __ StoreP(r4, MemOperand(sp, receiver_offset), r0);
+
+ __ bind(&ok);
+ }
+
+ // Open a frame scope to indicate that there is a frame on the stack. The
+ // MANUAL indicates that the scope shouldn't actually generate code to set up
+ // the frame (that is done below).
+ FrameScope frame_scope(masm_, StackFrame::MANUAL);
+ int prologue_offset = masm_->pc_offset();
+
+ info->set_prologue_offset(prologue_offset);
+ __ Prologue(info->IsCodePreAgingActive(), prologue_offset);
+ info->AddNoFrameRange(0, masm_->pc_offset());
+
+ {
+ Comment cmnt(masm_, "[ Allocate locals");
+ int locals_count = info->scope()->num_stack_slots();
+ // Generators allocate locals, if any, in context slots.
+ DCHECK(!IsGeneratorFunction(info->function()->kind()) || locals_count == 0);
+ if (locals_count > 0) {
+ if (locals_count >= 128) {
+ Label ok;
+ __ AddP(ip, sp, Operand(-(locals_count * kPointerSize)));
+ __ LoadRoot(r5, Heap::kRealStackLimitRootIndex);
+ __ CmpLogicalP(ip, r5);
+ __ bge(&ok, Label::kNear);
+ __ InvokeBuiltin(Builtins::STACK_OVERFLOW, CALL_FUNCTION);
+ __ bind(&ok);
+ }
+ __ LoadRoot(ip, Heap::kUndefinedValueRootIndex);
+ int kMaxPushes = FLAG_optimize_for_size ? 4 : 32;
+ if (locals_count >= kMaxPushes) {
+ int loop_iterations = locals_count / kMaxPushes;
+ __ mov(r4, Operand(loop_iterations));
+ Label loop_header;
+ __ bind(&loop_header);
+ // Do pushes.
+ // TODO(joransiu): Consider using MVC
+ __ lay(sp, MemOperand(sp, -kMaxPushes * kPointerSize));
+ for (int i = 0; i < kMaxPushes; i++) {
+ __ StoreP(ip, MemOperand(sp, i * kPointerSize));
+ }
+ // Continue loop if not done.
+ __ BranchOnCount(r4, &loop_header);
+ }
+ int remaining = locals_count % kMaxPushes;
+ // Emit the remaining pushes.
+ // TODO(joransiu): Consider using MVC
+ if (remaining > 0) {
+ __ lay(sp, MemOperand(sp, -remaining * kPointerSize));
+ for (int i = 0; i < remaining; i++) {
+ __ StoreP(ip, MemOperand(sp, i * kPointerSize));
+ }
+ }
+ }
+ }
+
+ bool function_in_register = true;
+
+ // Possibly allocate a local context.
+ if (info->scope()->num_heap_slots() > 0) {
+ // Argument to NewContext is the function, which is still in r3.
+ Comment cmnt(masm_, "[ Allocate context");
+ bool need_write_barrier = true;
+ int slots = info->scope()->num_heap_slots() - Context::MIN_CONTEXT_SLOTS;
+ if (info->scope()->is_script_scope()) {
+ __ push(r3);
+ __ Push(info->scope()->GetScopeInfo(info->isolate()));
+ __ CallRuntime(Runtime::kNewScriptContext, 2);
+ } else if (slots <= FastNewContextStub::kMaximumSlots) {
+ FastNewContextStub stub(isolate(), slots);
+ __ CallStub(&stub);
+ // Result of FastNewContextStub is always in new space.
+ need_write_barrier = false;
+ } else {
+ __ push(r3);
+ __ CallRuntime(Runtime::kNewFunctionContext, 1);
+ }
+ function_in_register = false;
+ // Context is returned in r2. It replaces the context passed to us.
+ // It's saved in the stack and kept live in cp.
+ __ LoadRR(cp, r2);
+ __ StoreP(r2, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ // Copy any necessary parameters into the context.
+ int num_parameters = info->scope()->num_parameters();
+ int first_parameter = info->scope()->has_this_declaration() ? -1 : 0;
+ for (int i = first_parameter; i < num_parameters; i++) {
+ Variable* var = (i == -1) ? scope()->receiver() : scope()->parameter(i);
+ if (var->IsContextSlot()) {
+ int parameter_offset = StandardFrameConstants::kCallerSPOffset +
+ (num_parameters - 1 - i) * kPointerSize;
+ // Load parameter from stack.
+ __ LoadP(r2, MemOperand(fp, parameter_offset), r0);
+ // Store it in the context.
+ MemOperand target = ContextOperand(cp, var->index());
+ __ StoreP(r2, target);
+
+ // Update the write barrier.
+ if (need_write_barrier) {
+ __ RecordWriteContextSlot(cp, target.offset(), r2, r5,
+ kLRHasBeenSaved, kDontSaveFPRegs);
+ } else if (FLAG_debug_code) {
+ Label done;
+ __ JumpIfInNewSpace(cp, r2, &done);
+ __ Abort(kExpectedNewSpaceObject);
+ __ bind(&done);
+ }
+ }
+ }
+ }
+
+ // Possibly set up a local binding to the this function which is used in
+ // derived constructors with super calls.
+ Variable* this_function_var = scope()->this_function_var();
+ if (this_function_var != nullptr) {
+ Comment cmnt(masm_, "[ This function");
+ if (!function_in_register) {
+ __ LoadP(r3, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ // The write barrier clobbers register again, keep is marked as such.
+ }
+ SetVar(this_function_var, r3, r2, r4);
+ }
+
+ Variable* new_target_var = scope()->new_target_var();
+ if (new_target_var != nullptr) {
+ Comment cmnt(masm_, "[ new.target");
+
+ // Get the frame pointer for the calling frame.
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+
+ // Skip the arguments adaptor frame if it exists.
+ __ LoadP(r3, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(r3, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ Label skip;
+ __ bne(&skip);
+ __ LoadP(r4, MemOperand(r4, StandardFrameConstants::kCallerFPOffset));
+ __ bind(&skip);
+
+ // Check the marker in the calling frame.
+ __ LoadP(r3, MemOperand(r4, StandardFrameConstants::kMarkerOffset));
+ __ CmpSmiLiteral(r3, Smi::FromInt(StackFrame::CONSTRUCT), r0);
+ Label non_construct_frame, done;
+
+ __ bne(&non_construct_frame);
+ __ LoadP(r2, MemOperand(
+ r4, ConstructFrameConstants::kOriginalConstructorOffset));
+ __ b(&done);
+
+ __ bind(&non_construct_frame);
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ bind(&done);
+
+ SetVar(new_target_var, r2, r4, r5);
+ }
+
+ // Possibly allocate RestParameters
+ int rest_index;
+ Variable* rest_param = scope()->rest_parameter(&rest_index);
+ if (rest_param) {
+ Comment cmnt(masm_, "[ Allocate rest parameter array");
+
+ int num_parameters = info->scope()->num_parameters();
+ int offset = num_parameters * kPointerSize;
+
+ __ AddP(r5, fp, Operand(StandardFrameConstants::kCallerSPOffset + offset));
+ __ LoadSmiLiteral(r4, Smi::FromInt(num_parameters));
+ __ LoadSmiLiteral(r3, Smi::FromInt(rest_index));
+ __ LoadSmiLiteral(r2, Smi::FromInt(language_mode()));
+ __ Push(r5, r4, r3, r2);
+
+ RestParamAccessStub stub(isolate());
+ __ CallStub(&stub);
+
+ SetVar(rest_param, r2, r3, r4);
+ }
+
+// @TODO ---- VERIFY THE REGS BELOW to see if they work on S390!!!
+
+ Variable* arguments = scope()->arguments();
+ if (arguments != NULL) {
+ // Function uses arguments object.
+ Comment cmnt(masm_, "[ Allocate arguments object");
+ if (!function_in_register) {
+ // Load this again, if it's used by the local context below.
+ __ LoadP(r5, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ } else {
+ __ LoadRR(r5, r3);
+ }
+ // Receiver is just before the parameters on the caller's stack.
+ int num_parameters = info->scope()->num_parameters();
+ int offset = num_parameters * kPointerSize;
+ __ la(r4, MemOperand(fp, StandardFrameConstants::kCallerSPOffset + offset));
+ __ LoadSmiLiteral(r3, Smi::FromInt(num_parameters));
+ __ Push(r5, r4, r3);
+
+ // Arguments to ArgumentsAccessStub:
+ // function, receiver address, parameter count.
+ // The stub will rewrite receiever and parameter count if the previous
+ // stack frame was an arguments adapter frame.
+ ArgumentsAccessStub::Type type;
+ if (is_strict(language_mode()) || !is_simple_parameter_list()) {
+ type = ArgumentsAccessStub::NEW_STRICT;
+ } else if (function()->has_duplicate_parameters()) {
+ type = ArgumentsAccessStub::NEW_SLOPPY_SLOW;
+ } else {
+ type = ArgumentsAccessStub::NEW_SLOPPY_FAST;
+ }
+ ArgumentsAccessStub stub(isolate(), type);
+ __ CallStub(&stub);
+
+ SetVar(arguments, r2, r3, r4);
+ }
+
+ if (FLAG_trace) {
+ __ CallRuntime(Runtime::kTraceEnter, 0);
+ }
+
+ // Visit the declarations and body unless there is an illegal
+ // redeclaration.
+ if (scope()->HasIllegalRedeclaration()) {
+ Comment cmnt(masm_, "[ Declarations");
+ VisitForEffect(scope()->GetIllegalRedeclaration());
+
+ } else {
+ PrepareForBailoutForId(BailoutId::FunctionEntry(), NO_REGISTERS);
+ {
+ Comment cmnt(masm_, "[ Declarations");
+ // For named function expressions, declare the function name as a
+ // constant.
+ if (scope()->is_function_scope() && scope()->function() != NULL) {
+ VariableDeclaration* function = scope()->function();
+ DCHECK(function->proxy()->var()->mode() == CONST ||
+ function->proxy()->var()->mode() == CONST_LEGACY);
+ DCHECK(!function->proxy()->var()->IsUnallocatedOrGlobalSlot());
+ VisitVariableDeclaration(function);
+ }
+ VisitDeclarations(scope()->declarations());
+ }
+
+ {
+ Comment cmnt(masm_, "[ Stack check");
+ PrepareForBailoutForId(BailoutId::Declarations(), NO_REGISTERS);
+ Label ok;
+ __ LoadRoot(ip, Heap::kStackLimitRootIndex);
+ __ CmpLogicalP(sp, ip);
+ __ bge(&ok, Label::kNear);
+ __ Call(isolate()->builtins()->StackCheck(), RelocInfo::CODE_TARGET);
+ __ bind(&ok);
+ }
+
+ {
+ Comment cmnt(masm_, "[ Body");
+ DCHECK(loop_depth() == 0);
+ VisitStatements(function()->body());
+ DCHECK(loop_depth() == 0);
+ }
+ }
+
+ // Always emit a 'return undefined' in case control fell off the end of
+ // the body.
+ {
+ Comment cmnt(masm_, "[ return <undefined>;");
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ }
+ EmitReturnSequence();
+}
+
+
+void FullCodeGenerator::ClearAccumulator() {
+ __ LoadSmiLiteral(r2, Smi::FromInt(0));
+}
+
+
+void FullCodeGenerator::EmitProfilingCounterDecrement(int delta) {
+ __ mov(r4, Operand(profiling_counter_));
+ intptr_t smi_delta = reinterpret_cast<intptr_t>(Smi::FromInt(delta));
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) && is_int8(-smi_delta)) {
+ __ AddP(FieldMemOperand(r4, Cell::kValueOffset),
+ Operand(-smi_delta));
+ __ LoadP(r5, FieldMemOperand(r4, Cell::kValueOffset));
+ } else {
+ __ LoadP(r5, FieldMemOperand(r4, Cell::kValueOffset));
+ __ SubSmiLiteral(r5, r5, Smi::FromInt(delta), r0);
+ __ StoreP(r5, FieldMemOperand(r4, Cell::kValueOffset));
+ }
+}
+
+
+void FullCodeGenerator::EmitProfilingCounterReset() {
+ int reset_value = FLAG_interrupt_budget;
+ if (info_->is_debug()) {
+ // Detect debug break requests as soon as possible.
+ reset_value = FLAG_interrupt_budget >> 4;
+ }
+ __ mov(r4, Operand(profiling_counter_));
+ __ LoadSmiLiteral(r5, Smi::FromInt(reset_value));
+ __ StoreP(r5, FieldMemOperand(r4, Cell::kValueOffset));
+}
+
+
+void FullCodeGenerator::EmitBackEdgeBookkeeping(IterationStatement* stmt,
+ Label* back_edge_target) {
+ Comment cmnt(masm_, "[ Back edge bookkeeping");
+ Label ok;
+
+ DCHECK(back_edge_target->is_bound());
+ int distance = masm_->SizeOfCodeGeneratedSince(back_edge_target) +
+ kCodeSizeMultiplier / 2;
+ int weight = Min(kMaxBackEdgeWeight, Max(1, distance / kCodeSizeMultiplier));
+ EmitProfilingCounterDecrement(weight);
+ {
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ // BackEdgeTable::PatchAt manipulates this sequence.
+ __ bge(&ok, Label::kNear);
+ __ Call(isolate()->builtins()->InterruptCheck(), RelocInfo::CODE_TARGET);
+
+ // Record a mapping of this PC offset to the OSR id. This is used to find
+ // the AST id from the unoptimized code in order to use it as a key into
+ // the deoptimization input data found in the optimized code.
+ RecordBackEdge(stmt->OsrEntryId());
+ }
+ EmitProfilingCounterReset();
+
+ __ bind(&ok);
+ PrepareForBailoutForId(stmt->EntryId(), NO_REGISTERS);
+ // Record a mapping of the OSR id to this PC. This is used if the OSR
+ // entry becomes the target of a bailout. We don't expect it to be, but
+ // we want it to work if it is.
+ PrepareForBailoutForId(stmt->OsrEntryId(), NO_REGISTERS);
+}
+
+
+void FullCodeGenerator::EmitReturnSequence() {
+ Comment cmnt(masm_, "[ Return sequence");
+ if (return_label_.is_bound()) {
+ __ b(&return_label_);
+ } else {
+ __ bind(&return_label_);
+ if (FLAG_trace) {
+ // Push the return value on the stack as the parameter.
+ // Runtime::TraceExit returns its parameter in r2
+ __ push(r2);
+ __ CallRuntime(Runtime::kTraceExit, 1);
+ }
+ // Pretend that the exit is a backwards jump to the entry.
+ int weight = 1;
+ if (info_->ShouldSelfOptimize()) {
+ weight = FLAG_interrupt_budget / FLAG_self_opt_count;
+ } else {
+ int distance = masm_->pc_offset() + kCodeSizeMultiplier / 2;
+ weight = Min(kMaxBackEdgeWeight, Max(1, distance / kCodeSizeMultiplier));
+ }
+ EmitProfilingCounterDecrement(weight);
+ Label ok;
+ __ CmpP(r5, Operand::Zero());
+ __ bge(&ok, Label::kNear);
+ __ push(r2);
+ __ Call(isolate()->builtins()->InterruptCheck(), RelocInfo::CODE_TARGET);
+ __ pop(r2);
+ EmitProfilingCounterReset();
+ __ bind(&ok);
+
+#ifdef DEBUG
+ // Add a label for checking the size of the code used for returning.
+ Label check_exit_codesize;
+ __ bind(&check_exit_codesize);
+#endif
+ // Make sure that the constant pool is not emitted inside of the return
+ // sequence.
+ {
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ // Here we use masm_-> instead of the __ macro to avoid the code coverage
+ // tool from instrumenting as we rely on the code size here.
+ int32_t arg_count = info_->scope()->num_parameters() + 1;
+ int32_t sp_delta = arg_count * kPointerSize;
+ SetReturnPosition(function());
+ __ RecordJSReturn();
+ masm_->LoadRR(sp, fp);
+
+ // Mark range where no frame exists, in case profiler receives sample here
+ int32_t no_frame_start = masm_->pc_offset();
+ masm_->LoadP(fp, MemOperand(sp));
+ masm_->LoadP(r14, MemOperand(sp, kPointerSize));
+ masm_->lay(sp,
+ MemOperand(sp, (uint32_t)(sp_delta + (2 * kPointerSize))));
+ masm_->Ret();
+ info_->AddNoFrameRange(no_frame_start, masm_->pc_offset());
+ }
+
+#ifdef DEBUG
+ // Check that the size of the code used for returning is large enough
+ // for the debugger's requirements.
+ DCHECK(Assembler::kJSReturnSequenceLength <=
+ masm_->SizeOfCodeGeneratedSince(&check_exit_codesize));
+#endif
+ }
+}
+
+
+void FullCodeGenerator::EffectContext::Plug(Variable* var) const {
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+}
+
+
+void FullCodeGenerator::AccumulatorValueContext::Plug(Variable* var) const {
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ codegen()->GetVar(result_register(), var);
+}
+
+
+void FullCodeGenerator::StackValueContext::Plug(Variable* var) const {
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ codegen()->GetVar(result_register(), var);
+ __ push(result_register());
+}
+
+
+void FullCodeGenerator::TestContext::Plug(Variable* var) const {
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ // For simplicity we always test the accumulator register.
+ codegen()->GetVar(result_register(), var);
+ codegen()->PrepareForBailoutBeforeSplit(condition(), false, NULL, NULL);
+ codegen()->DoTest(this);
+}
+
+
+void FullCodeGenerator::EffectContext::Plug(Heap::RootListIndex index) const {}
+
+
+void FullCodeGenerator::AccumulatorValueContext::Plug(
+ Heap::RootListIndex index) const {
+ __ LoadRoot(result_register(), index);
+}
+
+
+void FullCodeGenerator::StackValueContext::Plug(
+ Heap::RootListIndex index) const {
+ __ LoadRoot(result_register(), index);
+ __ push(result_register());
+}
+
+
+void FullCodeGenerator::TestContext::Plug(Heap::RootListIndex index) const {
+ codegen()->PrepareForBailoutBeforeSplit(condition(), true, true_label_,
+ false_label_);
+ if (index == Heap::kUndefinedValueRootIndex ||
+ index == Heap::kNullValueRootIndex ||
+ index == Heap::kFalseValueRootIndex) {
+ if (false_label_ != fall_through_) __ b(false_label_);
+ } else if (index == Heap::kTrueValueRootIndex) {
+ if (true_label_ != fall_through_) __ b(true_label_);
+ } else {
+ __ LoadRoot(result_register(), index);
+ codegen()->DoTest(this);
+ }
+}
+
+
+void FullCodeGenerator::EffectContext::Plug(Handle<Object> lit) const {}
+
+
+void FullCodeGenerator::AccumulatorValueContext::Plug(
+ Handle<Object> lit) const {
+ __ mov(result_register(), Operand(lit));
+}
+
+
+void FullCodeGenerator::StackValueContext::Plug(Handle<Object> lit) const {
+ // Immediates cannot be pushed directly.
+ __ mov(result_register(), Operand(lit));
+ __ push(result_register());
+}
+
+
+void FullCodeGenerator::TestContext::Plug(Handle<Object> lit) const {
+ codegen()->PrepareForBailoutBeforeSplit(condition(), true, true_label_,
+ false_label_);
+ DCHECK(!lit->IsUndetectableObject()); // There are no undetectable literals.
+ if (lit->IsUndefined() || lit->IsNull() || lit->IsFalse()) {
+ if (false_label_ != fall_through_) __ b(false_label_);
+ } else if (lit->IsTrue() || lit->IsJSObject()) {
+ if (true_label_ != fall_through_) __ b(true_label_);
+ } else if (lit->IsString()) {
+ if (String::cast(*lit)->length() == 0) {
+ if (false_label_ != fall_through_) __ b(false_label_);
+ } else {
+ if (true_label_ != fall_through_) __ b(true_label_);
+ }
+ } else if (lit->IsSmi()) {
+ if (Smi::cast(*lit)->value() == 0) {
+ if (false_label_ != fall_through_) __ b(false_label_);
+ } else {
+ if (true_label_ != fall_through_) __ b(true_label_);
+ }
+ } else {
+ // For simplicity we always test the accumulator register.
+ __ mov(result_register(), Operand(lit));
+ codegen()->DoTest(this);
+ }
+}
+
+
+void FullCodeGenerator::EffectContext::DropAndPlug(int count,
+ Register reg) const {
+ DCHECK(count > 0);
+ __ Drop(count);
+}
+
+
+void FullCodeGenerator::AccumulatorValueContext::DropAndPlug(
+ int count, Register reg) const {
+ DCHECK(count > 0);
+ __ Drop(count);
+ __ Move(result_register(), reg);
+}
+
+
+void FullCodeGenerator::StackValueContext::DropAndPlug(int count,
+ Register reg) const {
+ DCHECK(count > 0);
+ if (count > 1) __ Drop(count - 1);
+ __ StoreP(reg, MemOperand(sp, 0));
+}
+
+
+void FullCodeGenerator::TestContext::DropAndPlug(int count,
+ Register reg) const {
+ DCHECK(count > 0);
+ // For simplicity we always test the accumulator register.
+ __ Drop(count);
+ __ Move(result_register(), reg);
+ codegen()->PrepareForBailoutBeforeSplit(condition(), false, NULL, NULL);
+ codegen()->DoTest(this);
+}
+
+
+void FullCodeGenerator::EffectContext::Plug(Label* materialize_true,
+ Label* materialize_false) const {
+ DCHECK(materialize_true == materialize_false);
+ __ bind(materialize_true);
+}
+
+
+void FullCodeGenerator::AccumulatorValueContext::Plug(
+ Label* materialize_true, Label* materialize_false) const {
+ Label done;
+ __ bind(materialize_true);
+ __ LoadRoot(result_register(), Heap::kTrueValueRootIndex);
+ __ b(&done, Label::kNear);
+ __ bind(materialize_false);
+ __ LoadRoot(result_register(), Heap::kFalseValueRootIndex);
+ __ bind(&done);
+}
+
+
+void FullCodeGenerator::StackValueContext::Plug(
+ Label* materialize_true, Label* materialize_false) const {
+ Label done;
+ __ bind(materialize_true);
+ __ LoadRoot(ip, Heap::kTrueValueRootIndex);
+ __ b(&done, Label::kNear);
+ __ bind(materialize_false);
+ __ LoadRoot(ip, Heap::kFalseValueRootIndex);
+ __ bind(&done);
+ __ push(ip);
+}
+
+
+void FullCodeGenerator::TestContext::Plug(Label* materialize_true,
+ Label* materialize_false) const {
+ DCHECK(materialize_true == true_label_);
+ DCHECK(materialize_false == false_label_);
+}
+
+
+void FullCodeGenerator::EffectContext::Plug(bool flag) const {}
+
+
+void FullCodeGenerator::AccumulatorValueContext::Plug(bool flag) const {
+ Heap::RootListIndex value_root_index =
+ flag ? Heap::kTrueValueRootIndex : Heap::kFalseValueRootIndex;
+ __ LoadRoot(result_register(), value_root_index);
+}
+
+
+void FullCodeGenerator::StackValueContext::Plug(bool flag) const {
+ Heap::RootListIndex value_root_index =
+ flag ? Heap::kTrueValueRootIndex : Heap::kFalseValueRootIndex;
+ __ LoadRoot(ip, value_root_index);
+ __ push(ip);
+}
+
+
+void FullCodeGenerator::TestContext::Plug(bool flag) const {
+ codegen()->PrepareForBailoutBeforeSplit(condition(), true, true_label_,
+ false_label_);
+ if (flag) {
+ if (true_label_ != fall_through_) __ b(true_label_);
+ } else {
+ if (false_label_ != fall_through_) __ b(false_label_);
+ }
+}
+
+
+void FullCodeGenerator::DoTest(Expression* condition, Label* if_true,
+ Label* if_false, Label* fall_through) {
+ Handle<Code> ic = ToBooleanStub::GetUninitialized(isolate());
+ CallIC(ic, condition->test_id());
+ __ CmpP(result_register(), Operand::Zero());
+ Split(ne, if_true, if_false, fall_through);
+}
+
+
+void FullCodeGenerator::Split(Condition cond, Label* if_true, Label* if_false,
+ Label* fall_through, CRegister cr) {
+ if (if_false == fall_through) {
+ __ b(cond, if_true /*, cr*/);
+ } else if (if_true == fall_through) {
+ __ b(NegateCondition(cond), if_false /*, cr*/);
+ } else {
+ __ b(cond, if_true /*, cr*/);
+ __ b(if_false);
+ }
+}
+
+
+MemOperand FullCodeGenerator::StackOperand(Variable* var) {
+ DCHECK(var->IsStackAllocated());
+ // Offset is negative because higher indexes are at lower addresses.
+ int offset = -var->index() * kPointerSize;
+ // Adjust by a (parameter or local) base offset.
+ if (var->IsParameter()) {
+ offset += (info_->scope()->num_parameters() + 1) * kPointerSize;
+ } else {
+ offset += JavaScriptFrameConstants::kLocal0Offset;
+ }
+ return MemOperand(fp, offset);
+}
+
+
+MemOperand FullCodeGenerator::VarOperand(Variable* var, Register scratch) {
+ DCHECK(var->IsContextSlot() || var->IsStackAllocated());
+ if (var->IsContextSlot()) {
+ int context_chain_length = scope()->ContextChainLength(var->scope());
+ __ LoadContext(scratch, context_chain_length);
+ return ContextOperand(scratch, var->index());
+ } else {
+ return StackOperand(var);
+ }
+}
+
+
+void FullCodeGenerator::GetVar(Register dest, Variable* var) {
+ // Use destination as scratch.
+ MemOperand location = VarOperand(var, dest);
+ __ LoadP(dest, location, r0);
+}
+
+
+void FullCodeGenerator::SetVar(Variable* var, Register src, Register scratch0,
+ Register scratch1) {
+ DCHECK(var->IsContextSlot() || var->IsStackAllocated());
+ DCHECK(!scratch0.is(src));
+ DCHECK(!scratch0.is(scratch1));
+ DCHECK(!scratch1.is(src));
+ MemOperand location = VarOperand(var, scratch0);
+ __ StoreP(src, location);
+
+ // Emit the write barrier code if the location is in the heap.
+ if (var->IsContextSlot()) {
+ __ RecordWriteContextSlot(scratch0, location.offset(), src, scratch1,
+ kLRHasBeenSaved, kDontSaveFPRegs);
+ }
+}
+
+
+void FullCodeGenerator::PrepareForBailoutBeforeSplit(Expression* expr,
+ bool should_normalize,
+ Label* if_true,
+ Label* if_false) {
+ // Only prepare for bailouts before splits if we're in a test
+ // context. Otherwise, we let the Visit function deal with the
+ // preparation to avoid preparing with the same AST id twice.
+ if (!context()->IsTest() || !info_->IsOptimizable()) return;
+
+ Label skip;
+ if (should_normalize) __ b(&skip);
+ PrepareForBailout(expr, TOS_REG);
+ if (should_normalize) {
+ __ CompareRoot(r2, Heap::kTrueValueRootIndex);
+ Split(eq, if_true, if_false, NULL);
+ __ bind(&skip);
+ }
+}
+
+
+void FullCodeGenerator::EmitDebugCheckDeclarationContext(Variable* variable) {
+ // The variable in the declaration always resides in the current function
+ // context.
+ DCHECK_EQ(0, scope()->ContextChainLength(variable->scope()));
+ if (generate_debug_code_) {
+ // Check that we're not inside a with or catch context.
+ __ LoadP(r3, FieldMemOperand(cp, HeapObject::kMapOffset));
+ __ CompareRoot(r3, Heap::kWithContextMapRootIndex);
+ __ Check(ne, kDeclarationInWithContext);
+ __ CompareRoot(r3, Heap::kCatchContextMapRootIndex);
+ __ Check(ne, kDeclarationInCatchContext);
+ }
+}
+
+
+void FullCodeGenerator::VisitVariableDeclaration(
+ VariableDeclaration* declaration) {
+ // If it was not possible to allocate the variable at compile time, we
+ // need to "declare" it at runtime to make sure it actually exists in the
+ // local context.
+ VariableProxy* proxy = declaration->proxy();
+ VariableMode mode = declaration->mode();
+ Variable* variable = proxy->var();
+ bool hole_init = mode == LET || mode == CONST || mode == CONST_LEGACY;
+ switch (variable->location()) {
+ case VariableLocation::GLOBAL:
+ case VariableLocation::UNALLOCATED:
+ globals_->Add(variable->name(), zone());
+ globals_->Add(variable->binding_needs_init()
+ ? isolate()->factory()->the_hole_value()
+ : isolate()->factory()->undefined_value(),
+ zone());
+ break;
+
+ case VariableLocation::PARAMETER:
+ case VariableLocation::LOCAL:
+ if (hole_init) {
+ Comment cmnt(masm_, "[ VariableDeclaration");
+ __ LoadRoot(ip, Heap::kTheHoleValueRootIndex);
+ __ StoreP(ip, StackOperand(variable));
+ }
+ break;
+
+ case VariableLocation::CONTEXT:
+ if (hole_init) {
+ Comment cmnt(masm_, "[ VariableDeclaration");
+ EmitDebugCheckDeclarationContext(variable);
+ __ LoadRoot(ip, Heap::kTheHoleValueRootIndex);
+ __ StoreP(ip, ContextOperand(cp, variable->index()));
+ // No write barrier since the_hole_value is in old space.
+ PrepareForBailoutForId(proxy->id(), NO_REGISTERS);
+ }
+ break;
+
+ case VariableLocation::LOOKUP: {
+ Comment cmnt(masm_, "[ VariableDeclaration");
+ __ mov(r4, Operand(variable->name()));
+ // Declaration nodes are always introduced in one of four modes.
+ DCHECK(IsDeclaredVariableMode(mode));
+ PropertyAttributes attr =
+ IsImmutableVariableMode(mode) ? READ_ONLY : NONE;
+ __ LoadSmiLiteral(r3, Smi::FromInt(attr));
+ // Push initial value, if any.
+ // Note: For variables we must not push an initial value (such as
+ // 'undefined') because we may have a (legal) redeclaration and we
+ // must not destroy the current value.
+ if (hole_init) {
+ __ LoadRoot(r2, Heap::kTheHoleValueRootIndex);
+ __ Push(cp, r4, r3, r2);
+ } else {
+ __ LoadSmiLiteral(r2, Smi::FromInt(0)); // Indicate no initial value.
+ __ Push(cp, r4, r3, r2);
+ }
+ __ CallRuntime(Runtime::kDeclareLookupSlot, 4);
+ break;
+ }
+ }
+}
+
+
+void FullCodeGenerator::VisitFunctionDeclaration(
+ FunctionDeclaration* declaration) {
+ VariableProxy* proxy = declaration->proxy();
+ Variable* variable = proxy->var();
+ switch (variable->location()) {
+ case VariableLocation::GLOBAL:
+ case VariableLocation::UNALLOCATED: {
+ globals_->Add(variable->name(), zone());
+ Handle<SharedFunctionInfo> function =
+ Compiler::GetSharedFunctionInfo(declaration->fun(), script(), info_);
+ // Check for stack-overflow exception.
+ if (function.is_null()) return SetStackOverflow();
+ globals_->Add(function, zone());
+ break;
+ }
+
+ case VariableLocation::PARAMETER:
+ case VariableLocation::LOCAL: {
+ Comment cmnt(masm_, "[ FunctionDeclaration");
+ VisitForAccumulatorValue(declaration->fun());
+ __ StoreP(result_register(), StackOperand(variable));
+ break;
+ }
+
+ case VariableLocation::CONTEXT: {
+ Comment cmnt(masm_, "[ FunctionDeclaration");
+ EmitDebugCheckDeclarationContext(variable);
+ VisitForAccumulatorValue(declaration->fun());
+ __ StoreP(result_register(), ContextOperand(cp, variable->index()));
+ int offset = Context::SlotOffset(variable->index());
+ // We know that we have written a function, which is not a smi.
+ __ RecordWriteContextSlot(cp, offset, result_register(), r4,
+ kLRHasBeenSaved, kDontSaveFPRegs,
+ EMIT_REMEMBERED_SET, OMIT_SMI_CHECK);
+ PrepareForBailoutForId(proxy->id(), NO_REGISTERS);
+ break;
+ }
+
+ case VariableLocation::LOOKUP: {
+ Comment cmnt(masm_, "[ FunctionDeclaration");
+ __ mov(r4, Operand(variable->name()));
+ __ LoadSmiLiteral(r3, Smi::FromInt(NONE));
+ __ Push(cp, r4, r3);
+ // Push initial value for function declaration.
+ VisitForStackValue(declaration->fun());
+ __ CallRuntime(Runtime::kDeclareLookupSlot, 4);
+ break;
+ }
+ }
+}
+
+
+void FullCodeGenerator::VisitImportDeclaration(ImportDeclaration* declaration) {
+ VariableProxy* proxy = declaration->proxy();
+ Variable* variable = proxy->var();
+ switch (variable->location()) {
+ case VariableLocation::GLOBAL:
+ case VariableLocation::UNALLOCATED:
+ // TODO(rossberg)
+ break;
+
+ case VariableLocation::CONTEXT: {
+ Comment cmnt(masm_, "[ ImportDeclaration");
+ EmitDebugCheckDeclarationContext(variable);
+ // TODO(rossberg)
+ break;
+ }
+
+ case VariableLocation::PARAMETER:
+ case VariableLocation::LOCAL:
+ case VariableLocation::LOOKUP:
+ UNREACHABLE();
+ }
+}
+
+
+void FullCodeGenerator::VisitExportDeclaration(ExportDeclaration* declaration) {
+ // TODO(rossberg)
+}
+
+
+void FullCodeGenerator::DeclareGlobals(Handle<FixedArray> pairs) {
+ // Call the runtime to declare the globals.
+ // The context is the first argument.
+ __ mov(r3, Operand(pairs));
+ __ LoadSmiLiteral(r2, Smi::FromInt(DeclareGlobalsFlags()));
+ __ Push(cp, r3, r2);
+ __ CallRuntime(Runtime::kDeclareGlobals, 3);
+ // Return value is ignored.
+}
+
+
+void FullCodeGenerator::DeclareModules(Handle<FixedArray> descriptions) {
+ // Call the runtime to declare the modules.
+ __ Push(descriptions);
+ __ CallRuntime(Runtime::kDeclareModules, 1);
+ // Return value is ignored.
+}
+
+
+void FullCodeGenerator::VisitSwitchStatement(SwitchStatement* stmt) {
+ Comment cmnt(masm_, "[ SwitchStatement");
+ Breakable nested_statement(this, stmt);
+ SetStatementPosition(stmt);
+
+ // Keep the switch value on the stack until a case matches.
+ VisitForStackValue(stmt->tag());
+ PrepareForBailoutForId(stmt->EntryId(), NO_REGISTERS);
+
+ ZoneList<CaseClause*>* clauses = stmt->cases();
+ CaseClause* default_clause = NULL; // Can occur anywhere in the list.
+
+ Label next_test; // Recycled for each test.
+ // Compile all the tests with branches to their bodies.
+ for (int i = 0; i < clauses->length(); i++) {
+ CaseClause* clause = clauses->at(i);
+ clause->body_target()->Unuse();
+
+ // The default is not a test, but remember it as final fall through.
+ if (clause->is_default()) {
+ default_clause = clause;
+ continue;
+ }
+
+ Comment cmnt(masm_, "[ Case comparison");
+ __ bind(&next_test);
+ next_test.Unuse();
+
+ // Compile the label expression.
+ VisitForAccumulatorValue(clause->label());
+
+ // Perform the comparison as if via '==='.
+ __ LoadP(r3, MemOperand(sp, 0)); // Switch value.
+ bool inline_smi_code = ShouldInlineSmiCase(Token::EQ_STRICT);
+ JumpPatchSite patch_site(masm_);
+ if (inline_smi_code) {
+ Label slow_case;
+ __ LoadRR(r4, r2);
+ __ OrP(r4, r3);
+ patch_site.EmitJumpIfNotSmi(r4, &slow_case);
+
+ __ CmpP(r3, r2);
+ __ bne(&next_test);
+ __ Drop(1); // Switch value is no longer needed.
+ __ b(clause->body_target());
+ __ bind(&slow_case);
+ }
+
+ // Record position before stub call for type feedback.
+ SetExpressionPosition(clause);
+ Handle<Code> ic = CodeFactory::CompareIC(isolate(), Token::EQ_STRICT,
+ strength(language_mode())).code();
+ CallIC(ic, clause->CompareId());
+ patch_site.EmitPatchInfo();
+
+ Label skip;
+ __ b(&skip);
+ PrepareForBailout(clause, TOS_REG);
+ __ CompareRoot(r2, Heap::kTrueValueRootIndex);
+ __ bne(&next_test);
+ __ Drop(1);
+ __ b(clause->body_target());
+ __ bind(&skip);
+
+ __ CmpP(r2, Operand::Zero());
+ __ bne(&next_test);
+ __ Drop(1); // Switch value is no longer needed.
+ __ b(clause->body_target());
+ }
+
+ // Discard the test value and jump to the default if present, otherwise to
+ // the end of the statement.
+ __ bind(&next_test);
+ __ Drop(1); // Switch value is no longer needed.
+ if (default_clause == NULL) {
+ __ b(nested_statement.break_label());
+ } else {
+ __ b(default_clause->body_target());
+ }
+
+ // Compile all the case bodies.
+ for (int i = 0; i < clauses->length(); i++) {
+ Comment cmnt(masm_, "[ Case body");
+ CaseClause* clause = clauses->at(i);
+ __ bind(clause->body_target());
+ PrepareForBailoutForId(clause->EntryId(), NO_REGISTERS);
+ VisitStatements(clause->statements());
+ }
+
+ __ bind(nested_statement.break_label());
+ PrepareForBailoutForId(stmt->ExitId(), NO_REGISTERS);
+}
+
+
+void FullCodeGenerator::VisitForInStatement(ForInStatement* stmt) {
+ Comment cmnt(masm_, "[ ForInStatement");
+ SetStatementPosition(stmt, SKIP_BREAK);
+
+ FeedbackVectorSlot slot = stmt->ForInFeedbackSlot();
+
+ Label loop, exit;
+ ForIn loop_statement(this, stmt);
+ increment_loop_depth();
+
+ // Get the object to enumerate over. Both SpiderMonkey and JSC
+ // ignore null and undefined in contrast to the specification; see
+ // ECMA-262 section 12.6.4.
+ // Get the object to enumerate over. If the object is null or undefined, skip
+ // over the loop. See ECMA-262 version 5, section 12.6.4.
+ SetExpressionAsStatementPosition(stmt->enumerable());
+ VisitForAccumulatorValue(stmt->enumerable());
+ __ CompareRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ beq(&exit);
+ Register null_value = r6;
+ __ LoadRoot(null_value, Heap::kNullValueRootIndex);
+ __ CmpP(r2, null_value);
+ __ beq(&exit);
+
+ PrepareForBailoutForId(stmt->PrepareId(), TOS_REG);
+
+ // Convert the object to a JS object.
+ Label convert, done_convert;
+ __ JumpIfSmi(r2, &convert);
+ __ CompareObjectType(r2, r3, r3, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(&done_convert);
+ __ bind(&convert);
+ __ push(r2);
+ __ InvokeBuiltin(Builtins::TO_OBJECT, CALL_FUNCTION);
+ __ bind(&done_convert);
+ PrepareForBailoutForId(stmt->ToObjectId(), TOS_REG);
+ __ push(r2);
+
+ // Check for proxies.
+ Label call_runtime;
+ STATIC_ASSERT(FIRST_JS_PROXY_TYPE == FIRST_SPEC_OBJECT_TYPE);
+ __ CompareObjectType(r2, r3, r3, LAST_JS_PROXY_TYPE);
+ __ ble(&call_runtime);
+
+ // Check cache validity in generated code. This is a fast case for
+ // the JSObject::IsSimpleEnum cache validity checks. If we cannot
+ // guarantee cache validity, call the runtime system to check cache
+ // validity or get the property names in a fixed array.
+ __ CheckEnumCache(null_value, &call_runtime);
+
+ // The enum cache is valid. Load the map of the object being
+ // iterated over and use the cache for the iteration.
+ Label use_cache;
+ __ LoadP(r2, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ b(&use_cache);
+
+ // Get the set of properties to enumerate.
+ __ bind(&call_runtime);
+ __ push(r2); // Duplicate the enumerable object on the stack.
+ __ CallRuntime(Runtime::kGetPropertyNamesFast, 1);
+ PrepareForBailoutForId(stmt->EnumId(), TOS_REG);
+
+ // If we got a map from the runtime call, we can do a fast
+ // modification check. Otherwise, we got a fixed array, and we have
+ // to do a slow check.
+ Label fixed_array;
+ __ LoadP(r4, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ CompareRoot(r4, Heap::kMetaMapRootIndex);
+ __ bne(&fixed_array);
+
+ // We got a map in register r2. Get the enumeration cache from it.
+ Label no_descriptors;
+ __ bind(&use_cache);
+
+ __ EnumLength(r3, r2);
+ __ CmpSmiLiteral(r3, Smi::FromInt(0), r0);
+ __ beq(&no_descriptors, Label::kNear);
+
+ __ LoadInstanceDescriptors(r2, r4);
+ __ LoadP(r4, FieldMemOperand(r4, DescriptorArray::kEnumCacheOffset));
+ __ LoadP(r4,
+ FieldMemOperand(r4, DescriptorArray::kEnumCacheBridgeCacheOffset));
+
+ // Set up the four remaining stack slots.
+ __ push(r2); // Map.
+ __ LoadSmiLiteral(r2, Smi::FromInt(0));
+ // Push enumeration cache, enumeration cache length (as smi) and zero.
+ __ Push(r4, r3, r2);
+ __ b(&loop);
+
+ __ bind(&no_descriptors);
+ __ Drop(1);
+ __ b(&exit);
+
+ // We got a fixed array in register r2. Iterate through that.
+ Label non_proxy;
+ __ bind(&fixed_array);
+
+ __ Move(r3, FeedbackVector());
+ __ mov(r4, Operand(TypeFeedbackVector::MegamorphicSentinel(isolate())));
+ int vector_index = FeedbackVector()->GetIndex(slot);
+ __ StoreP(r4, FieldMemOperand(r3,
+ FixedArray::OffsetOfElementAt(vector_index)));
+
+ __ LoadSmiLiteral(r3, Smi::FromInt(1)); // Smi indicates slow check
+ __ LoadP(r4, MemOperand(sp, 0 * kPointerSize)); // Get enumerated object
+ STATIC_ASSERT(FIRST_JS_PROXY_TYPE == FIRST_SPEC_OBJECT_TYPE);
+ __ CompareObjectType(r4, r5, r5, LAST_JS_PROXY_TYPE);
+ __ bgt(&non_proxy, Label::kNear);
+ __ LoadSmiLiteral(r3, Smi::FromInt(0)); // Zero indicates proxy
+ __ bind(&non_proxy);
+ __ Push(r3, r2); // Smi and array
+ __ LoadP(r3, FieldMemOperand(r2, FixedArray::kLengthOffset));
+ __ LoadSmiLiteral(r2, Smi::FromInt(0));
+ __ Push(r3, r2); // Fixed array length (as smi) and initial index.
+
+ // Generate code for doing the condition check.
+ PrepareForBailoutForId(stmt->BodyId(), NO_REGISTERS);
+ __ bind(&loop);
+ SetExpressionAsStatementPosition(stmt->each());
+
+ // Load the current count to r2, load the length to r3.
+ __ LoadP(r2, MemOperand(sp, 0 * kPointerSize));
+ __ LoadP(r3, MemOperand(sp, 1 * kPointerSize));
+ __ CmpLogicalP(r2, r3); // Compare to the array length.
+ __ bge(loop_statement.break_label());
+
+ // Get the current entry of the array into register r5.
+ __ LoadP(r4, MemOperand(sp, 2 * kPointerSize));
+ __ AddP(r4, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ SmiToPtrArrayOffset(r5, r2);
+ __ LoadP(r5, MemOperand(r5, r4));
+
+ // Get the expected map from the stack or a smi in the
+ // permanent slow case into register r4.
+ __ LoadP(r4, MemOperand(sp, 3 * kPointerSize));
+
+ // Check if the expected map still matches that of the enumerable.
+ // If not, we may have to filter the key.
+ Label update_each;
+ __ LoadP(r3, MemOperand(sp, 4 * kPointerSize));
+ __ LoadP(r6, FieldMemOperand(r3, HeapObject::kMapOffset));
+ __ CmpP(r6, r4);
+ __ beq(&update_each);
+
+ // For proxies, no filtering is done.
+ // TODO(rossberg): What if only a prototype is a proxy? Not specified yet.
+ __ CmpSmiLiteral(r4, Smi::FromInt(0), r0);
+ __ beq(&update_each);
+
+ // Convert the entry to a string or (smi) 0 if it isn't a property
+ // any more. If the property has been removed while iterating, we
+ // just skip it.
+ __ Push(r3, r5); // Enumerable and current entry.
+ __ CallRuntime(Runtime::kForInFilter, 2);
+ PrepareForBailoutForId(stmt->FilterId(), TOS_REG);
+ __ LoadRR(r5, r2);
+ __ LoadRoot(r0, Heap::kUndefinedValueRootIndex);
+ __ CmpP(r2, r0);
+ __ beq(loop_statement.continue_label());
+
+ // Update the 'each' property or variable from the possibly filtered
+ // entry in register r5.
+ __ bind(&update_each);
+ __ LoadRR(result_register(), r5);
+ // Perform the assignment as if via '='.
+ {
+ EffectContext context(this);
+ EmitAssignment(stmt->each(), stmt->EachFeedbackSlot());
+ PrepareForBailoutForId(stmt->AssignmentId(), NO_REGISTERS);
+ }
+
+ // Generate code for the body of the loop.
+ Visit(stmt->body());
+
+ // Generate code for the going to the next element by incrementing
+ // the index (smi) stored on top of the stack.
+ __ bind(loop_statement.continue_label());
+ __ pop(r2);
+ __ AddSmiLiteral(r2, r2, Smi::FromInt(1), r0);
+ __ push(r2);
+
+ EmitBackEdgeBookkeeping(stmt, &loop);
+ __ b(&loop);
+
+ // Remove the pointers stored on the stack.
+ __ bind(loop_statement.break_label());
+ __ Drop(5);
+
+ // Exit and decrement the loop depth.
+ PrepareForBailoutForId(stmt->ExitId(), NO_REGISTERS);
+ __ bind(&exit);
+ decrement_loop_depth();
+}
+
+
+void FullCodeGenerator::EmitNewClosure(Handle<SharedFunctionInfo> info,
+ bool pretenure) {
+ // Use the fast case closure allocation code that allocates in new
+ // space for nested functions that don't need literals cloning. If
+ // we're running with the --always-opt or the --prepare-always-opt
+ // flag, we need to use the runtime function so that the new function
+ // we are creating here gets a chance to have its code optimized and
+ // doesn't just get a copy of the existing unoptimized code.
+ if (!FLAG_always_opt && !FLAG_prepare_always_opt && !pretenure &&
+ scope()->is_function_scope() && info->num_literals() == 0) {
+ FastNewClosureStub stub(isolate(), info->language_mode(), info->kind());
+ __ mov(r4, Operand(info));
+ __ CallStub(&stub);
+ } else {
+ __ mov(r2, Operand(info));
+ __ LoadRoot(
+ r3, pretenure ? Heap::kTrueValueRootIndex : Heap::kFalseValueRootIndex);
+ __ Push(cp, r2, r3);
+ __ CallRuntime(Runtime::kNewClosure, 3);
+ }
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::VisitVariableProxy(VariableProxy* expr) {
+ Comment cmnt(masm_, "[ VariableProxy");
+ EmitVariableLoad(expr);
+}
+
+
+void FullCodeGenerator::EmitSetHomeObjectIfNeeded(Expression* initializer,
+ int offset,
+ FeedbackVectorICSlot slot) {
+ if (NeedsHomeObject(initializer)) {
+ __ LoadP(StoreDescriptor::ReceiverRegister(), MemOperand(sp));
+ __ mov(StoreDescriptor::NameRegister(),
+ Operand(isolate()->factory()->home_object_symbol()));
+ __ LoadP(StoreDescriptor::ValueRegister(),
+ MemOperand(sp, offset * kPointerSize));
+ if (FLAG_vector_stores) EmitLoadStoreICSlot(slot);
+ CallStoreIC();
+ }
+}
+
+
+void FullCodeGenerator::EmitLoadGlobalCheckExtensions(VariableProxy* proxy,
+ TypeofState typeof_state,
+ Label* slow) {
+ Register current = cp;
+ Register next = r3;
+ Register temp = r4;
+
+ Scope* s = scope();
+ while (s != NULL) {
+ if (s->num_heap_slots() > 0) {
+ if (s->calls_sloppy_eval()) {
+ // Check that extension is NULL.
+ __ LoadP(temp, ContextOperand(current, Context::EXTENSION_INDEX));
+ __ CmpP(temp, Operand::Zero());
+ __ bne(slow);
+ }
+ // Load next context in chain.
+ __ LoadP(next, ContextOperand(current, Context::PREVIOUS_INDEX));
+ // Walk the rest of the chain without clobbering cp.
+ current = next;
+ }
+ // If no outer scope calls eval, we do not need to check more
+ // context extensions.
+ if (!s->outer_scope_calls_sloppy_eval() || s->is_eval_scope()) break;
+ s = s->outer_scope();
+ }
+
+ if (s->is_eval_scope()) {
+ Label loop, fast;
+ if (!current.is(next)) {
+ __ Move(next, current);
+ }
+ __ bind(&loop);
+ // Terminate at native context.
+ __ LoadP(temp, FieldMemOperand(next, HeapObject::kMapOffset));
+ __ CompareRoot(temp, Heap::kNativeContextMapRootIndex);
+ __ beq(&fast, Label::kNear);
+ // Check that extension is NULL.
+ __ LoadP(temp, ContextOperand(next, Context::EXTENSION_INDEX));
+ __ CmpP(temp, Operand::Zero());
+ __ bne(slow);
+ // Load next context in chain.
+ __ LoadP(next, ContextOperand(next, Context::PREVIOUS_INDEX));
+ __ b(&loop);
+ __ bind(&fast);
+ }
+
+ // All extension objects were empty and it is safe to use a normal global
+ // load machinery.
+ EmitGlobalVariableLoad(proxy, typeof_state);
+}
+
+
+MemOperand FullCodeGenerator::ContextSlotOperandCheckExtensions(Variable* var,
+ Label* slow) {
+ DCHECK(var->IsContextSlot());
+ Register context = cp;
+ Register next = r5;
+ Register temp = r6;
+
+ for (Scope* s = scope(); s != var->scope(); s = s->outer_scope()) {
+ if (s->num_heap_slots() > 0) {
+ if (s->calls_sloppy_eval()) {
+ // Check that extension is NULL.
+ __ LoadP(temp, ContextOperand(context, Context::EXTENSION_INDEX));
+ __ CmpP(temp, Operand::Zero());
+ __ bne(slow);
+ }
+ __ LoadP(next, ContextOperand(context, Context::PREVIOUS_INDEX));
+ // Walk the rest of the chain without clobbering cp.
+ context = next;
+ }
+ }
+ // Check that last extension is NULL.
+ __ LoadP(temp, ContextOperand(context, Context::EXTENSION_INDEX));
+ __ CmpP(temp, Operand::Zero());
+ __ bne(slow);
+
+ // This function is used only for loads, not stores, so it's safe to
+ // return an cp-based operand (the write barrier cannot be allowed to
+ // destroy the cp register).
+ return ContextOperand(context, var->index());
+}
+
+
+void FullCodeGenerator::EmitDynamicLookupFastCase(VariableProxy* proxy,
+ TypeofState typeof_state,
+ Label* slow, Label* done) {
+ // Generate fast-case code for variables that might be shadowed by
+ // eval-introduced variables. Eval is used a lot without
+ // introducing variables. In those cases, we do not want to
+ // perform a runtime call for all variables in the scope
+ // containing the eval.
+ Variable* var = proxy->var();
+ if (var->mode() == DYNAMIC_GLOBAL) {
+ EmitLoadGlobalCheckExtensions(proxy, typeof_state, slow);
+ __ b(done);
+ } else if (var->mode() == DYNAMIC_LOCAL) {
+ Variable* local = var->local_if_not_shadowed();
+ __ LoadP(r2, ContextSlotOperandCheckExtensions(local, slow));
+ if (local->mode() == LET || local->mode() == CONST ||
+ local->mode() == CONST_LEGACY) {
+ __ CompareRoot(r2, Heap::kTheHoleValueRootIndex);
+ __ bne(done);
+ if (local->mode() == CONST_LEGACY) {
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ } else { // LET || CONST
+ __ mov(r2, Operand(var->name()));
+ __ push(r2);
+ __ CallRuntime(Runtime::kThrowReferenceError, 1);
+ }
+ }
+ __ b(done);
+ }
+}
+
+
+void FullCodeGenerator::EmitGlobalVariableLoad(VariableProxy* proxy,
+ TypeofState typeof_state) {
+ Variable* var = proxy->var();
+ DCHECK(var->IsUnallocatedOrGlobalSlot() ||
+ (var->IsLookupSlot() && var->mode() == DYNAMIC_GLOBAL));
+ __ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand());
+ __ mov(LoadDescriptor::NameRegister(), Operand(var->name()));
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(proxy->VariableFeedbackSlot())));
+ // Inside typeof use a regular load, not a contextual load, to avoid
+ // a reference error.
+ CallLoadIC(typeof_state == NOT_INSIDE_TYPEOF ? CONTEXTUAL : NOT_CONTEXTUAL);
+}
+
+
+void FullCodeGenerator::EmitVariableLoad(VariableProxy* proxy,
+ TypeofState typeof_state) {
+ // Record position before possible IC call.
+ SetExpressionPosition(proxy);
+ PrepareForBailoutForId(proxy->BeforeId(), NO_REGISTERS);
+ Variable* var = proxy->var();
+
+ // Three cases: global variables, lookup variables, and all other types of
+ // variables.
+ switch (var->location()) {
+ case VariableLocation::GLOBAL:
+ case VariableLocation::UNALLOCATED: {
+ Comment cmnt(masm_, "[ Global variable");
+ EmitGlobalVariableLoad(proxy, typeof_state);
+ context()->Plug(r2);
+ break;
+ }
+
+ case VariableLocation::PARAMETER:
+ case VariableLocation::LOCAL:
+ case VariableLocation::CONTEXT: {
+ DCHECK_EQ(NOT_INSIDE_TYPEOF, typeof_state);
+ Comment cmnt(masm_, var->IsContextSlot() ? "[ Context variable"
+ : "[ Stack variable");
+ if (var->binding_needs_init()) {
+ // var->scope() may be NULL when the proxy is located in eval code and
+ // refers to a potential outside binding. Currently those bindings are
+ // always looked up dynamically, i.e. in that case
+ // var->location() == LOOKUP.
+ // always holds.
+ DCHECK(var->scope() != NULL);
+
+ // Check if the binding really needs an initialization check. The check
+ // can be skipped in the following situation: we have a LET or CONST
+ // binding in harmony mode, both the Variable and the VariableProxy have
+ // the same declaration scope (i.e. they are both in global code, in the
+ // same function or in the same eval code) and the VariableProxy is in
+ // the source physically located after the initializer of the variable.
+ //
+ // We cannot skip any initialization checks for CONST in non-harmony
+ // mode because const variables may be declared but never initialized:
+ // if (false) { const x; }; var y = x;
+ //
+ // The condition on the declaration scopes is a conservative check for
+ // nested functions that access a binding and are called before the
+ // binding is initialized:
+ // function() { f(); let x = 1; function f() { x = 2; } }
+ //
+ bool skip_init_check;
+ if (var->scope()->DeclarationScope() != scope()->DeclarationScope()) {
+ skip_init_check = false;
+ } else if (var->is_this()) {
+ CHECK(info_->function() != nullptr &&
+ (info_->function()->kind() & kSubclassConstructor) != 0);
+ // TODO(dslomov): implement 'this' hole check elimination.
+ skip_init_check = false;
+ } else {
+ // Check that we always have valid source position.
+ DCHECK(var->initializer_position() != RelocInfo::kNoPosition);
+ DCHECK(proxy->position() != RelocInfo::kNoPosition);
+ skip_init_check = var->mode() != CONST_LEGACY &&
+ var->initializer_position() < proxy->position();
+ }
+
+ if (!skip_init_check) {
+ Label done;
+ // Let and const need a read barrier.
+ GetVar(r2, var);
+ __ CompareRoot(r2, Heap::kTheHoleValueRootIndex);
+ __ bne(&done);
+ if (var->mode() == LET || var->mode() == CONST) {
+ // Throw a reference error when using an uninitialized let/const
+ // binding in harmony mode.
+ __ mov(r2, Operand(var->name()));
+ __ push(r2);
+ __ CallRuntime(Runtime::kThrowReferenceError, 1);
+ } else {
+ // Uninitalized const bindings outside of harmony mode are unholed.
+ DCHECK(var->mode() == CONST_LEGACY);
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ }
+ __ bind(&done);
+ context()->Plug(r2);
+ break;
+ }
+ }
+ context()->Plug(var);
+ break;
+ }
+
+ case VariableLocation::LOOKUP: {
+ Comment cmnt(masm_, "[ Lookup variable");
+ Label done, slow;
+ // Generate code for loading from variables potentially shadowed
+ // by eval-introduced variables.
+ EmitDynamicLookupFastCase(proxy, typeof_state, &slow, &done);
+ __ bind(&slow);
+ __ mov(r3, Operand(var->name()));
+ __ Push(cp, r3); // Context and name.
+ Runtime::FunctionId function_id =
+ typeof_state == NOT_INSIDE_TYPEOF
+ ? Runtime::kLoadLookupSlot
+ : Runtime::kLoadLookupSlotNoReferenceError;
+ __ CallRuntime(function_id, 2);
+ __ bind(&done);
+ context()->Plug(r2);
+ }
+ }
+}
+
+
+void FullCodeGenerator::VisitRegExpLiteral(RegExpLiteral* expr) {
+ Comment cmnt(masm_, "[ RegExpLiteral");
+ Label materialized;
+ // Registers will be used as follows:
+ // r7 = materialized value (RegExp literal)
+ // r6 = JS function, literals array
+ // r5 = literal index
+ // r4 = RegExp pattern
+ // r3 = RegExp flags
+ // r2 = RegExp literal clone
+ __ LoadP(r2, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadP(r6, FieldMemOperand(r2, JSFunction::kLiteralsOffset));
+ int literal_offset =
+ FixedArray::kHeaderSize + expr->literal_index() * kPointerSize;
+ __ LoadP(r7, FieldMemOperand(r6, literal_offset), r0);
+ __ CompareRoot(r7, Heap::kUndefinedValueRootIndex);
+ __ bne(&materialized);
+
+ // Create regexp literal using runtime function.
+ // Result will be in r2.
+ __ LoadSmiLiteral(r5, Smi::FromInt(expr->literal_index()));
+ __ mov(r4, Operand(expr->pattern()));
+ __ mov(r3, Operand(expr->flags()));
+ __ Push(r6, r5, r4, r3);
+ __ CallRuntime(Runtime::kMaterializeRegExpLiteral, 4);
+ __ LoadRR(r7, r2);
+
+ __ bind(&materialized);
+ int size = JSRegExp::kSize + JSRegExp::kInObjectFieldCount * kPointerSize;
+ Label allocated, runtime_allocate;
+ __ Allocate(size, r2, r4, r5, &runtime_allocate, TAG_OBJECT);
+ __ b(&allocated);
+
+ __ bind(&runtime_allocate);
+ __ LoadSmiLiteral(r2, Smi::FromInt(size));
+ __ Push(r7, r2);
+ __ CallRuntime(Runtime::kAllocateInNewSpace, 1);
+ __ pop(r7);
+
+ __ bind(&allocated);
+ // After this, registers are used as follows:
+ // r2: Newly allocated regexp.
+ // r7: Materialized regexp.
+ // r4: temp.
+ __ CopyFields(r2, r7, r4.bit(), size / kPointerSize);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitAccessor(Expression* expression) {
+ if (expression == NULL) {
+ __ LoadRoot(r3, Heap::kNullValueRootIndex);
+ __ push(r3);
+ } else {
+ VisitForStackValue(expression);
+ }
+}
+
+
+void FullCodeGenerator::VisitObjectLiteral(ObjectLiteral* expr) {
+ Comment cmnt(masm_, "[ ObjectLiteral");
+
+ Handle<FixedArray> constant_properties = expr->constant_properties();
+ __ LoadP(r5, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadP(r5, FieldMemOperand(r5, JSFunction::kLiteralsOffset));
+ __ LoadSmiLiteral(r4, Smi::FromInt(expr->literal_index()));
+ __ mov(r3, Operand(constant_properties));
+ int flags = expr->ComputeFlags();
+ __ LoadSmiLiteral(r2, Smi::FromInt(flags));
+ if (MustCreateObjectLiteralWithRuntime(expr)) {
+ __ Push(r5, r4, r3, r2);
+ __ CallRuntime(Runtime::kCreateObjectLiteral, 4);
+ } else {
+ FastCloneShallowObjectStub stub(isolate(), expr->properties_count());
+ __ CallStub(&stub);
+ }
+ PrepareForBailoutForId(expr->CreateLiteralId(), TOS_REG);
+
+ // If result_saved is true the result is on top of the stack. If
+ // result_saved is false the result is in r2.
+ bool result_saved = false;
+
+ AccessorTable accessor_table(zone());
+ int property_index = 0;
+ // store_slot_index points to the vector IC slot for the next store IC used.
+ // ObjectLiteral::ComputeFeedbackRequirements controls the allocation of slots
+ // and must be updated if the number of store ICs emitted here changes.
+ int store_slot_index = 0;
+ for (; property_index < expr->properties()->length(); property_index++) {
+ ObjectLiteral::Property* property = expr->properties()->at(property_index);
+ if (property->is_computed_name()) break;
+ if (property->IsCompileTimeValue()) continue;
+
+ Literal* key = property->key()->AsLiteral();
+ Expression* value = property->value();
+ if (!result_saved) {
+ __ push(r2); // Save result on stack
+ result_saved = true;
+ }
+ switch (property->kind()) {
+ case ObjectLiteral::Property::CONSTANT:
+ UNREACHABLE();
+ case ObjectLiteral::Property::MATERIALIZED_LITERAL:
+ DCHECK(!CompileTimeValue::IsCompileTimeValue(property->value()));
+ // Fall through.
+ case ObjectLiteral::Property::COMPUTED:
+ // It is safe to use [[Put]] here because the boilerplate already
+ // contains computed properties with an uninitialized value.
+ if (key->value()->IsInternalizedString()) {
+ if (property->emit_store()) {
+ VisitForAccumulatorValue(value);
+ DCHECK(StoreDescriptor::ValueRegister().is(r2));
+ __ mov(StoreDescriptor::NameRegister(), Operand(key->value()));
+ __ LoadP(StoreDescriptor::ReceiverRegister(), MemOperand(sp));
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->GetNthSlot(store_slot_index++));
+ CallStoreIC();
+ } else {
+ CallStoreIC(key->LiteralFeedbackId());
+ }
+ PrepareForBailoutForId(key->id(), NO_REGISTERS);
+
+ if (NeedsHomeObject(value)) {
+ __ Move(StoreDescriptor::ReceiverRegister(), r2);
+ __ mov(StoreDescriptor::NameRegister(),
+ Operand(isolate()->factory()->home_object_symbol()));
+ __ LoadP(StoreDescriptor::ValueRegister(), MemOperand(sp));
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->GetNthSlot(store_slot_index++));
+ }
+ CallStoreIC();
+ }
+ } else {
+ VisitForEffect(value);
+ }
+ break;
+ }
+ // Duplicate receiver on stack.
+ __ LoadP(r2, MemOperand(sp));
+ __ push(r2);
+ VisitForStackValue(key);
+ VisitForStackValue(value);
+ if (property->emit_store()) {
+ EmitSetHomeObjectIfNeeded(
+ value, 2, expr->SlotForHomeObject(value, &store_slot_index));
+ __ LoadSmiLiteral(r2, Smi::FromInt(SLOPPY)); // PropertyAttributes
+ __ push(r2);
+ __ CallRuntime(Runtime::kSetProperty, 4);
+ } else {
+ __ Drop(3);
+ }
+ break;
+ case ObjectLiteral::Property::PROTOTYPE:
+ // Duplicate receiver on stack.
+ __ LoadP(r2, MemOperand(sp));
+ __ push(r2);
+ VisitForStackValue(value);
+ DCHECK(property->emit_store());
+ __ CallRuntime(Runtime::kInternalSetPrototype, 2);
+ break;
+ case ObjectLiteral::Property::GETTER:
+ if (property->emit_store()) {
+ accessor_table.lookup(key)->second->getter = value;
+ }
+ break;
+ case ObjectLiteral::Property::SETTER:
+ if (property->emit_store()) {
+ accessor_table.lookup(key)->second->setter = value;
+ }
+ break;
+ }
+ }
+
+ // Emit code to define accessors, using only a single call to the runtime for
+ // each pair of corresponding getters and setters.
+ for (AccessorTable::Iterator it = accessor_table.begin();
+ it != accessor_table.end(); ++it) {
+ __ LoadP(r2, MemOperand(sp)); // Duplicate receiver.
+ __ push(r2);
+ VisitForStackValue(it->first);
+ EmitAccessor(it->second->getter);
+ EmitSetHomeObjectIfNeeded(
+ it->second->getter, 2,
+ expr->SlotForHomeObject(it->second->getter, &store_slot_index));
+ EmitAccessor(it->second->setter);
+ EmitSetHomeObjectIfNeeded(
+ it->second->setter, 3,
+ expr->SlotForHomeObject(it->second->setter, &store_slot_index));
+ __ LoadSmiLiteral(r2, Smi::FromInt(NONE));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineAccessorPropertyUnchecked, 5);
+ }
+
+ // Object literals have two parts. The "static" part on the left contains no
+ // computed property names, and so we can compute its map ahead of time; see
+ // runtime.cc::CreateObjectLiteralBoilerplate. The second "dynamic" part
+ // starts with the first computed property name, and continues with all
+ // properties to its right. All the code from above initializes the static
+ // component of the object literal, and arranges for the map of the result to
+ // reflect the static order in which the keys appear. For the dynamic
+ // properties, we compile them into a series of "SetOwnProperty" runtime
+ // calls. This will preserve insertion order.
+ for (; property_index < expr->properties()->length(); property_index++) {
+ ObjectLiteral::Property* property = expr->properties()->at(property_index);
+
+ Expression* value = property->value();
+ if (!result_saved) {
+ __ push(r2); // Save result on the stack
+ result_saved = true;
+ }
+
+ __ LoadP(r2, MemOperand(sp)); // Duplicate receiver.
+ __ push(r2);
+
+ if (property->kind() == ObjectLiteral::Property::PROTOTYPE) {
+ DCHECK(!property->is_computed_name());
+ VisitForStackValue(value);
+ DCHECK(property->emit_store());
+ __ CallRuntime(Runtime::kInternalSetPrototype, 2);
+ } else {
+ EmitPropertyKey(property, expr->GetIdForProperty(property_index));
+ VisitForStackValue(value);
+ EmitSetHomeObjectIfNeeded(
+ value, 2, expr->SlotForHomeObject(value, &store_slot_index));
+
+ switch (property->kind()) {
+ case ObjectLiteral::Property::CONSTANT:
+ case ObjectLiteral::Property::MATERIALIZED_LITERAL:
+ case ObjectLiteral::Property::COMPUTED:
+ if (property->emit_store()) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(NONE));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineDataPropertyUnchecked, 4);
+ } else {
+ __ Drop(3);
+ }
+ break;
+
+ case ObjectLiteral::Property::PROTOTYPE:
+ UNREACHABLE();
+ break;
+
+ case ObjectLiteral::Property::GETTER:
+ __ mov(r2, Operand(Smi::FromInt(NONE)));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineGetterPropertyUnchecked, 4);
+ break;
+
+ case ObjectLiteral::Property::SETTER:
+ __ mov(r2, Operand(Smi::FromInt(NONE)));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineSetterPropertyUnchecked, 4);
+ break;
+ }
+ }
+ }
+
+ if (expr->has_function()) {
+ DCHECK(result_saved);
+ __ LoadP(r2, MemOperand(sp));
+ __ push(r2);
+ __ CallRuntime(Runtime::kToFastProperties, 1);
+ }
+
+ if (result_saved) {
+ context()->PlugTOS();
+ } else {
+ context()->Plug(r2);
+ }
+
+ // Verify that compilation exactly consumed the number of store ic slots that
+ // the ObjectLiteral node had to offer.
+ DCHECK(!FLAG_vector_stores || store_slot_index == expr->slot_count());
+}
+
+
+void FullCodeGenerator::VisitArrayLiteral(ArrayLiteral* expr) {
+ Comment cmnt(masm_, "[ ArrayLiteral");
+
+ expr->BuildConstantElements(isolate());
+ Handle<FixedArray> constant_elements = expr->constant_elements();
+ bool has_fast_elements =
+ IsFastObjectElementsKind(expr->constant_elements_kind());
+ Handle<FixedArrayBase> constant_elements_values(
+ FixedArrayBase::cast(constant_elements->get(1)));
+
+ AllocationSiteMode allocation_site_mode = TRACK_ALLOCATION_SITE;
+ if (has_fast_elements && !FLAG_allocation_site_pretenuring) {
+ // If the only customer of allocation sites is transitioning, then
+ // we can turn it off if we don't have anywhere else to transition to.
+ allocation_site_mode = DONT_TRACK_ALLOCATION_SITE;
+ }
+
+ __ LoadP(r5, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ __ LoadP(r5, FieldMemOperand(r5, JSFunction::kLiteralsOffset));
+ __ LoadSmiLiteral(r4, Smi::FromInt(expr->literal_index()));
+ __ mov(r3, Operand(constant_elements));
+ if (MustCreateArrayLiteralWithRuntime(expr)) {
+ __ LoadSmiLiteral(r2, Smi::FromInt(expr->ComputeFlags()));
+ __ Push(r5, r4, r3, r2);
+ __ CallRuntime(Runtime::kCreateArrayLiteral, 4);
+ } else {
+ FastCloneShallowArrayStub stub(isolate(), allocation_site_mode);
+ __ CallStub(&stub);
+ }
+ PrepareForBailoutForId(expr->CreateLiteralId(), TOS_REG);
+
+ bool result_saved = false; // Is the result saved to the stack?
+ ZoneList<Expression*>* subexprs = expr->values();
+ int length = subexprs->length();
+
+ // Emit code to evaluate all the non-constant subexpressions and to store
+ // them into the newly cloned array.
+ int array_index = 0;
+ for (; array_index < length; array_index++) {
+ Expression* subexpr = subexprs->at(array_index);
+ if (subexpr->IsSpread()) break;
+ // If the subexpression is a literal or a simple materialized literal it
+ // is already set in the cloned array.
+ if (CompileTimeValue::IsCompileTimeValue(subexpr)) continue;
+
+ if (!result_saved) {
+ __ push(r2);
+ __ Push(Smi::FromInt(expr->literal_index()));
+ result_saved = true;
+ }
+ VisitForAccumulatorValue(subexpr);
+
+ if (has_fast_elements) {
+ int offset = FixedArray::kHeaderSize + (array_index * kPointerSize);
+ __ LoadP(r7, MemOperand(sp, kPointerSize)); // Copy of array literal.
+ __ LoadP(r3, FieldMemOperand(r7, JSObject::kElementsOffset));
+ __ StoreP(result_register(), FieldMemOperand(r3, offset));
+ // Update the write barrier for the array store.
+ __ RecordWriteField(r3, offset, result_register(), r4, kLRHasBeenSaved,
+ kDontSaveFPRegs, EMIT_REMEMBERED_SET,
+ INLINE_SMI_CHECK);
+ } else {
+ __ LoadSmiLiteral(r5, Smi::FromInt(array_index));
+ StoreArrayLiteralElementStub stub(isolate());
+ __ CallStub(&stub);
+ }
+
+ PrepareForBailoutForId(expr->GetIdForElement(array_index), NO_REGISTERS);
+ }
+
+ // In case the array literal contains spread expressions it has two parts. The
+ // first part is the "static" array which has a literal index is handled
+ // above. The second part is the part after the first spread expression
+ // (inclusive) and these elements gets appended to the array. Note that the
+ // number elements an iterable produces is unknown ahead of time.
+ if (array_index < length && result_saved) {
+ __ Drop(1); // literal index
+ __ Pop(r2);
+ result_saved = false;
+ }
+ for (; array_index < length; array_index++) {
+ Expression* subexpr = subexprs->at(array_index);
+
+ __ Push(r2);
+ if (subexpr->IsSpread()) {
+ VisitForStackValue(subexpr->AsSpread()->expression());
+ __ InvokeBuiltin(Builtins::CONCAT_ITERABLE_TO_ARRAY, CALL_FUNCTION);
+ } else {
+ VisitForStackValue(subexpr);
+ __ CallRuntime(Runtime::kAppendElement, 2);
+ }
+
+ PrepareForBailoutForId(expr->GetIdForElement(array_index), NO_REGISTERS);
+ }
+
+ if (result_saved) {
+ __ Drop(1); // literal index
+ context()->PlugTOS();
+ } else {
+ context()->Plug(r2);
+ }
+}
+
+
+void FullCodeGenerator::VisitAssignment(Assignment* expr) {
+ DCHECK(expr->target()->IsValidReferenceExpression());
+
+ Comment cmnt(masm_, "[ Assignment");
+ SetExpressionPosition(expr, INSERT_BREAK);
+
+ Property* property = expr->target()->AsProperty();
+ LhsKind assign_type = Property::GetAssignType(property);
+
+ // Evaluate LHS expression.
+ switch (assign_type) {
+ case VARIABLE:
+ // Nothing to do here.
+ break;
+ case NAMED_PROPERTY:
+ if (expr->is_compound()) {
+ // We need the receiver both on the stack and in the register.
+ VisitForStackValue(property->obj());
+ __ LoadP(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0));
+ } else {
+ VisitForStackValue(property->obj());
+ }
+ break;
+ case NAMED_SUPER_PROPERTY:
+ VisitForStackValue(
+ property->obj()->AsSuperPropertyReference()->this_var());
+ VisitForAccumulatorValue(
+ property->obj()->AsSuperPropertyReference()->home_object());
+ __ Push(result_register());
+ if (expr->is_compound()) {
+ const Register scratch = r3;
+ __ LoadP(scratch, MemOperand(sp, kPointerSize));
+ __ Push(scratch, result_register());
+ }
+ break;
+ case KEYED_SUPER_PROPERTY: {
+ const Register scratch = r3;
+ VisitForStackValue(
+ property->obj()->AsSuperPropertyReference()->this_var());
+ VisitForAccumulatorValue(
+ property->obj()->AsSuperPropertyReference()->home_object());
+ __ LoadRR(scratch, result_register());
+ VisitForAccumulatorValue(property->key());
+ __ Push(scratch, result_register());
+ if (expr->is_compound()) {
+ const Register scratch1 = r4;
+ __ LoadP(scratch1, MemOperand(sp, 2 * kPointerSize));
+ __ Push(scratch1, scratch, result_register());
+ }
+ break;
+ }
+ case KEYED_PROPERTY:
+ if (expr->is_compound()) {
+ VisitForStackValue(property->obj());
+ VisitForStackValue(property->key());
+ __ LoadP(LoadDescriptor::ReceiverRegister(),
+ MemOperand(sp, 1 * kPointerSize));
+ __ LoadP(LoadDescriptor::NameRegister(), MemOperand(sp, 0));
+ } else {
+ VisitForStackValue(property->obj());
+ VisitForStackValue(property->key());
+ }
+ break;
+ }
+
+ // For compound assignments we need another deoptimization point after the
+ // variable/property load.
+ if (expr->is_compound()) {
+ {
+ AccumulatorValueContext context(this);
+ switch (assign_type) {
+ case VARIABLE:
+ EmitVariableLoad(expr->target()->AsVariableProxy());
+ PrepareForBailout(expr->target(), TOS_REG);
+ break;
+ case NAMED_PROPERTY:
+ EmitNamedPropertyLoad(property);
+ PrepareForBailoutForId(property->LoadId(), TOS_REG);
+ break;
+ case NAMED_SUPER_PROPERTY:
+ EmitNamedSuperPropertyLoad(property);
+ PrepareForBailoutForId(property->LoadId(), TOS_REG);
+ break;
+ case KEYED_SUPER_PROPERTY:
+ EmitKeyedSuperPropertyLoad(property);
+ PrepareForBailoutForId(property->LoadId(), TOS_REG);
+ break;
+ case KEYED_PROPERTY:
+ EmitKeyedPropertyLoad(property);
+ PrepareForBailoutForId(property->LoadId(), TOS_REG);
+ break;
+ }
+ }
+
+ Token::Value op = expr->binary_op();
+ __ push(r2); // Left operand goes on the stack.
+ VisitForAccumulatorValue(expr->value());
+
+ AccumulatorValueContext context(this);
+ if (ShouldInlineSmiCase(op)) {
+ EmitInlineSmiBinaryOp(expr->binary_operation(), op, expr->target(),
+ expr->value());
+ } else {
+ EmitBinaryOp(expr->binary_operation(), op);
+ }
+
+ // Deoptimization point in case the binary operation may have side effects.
+ PrepareForBailout(expr->binary_operation(), TOS_REG);
+ } else {
+ VisitForAccumulatorValue(expr->value());
+ }
+
+ SetExpressionPosition(expr);
+
+ // Store the value.
+ switch (assign_type) {
+ case VARIABLE:
+ EmitVariableAssignment(expr->target()->AsVariableProxy()->var(),
+ expr->op(), expr->AssignmentSlot());
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ context()->Plug(r2);
+ break;
+ case NAMED_PROPERTY:
+ EmitNamedPropertyAssignment(expr);
+ break;
+ case NAMED_SUPER_PROPERTY:
+ EmitNamedSuperPropertyStore(property);
+ context()->Plug(r2);
+ break;
+ case KEYED_SUPER_PROPERTY:
+ EmitKeyedSuperPropertyStore(property);
+ context()->Plug(r2);
+ break;
+ case KEYED_PROPERTY:
+ EmitKeyedPropertyAssignment(expr);
+ break;
+ }
+}
+
+
+void FullCodeGenerator::VisitYield(Yield* expr) {
+ Comment cmnt(masm_, "[ Yield");
+ SetExpressionPosition(expr);
+
+ // Evaluate yielded value first; the initial iterator definition depends on
+ // this. It stays on the stack while we update the iterator.
+ VisitForStackValue(expr->expression());
+
+ switch (expr->yield_kind()) {
+ case Yield::kSuspend:
+ // Pop value from top-of-stack slot; box result into result register.
+ EmitCreateIteratorResult(false);
+ __ push(result_register());
+ // Fall through.
+ case Yield::kInitial: {
+ Label suspend, continuation, post_runtime, resume;
+
+ __ b(&suspend, Label::kNear);
+
+ __ bind(&continuation);
+ __ b(&resume);
+
+ __ bind(&suspend);
+ VisitForAccumulatorValue(expr->generator_object());
+ DCHECK(continuation.pos() > 0 && Smi::IsValid(continuation.pos()));
+ __ LoadSmiLiteral(r3, Smi::FromInt(continuation.pos()));
+ __ StoreP(r3, FieldMemOperand(r2,
+ JSGeneratorObject::kContinuationOffset));
+ __ StoreP(cp, FieldMemOperand(r2,
+ JSGeneratorObject::kContextOffset));
+ __ LoadRR(r3, cp);
+ __ RecordWriteField(r2, JSGeneratorObject::kContextOffset, r3, r4,
+ kLRHasBeenSaved, kDontSaveFPRegs);
+ __ AddP(r3, fp, Operand(StandardFrameConstants::kExpressionsOffset));
+ __ CmpP(sp, r3);
+ __ beq(&post_runtime);
+ __ push(r2); // generator object
+ __ CallRuntime(Runtime::kSuspendJSGeneratorObject, 1);
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ bind(&post_runtime);
+ __ pop(result_register());
+ EmitReturnSequence();
+
+ __ bind(&resume);
+ context()->Plug(result_register());
+ break;
+ }
+
+ case Yield::kFinal: {
+ VisitForAccumulatorValue(expr->generator_object());
+ __ LoadSmiLiteral(r3, Smi::FromInt(JSGeneratorObject::kGeneratorClosed));
+ __ StoreP(r3, FieldMemOperand(result_register(),
+ JSGeneratorObject::kContinuationOffset));
+ // Pop value from top-of-stack slot, box result into result register.
+ EmitCreateIteratorResult(true);
+ EmitUnwindBeforeReturn();
+ EmitReturnSequence();
+ break;
+ }
+
+ case Yield::kDelegating: {
+ VisitForStackValue(expr->generator_object());
+
+ // Initial stack layout is as follows:
+ // [sp + 1 * kPointerSize] iter
+ // [sp + 0 * kPointerSize] g
+
+ Label l_catch, l_try, l_suspend, l_continuation, l_resume;
+ Label l_next, l_call;
+ Register load_receiver = LoadDescriptor::ReceiverRegister();
+ Register load_name = LoadDescriptor::NameRegister();
+
+ // Initial send value is undefined.
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ b(&l_next);
+
+ // catch (e) { receiver = iter; f = 'throw'; arg = e; goto l_call; }
+ __ bind(&l_catch);
+ __ LoadRoot(load_name, Heap::kthrow_stringRootIndex); // "throw"
+ __ LoadP(r5, MemOperand(sp, 1 * kPointerSize)); // iter
+ __ Push(load_name, r5, r2); // "throw", iter, except
+ __ b(&l_call);
+
+ // try { received = %yield result }
+ // Shuffle the received result above a try handler and yield it without
+ // re-boxing.
+ __ bind(&l_try);
+ __ pop(r2); // result
+ int handler_index = NewHandlerTableEntry();
+ EnterTryBlock(handler_index, &l_catch);
+ const int try_block_size = TryCatch::kElementCount * kPointerSize;
+ __ push(r2); // result
+ __ b(&l_suspend, Label::kNear);
+ __ bind(&l_continuation);
+ __ b(&l_resume);
+ __ bind(&l_suspend);
+ const int generator_object_depth = kPointerSize + try_block_size;
+ __ LoadP(r2, MemOperand(sp, generator_object_depth));
+ __ push(r2); // g
+ __ Push(Smi::FromInt(handler_index)); // handler-index
+ DCHECK(l_continuation.pos() > 0 && Smi::IsValid(l_continuation.pos()));
+ __ LoadSmiLiteral(r3, Smi::FromInt(l_continuation.pos()));
+ __ StoreP(r3, FieldMemOperand(r2,
+ JSGeneratorObject::kContinuationOffset));
+ __ StoreP(cp, FieldMemOperand(r2, JSGeneratorObject::kContextOffset));
+ __ LoadRR(r3, cp);
+ __ RecordWriteField(r2, JSGeneratorObject::kContextOffset, r3, r4,
+ kLRHasBeenSaved, kDontSaveFPRegs);
+ __ CallRuntime(Runtime::kSuspendJSGeneratorObject, 2);
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ pop(r2); // result
+ EmitReturnSequence();
+ __ bind(&l_resume); // received in r2
+ ExitTryBlock(handler_index);
+
+ // receiver = iter; f = 'next'; arg = received;
+ __ bind(&l_next);
+
+ __ LoadRoot(load_name, Heap::knext_stringRootIndex); // "next"
+ __ LoadP(r5, MemOperand(sp, 1 * kPointerSize)); // iter
+ __ Push(load_name, r5, r2); // "next", iter, received
+
+ // result = receiver[f](arg);
+ __ bind(&l_call);
+ __ LoadP(load_receiver, MemOperand(sp, kPointerSize));
+ __ LoadP(load_name, MemOperand(sp, 2 * kPointerSize));
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(expr->KeyedLoadFeedbackSlot())));
+ Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate(), SLOPPY).code();
+ CallIC(ic, TypeFeedbackId::None());
+ __ LoadRR(r3, r2);
+ __ StoreP(r3, MemOperand(sp, 2 * kPointerSize));
+ CallFunctionStub stub(isolate(), 1, CALL_AS_METHOD);
+ __ CallStub(&stub);
+
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ Drop(1); // The function is still on the stack; drop it.
+
+ // if (!result.done) goto l_try;
+ __ Move(load_receiver, r2);
+
+ __ push(load_receiver); // save result
+ __ LoadRoot(load_name, Heap::kdone_stringRootIndex); // "done"
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(expr->DoneFeedbackSlot())));
+ CallLoadIC(NOT_CONTEXTUAL); // r0=result.done
+ Handle<Code> bool_ic = ToBooleanStub::GetUninitialized(isolate());
+ CallIC(bool_ic);
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&l_try);
+
+ // result.value
+ __ pop(load_receiver); // result
+ __ LoadRoot(load_name, Heap::kvalue_stringRootIndex); // "value"
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(expr->ValueFeedbackSlot())));
+ CallLoadIC(NOT_CONTEXTUAL); // r2=result.value
+ context()->DropAndPlug(2, r2); // drop iter and g
+ break;
+ }
+ }
+}
+
+
+void FullCodeGenerator::EmitGeneratorResume(
+ Expression* generator, Expression* value,
+ JSGeneratorObject::ResumeMode resume_mode) {
+ // The value stays in r2, and is ultimately read by the resumed generator, as
+ // if CallRuntime(Runtime::kSuspendJSGeneratorObject) returned it. Or it
+ // is read to throw the value when the resumed generator is already closed.
+ // r3 will hold the generator object until the activation has been resumed.
+ VisitForStackValue(generator);
+ VisitForAccumulatorValue(value);
+ __ pop(r3);
+
+ // Load suspended function and context.
+ __ LoadP(cp, FieldMemOperand(r3, JSGeneratorObject::kContextOffset));
+ __ LoadP(r6, FieldMemOperand(r3, JSGeneratorObject::kFunctionOffset));
+
+ // Load receiver and store as the first argument.
+ __ LoadP(r4, FieldMemOperand(r3, JSGeneratorObject::kReceiverOffset));
+ __ push(r4);
+
+ // Push holes for the rest of the arguments to the generator function.
+ __ LoadP(r5, FieldMemOperand(r6, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadW(
+ r5, FieldMemOperand(r5, SharedFunctionInfo::kFormalParameterCountOffset));
+ __ LoadRoot(r4, Heap::kTheHoleValueRootIndex);
+ Label argument_loop, push_frame;
+#if V8_TARGET_ARCH_S390X
+ __ CmpP(r5, Operand::Zero());
+ __ beq(&push_frame, Label::kNear);
+#else
+ __ SmiUntag(r5);
+ __ beq(&push_frame, Label::kNear);
+#endif
+ __ LoadRR(r0, r5);
+ __ bind(&argument_loop);
+ __ push(r4);
+ __ SubP(r0, Operand(1));
+ __ bne(&argument_loop);
+
+ // Enter a new JavaScript frame, and initialize its slots as they were when
+ // the generator was suspended.
+ Label resume_frame, done;
+ __ bind(&push_frame);
+ __ b(r14, &resume_frame); // brasl
+ __ b(&done);
+ __ bind(&resume_frame);
+ // lr = return address.
+ // fp = caller's frame pointer.
+ // cp = callee's context,
+ // r6 = callee's JS function.
+ __ PushFixedFrame(r6);
+ // Adjust FP to point to saved FP.
+ __ lay(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+
+ // Load the operand stack size.
+ __ LoadP(r5, FieldMemOperand(r3, JSGeneratorObject::kOperandStackOffset));
+ __ LoadP(r5, FieldMemOperand(r5, FixedArray::kLengthOffset));
+ __ SmiUntag(r5);
+
+ // If we are sending a value and there is no operand stack, we can jump back
+ // in directly.
+ Label call_resume;
+ if (resume_mode == JSGeneratorObject::NEXT) {
+ Label slow_resume;
+ __ bne(&slow_resume, Label::kNear);
+ __ LoadP(ip, FieldMemOperand(r6, JSFunction::kCodeEntryOffset));
+ __ LoadP(r4, FieldMemOperand(r3, JSGeneratorObject::kContinuationOffset));
+ __ SmiUntag(r4);
+ __ AddP(ip, ip, r4);
+ __ LoadSmiLiteral(r4,
+ Smi::FromInt(JSGeneratorObject::kGeneratorExecuting));
+ __ StoreP(r4, FieldMemOperand(r3,
+ JSGeneratorObject::kContinuationOffset));
+ __ Jump(ip);
+ __ bind(&slow_resume);
+ } else {
+ __ beq(&call_resume);
+ }
+
+ // Otherwise, we push holes for the operand stack and call the runtime to fix
+ // up the stack and the handlers.
+ Label operand_loop;
+ __ LoadRR(r0, r5);
+ __ bind(&operand_loop);
+ __ push(r4);
+ __ SubP(r0, Operand(1));
+ __ bne(&operand_loop);
+
+ __ bind(&call_resume);
+ DCHECK(!result_register().is(r3));
+ __ Push(r3, result_register());
+ __ Push(Smi::FromInt(resume_mode));
+ __ CallRuntime(Runtime::kResumeJSGeneratorObject, 3);
+ // Not reached: the runtime call returns elsewhere.
+ __ stop("not-reached");
+
+ __ bind(&done);
+ context()->Plug(result_register());
+}
+
+
+void FullCodeGenerator::EmitCreateIteratorResult(bool done) {
+ Label gc_required;
+ Label allocated;
+
+ const int instance_size = 5 * kPointerSize;
+ DCHECK_EQ(isolate()->native_context()->iterator_result_map()->instance_size(),
+ instance_size);
+
+ __ Allocate(instance_size, r2, r4, r5, &gc_required, TAG_OBJECT);
+ __ b(&allocated);
+
+ __ bind(&gc_required);
+ __ Push(Smi::FromInt(instance_size));
+ __ CallRuntime(Runtime::kAllocateInNewSpace, 1);
+ __ LoadP(context_register(),
+ MemOperand(fp, StandardFrameConstants::kContextOffset));
+
+ __ bind(&allocated);
+ __ LoadP(r3, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(r3, FieldMemOperand(r3, GlobalObject::kNativeContextOffset));
+ __ LoadP(r3, ContextOperand(r3, Context::ITERATOR_RESULT_MAP_INDEX));
+ __ pop(r4);
+ __ mov(r5, Operand(isolate()->factory()->ToBoolean(done)));
+ __ mov(r6, Operand(isolate()->factory()->empty_fixed_array()));
+ __ StoreP(r3, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kPropertiesOffset));
+ __ StoreP(r6, FieldMemOperand(r2, JSObject::kElementsOffset));
+ __ StoreP(r4,
+ FieldMemOperand(r2, JSGeneratorObject::kResultValuePropertyOffset));
+ __ StoreP(r5,
+ FieldMemOperand(r2, JSGeneratorObject::kResultDonePropertyOffset));
+
+ // Only the value field needs a write barrier, as the other values are in the
+ // root set.
+ __ RecordWriteField(r2, JSGeneratorObject::kResultValuePropertyOffset, r4,
+ r5, kLRHasBeenSaved, kDontSaveFPRegs);
+}
+
+
+void FullCodeGenerator::EmitNamedPropertyLoad(Property* prop) {
+ SetExpressionPosition(prop);
+ Literal* key = prop->key()->AsLiteral();
+ DCHECK(!prop->IsSuperAccess());
+
+ __ mov(LoadDescriptor::NameRegister(), Operand(key->value()));
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(prop->PropertyFeedbackSlot())));
+ CallLoadIC(NOT_CONTEXTUAL, language_mode());
+}
+
+
+void FullCodeGenerator::EmitNamedSuperPropertyLoad(Property* prop) {
+ // Stack: receiver, home_object.
+ SetExpressionPosition(prop);
+ Literal* key = prop->key()->AsLiteral();
+ DCHECK(!key->value()->IsSmi());
+ DCHECK(prop->IsSuperAccess());
+
+ __ Push(key->value());
+ __ Push(Smi::FromInt(language_mode()));
+ __ CallRuntime(Runtime::kLoadFromSuper, 4);
+}
+
+
+void FullCodeGenerator::EmitKeyedPropertyLoad(Property* prop) {
+ SetExpressionPosition(prop);
+ Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate(), language_mode()).code();
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(prop->PropertyFeedbackSlot())));
+ CallIC(ic);
+}
+
+
+void FullCodeGenerator::EmitKeyedSuperPropertyLoad(Property* prop) {
+ // Stack: receiver, home_object, key.
+ SetExpressionPosition(prop);
+ __ Push(Smi::FromInt(language_mode()));
+ __ CallRuntime(Runtime::kLoadKeyedFromSuper, 4);
+}
+
+
+void FullCodeGenerator::EmitInlineSmiBinaryOp(BinaryOperation* expr,
+ Token::Value op,
+ Expression* left_expr,
+ Expression* right_expr) {
+ Label done, smi_case, stub_call;
+
+ Register scratch1 = r4;
+ Register scratch2 = r5;
+
+ // Get the arguments.
+ Register left = r3;
+ Register right = r2;
+ __ pop(left);
+
+ // Perform combined smi check on both operands.
+ __ LoadRR(scratch1, right);
+ __ OrP(scratch1, left);
+ STATIC_ASSERT(kSmiTag == 0);
+ JumpPatchSite patch_site(masm_);
+ patch_site.EmitJumpIfSmi(scratch1, &smi_case);
+
+ __ bind(&stub_call);
+ Handle<Code> code =
+ CodeFactory::BinaryOpIC(isolate(), op, strength(language_mode())).code();
+ CallIC(code, expr->BinaryOperationFeedbackId());
+ patch_site.EmitPatchInfo();
+ __ b(&done);
+
+ __ bind(&smi_case);
+ // Smi case. This code works the same way as the smi-smi case in the type
+ // recording binary operation stub.
+ switch (op) {
+ case Token::SAR:
+ __ GetLeastBitsFromSmi(scratch1, right, 5);
+ __ ShiftRightArithP(right, left, scratch1);
+ __ ClearRightImm(right, right, Operand(kSmiTagSize + kSmiShiftSize));
+ break;
+ case Token::SHL: {
+ __ GetLeastBitsFromSmi(scratch2, right, 5);
+#if V8_TARGET_ARCH_S390X
+ __ ShiftLeftP(right, left, scratch2);
+#else
+ __ SmiUntag(scratch1, left);
+ __ ShiftLeftP(scratch1, scratch1, scratch2);
+ // Check that the *signed* result fits in a smi
+ __ JumpIfNotSmiCandidate(scratch1, scratch2, &stub_call);
+ __ SmiTag(right, scratch1);
+#endif
+ break;
+ }
+ case Token::SHR: {
+ __ SmiUntag(scratch1, left);
+ __ GetLeastBitsFromSmi(scratch2, right, 5);
+ __ srl(scratch1, scratch2);
+ // Unsigned shift is not allowed to produce a negative number.
+ __ JumpIfNotUnsignedSmiCandidate(scratch1, r0, &stub_call);
+ __ SmiTag(right, scratch1);
+ break;
+ }
+ case Token::ADD: {
+ __ AddAndCheckForOverflow(scratch1, left, right, scratch2, r0);
+ __ BranchOnOverflow(&stub_call);
+ __ LoadRR(right, scratch1);
+ break;
+ }
+ case Token::SUB: {
+ __ SubAndCheckForOverflow(scratch1, left, right, scratch2, r0);
+ __ BranchOnOverflow(&stub_call);
+ __ LoadRR(right, scratch1);
+ break;
+ }
+ case Token::MUL: {
+ Label mul_zero;
+#if V8_TARGET_ARCH_S390X
+ // Remove tag from both operands.
+ __ SmiUntag(ip, right);
+ __ SmiUntag(scratch2, left);
+ __ mr_z(scratch1, ip);
+ // Check for overflowing the smi range - no overflow if higher 33 bits of
+ // the result are identical.
+ __ lr(ip, scratch2); // 32 bit load
+ __ sra(ip, Operand(31));
+ __ cr_z(ip, scratch1); // 32 bit compare
+ // TODO(JOHN): The above 3 instr expended from 31-bit TestIfInt32
+ // __ TestIfInt32(scratch2, scratch1, ip);
+ __ bne(&stub_call);
+#else
+ __ SmiUntag(ip, right);
+ __ LoadRR(scratch2, left); // load into low order of reg pair
+ __ mr_z(scratch1, ip); // R4:R5 = R5 * ip
+ // Check for overflowing the smi range - no overflow if higher 33 bits of
+ // the result are identical.
+ __ TestIfInt32(scratch1, scratch2, ip);
+ __ bne(&stub_call);
+#endif
+ // Go slow on zero result to handle -0.
+ __ chi(scratch2, Operand::Zero());
+ __ beq(&mul_zero, Label::kNear);
+#if V8_TARGET_ARCH_S390X
+ __ SmiTag(right, scratch2);
+#else
+ __ LoadRR(right, scratch2);
+#endif
+ __ b(&done);
+ // We need -0 if we were multiplying a negative number with 0 to get 0.
+ // We know one of them was zero.
+ __ bind(&mul_zero);
+ __ AddP(scratch2, right, left);
+ __ CmpP(scratch2, Operand::Zero());
+ __ blt(&stub_call);
+ __ LoadSmiLiteral(right, Smi::FromInt(0));
+ break;
+ }
+ case Token::BIT_OR:
+ __ OrP(right, left);
+ break;
+ case Token::BIT_AND:
+ __ AndP(right, left);
+ break;
+ case Token::BIT_XOR:
+ __ XorP(right, left);
+ break;
+ default:
+ UNREACHABLE();
+ }
+
+ __ bind(&done);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitClassDefineProperties(ClassLiteral* lit,
+ int* used_store_slots) {
+ // Constructor is in r2.
+ DCHECK(lit != NULL);
+ __ push(r2);
+
+ // No access check is needed here since the constructor is created by the
+ // class literal.
+ Register scratch = r3;
+ __ LoadP(scratch,
+ FieldMemOperand(r2, JSFunction::kPrototypeOrInitialMapOffset));
+ __ push(scratch);
+
+ for (int i = 0; i < lit->properties()->length(); i++) {
+ ObjectLiteral::Property* property = lit->properties()->at(i);
+ Expression* value = property->value();
+
+ if (property->is_static()) {
+ __ LoadP(scratch, MemOperand(sp, kPointerSize)); // constructor
+ } else {
+ __ LoadP(scratch, MemOperand(sp, 0)); // prototype
+ }
+ __ push(scratch);
+ EmitPropertyKey(property, lit->GetIdForProperty(i));
+
+ // The static prototype property is read only. We handle the non computed
+ // property name case in the parser. Since this is the only case where we
+ // need to check for an own read only property we special case this so we do
+ // not need to do this for every property.
+ if (property->is_static() && property->is_computed_name()) {
+ __ CallRuntime(Runtime::kThrowIfStaticPrototype, 1);
+ __ push(r2);
+ }
+
+ VisitForStackValue(value);
+ EmitSetHomeObjectIfNeeded(value, 2,
+ lit->SlotForHomeObject(value, used_store_slots));
+
+ switch (property->kind()) {
+ case ObjectLiteral::Property::CONSTANT:
+ case ObjectLiteral::Property::MATERIALIZED_LITERAL:
+ case ObjectLiteral::Property::PROTOTYPE:
+ UNREACHABLE();
+ case ObjectLiteral::Property::COMPUTED:
+ __ CallRuntime(Runtime::kDefineClassMethod, 3);
+ break;
+
+ case ObjectLiteral::Property::GETTER:
+ __ mov(r2, Operand(Smi::FromInt(DONT_ENUM)));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineGetterPropertyUnchecked, 4);
+ break;
+
+ case ObjectLiteral::Property::SETTER:
+ __ mov(r2, Operand(Smi::FromInt(DONT_ENUM)));
+ __ push(r2);
+ __ CallRuntime(Runtime::kDefineSetterPropertyUnchecked, 4);
+ break;
+
+ default:
+ UNREACHABLE();
+ }
+ }
+
+ // prototype
+ __ CallRuntime(Runtime::kToFastProperties, 1);
+
+ // constructor
+ __ CallRuntime(Runtime::kToFastProperties, 1);
+}
+
+
+void FullCodeGenerator::EmitBinaryOp(BinaryOperation* expr, Token::Value op) {
+ __ pop(r3);
+ Handle<Code> code =
+ CodeFactory::BinaryOpIC(isolate(), op, strength(language_mode())).code();
+ JumpPatchSite patch_site(masm_); // unbound, signals no inlined smi code.
+ CallIC(code, expr->BinaryOperationFeedbackId());
+ patch_site.EmitPatchInfo();
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitAssignment(Expression* expr,
+ FeedbackVectorICSlot slot) {
+ DCHECK(expr->IsValidReferenceExpression());
+
+ Property* prop = expr->AsProperty();
+ LhsKind assign_type = Property::GetAssignType(prop);
+
+ switch (assign_type) {
+ case VARIABLE: {
+ Variable* var = expr->AsVariableProxy()->var();
+ EffectContext context(this);
+ EmitVariableAssignment(var, Token::ASSIGN, slot);
+ break;
+ }
+ case NAMED_PROPERTY: {
+ __ push(r2); // Preserve value.
+ VisitForAccumulatorValue(prop->obj());
+ __ Move(StoreDescriptor::ReceiverRegister(), r2);
+ __ pop(StoreDescriptor::ValueRegister()); // Restore value.
+ __ mov(StoreDescriptor::NameRegister(),
+ Operand(prop->key()->AsLiteral()->value()));
+ if (FLAG_vector_stores) EmitLoadStoreICSlot(slot);
+ CallStoreIC();
+ break;
+ }
+ case NAMED_SUPER_PROPERTY: {
+ __ Push(r2);
+ VisitForStackValue(prop->obj()->AsSuperPropertyReference()->this_var());
+ VisitForAccumulatorValue(
+ prop->obj()->AsSuperPropertyReference()->home_object());
+ // stack: value, this; r2: home_object
+ Register scratch = r4;
+ Register scratch2 = r5;
+ __ LoadRR(scratch, result_register()); // home_object
+ __ LoadP(r2, MemOperand(sp, kPointerSize)); // value
+ __ LoadP(scratch2, MemOperand(sp, 0)); // this
+ __ StoreP(scratch2, MemOperand(sp, kPointerSize)); // this
+ __ StoreP(scratch, MemOperand(sp, 0)); // home_object
+ // stack: this, home_object; r2: value
+ EmitNamedSuperPropertyStore(prop);
+ break;
+ }
+ case KEYED_SUPER_PROPERTY: {
+ __ Push(r2);
+ VisitForStackValue(prop->obj()->AsSuperPropertyReference()->this_var());
+ VisitForStackValue(
+ prop->obj()->AsSuperPropertyReference()->home_object());
+ VisitForAccumulatorValue(prop->key());
+ Register scratch = r4;
+ Register scratch2 = r5;
+ __ LoadP(scratch2, MemOperand(sp, 2 * kPointerSize)); // value
+ // stack: value, this, home_object; r3: key, r6: value
+ __ LoadP(scratch, MemOperand(sp, kPointerSize)); // this
+ __ StoreP(scratch, MemOperand(sp, 2 * kPointerSize));
+ __ LoadP(scratch, MemOperand(sp, 0)); // home_object
+ __ StoreP(scratch, MemOperand(sp, kPointerSize));
+ __ StoreP(r2, MemOperand(sp, 0));
+ __ Move(r2, scratch2);
+ // stack: this, home_object, key; r2: value.
+ EmitKeyedSuperPropertyStore(prop);
+ break;
+ }
+ case KEYED_PROPERTY: {
+ __ push(r2); // Preserve value.
+ VisitForStackValue(prop->obj());
+ VisitForAccumulatorValue(prop->key());
+ __ Move(StoreDescriptor::NameRegister(), r2);
+ __ Pop(StoreDescriptor::ValueRegister(),
+ StoreDescriptor::ReceiverRegister());
+ if (FLAG_vector_stores) EmitLoadStoreICSlot(slot);
+ Handle<Code> ic =
+ CodeFactory::KeyedStoreIC(isolate(), language_mode()).code();
+ CallIC(ic);
+ break;
+ }
+ }
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitStoreToStackLocalOrContextSlot(
+ Variable* var, MemOperand location) {
+ __ StoreP(result_register(), location);
+ if (var->IsContextSlot()) {
+ // RecordWrite may destroy all its register arguments.
+ __ LoadRR(r5, result_register());
+ int offset = Context::SlotOffset(var->index());
+ __ RecordWriteContextSlot(r3, offset, r5, r4, kLRHasBeenSaved,
+ kDontSaveFPRegs);
+ }
+}
+
+
+void FullCodeGenerator::EmitVariableAssignment(Variable* var, Token::Value op,
+ FeedbackVectorICSlot slot) {
+ if (var->IsUnallocatedOrGlobalSlot()) {
+ // Global var, const, or let.
+ __ mov(StoreDescriptor::NameRegister(), Operand(var->name()));
+ __ LoadP(StoreDescriptor::ReceiverRegister(), GlobalObjectOperand());
+ if (FLAG_vector_stores) EmitLoadStoreICSlot(slot);
+ CallStoreIC();
+
+ } else if (var->mode() == LET && op != Token::INIT_LET) {
+ // Non-initializing assignment to let variable needs a write barrier.
+ DCHECK(!var->IsLookupSlot());
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ Label assign;
+ MemOperand location = VarOperand(var, r3);
+ __ LoadP(r5, location);
+ __ CompareRoot(r5, Heap::kTheHoleValueRootIndex);
+ __ bne(&assign);
+ __ mov(r5, Operand(var->name()));
+ __ push(r5);
+ __ CallRuntime(Runtime::kThrowReferenceError, 1);
+ // Perform the assignment.
+ __ bind(&assign);
+ EmitStoreToStackLocalOrContextSlot(var, location);
+
+ } else if (var->mode() == CONST && op != Token::INIT_CONST) {
+ // Assignment to const variable needs a write barrier.
+ DCHECK(!var->IsLookupSlot());
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ Label const_error;
+ MemOperand location = VarOperand(var, r3);
+ __ LoadP(r5, location);
+ __ CompareRoot(r5, Heap::kTheHoleValueRootIndex);
+ __ bne(&const_error, Label::kNear);
+ __ mov(r5, Operand(var->name()));
+ __ push(r5);
+ __ CallRuntime(Runtime::kThrowReferenceError, 1);
+ __ bind(&const_error);
+ __ CallRuntime(Runtime::kThrowConstAssignError, 0);
+
+ } else if (!var->is_const_mode() || op == Token::INIT_CONST) {
+ if (var->IsLookupSlot()) {
+ // Assignment to var.
+ __ push(r2); // Value.
+ __ mov(r3, Operand(var->name()));
+ __ mov(r2, Operand(Smi::FromInt(language_mode())));
+ __ Push(cp, r3, r2); // Context, name, language mode.
+ __ CallRuntime(Runtime::kStoreLookupSlot, 4);
+ } else {
+ // Assignment to var or initializing assignment to let/const in harmony
+ // mode.
+ DCHECK((var->IsStackAllocated() || var->IsContextSlot()));
+ MemOperand location = VarOperand(var, r3);
+ if (generate_debug_code_ && op == Token::INIT_LET) {
+ // Check for an uninitialized let binding.
+ __ LoadP(r4, location);
+ __ CompareRoot(r4, Heap::kTheHoleValueRootIndex);
+ __ Check(eq, kLetBindingReInitialization);
+ }
+ EmitStoreToStackLocalOrContextSlot(var, location);
+ }
+ } else if (op == Token::INIT_CONST_LEGACY) {
+ // Const initializers need a write barrier.
+ DCHECK(var->mode() == CONST_LEGACY);
+ DCHECK(!var->IsParameter()); // No const parameters.
+ if (var->IsLookupSlot()) {
+ __ push(r2);
+ __ mov(r2, Operand(var->name()));
+ __ Push(cp, r2); // Context and name.
+ __ CallRuntime(Runtime::kInitializeLegacyConstLookupSlot, 3);
+ } else {
+ DCHECK(var->IsStackAllocated() || var->IsContextSlot());
+ Label skip;
+ MemOperand location = VarOperand(var, r3);
+ __ LoadP(r4, location);
+ __ CompareRoot(r4, Heap::kTheHoleValueRootIndex);
+ __ bne(&skip);
+ EmitStoreToStackLocalOrContextSlot(var, location);
+ __ bind(&skip);
+ }
+
+ } else {
+ DCHECK(var->mode() == CONST_LEGACY && op != Token::INIT_CONST_LEGACY);
+ if (is_strict(language_mode())) {
+ __ CallRuntime(Runtime::kThrowConstAssignError, 0);
+ }
+ // Silently ignore store in sloppy mode.
+ }
+}
+
+
+void FullCodeGenerator::EmitNamedPropertyAssignment(Assignment* expr) {
+ // Assignment to a property, using a named store IC.
+ Property* prop = expr->target()->AsProperty();
+ DCHECK(prop != NULL);
+ DCHECK(prop->key()->IsLiteral());
+
+ __ mov(StoreDescriptor::NameRegister(),
+ Operand(prop->key()->AsLiteral()->value()));
+ __ pop(StoreDescriptor::ReceiverRegister());
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->AssignmentSlot());
+ CallStoreIC();
+ } else {
+ CallStoreIC(expr->AssignmentFeedbackId());
+ }
+
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitNamedSuperPropertyStore(Property* prop) {
+ // Assignment to named property of super.
+ // r2 : value
+ // stack : receiver ('this'), home_object
+ DCHECK(prop != NULL);
+ Literal* key = prop->key()->AsLiteral();
+ DCHECK(key != NULL);
+
+ __ Push(key->value());
+ __ Push(r2);
+ __ CallRuntime((is_strict(language_mode()) ? Runtime::kStoreToSuper_Strict
+ : Runtime::kStoreToSuper_Sloppy),
+ 4);
+}
+
+
+void FullCodeGenerator::EmitKeyedSuperPropertyStore(Property* prop) {
+ // Assignment to named property of super.
+ // r2 : value
+ // stack : receiver ('this'), home_object, key
+ DCHECK(prop != NULL);
+
+ __ Push(r2);
+ __ CallRuntime(
+ (is_strict(language_mode()) ? Runtime::kStoreKeyedToSuper_Strict
+ : Runtime::kStoreKeyedToSuper_Sloppy),
+ 4);
+}
+
+
+void FullCodeGenerator::EmitKeyedPropertyAssignment(Assignment* expr) {
+ // Assignment to a property, using a keyed store IC.
+ __ Pop(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister());
+ DCHECK(StoreDescriptor::ValueRegister().is(r2));
+
+ Handle<Code> ic =
+ CodeFactory::KeyedStoreIC(isolate(), language_mode()).code();
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->AssignmentSlot());
+ CallIC(ic);
+ } else {
+ CallIC(ic, expr->AssignmentFeedbackId());
+ }
+
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::VisitProperty(Property* expr) {
+ Comment cmnt(masm_, "[ Property");
+ SetExpressionPosition(expr);
+
+ Expression* key = expr->key();
+
+ if (key->IsPropertyName()) {
+ if (!expr->IsSuperAccess()) {
+ VisitForAccumulatorValue(expr->obj());
+ __ Move(LoadDescriptor::ReceiverRegister(), r2);
+ EmitNamedPropertyLoad(expr);
+ } else {
+ VisitForStackValue(expr->obj()->AsSuperPropertyReference()->this_var());
+ VisitForStackValue(
+ expr->obj()->AsSuperPropertyReference()->home_object());
+ EmitNamedSuperPropertyLoad(expr);
+ }
+ } else {
+ if (!expr->IsSuperAccess()) {
+ VisitForStackValue(expr->obj());
+ VisitForAccumulatorValue(expr->key());
+ __ Move(LoadDescriptor::NameRegister(), r2);
+ __ pop(LoadDescriptor::ReceiverRegister());
+ EmitKeyedPropertyLoad(expr);
+ } else {
+ VisitForStackValue(expr->obj()->AsSuperPropertyReference()->this_var());
+ VisitForStackValue(
+ expr->obj()->AsSuperPropertyReference()->home_object());
+ VisitForStackValue(expr->key());
+ EmitKeyedSuperPropertyLoad(expr);
+ }
+ }
+ PrepareForBailoutForId(expr->LoadId(), TOS_REG);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::CallIC(Handle<Code> code, TypeFeedbackId ast_id) {
+ ic_total_count_++;
+ __ Call(code, RelocInfo::CODE_TARGET, ast_id);
+}
+
+
+// Code common for calls using the IC.
+void FullCodeGenerator::EmitCallWithLoadIC(Call* expr) {
+ Expression* callee = expr->expression();
+
+ CallICState::CallType call_type =
+ callee->IsVariableProxy() ? CallICState::FUNCTION : CallICState::METHOD;
+
+ // Get the target function.
+ if (call_type == CallICState::FUNCTION) {
+ {
+ StackValueContext context(this);
+ EmitVariableLoad(callee->AsVariableProxy());
+ PrepareForBailout(callee, NO_REGISTERS);
+ }
+ // Push undefined as receiver. This is patched in the method prologue if it
+ // is a sloppy mode method.
+ __ LoadRoot(r1, Heap::kUndefinedValueRootIndex);
+ __ push(r1);
+ } else {
+ // Load the function from the receiver.
+ DCHECK(callee->IsProperty());
+ DCHECK(!callee->AsProperty()->IsSuperAccess());
+ __ LoadP(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0));
+ EmitNamedPropertyLoad(callee->AsProperty());
+ PrepareForBailoutForId(callee->AsProperty()->LoadId(), TOS_REG);
+ // Push the target function under the receiver.
+ __ LoadP(r1, MemOperand(sp, 0));
+ __ push(r1);
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+ }
+
+ EmitCall(expr, call_type);
+}
+
+
+void FullCodeGenerator::EmitSuperCallWithLoadIC(Call* expr) {
+ Expression* callee = expr->expression();
+ DCHECK(callee->IsProperty());
+ Property* prop = callee->AsProperty();
+ DCHECK(prop->IsSuperAccess());
+ SetExpressionPosition(prop);
+
+ Literal* key = prop->key()->AsLiteral();
+ DCHECK(!key->value()->IsSmi());
+ // Load the function from the receiver.
+ const Register scratch = r3;
+ SuperPropertyReference* super_ref = prop->obj()->AsSuperPropertyReference();
+ VisitForAccumulatorValue(super_ref->home_object());
+ __ LoadRR(scratch, r2);
+ VisitForAccumulatorValue(super_ref->this_var());
+ __ Push(scratch, r2, r2, scratch);
+ __ Push(key->value());
+ __ Push(Smi::FromInt(language_mode()));
+
+ // Stack here:
+ // - home_object
+ // - this (receiver)
+ // - this (receiver) <-- LoadFromSuper will pop here and below.
+ // - home_object
+ // - key
+ // - language_mode
+ __ CallRuntime(Runtime::kLoadFromSuper, 4);
+
+ // Replace home_object with target function.
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+
+ // Stack here:
+ // - target function
+ // - this (receiver)
+ EmitCall(expr, CallICState::METHOD);
+}
+
+
+// Code common for calls using the IC.
+void FullCodeGenerator::EmitKeyedCallWithLoadIC(Call* expr, Expression* key) {
+ // Load the key.
+ VisitForAccumulatorValue(key);
+
+ Expression* callee = expr->expression();
+
+ // Load the function from the receiver.
+ DCHECK(callee->IsProperty());
+ __ LoadP(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0));
+ __ Move(LoadDescriptor::NameRegister(), r2);
+ EmitKeyedPropertyLoad(callee->AsProperty());
+ PrepareForBailoutForId(callee->AsProperty()->LoadId(), TOS_REG);
+
+ // Push the target function under the receiver.
+ __ LoadP(ip, MemOperand(sp, 0));
+ __ push(ip);
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+
+ EmitCall(expr, CallICState::METHOD);
+}
+
+
+void FullCodeGenerator::EmitKeyedSuperCallWithLoadIC(Call* expr) {
+ Expression* callee = expr->expression();
+ DCHECK(callee->IsProperty());
+ Property* prop = callee->AsProperty();
+ DCHECK(prop->IsSuperAccess());
+
+ SetExpressionPosition(prop);
+ // Load the function from the receiver.
+ const Register scratch = r3;
+ SuperPropertyReference* super_ref = prop->obj()->AsSuperPropertyReference();
+ VisitForAccumulatorValue(super_ref->home_object());
+ __ LoadRR(scratch, r2);
+ VisitForAccumulatorValue(super_ref->this_var());
+ __ Push(scratch, r2, r2, scratch);
+ VisitForStackValue(prop->key());
+ __ Push(Smi::FromInt(language_mode()));
+
+ // Stack here:
+ // - home_object
+ // - this (receiver)
+ // - this (receiver) <-- LoadKeyedFromSuper will pop here and below.
+ // - home_object
+ // - key
+ // - language_mode
+ __ CallRuntime(Runtime::kLoadKeyedFromSuper, 4);
+
+ // Replace home_object with target function.
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+
+ // Stack here:
+ // - target function
+ // - this (receiver)
+ EmitCall(expr, CallICState::METHOD);
+}
+
+
+void FullCodeGenerator::EmitCall(Call* expr, CallICState::CallType call_type) {
+ // Load the arguments.
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ SetExpressionPosition(expr);
+ Handle<Code> ic = CodeFactory::CallIC(isolate(), arg_count, call_type).code();
+ __ LoadSmiLiteral(r5, SmiFromSlot(expr->CallFeedbackICSlot()));
+ __ LoadP(r3, MemOperand(sp, (arg_count + 1) * kPointerSize), r0);
+ // Don't assign a type feedback id to the IC, since type feedback is provided
+ // by the vector above.
+ CallIC(ic);
+
+ RecordJSReturnSite(expr);
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ context()->DropAndPlug(1, r2);
+}
+
+
+void FullCodeGenerator::EmitResolvePossiblyDirectEval(int arg_count) {
+ // r6: copy of the first argument or undefined if it doesn't exist.
+ if (arg_count > 0) {
+ __ LoadP(r6, MemOperand(sp, arg_count * kPointerSize), r0);
+ } else {
+ __ LoadRoot(r6, Heap::kUndefinedValueRootIndex);
+ }
+
+ // r5: the receiver of the enclosing function.
+ __ LoadP(r5, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+
+ // r4: language mode.
+ __ LoadSmiLiteral(r4, Smi::FromInt(language_mode()));
+
+ // r3: the start position of the scope the calls resides in.
+ __ LoadSmiLiteral(r3, Smi::FromInt(scope()->start_position()));
+
+ // Do the runtime call.
+ __ Push(r6, r5, r4, r3);
+ __ CallRuntime(Runtime::kResolvePossiblyDirectEval, 5);
+}
+
+
+void FullCodeGenerator::EmitInitializeThisAfterSuper(
+ SuperCallReference* super_ref, FeedbackVectorICSlot slot) {
+ Variable* this_var = super_ref->this_var()->var();
+ GetVar(r3, this_var);
+ __ CompareRoot(r3, Heap::kTheHoleValueRootIndex);
+ Label uninitialized_this;
+ __ beq(&uninitialized_this);
+ __ mov(r3, Operand(this_var->name()));
+ __ push(r3);
+ __ CallRuntime(Runtime::kThrowReferenceError, 1);
+ __ bind(&uninitialized_this);
+
+ EmitVariableAssignment(this_var, Token::INIT_CONST, slot);
+}
+
+
+// See http://www.ecma-international.org/ecma-262/6.0/#sec-function-calls.
+void FullCodeGenerator::PushCalleeAndWithBaseObject(Call* expr) {
+ VariableProxy* callee = expr->expression()->AsVariableProxy();
+ if (callee->var()->IsLookupSlot()) {
+ Label slow, done;
+ SetExpressionPosition(callee);
+ // Generate code for loading from variables potentially shadowed by
+ // eval-introduced variables.
+ EmitDynamicLookupFastCase(callee, NOT_INSIDE_TYPEOF, &slow, &done);
+
+ __ bind(&slow);
+ // Call the runtime to find the function to call (returned in r2) and
+ // the object holding it (returned in r3).
+ DCHECK(!context_register().is(r4));
+ __ mov(r4, Operand(callee->name()));
+ __ Push(context_register(), r4);
+ __ CallRuntime(Runtime::kLoadLookupSlot, 2);
+ __ Push(r2, r3); // Function, receiver.
+ PrepareForBailoutForId(expr->LookupId(), NO_REGISTERS);
+
+ // If fast case code has been generated, emit code to push the function
+ // and receiver and have the slow path jump around this code.
+ if (done.is_linked()) {
+ Label call;
+ __ b(&call);
+ __ bind(&done);
+ // Push function.
+ __ push(r2);
+ // Pass undefined as the receiver, which is the WithBaseObject of a
+ // non-object environment record. If the callee is sloppy, it will patch
+ // it up to be the global receiver.
+ __ LoadRoot(r3, Heap::kUndefinedValueRootIndex);
+ __ push(r3);
+ __ bind(&call);
+ }
+ } else {
+ VisitForStackValue(callee);
+ // refEnv.WithBaseObject()
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ push(r4); // Reserved receiver slot.
+ }
+}
+
+
+void FullCodeGenerator::VisitCall(Call* expr) {
+#ifdef DEBUG
+ // We want to verify that RecordJSReturnSite gets called on all paths
+ // through this function. Avoid early returns.
+ expr->return_is_recorded_ = false;
+#endif
+
+ Comment cmnt(masm_, "[ Call");
+ Expression* callee = expr->expression();
+ Call::CallType call_type = expr->GetCallType(isolate());
+
+ if (call_type == Call::POSSIBLY_EVAL_CALL) {
+ // In a call to eval, we first call RuntimeHidden_ResolvePossiblyDirectEval
+ // to resolve the function we need to call. Then we call the resolved
+ // function using the given arguments.
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+
+ PushCalleeAndWithBaseObject(expr);
+
+ // Push the arguments.
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ // Push a copy of the function (found below the arguments) and
+ // resolve eval.
+ __ LoadP(r3, MemOperand(sp, (arg_count + 1) * kPointerSize), r0);
+ __ push(r3);
+ EmitResolvePossiblyDirectEval(arg_count);
+
+ // Touch up the stack with the resolved function.
+ __ StoreP(r2, MemOperand(sp, (arg_count + 1) * kPointerSize), r0);
+
+ PrepareForBailoutForId(expr->EvalId(), NO_REGISTERS);
+
+ // Record source position for debugger.
+ SetExpressionPosition(expr);
+ CallFunctionStub stub(isolate(), arg_count, NO_CALL_FUNCTION_FLAGS);
+ __ LoadP(r3, MemOperand(sp, (arg_count + 1) * kPointerSize), r0);
+ __ CallStub(&stub);
+ RecordJSReturnSite(expr);
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ context()->DropAndPlug(1, r2);
+ } else if (call_type == Call::GLOBAL_CALL) {
+ EmitCallWithLoadIC(expr);
+
+ } else if (call_type == Call::LOOKUP_SLOT_CALL) {
+ // Call to a lookup slot (dynamically introduced variable).
+ PushCalleeAndWithBaseObject(expr);
+ EmitCall(expr);
+ } else if (call_type == Call::PROPERTY_CALL) {
+ Property* property = callee->AsProperty();
+ bool is_named_call = property->key()->IsPropertyName();
+ if (property->IsSuperAccess()) {
+ if (is_named_call) {
+ EmitSuperCallWithLoadIC(expr);
+ } else {
+ EmitKeyedSuperCallWithLoadIC(expr);
+ }
+ } else {
+ VisitForStackValue(property->obj());
+ if (is_named_call) {
+ EmitCallWithLoadIC(expr);
+ } else {
+ EmitKeyedCallWithLoadIC(expr, property->key());
+ }
+ }
+ } else if (call_type == Call::SUPER_CALL) {
+ EmitSuperConstructorCall(expr);
+ } else {
+ DCHECK(call_type == Call::OTHER_CALL);
+ // Call to an arbitrary expression not handled specially above.
+ VisitForStackValue(callee);
+ __ LoadRoot(r3, Heap::kUndefinedValueRootIndex);
+ __ push(r3);
+ // Emit function call.
+ EmitCall(expr);
+ }
+
+#ifdef DEBUG
+ // RecordJSReturnSite should have been called.
+ DCHECK(expr->return_is_recorded_);
+#endif
+}
+
+
+void FullCodeGenerator::VisitCallNew(CallNew* expr) {
+ Comment cmnt(masm_, "[ CallNew");
+ // According to ECMA-262, section 11.2.2, page 44, the function
+ // expression in new calls must be evaluated before the
+ // arguments.
+
+ // Push constructor on the stack. If it's not a function it's used as
+ // receiver for CALL_NON_FUNCTION, otherwise the value on the stack is
+ // ignored.
+ DCHECK(!expr->expression()->IsSuperPropertyReference());
+ VisitForStackValue(expr->expression());
+
+ // Push the arguments ("left-to-right") on the stack.
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ // Call the construct call builtin that handles allocation and
+ // constructor invocation.
+ SetExpressionPosition(expr);
+
+ // Load function and argument count into r3 and r2.
+ __ mov(r2, Operand(arg_count));
+ __ LoadP(r3, MemOperand(sp, arg_count * kPointerSize), r0);
+
+ // Record call targets in unoptimized code.
+ if (FLAG_pretenuring_call_new) {
+ EnsureSlotContainsAllocationSite(expr->AllocationSiteFeedbackSlot());
+ DCHECK(expr->AllocationSiteFeedbackSlot().ToInt() ==
+ expr->CallNewFeedbackSlot().ToInt() + 1);
+ }
+
+ __ Move(r4, FeedbackVector());
+ __ LoadSmiLiteral(r5, SmiFromSlot(expr->CallNewFeedbackSlot()));
+
+ CallConstructStub stub(isolate(), RECORD_CONSTRUCTOR_TARGET);
+ __ Call(stub.GetCode(), RelocInfo::CONSTRUCT_CALL);
+ PrepareForBailoutForId(expr->ReturnId(), TOS_REG);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitSuperConstructorCall(Call* expr) {
+ SuperCallReference* super_call_ref =
+ expr->expression()->AsSuperCallReference();
+ DCHECK_NOT_NULL(super_call_ref);
+
+ VariableProxy* new_target_proxy = super_call_ref->new_target_var();
+ VisitForStackValue(new_target_proxy);
+
+ EmitLoadSuperConstructor(super_call_ref);
+ __ push(result_register());
+
+ // Push the arguments ("left-to-right") on the stack.
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ // Call the construct call builtin that handles allocation and
+ // constructor invocation.
+ SetExpressionPosition(expr);
+
+ // Load function and argument count into r1 and r0.
+ __ mov(r2, Operand(arg_count));
+ __ LoadP(r3, MemOperand(sp, arg_count * kPointerSize));
+
+ // Record call targets in unoptimized code.
+ if (FLAG_pretenuring_call_new) {
+ UNREACHABLE();
+ /* TODO(dslomov): support pretenuring.
+ EnsureSlotContainsAllocationSite(expr->AllocationSiteFeedbackSlot());
+ DCHECK(expr->AllocationSiteFeedbackSlot().ToInt() ==
+ expr->CallNewFeedbackSlot().ToInt() + 1);
+ */
+ }
+
+ __ Move(r4, FeedbackVector());
+ __ LoadSmiLiteral(r5, SmiFromSlot(expr->CallFeedbackSlot()));
+
+ CallConstructStub stub(isolate(), SUPER_CALL_RECORD_TARGET);
+ __ Call(stub.GetCode(), RelocInfo::CONSTRUCT_CALL);
+
+ __ Drop(1);
+
+ RecordJSReturnSite(expr);
+
+ EmitInitializeThisAfterSuper(super_call_ref, expr->CallFeedbackICSlot());
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitIsSmi(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false, skip_lookup;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ __ TestIfSmi(r2);
+ Split(eq, if_true, if_false, fall_through, cr0);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsNonNegativeSmi(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ __ TestIfPositiveSmi(r2, r0);
+ Split(eq, if_true, if_false, fall_through, cr0);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsObject(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareRoot(r2, Heap::kNullValueRootIndex);
+ __ beq(if_true);
+ __ LoadP(r4, FieldMemOperand(r2, HeapObject::kMapOffset));
+ // Undetectable objects behave like undefined when tested with typeof.
+ __ tm(FieldMemOperand(r4, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ __ bne(if_false /*, cr0*/);
+ __ LoadlB(r3, FieldMemOperand(r4, Map::kInstanceTypeOffset));
+ __ CmpP(r3, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ __ blt(if_false);
+ __ CmpP(r3, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(le, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsSpecObject(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r3, FIRST_SPEC_OBJECT_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(ge, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsUndetectableObject(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ LoadP(r3, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ tm(FieldMemOperand(r3, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(ne, if_true, if_false, fall_through, cr0);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsStringWrapperSafeForDefaultValueOf(
+ CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false, skip_lookup;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ AssertNotSmi(r2);
+
+ __ LoadP(r3, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ LoadlB(ip, FieldMemOperand(r3, Map::kBitField2Offset));
+ __ mov(r0, Operand(1 << Map::kStringWrapperSafeForDefaultValueOf));
+ __ AndP(r0, ip);
+ __ bne(&skip_lookup);
+
+ // Check for fast case object. Generate false result for slow case object.
+ __ LoadP(r4, FieldMemOperand(r2, JSObject::kPropertiesOffset));
+ __ LoadP(r4, FieldMemOperand(r4, HeapObject::kMapOffset));
+ __ CompareRoot(r4, Heap::kHashTableMapRootIndex);
+ __ beq(if_false);
+
+ // Look for valueOf name in the descriptor array, and indicate false if
+ // found. Since we omit an enumeration index check, if it is added via a
+ // transition that shares its descriptor array, this is a false positive.
+ Label entry, loop, done;
+
+ // Skip loop if no descriptors are valid.
+ __ NumberOfOwnDescriptors(r5, r3);
+ __ CmpP(r5, Operand::Zero());
+ __ beq(&done);
+
+ __ LoadInstanceDescriptors(r3, r6);
+ // r6: descriptor array.
+ // r5: valid entries in the descriptor array.
+ __ mov(ip, Operand(DescriptorArray::kDescriptorSize));
+ __ Mul(r5, r5, ip);
+ // Calculate location of the first key name.
+ __ AddP(r6, Operand(DescriptorArray::kFirstOffset - kHeapObjectTag));
+ // Calculate the end of the descriptor array.
+ __ LoadRR(r4, r6);
+ __ ShiftLeftP(ip, r5, Operand(kPointerSizeLog2));
+ __ AddP(r4, ip);
+
+ // Loop through all the keys in the descriptor array. If one of these is the
+ // string "valueOf" the result is false.
+ // The use of ip to store the valueOf string assumes that it is not otherwise
+ // used in the loop below.
+ __ mov(ip, Operand(isolate()->factory()->value_of_string()));
+ __ b(&entry, Label::kNear);
+ __ bind(&loop);
+ __ LoadP(r5, MemOperand(r6, 0));
+ __ CmpP(r5, ip);
+ __ beq(if_false);
+ __ AddP(r6, Operand(DescriptorArray::kDescriptorSize * kPointerSize));
+ __ bind(&entry);
+ __ CmpP(r6, r4);
+ __ bne(&loop);
+
+ __ bind(&done);
+
+ // Set the bit in the map to indicate that there is no local valueOf field.
+ __ LoadlB(r4, FieldMemOperand(r3, Map::kBitField2Offset));
+ __ OrP(r4, Operand(1 << Map::kStringWrapperSafeForDefaultValueOf));
+ __ stc(r4, FieldMemOperand(r3, Map::kBitField2Offset));
+
+ __ bind(&skip_lookup);
+
+ // If a valueOf property is not found on the object check that its
+ // prototype is the un-modified String prototype. If not result is false.
+ __ LoadP(r4, FieldMemOperand(r3, Map::kPrototypeOffset));
+ __ JumpIfSmi(r4, if_false);
+ __ LoadP(r4, FieldMemOperand(r4, HeapObject::kMapOffset));
+ __ LoadP(r5, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(r5, FieldMemOperand(r5, GlobalObject::kNativeContextOffset));
+ __ LoadP(r5,
+ ContextOperand(r5, Context::STRING_FUNCTION_PROTOTYPE_MAP_INDEX));
+ __ CmpP(r4, r5);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsFunction(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r4, JS_FUNCTION_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsMinusZero(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ CheckMap(r2, r3, Heap::kHeapNumberMapRootIndex, if_false, DO_SMI_CHECK);
+#if V8_TARGET_ARCH_S390X
+ __ LoadP(r3, FieldMemOperand(r2, HeapNumber::kValueOffset));
+ __ llihf(r4, Operand(0x80000000)); // r4 = 0x80000000_00000000
+ __ CmpP(r3, r4);
+#else
+ __ LoadlW(r4, FieldMemOperand(r2, HeapNumber::kExponentOffset));
+ __ LoadlW(r3, FieldMemOperand(r2, HeapNumber::kMantissaOffset));
+ Label skip;
+ __ iilf(r0, Operand(0x80000000));
+ __ CmpP(r4, r0);
+ __ bne(&skip, Label::kNear);
+ __ CmpP(r3, Operand::Zero());
+ __ bind(&skip);
+#endif
+
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsArray(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r3, JS_ARRAY_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsTypedArray(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r3, JS_TYPED_ARRAY_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsRegExp(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r3, JS_REGEXP_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsJSProxy(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ Register map = r3;
+ Register type_reg = r4;
+ __ LoadP(map, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ LoadlB(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ __ SubP(type_reg, Operand(FIRST_JS_PROXY_TYPE));
+ __ CmpLogicalP(type_reg, Operand(LAST_JS_PROXY_TYPE - FIRST_JS_PROXY_TYPE));
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(le, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitIsConstructCall(CallRuntime* expr) {
+ DCHECK(expr->arguments()->length() == 0);
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ // Get the frame pointer for the calling frame.
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+
+ // Skip the arguments adaptor frame if it exists.
+ Label check_frame_marker;
+ __ LoadP(r3, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(r3, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ bne(&check_frame_marker, Label::kNear);
+ __ LoadP(r4, MemOperand(r4, StandardFrameConstants::kCallerFPOffset));
+
+ // Check the marker in the calling frame.
+ __ bind(&check_frame_marker);
+ __ LoadP(r3, MemOperand(r4, StandardFrameConstants::kMarkerOffset));
+ STATIC_ASSERT(StackFrame::CONSTRUCT < 0x4000);
+ __ CmpSmiLiteral(r3, Smi::FromInt(StackFrame::CONSTRUCT), r0);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitObjectEquals(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+
+ // Load the two objects into registers and perform the comparison.
+ VisitForStackValue(args->at(0));
+ VisitForAccumulatorValue(args->at(1));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ pop(r3);
+ __ CmpP(r2, r3);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitArguments(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+
+ // ArgumentsAccessStub expects the key in r4 and the formal
+ // parameter count in r2.
+ VisitForAccumulatorValue(args->at(0));
+ __ LoadRR(r3, r2);
+ __ LoadSmiLiteral(r2, Smi::FromInt(info_->scope()->num_parameters()));
+ ArgumentsAccessStub stub(isolate(), ArgumentsAccessStub::READ_ELEMENT);
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitArgumentsLength(CallRuntime* expr) {
+ DCHECK(expr->arguments()->length() == 0);
+ Label exit;
+ // Get the number of formal parameters.
+ __ LoadSmiLiteral(r2, Smi::FromInt(info_->scope()->num_parameters()));
+
+ // Check if the calling frame is an arguments adaptor frame.
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r5, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(r5, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ bne(&exit, Label::kNear);
+
+ // Arguments adaptor case: Read the arguments length from the
+ // adaptor frame.
+ __ LoadP(r2,
+ MemOperand(r4, ArgumentsAdaptorFrameConstants::kLengthOffset));
+
+ __ bind(&exit);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitClassOf(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+ Label done, null, function, non_function_constructor;
+
+ VisitForAccumulatorValue(args->at(0));
+
+ // If the object is a smi, we return null.
+ __ JumpIfSmi(r2, &null);
+
+ // Check that the object is a JS object but take special care of JS
+ // functions to make sure they have 'Function' as their class.
+ // Assume that there are only two callable types, and one of them is at
+ // either end of the type range for JS object types. Saves extra comparisons.
+ STATIC_ASSERT(NUM_OF_CALLABLE_SPEC_OBJECT_TYPES == 2);
+ __ CompareObjectType(r2, r2, r3, FIRST_SPEC_OBJECT_TYPE);
+ // Map is now in r2.
+ __ blt(&null);
+ STATIC_ASSERT(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE ==
+ FIRST_SPEC_OBJECT_TYPE + 1);
+ __ beq(&function);
+
+ __ CmpP(r3, Operand(LAST_SPEC_OBJECT_TYPE));
+ STATIC_ASSERT(LAST_NONCALLABLE_SPEC_OBJECT_TYPE == LAST_SPEC_OBJECT_TYPE - 1);
+ __ beq(&function);
+ // Assume that there is no larger type.
+ STATIC_ASSERT(LAST_NONCALLABLE_SPEC_OBJECT_TYPE == LAST_TYPE - 1);
+
+ // Check if the constructor in the map is a JS function.
+ Register instance_type = r4;
+ __ GetMapConstructor(r2, r2, r3, instance_type);
+ __ CmpP(instance_type, Operand(JS_FUNCTION_TYPE));
+ __ bne(&non_function_constructor, Label::kNear);
+
+ // r2 now contains the constructor function. Grab the
+ // instance class name from there.
+ __ LoadP(r2, FieldMemOperand(r2, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(r2,
+ FieldMemOperand(r2, SharedFunctionInfo::kInstanceClassNameOffset));
+ __ b(&done, Label::kNear);
+
+ // Functions have class 'Function'.
+ __ bind(&function);
+ __ LoadRoot(r2, Heap::kFunction_stringRootIndex);
+ __ b(&done, Label::kNear);
+
+ // Objects with a non-function constructor have class 'Object'.
+ __ bind(&non_function_constructor);
+ __ LoadRoot(r2, Heap::kObject_stringRootIndex);
+ __ b(&done, Label::kNear);
+
+ // Non-JS objects have class null.
+ __ bind(&null);
+ __ LoadRoot(r2, Heap::kNullValueRootIndex);
+
+ // All done.
+ __ bind(&done);
+
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitSubString(CallRuntime* expr) {
+ // Load the arguments on the stack and call the stub.
+ SubStringStub stub(isolate());
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 3);
+ VisitForStackValue(args->at(0));
+ VisitForStackValue(args->at(1));
+ VisitForStackValue(args->at(2));
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitRegExpExec(CallRuntime* expr) {
+ // Load the arguments on the stack and call the stub.
+ RegExpExecStub stub(isolate());
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 4);
+ VisitForStackValue(args->at(0));
+ VisitForStackValue(args->at(1));
+ VisitForStackValue(args->at(2));
+ VisitForStackValue(args->at(3));
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitValueOf(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+ VisitForAccumulatorValue(args->at(0)); // Load the object.
+
+ Label done;
+ // If the object is a smi return the object.
+ __ JumpIfSmi(r2, &done);
+ // If the object is not a value type, return the object.
+ __ CompareObjectType(r2, r3, r3, JS_VALUE_TYPE);
+ __ bne(&done, Label::kNear);
+ __ LoadP(r2, FieldMemOperand(r2, JSValue::kValueOffset));
+
+ __ bind(&done);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitIsDate(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(1, args->length());
+
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = nullptr;
+ Label* if_false = nullptr;
+ Label* fall_through = nullptr;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r3, r3, JS_DATE_TYPE);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitDateField(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ DCHECK_NOT_NULL(args->at(1)->AsLiteral());
+ Smi* index = Smi::cast(*(args->at(1)->AsLiteral()->value()));
+
+ VisitForAccumulatorValue(args->at(0)); // Load the object.
+
+ Register object = r2;
+ Register result = r2;
+ Register scratch0 = r1;
+ Register scratch1 = r3;
+
+ if (index->value() == 0) {
+ __ LoadP(result, FieldMemOperand(object, JSDate::kValueOffset));
+ } else {
+ Label runtime, done;
+ if (index->value() < JSDate::kFirstUncachedField) {
+ ExternalReference stamp = ExternalReference::date_cache_stamp(isolate());
+ __ mov(scratch1, Operand(stamp));
+ __ LoadP(scratch1, MemOperand(scratch1));
+ __ LoadP(scratch0, FieldMemOperand(object, JSDate::kCacheStampOffset));
+ __ CmpP(scratch1, scratch0);
+ __ bne(&runtime);
+ __ LoadP(result,
+ FieldMemOperand(object, JSDate::kValueOffset +
+ kPointerSize * index->value()),
+ scratch0);
+ __ b(&done);
+ }
+ __ bind(&runtime);
+ __ PrepareCallCFunction(2, scratch1);
+ __ LoadSmiLiteral(r3, index);
+ __ CallCFunction(ExternalReference::get_date_field_function(isolate()), 2);
+ __ bind(&done);
+ }
+
+ context()->Plug(result);
+}
+
+
+void FullCodeGenerator::EmitOneByteSeqStringSetChar(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(3, args->length());
+
+ Register string = r2;
+ Register index = r3;
+ Register value = r4;
+
+ VisitForStackValue(args->at(0)); // index
+ VisitForStackValue(args->at(1)); // value
+ VisitForAccumulatorValue(args->at(2)); // string
+ __ Pop(index, value);
+
+ if (FLAG_debug_code) {
+ __ TestIfSmi(value);
+ __ Check(eq, kNonSmiValue, cr0);
+ __ TestIfSmi(index);
+ __ Check(eq, kNonSmiIndex, cr0);
+ __ SmiUntag(index);
+ static const uint32_t one_byte_seq_type = kSeqStringTag | kOneByteStringTag;
+ __ EmitSeqStringSetCharCheck(string, index, value, one_byte_seq_type);
+ __ SmiTag(index);
+ }
+
+ __ SmiUntag(value);
+ __ AddP(ip, string, Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ SmiToByteArrayOffset(r1, index);
+ __ StoreByte(value, MemOperand(ip, r1));
+ context()->Plug(string);
+}
+
+
+void FullCodeGenerator::EmitTwoByteSeqStringSetChar(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(3, args->length());
+
+ Register string = r2;
+ Register index = r3;
+ Register value = r4;
+
+ VisitForStackValue(args->at(0)); // index
+ VisitForStackValue(args->at(1)); // value
+ VisitForAccumulatorValue(args->at(2)); // string
+ __ Pop(index, value);
+
+ if (FLAG_debug_code) {
+ __ TestIfSmi(value);
+ __ Check(eq, kNonSmiValue, cr0);
+ __ TestIfSmi(index);
+ __ Check(eq, kNonSmiIndex, cr0);
+ __ SmiUntag(index, index);
+ static const uint32_t two_byte_seq_type = kSeqStringTag | kTwoByteStringTag;
+ __ EmitSeqStringSetCharCheck(string, index, value, two_byte_seq_type);
+ __ SmiTag(index, index);
+ }
+
+ __ SmiUntag(value);
+ __ SmiToShortArrayOffset(r1, index);
+ __ StoreHalfWord(value, MemOperand(r1, string,
+ SeqTwoByteString::kHeaderSize - kHeapObjectTag));
+ context()->Plug(string);
+}
+
+
+void FullCodeGenerator::EmitMathPow(CallRuntime* expr) {
+ // Load the arguments on the stack and call the runtime function.
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ VisitForStackValue(args->at(0));
+ VisitForStackValue(args->at(1));
+ MathPowStub stub(isolate(), MathPowStub::ON_STACK);
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitSetValueOf(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ VisitForStackValue(args->at(0)); // Load the object.
+ VisitForAccumulatorValue(args->at(1)); // Load the value.
+ __ pop(r3); // r2 = value. r3 = object.
+
+ Label done;
+ // If the object is a smi, return the value.
+ __ JumpIfSmi(r3, &done);
+
+ // If the object is not a value type, return the value.
+ __ CompareObjectType(r3, r4, r4, JS_VALUE_TYPE);
+ __ bne(&done);
+
+ // Store the value.
+ __ StoreP(r2, FieldMemOperand(r3, JSValue::kValueOffset));
+ // Update the write barrier. Save the value as it will be
+ // overwritten by the write barrier code and is needed afterward.
+ __ LoadRR(r4, r2);
+ __ RecordWriteField(r3, JSValue::kValueOffset, r4, r5, kLRHasBeenSaved,
+ kDontSaveFPRegs);
+
+ __ bind(&done);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitNumberToString(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(args->length(), 1);
+ // Load the argument into r2 and call the stub.
+ VisitForAccumulatorValue(args->at(0));
+
+ NumberToStringStub stub(isolate());
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitStringCharFromCode(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+ VisitForAccumulatorValue(args->at(0));
+
+ Label done;
+ StringCharFromCodeGenerator generator(r2, r3);
+ generator.GenerateFast(masm_);
+ __ b(&done);
+
+ NopRuntimeCallHelper call_helper;
+ generator.GenerateSlow(masm_, call_helper);
+
+ __ bind(&done);
+ context()->Plug(r3);
+}
+
+
+void FullCodeGenerator::EmitStringCharCodeAt(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ VisitForStackValue(args->at(0));
+ VisitForAccumulatorValue(args->at(1));
+
+ Register object = r3;
+ Register index = r2;
+ Register result = r5;
+
+ __ pop(object);
+
+ Label need_conversion;
+ Label index_out_of_range;
+ Label done;
+ StringCharCodeAtGenerator generator(object, index, result, &need_conversion,
+ &need_conversion, &index_out_of_range,
+ STRING_INDEX_IS_NUMBER);
+ generator.GenerateFast(masm_);
+ __ b(&done);
+
+ __ bind(&index_out_of_range);
+ // When the index is out of range, the spec requires us to return
+ // NaN.
+ __ LoadRoot(result, Heap::kNanValueRootIndex);
+ __ b(&done);
+
+ __ bind(&need_conversion);
+ // Load the undefined value into the result register, which will
+ // trigger conversion.
+ __ LoadRoot(result, Heap::kUndefinedValueRootIndex);
+ __ b(&done);
+
+ NopRuntimeCallHelper call_helper;
+ generator.GenerateSlow(masm_, NOT_PART_OF_IC_HANDLER, call_helper);
+
+ __ bind(&done);
+ context()->Plug(result);
+}
+
+
+void FullCodeGenerator::EmitStringCharAt(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ VisitForStackValue(args->at(0));
+ VisitForAccumulatorValue(args->at(1));
+
+ Register object = r3;
+ Register index = r2;
+ Register scratch = r5;
+ Register result = r2;
+
+ __ pop(object);
+
+ Label need_conversion;
+ Label index_out_of_range;
+ Label done;
+ StringCharAtGenerator generator(object, index, scratch, result,
+ &need_conversion, &need_conversion,
+ &index_out_of_range, STRING_INDEX_IS_NUMBER);
+ generator.GenerateFast(masm_);
+ __ b(&done);
+
+ __ bind(&index_out_of_range);
+ // When the index is out of range, the spec requires us to return
+ // the empty string.
+ __ LoadRoot(result, Heap::kempty_stringRootIndex);
+ __ b(&done);
+
+ __ bind(&need_conversion);
+ // Move smi zero into the result register, which will trigger
+ // conversion.
+ __ LoadSmiLiteral(result, Smi::FromInt(0));
+ __ b(&done);
+
+ NopRuntimeCallHelper call_helper;
+ generator.GenerateSlow(masm_, NOT_PART_OF_IC_HANDLER, call_helper);
+
+ __ bind(&done);
+ context()->Plug(result);
+}
+
+
+void FullCodeGenerator::EmitStringAdd(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(2, args->length());
+ VisitForStackValue(args->at(0));
+ VisitForAccumulatorValue(args->at(1));
+
+ __ pop(r3);
+ StringAddStub stub(isolate(), STRING_ADD_CHECK_BOTH, NOT_TENURED);
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitStringCompare(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(2, args->length());
+ VisitForStackValue(args->at(0));
+ VisitForStackValue(args->at(1));
+
+ StringCompareStub stub(isolate());
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitCallFunction(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() >= 2);
+
+ int arg_count = args->length() - 2; // 2 ~ receiver and function.
+ for (int i = 0; i < arg_count + 1; i++) {
+ VisitForStackValue(args->at(i));
+ }
+ VisitForAccumulatorValue(args->last()); // Function.
+
+ Label runtime, done;
+ // Check for non-function argument (including proxy).
+ __ JumpIfSmi(r2, &runtime);
+ __ CompareObjectType(r2, r3, r3, JS_FUNCTION_TYPE);
+ __ bne(&runtime);
+
+ // InvokeFunction requires the function in r3. Move it in there.
+ __ LoadRR(r3, result_register());
+ ParameterCount count(arg_count);
+ __ InvokeFunction(r3, count, CALL_FUNCTION, NullCallWrapper());
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ b(&done);
+
+ __ bind(&runtime);
+ __ push(r2);
+ __ CallRuntime(Runtime::kCall, args->length());
+ __ bind(&done);
+
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitDefaultConstructorCallSuper(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+
+ // new.target
+ VisitForStackValue(args->at(0));
+
+ // .this_function
+ VisitForStackValue(args->at(1));
+ __ CallRuntime(Runtime::kGetPrototype, 1);
+ __ LoadRR(r3, result_register());
+ __ Push(r3);
+
+ // Check if the calling frame is an arguments adaptor frame.
+ Label adaptor_frame, args_set_up, runtime;
+ __ LoadP(r4, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(r5, MemOperand(r4, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(r5, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r1);
+ __ beq(&adaptor_frame, Label::kNear);
+
+ // default constructor has no arguments, so no adaptor frame means no args.
+ __ LoadImmP(r2, Operand::Zero());
+ __ b(&args_set_up);
+
+ // Copy arguments from adaptor frame.
+ {
+ __ bind(&adaptor_frame);
+ __ LoadP(r2, MemOperand(r4, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ SmiUntag(r2);
+
+ // Get arguments pointer in r4.
+ __ ShiftLeftP(r1, r2, Operand(kPointerSizeLog2));
+ __ AddP(r4, r1);
+ __ AddP(r4, Operand(StandardFrameConstants::kCallerSPOffset));
+
+ Label loop;
+ __ LoadRR(r1, r2);
+ __ bind(&loop);
+ // Pre-decrement in order to skip receiver.
+ __ LoadP(r5, MemOperand(r4, -kPointerSize));
+ __ lay(r4, MemOperand(r4, -kPointerSize));
+ __ Push(r5);
+ __ BranchOnCount(r1, &loop);
+ }
+
+ __ bind(&args_set_up);
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+
+ CallConstructStub stub(isolate(), SUPER_CONSTRUCTOR_CALL);
+ __ Call(stub.GetCode(), RelocInfo::CONSTRUCT_CALL);
+
+ __ Drop(1);
+
+ context()->Plug(result_register());
+}
+
+
+void FullCodeGenerator::EmitRegExpConstructResult(CallRuntime* expr) {
+ RegExpConstructResultStub stub(isolate());
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 3);
+ VisitForStackValue(args->at(0));
+ VisitForStackValue(args->at(1));
+ VisitForAccumulatorValue(args->at(2));
+ __ Pop(r4, r3);
+ __ CallStub(&stub);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitGetFromCache(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK_EQ(2, args->length());
+ DCHECK_NOT_NULL(args->at(0)->AsLiteral());
+ int cache_id = Smi::cast(*(args->at(0)->AsLiteral()->value()))->value();
+
+ Handle<FixedArray> jsfunction_result_caches(
+ isolate()->native_context()->jsfunction_result_caches());
+ if (jsfunction_result_caches->length() <= cache_id) {
+ __ Abort(kAttemptToUseUndefinedCache);
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ context()->Plug(r2);
+ return;
+ }
+
+ VisitForAccumulatorValue(args->at(1));
+
+ Register key = r2;
+ Register cache = r3;
+ __ LoadP(cache, ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(cache, FieldMemOperand(cache, GlobalObject::kNativeContextOffset));
+ __ LoadP(cache,
+ ContextOperand(cache, Context::JSFUNCTION_RESULT_CACHES_INDEX));
+ __ LoadP(cache,
+ FieldMemOperand(cache, FixedArray::OffsetOfElementAt(cache_id)), r0);
+
+ Label done, not_found;
+ __ LoadP(r4, FieldMemOperand(cache, JSFunctionResultCache::kFingerOffset));
+ // r4 now holds finger offset as a smi.
+ __ AddP(r5, cache, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ // r5 now points to the start of fixed array elements.
+ __ SmiToPtrArrayOffset(r4, r4);
+ __ LoadP(r4, MemOperand(r5, r4));
+ __ lay(r4, MemOperand(r5, r4));
+
+ // r5 now points to the key of the pair.
+ __ CmpP(key, r4);
+ __ bne(¬_found, Label::kNear);
+
+ __ LoadP(r2, MemOperand(r5, kPointerSize));
+ __ b(&done);
+
+ __ bind(¬_found);
+ // Call runtime to perform the lookup.
+ __ Push(cache, key);
+ __ CallRuntime(Runtime::kGetFromCacheRT, 2);
+
+ __ bind(&done);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitHasCachedArrayIndex(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ VisitForAccumulatorValue(args->at(0));
+
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ __ LoadlW(r2, FieldMemOperand(r2, String::kHashFieldOffset));
+ __ AndP(r0, r2, Operand(String::kContainsCachedArrayIndexMask));
+ __ CmpP(r0, Operand::Zero());
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ Split(eq, if_true, if_false, fall_through);
+
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitGetCachedArrayIndex(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 1);
+ VisitForAccumulatorValue(args->at(0));
+
+ __ AssertString(r2);
+
+ __ LoadlW(r2, FieldMemOperand(r2, String::kHashFieldOffset));
+ __ IndexFromHash(r2, r2);
+
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitFastOneByteArrayJoin(CallRuntime* expr) {
+ Label bailout, done, one_char_separator, long_separator, non_trivial_array,
+ not_size_one_array, loop, empty_separator_loop, one_char_separator_loop,
+ one_char_separator_loop_entry, long_separator_loop;
+ ZoneList<Expression*>* args = expr->arguments();
+ DCHECK(args->length() == 2);
+ VisitForStackValue(args->at(1));
+ VisitForAccumulatorValue(args->at(0));
+
+ // All aliases of the same register have disjoint lifetimes.
+ Register array = r2;
+ Register elements = no_reg; // Will be r2.
+ Register result = no_reg; // Will be r2.
+ Register separator = r3;
+ Register array_length = r4;
+ Register result_pos = no_reg; // Will be r4
+ Register string_length = r5;
+ Register string = r6;
+ Register element = r7;
+ Register elements_end = r8;
+ Register scratch1 = r9;
+ Register scratch2 = r1;
+
+ // Separator operand is on the stack.
+ __ pop(separator);
+
+ // Check that the array is a JSArray.
+ __ JumpIfSmi(array, &bailout);
+ __ CompareObjectType(array, scratch1, scratch2, JS_ARRAY_TYPE);
+ __ bne(&bailout);
+
+ // Check that the array has fast elements.
+ __ CheckFastElements(scratch1, scratch2, &bailout);
+
+ // If the array has length zero, return the empty string.
+ __ LoadP(array_length, FieldMemOperand(array, JSArray::kLengthOffset));
+ __ SmiUntag(array_length);
+ __ CmpP(array_length, Operand::Zero());
+ __ bne(&non_trivial_array, Label::kNear);
+ __ LoadRoot(r2, Heap::kempty_stringRootIndex);
+ __ b(&done);
+
+ __ bind(&non_trivial_array);
+
+ // Get the FixedArray containing array's elements.
+ elements = array;
+ __ LoadP(elements, FieldMemOperand(array, JSArray::kElementsOffset));
+ array = no_reg; // End of array's live range.
+
+ // Check that all array elements are sequential one-byte strings, and
+ // accumulate the sum of their lengths, as a smi-encoded value.
+ __ LoadImmP(string_length, Operand::Zero());
+ __ AddP(element, elements, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ __ ShiftLeftP(elements_end, array_length, Operand(kPointerSizeLog2));
+ __ AddP(elements_end, element);
+ // Loop condition: while (element < elements_end).
+ // Live values in registers:
+ // elements: Fixed array of strings.
+ // array_length: Length of the fixed array of strings (not smi)
+ // separator: Separator string
+ // string_length: Accumulated sum of string lengths (smi).
+ // element: Current array element.
+ // elements_end: Array end.
+ if (generate_debug_code_) {
+ __ CmpP(array_length, Operand::Zero());
+ __ Assert(gt, kNoEmptyArraysHereInEmitFastOneByteArrayJoin);
+ }
+ __ bind(&loop);
+ __ LoadP(string, MemOperand(element));
+ __ AddP(element, Operand(kPointerSize));
+ __ JumpIfSmi(string, &bailout);
+ __ LoadP(scratch1, FieldMemOperand(string, HeapObject::kMapOffset));
+ __ LoadlB(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
+ __ JumpIfInstanceTypeIsNotSequentialOneByte(scratch1, scratch2, &bailout);
+ __ LoadP(scratch1, FieldMemOperand(string, SeqOneByteString::kLengthOffset));
+
+ __ AddAndCheckForOverflow(string_length, string_length, scratch1, scratch2,
+ r0);
+ __ BranchOnOverflow(&bailout);
+
+ __ CmpP(element, elements_end);
+ __ blt(&loop);
+
+ // If array_length is 1, return elements[0], a string.
+ __ CmpP(array_length, Operand(1));
+ __ bne(¬_size_one_array, Label::kNear);
+ __ LoadP(r2, FieldMemOperand(elements, FixedArray::kHeaderSize));
+ __ b(&done);
+
+ __ bind(¬_size_one_array);
+
+ // Live values in registers:
+ // separator: Separator string
+ // array_length: Length of the array.
+ // string_length: Sum of string lengths (smi).
+ // elements: FixedArray of strings.
+
+ // Check that the separator is a flat one-byte string.
+ __ JumpIfSmi(separator, &bailout);
+ __ LoadP(scratch1, FieldMemOperand(separator, HeapObject::kMapOffset));
+ __ LoadlB(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
+ __ JumpIfInstanceTypeIsNotSequentialOneByte(scratch1, scratch2, &bailout);
+
+ // Add (separator length times array_length) - separator length to the
+ // string_length to get the length of the result string.
+ __ LoadP(scratch1,
+ FieldMemOperand(separator, SeqOneByteString::kLengthOffset));
+ __ SubP(string_length, string_length, scratch1);
+#if V8_TARGET_ARCH_S390X
+ __ SmiUntag(scratch1, scratch1);
+ __ LoadRR(scratch2, array_length);
+ __ mr_z(r0, scratch1); // r0:r1 = r1 * scratch1
+ // Check for smi overflow. No overflow if higher 33 bits of 64-bit result are
+ // zero.
+ __ lr(ip, r1);
+ __ sra(ip, Operand(31));
+ __ cr_z(ip, r0);
+ // TODO(JOHN): The above 3 instr expended from 31-bit TestIfInt32
+ // __ TestIfInt32(scratch2, scratch1, ip);
+ __ bne(&bailout /*, cr0*/);
+ __ SmiTag(scratch2, scratch2);
+#else
+ // array_length is not smi but the other values are, so the result is a smi
+ __ LoadRR(scratch2, array_length); // scratch2 = r1
+ __ mr_z(r0, scratch1); // r0:r1 = r1 * scratch1
+ // Check for smi overflow. No overflow if higher 33 bits of 64-bit result are
+ // zero.
+ __ CmpP(r0, Operand::Zero());
+ __ bne(&bailout);
+ // TODO(john): TestIfInt32 expanded into the following two instructions
+ __ ShiftRightArith(ip, r0, Operand(31));
+ __ CmpP(ip, scratch2);
+ // __ TestSignBit32(scratch2, r0);
+ __ bne(&bailout /*, cr0*/);
+#endif
+
+ __ AddAndCheckForOverflow(string_length, string_length, scratch2, scratch1,
+ r0);
+ __ BranchOnOverflow(&bailout);
+ __ SmiUntag(string_length);
+
+ // Get first element in the array to free up the elements register to be used
+ // for the result.
+ __ AddP(element, elements, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
+ result = elements; // End of live range for elements.
+ elements = no_reg;
+ // Live values in registers:
+ // element: First array element
+ // separator: Separator string
+ // string_length: Length of result string (not smi)
+ // array_length: Length of the array.
+ __ AllocateOneByteString(result, string_length, scratch1, scratch2,
+ elements_end, &bailout);
+ // Prepare for looping. Set up elements_end to end of the array. Set
+ // result_pos to the position of the result where to write the first
+ // character.
+ __ ShiftLeftP(elements_end, array_length, Operand(kPointerSizeLog2));
+ __ AddP(elements_end, element);
+ result_pos = array_length; // End of live range for array_length.
+ array_length = no_reg;
+ __ AddP(result_pos, result,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+
+ // Check the length of the separator.
+ __ LoadP(scratch1,
+ FieldMemOperand(separator, SeqOneByteString::kLengthOffset));
+ __ CmpSmiLiteral(scratch1, Smi::FromInt(1), r0);
+ __ beq(&one_char_separator);
+ __ bgt(&long_separator);
+
+ // Empty separator case
+ __ bind(&empty_separator_loop);
+ // Live values in registers:
+ // result_pos: the position to which we are currently copying characters.
+ // element: Current array element.
+ // elements_end: Array end.
+
+ // Copy next array element to the result.
+ __ LoadP(string, MemOperand(element));
+ __ AddP(element, Operand(kPointerSize));
+ __ LoadP(string_length, FieldMemOperand(string, String::kLengthOffset));
+ __ SmiUntag(string_length);
+ __ AddP(string, string,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ CopyBytes(string, result_pos, string_length, scratch1);
+ __ CmpP(element, elements_end);
+ __ blt(&empty_separator_loop); // End while (element < elements_end).
+ DCHECK(result.is(r2));
+ __ b(&done);
+
+ // One-character separator case
+ __ bind(&one_char_separator);
+ // Replace separator with its one-byte character value.
+ __ LoadlB(separator,
+ FieldMemOperand(separator, SeqOneByteString::kHeaderSize));
+ // Jump into the loop after the code that copies the separator, so the first
+ // element is not preceded by a separator
+ __ b(&one_char_separator_loop_entry);
+
+ __ bind(&one_char_separator_loop);
+ // Live values in registers:
+ // result_pos: the position to which we are currently copying characters.
+ // element: Current array element.
+ // elements_end: Array end.
+ // separator: Single separator one-byte char (in lower byte).
+
+ // Copy the separator character to the result.
+ __ stc(separator, MemOperand(result_pos));
+ __ AddP(result_pos, Operand(1));
+
+ // Copy next array element to the result.
+ __ bind(&one_char_separator_loop_entry);
+ __ LoadP(string, MemOperand(element));
+ __ AddP(element, Operand(kPointerSize));
+ __ LoadP(string_length, FieldMemOperand(string, String::kLengthOffset));
+ __ SmiUntag(string_length);
+ __ AddP(string,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ CopyBytes(string, result_pos, string_length, scratch1);
+ __ CmpLogicalP(element, elements_end);
+ __ blt(&one_char_separator_loop); // End while (element < elements_end).
+ DCHECK(result.is(r2));
+ __ b(&done);
+
+ // Long separator case (separator is more than one character). Entry is at the
+ // label long_separator below.
+ __ bind(&long_separator_loop);
+ // Live values in registers:
+ // result_pos: the position to which we are currently copying characters.
+ // element: Current array element.
+ // elements_end: Array end.
+ // separator: Separator string.
+
+ // Copy the separator to the result.
+ __ LoadP(string_length, FieldMemOperand(separator, String::kLengthOffset));
+ __ SmiUntag(string_length);
+ __ AddP(string, separator,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ CopyBytes(string, result_pos, string_length, scratch1);
+
+ __ bind(&long_separator);
+ __ LoadP(string, MemOperand(element));
+ __ AddP(element, Operand(kPointerSize));
+ __ LoadP(string_length, FieldMemOperand(string, String::kLengthOffset));
+ __ SmiUntag(string_length);
+ __ AddP(string,
+ Operand(SeqOneByteString::kHeaderSize - kHeapObjectTag));
+ __ CopyBytes(string, result_pos, string_length, scratch1);
+ __ CmpLogicalP(element, elements_end);
+ __ blt(&long_separator_loop); // End while (element < elements_end).
+ DCHECK(result.is(r2));
+ __ b(&done);
+
+ __ bind(&bailout);
+ __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ bind(&done);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitDebugIsActive(CallRuntime* expr) {
+ DCHECK(expr->arguments()->length() == 0);
+ ExternalReference debug_is_active =
+ ExternalReference::debug_is_active_address(isolate());
+ __ mov(ip, Operand(debug_is_active));
+ __ LoadlB(r2, MemOperand(ip));
+ __ SmiTag(r2);
+ context()->Plug(r2);
+}
+
+
+void FullCodeGenerator::EmitCallSuperWithSpread(CallRuntime* expr) {
+ // Assert: expr === CallRuntime("ReflectConstruct")
+ DCHECK_EQ(1, expr->arguments()->length());
+ CallRuntime* call = expr->arguments()->at(0)->AsCallRuntime();
+
+ ZoneList<Expression*>* args = call->arguments();
+ DCHECK_EQ(3, args->length());
+
+ SuperCallReference* super_call_ref = args->at(0)->AsSuperCallReference();
+ DCHECK_NOT_NULL(super_call_ref);
+
+ // Load ReflectConstruct function
+ EmitLoadJSRuntimeFunction(call);
+
+ // Push the target function under the receiver.
+ __ LoadP(r0, MemOperand(sp, 0));
+ __ push(r0);
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+
+ // Push super constructor
+ EmitLoadSuperConstructor(super_call_ref);
+ __ Push(result_register());
+
+ // Push arguments array
+ VisitForStackValue(args->at(1));
+
+ // Push NewTarget
+ DCHECK(args->at(2)->IsVariableProxy());
+ VisitForStackValue(args->at(2));
+
+ EmitCallJSRuntimeFunction(call);
+
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ context()->DropAndPlug(1, r2);
+
+ // TODO(mvstanton): with FLAG_vector_stores this needs a slot id.
+ EmitInitializeThisAfterSuper(super_call_ref);
+}
+
+
+void FullCodeGenerator::EmitLoadJSRuntimeFunction(CallRuntime* expr) {
+ // Push the builtins object as the receiver.
+ Register receiver = LoadDescriptor::ReceiverRegister();
+ __ LoadP(receiver, GlobalObjectOperand());
+ __ LoadP(receiver, FieldMemOperand(receiver, GlobalObject::kBuiltinsOffset));
+ __ push(receiver);
+
+ // Load the function from the receiver.
+ __ mov(LoadDescriptor::NameRegister(), Operand(expr->name()));
+ __ mov(LoadDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(expr->CallRuntimeFeedbackSlot())));
+ CallLoadIC(NOT_CONTEXTUAL);
+}
+
+
+void FullCodeGenerator::EmitCallJSRuntimeFunction(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+
+ SetExpressionPosition(expr);
+ CallFunctionStub stub(isolate(), arg_count, NO_CALL_FUNCTION_FLAGS);
+ __ LoadP(r3, MemOperand(sp, (arg_count + 1) * kPointerSize), r0);
+ __ CallStub(&stub);
+}
+
+
+void FullCodeGenerator::VisitCallRuntime(CallRuntime* expr) {
+ ZoneList<Expression*>* args = expr->arguments();
+ int arg_count = args->length();
+
+ if (expr->is_jsruntime()) {
+ Comment cmnt(masm_, "[ CallRuntime");
+ EmitLoadJSRuntimeFunction(expr);
+
+ // Push the target function under the receiver.
+ __ LoadP(ip, MemOperand(sp, 0));
+ __ push(ip);
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+
+ // Push the arguments ("left-to-right").
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ PrepareForBailoutForId(expr->CallId(), NO_REGISTERS);
+ EmitCallJSRuntimeFunction(expr);
+
+ // Restore context register.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+
+ context()->DropAndPlug(1, r2);
+
+ } else {
+ const Runtime::Function* function = expr->function();
+ switch (function->function_id) {
+#define CALL_INTRINSIC_GENERATOR(Name) \
+ case Runtime::kInline##Name: { \
+ Comment cmnt(masm_, "[ Inline" #Name); \
+ return Emit##Name(expr); \
+ }
+ FOR_EACH_FULL_CODE_INTRINSIC(CALL_INTRINSIC_GENERATOR)
+#undef CALL_INTRINSIC_GENERATOR
+ default: {
+ Comment cmnt(masm_, "[ CallRuntime for unhandled intrinsic");
+ // Push the arguments ("left-to-right").
+ for (int i = 0; i < arg_count; i++) {
+ VisitForStackValue(args->at(i));
+ }
+
+ // Call the C runtime function.
+ PrepareForBailoutForId(expr->CallId(), NO_REGISTERS);
+ __ CallRuntime(expr->function(), arg_count);
+ context()->Plug(r2);
+ }
+ }
+ }
+}
+
+
+void FullCodeGenerator::VisitUnaryOperation(UnaryOperation* expr) {
+ switch (expr->op()) {
+ case Token::DELETE: {
+ Comment cmnt(masm_, "[ UnaryOperation (DELETE)");
+ Property* property = expr->expression()->AsProperty();
+ VariableProxy* proxy = expr->expression()->AsVariableProxy();
+
+ if (property != NULL) {
+ VisitForStackValue(property->obj());
+ VisitForStackValue(property->key());
+ __ LoadSmiLiteral(r3, Smi::FromInt(language_mode()));
+ __ push(r3);
+ __ InvokeBuiltin(Builtins::DELETE, CALL_FUNCTION);
+ context()->Plug(r2);
+ } else if (proxy != NULL) {
+ Variable* var = proxy->var();
+ // Delete of an unqualified identifier is disallowed in strict mode but
+ // "delete this" is allowed.
+ bool is_this = var->HasThisName(isolate());
+ DCHECK(is_sloppy(language_mode()) || is_this);
+ if (var->IsUnallocatedOrGlobalSlot()) {
+ __ LoadP(r4, GlobalObjectOperand());
+ __ mov(r3, Operand(var->name()));
+ __ LoadSmiLiteral(r2, Smi::FromInt(SLOPPY));
+ __ Push(r4, r3, r2);
+ __ InvokeBuiltin(Builtins::DELETE, CALL_FUNCTION);
+ context()->Plug(r2);
+ } else if (var->IsStackAllocated() || var->IsContextSlot()) {
+ // Result of deleting non-global, non-dynamic variables is false.
+ // The subexpression does not have side effects.
+ context()->Plug(is_this);
+ } else {
+ // Non-global variable. Call the runtime to try to delete from the
+ // context where the variable was introduced.
+ DCHECK(!context_register().is(r4));
+ __ mov(r4, Operand(var->name()));
+ __ Push(context_register(), r4);
+ __ CallRuntime(Runtime::kDeleteLookupSlot, 2);
+ context()->Plug(r2);
+ }
+ } else {
+ // Result of deleting non-property, non-variable reference is true.
+ // The subexpression may have side effects.
+ VisitForEffect(expr->expression());
+ context()->Plug(true);
+ }
+ break;
+ }
+
+ case Token::VOID: {
+ Comment cmnt(masm_, "[ UnaryOperation (VOID)");
+ VisitForEffect(expr->expression());
+ context()->Plug(Heap::kUndefinedValueRootIndex);
+ break;
+ }
+
+ case Token::NOT: {
+ Comment cmnt(masm_, "[ UnaryOperation (NOT)");
+ if (context()->IsEffect()) {
+ // Unary NOT has no side effects so it's only necessary to visit the
+ // subexpression. Match the optimizing compiler by not branching.
+ VisitForEffect(expr->expression());
+ } else if (context()->IsTest()) {
+ const TestContext* test = TestContext::cast(context());
+ // The labels are swapped for the recursive call.
+ VisitForControl(expr->expression(), test->false_label(),
+ test->true_label(), test->fall_through());
+ context()->Plug(test->true_label(), test->false_label());
+ } else {
+ // We handle value contexts explicitly rather than simply visiting
+ // for control and plugging the control flow into the context,
+ // because we need to prepare a pair of extra administrative AST ids
+ // for the optimizing compiler.
+ DCHECK(context()->IsAccumulatorValue() || context()->IsStackValue());
+ Label materialize_true, materialize_false, done;
+ VisitForControl(expr->expression(), &materialize_false,
+ &materialize_true, &materialize_true);
+ __ bind(&materialize_true);
+ PrepareForBailoutForId(expr->MaterializeTrueId(), NO_REGISTERS);
+ __ LoadRoot(r2, Heap::kTrueValueRootIndex);
+ if (context()->IsStackValue()) __ push(r2);
+ __ b(&done);
+ __ bind(&materialize_false);
+ PrepareForBailoutForId(expr->MaterializeFalseId(), NO_REGISTERS);
+ __ LoadRoot(r2, Heap::kFalseValueRootIndex);
+ if (context()->IsStackValue()) __ push(r2);
+ __ bind(&done);
+ }
+ break;
+ }
+
+ case Token::TYPEOF: {
+ Comment cmnt(masm_, "[ UnaryOperation (TYPEOF)");
+ {
+ AccumulatorValueContext context(this);
+ VisitForTypeofValue(expr->expression());
+ }
+ __ LoadRR(r5, r2);
+ TypeofStub typeof_stub(isolate());
+ __ CallStub(&typeof_stub);
+ context()->Plug(r2);
+ break;
+ }
+
+ default:
+ UNREACHABLE();
+ }
+}
+
+
+void FullCodeGenerator::VisitCountOperation(CountOperation* expr) {
+ DCHECK(expr->expression()->IsValidReferenceExpression());
+
+ Comment cmnt(masm_, "[ CountOperation");
+
+ Property* prop = expr->expression()->AsProperty();
+ LhsKind assign_type = Property::GetAssignType(prop);
+
+ // Evaluate expression and get value.
+ if (assign_type == VARIABLE) {
+ DCHECK(expr->expression()->AsVariableProxy()->var() != NULL);
+ AccumulatorValueContext context(this);
+ EmitVariableLoad(expr->expression()->AsVariableProxy());
+ } else {
+ // Reserve space for result of postfix operation.
+ if (expr->is_postfix() && !context()->IsEffect()) {
+ __ LoadSmiLiteral(ip, Smi::FromInt(0));
+ __ push(ip);
+ }
+ switch (assign_type) {
+ case NAMED_PROPERTY: {
+ // Put the object both on the stack and in the register.
+ VisitForStackValue(prop->obj());
+ __ LoadP(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0));
+ EmitNamedPropertyLoad(prop);
+ break;
+ }
+
+ case NAMED_SUPER_PROPERTY: {
+ VisitForStackValue(prop->obj()->AsSuperPropertyReference()->this_var());
+ VisitForAccumulatorValue(
+ prop->obj()->AsSuperPropertyReference()->home_object());
+ __ Push(result_register());
+ const Register scratch = r3;
+ __ LoadP(scratch, MemOperand(sp, kPointerSize));
+ __ Push(scratch, result_register());
+ EmitNamedSuperPropertyLoad(prop);
+ break;
+ }
+
+ case KEYED_SUPER_PROPERTY: {
+ VisitForStackValue(prop->obj()->AsSuperPropertyReference()->this_var());
+ VisitForAccumulatorValue(
+ prop->obj()->AsSuperPropertyReference()->home_object());
+ const Register scratch = r3;
+ const Register scratch1 = r4;
+ __ LoadRR(scratch, result_register());
+ VisitForAccumulatorValue(prop->key());
+ __ Push(scratch, result_register());
+ __ LoadP(scratch1, MemOperand(sp, 2 * kPointerSize));
+ __ Push(scratch1, scratch, result_register());
+ EmitKeyedSuperPropertyLoad(prop);
+ break;
+ }
+
+ case KEYED_PROPERTY: {
+ VisitForStackValue(prop->obj());
+ VisitForStackValue(prop->key());
+ __ LoadP(LoadDescriptor::ReceiverRegister(),
+ MemOperand(sp, 1 * kPointerSize));
+ __ LoadP(LoadDescriptor::NameRegister(), MemOperand(sp, 0));
+ EmitKeyedPropertyLoad(prop);
+ break;
+ }
+
+ case VARIABLE:
+ UNREACHABLE();
+ }
+ }
+
+ // We need a second deoptimization point after loading the value
+ // in case evaluating the property load my have a side effect.
+ if (assign_type == VARIABLE) {
+ PrepareForBailout(expr->expression(), TOS_REG);
+ } else {
+ PrepareForBailoutForId(prop->LoadId(), TOS_REG);
+ }
+
+ // Inline smi case if we are in a loop.
+ Label stub_call, done;
+ JumpPatchSite patch_site(masm_);
+
+ int count_value = expr->op() == Token::INC ? 1 : -1;
+ if (ShouldInlineSmiCase(expr->op())) {
+ Label slow;
+ patch_site.EmitJumpIfNotSmi(r2, &slow);
+
+ // Save result for postfix expressions.
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ // Save the result on the stack. If we have a named or keyed property
+ // we store the result under the receiver that is currently on top
+ // of the stack.
+ switch (assign_type) {
+ case VARIABLE:
+ __ push(r2);
+ break;
+ case NAMED_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+ break;
+ case NAMED_SUPER_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 2 * kPointerSize));
+ break;
+ case KEYED_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 2 * kPointerSize));
+ break;
+ case KEYED_SUPER_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 3 * kPointerSize));
+ break;
+ }
+ }
+ }
+
+ Register scratch1 = r3;
+ Register scratch2 = r4;
+ __ LoadSmiLiteral(scratch1, Smi::FromInt(count_value));
+ __ AddAndCheckForOverflow(r2, r2, scratch1, scratch2, r0);
+ __ BranchOnNoOverflow(&done);
+ // Call stub. Undo operation first.
+ __ SubP(r2, r2, scratch1);
+ __ b(&stub_call);
+ __ bind(&slow);
+ }
+ if (!is_strong(language_mode())) {
+ ToNumberStub convert_stub(isolate());
+ __ CallStub(&convert_stub);
+ PrepareForBailoutForId(expr->ToNumberId(), TOS_REG);
+ }
+
+ // Save result for postfix expressions.
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ // Save the result on the stack. If we have a named or keyed property
+ // we store the result under the receiver that is currently on top
+ // of the stack.
+ switch (assign_type) {
+ case VARIABLE:
+ __ push(r2);
+ break;
+ case NAMED_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, kPointerSize));
+ break;
+ case NAMED_SUPER_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 2 * kPointerSize));
+ break;
+ case KEYED_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 2 * kPointerSize));
+ break;
+ case KEYED_SUPER_PROPERTY:
+ __ StoreP(r2, MemOperand(sp, 3 * kPointerSize));
+ break;
+ }
+ }
+ }
+
+ __ bind(&stub_call);
+ __ LoadRR(r3, r2);
+ __ LoadSmiLiteral(r2, Smi::FromInt(count_value));
+
+ SetExpressionPosition(expr);
+
+ Handle<Code> code = CodeFactory::BinaryOpIC(isolate(), Token::ADD,
+ strength(language_mode())).code();
+ CallIC(code, expr->CountBinOpFeedbackId());
+ patch_site.EmitPatchInfo();
+ __ bind(&done);
+
+ if (is_strong(language_mode())) {
+ PrepareForBailoutForId(expr->ToNumberId(), TOS_REG);
+ }
+ // Store the value returned in r2.
+ switch (assign_type) {
+ case VARIABLE:
+ if (expr->is_postfix()) {
+ {
+ EffectContext context(this);
+ EmitVariableAssignment(expr->expression()->AsVariableProxy()->var(),
+ Token::ASSIGN, expr->CountSlot());
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ context.Plug(r2);
+ }
+ // For all contexts except EffectConstant We have the result on
+ // top of the stack.
+ if (!context()->IsEffect()) {
+ context()->PlugTOS();
+ }
+ } else {
+ EmitVariableAssignment(expr->expression()->AsVariableProxy()->var(),
+ Token::ASSIGN, expr->CountSlot());
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ context()->Plug(r2);
+ }
+ break;
+ case NAMED_PROPERTY: {
+ __ mov(StoreDescriptor::NameRegister(),
+ Operand(prop->key()->AsLiteral()->value()));
+ __ pop(StoreDescriptor::ReceiverRegister());
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->CountSlot());
+ CallStoreIC();
+ } else {
+ CallStoreIC(expr->CountStoreFeedbackId());
+ }
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ context()->PlugTOS();
+ }
+ } else {
+ context()->Plug(r2);
+ }
+ break;
+ }
+ case NAMED_SUPER_PROPERTY: {
+ EmitNamedSuperPropertyStore(prop);
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ context()->PlugTOS();
+ }
+ } else {
+ context()->Plug(r2);
+ }
+ break;
+ }
+ case KEYED_SUPER_PROPERTY: {
+ EmitKeyedSuperPropertyStore(prop);
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ context()->PlugTOS();
+ }
+ } else {
+ context()->Plug(r2);
+ }
+ break;
+ }
+ case KEYED_PROPERTY: {
+ __ Pop(StoreDescriptor::ReceiverRegister(),
+ StoreDescriptor::NameRegister());
+ Handle<Code> ic =
+ CodeFactory::KeyedStoreIC(isolate(), language_mode()).code();
+ if (FLAG_vector_stores) {
+ EmitLoadStoreICSlot(expr->CountSlot());
+ CallIC(ic);
+ } else {
+ CallIC(ic, expr->CountStoreFeedbackId());
+ }
+ PrepareForBailoutForId(expr->AssignmentId(), TOS_REG);
+ if (expr->is_postfix()) {
+ if (!context()->IsEffect()) {
+ context()->PlugTOS();
+ }
+ } else {
+ context()->Plug(r2);
+ }
+ break;
+ }
+ }
+}
+
+
+void FullCodeGenerator::EmitLiteralCompareTypeof(Expression* expr,
+ Expression* sub_expr,
+ Handle<String> check) {
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ {
+ AccumulatorValueContext context(this);
+ VisitForTypeofValue(sub_expr);
+ }
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+
+ Factory* factory = isolate()->factory();
+ if (String::Equals(check, factory->number_string())) {
+ __ JumpIfSmi(r2, if_true);
+ __ LoadP(r2, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ CompareRoot(r2, Heap::kHeapNumberMapRootIndex);
+ Split(eq, if_true, if_false, fall_through);
+ } else if (String::Equals(check, factory->string_string())) {
+ __ JumpIfSmi(r2, if_false);
+ // Check for undetectable objects => false.
+ __ CompareObjectType(r2, r2, r3, FIRST_NONSTRING_TYPE);
+ __ bge(if_false);
+ __ tm(FieldMemOperand(r2, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ Split(eq, if_true, if_false, fall_through, cr0);
+ } else if (String::Equals(check, factory->symbol_string())) {
+ __ JumpIfSmi(r2, if_false);
+ __ CompareObjectType(r2, r2, r3, SYMBOL_TYPE);
+ Split(eq, if_true, if_false, fall_through);
+ } else if (String::Equals(check, factory->boolean_string())) {
+ __ CompareRoot(r2, Heap::kTrueValueRootIndex);
+ __ beq(if_true);
+ __ CompareRoot(r2, Heap::kFalseValueRootIndex);
+ Split(eq, if_true, if_false, fall_through);
+ } else if (String::Equals(check, factory->undefined_string())) {
+ __ CompareRoot(r2, Heap::kUndefinedValueRootIndex);
+ __ beq(if_true);
+ __ JumpIfSmi(r2, if_false);
+ // Check for undetectable objects => true.
+ __ LoadP(r2, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ tm(FieldMemOperand(r2, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ Split(ne, if_true, if_false, fall_through, cr0);
+
+ } else if (String::Equals(check, factory->function_string())) {
+ __ JumpIfSmi(r2, if_false);
+ STATIC_ASSERT(NUM_OF_CALLABLE_SPEC_OBJECT_TYPES == 2);
+ __ CompareObjectType(r2, r2, r3, JS_FUNCTION_TYPE);
+ __ beq(if_true);
+ __ CmpP(r3, Operand(JS_FUNCTION_PROXY_TYPE));
+ Split(eq, if_true, if_false, fall_through);
+ } else if (String::Equals(check, factory->object_string())) {
+ __ JumpIfSmi(r2, if_false);
+ __ CompareRoot(r2, Heap::kNullValueRootIndex);
+ __ beq(if_true);
+ // Check for JS objects => true.
+ __ CompareObjectType(r2, r2, r3, FIRST_NONCALLABLE_SPEC_OBJECT_TYPE);
+ __ blt(if_false);
+ __ CompareInstanceType(r2, r3, LAST_NONCALLABLE_SPEC_OBJECT_TYPE);
+ __ bgt(if_false);
+ // Check for undetectable objects => false.
+ __ tm(FieldMemOperand(r2, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ Split(eq, if_true, if_false, fall_through, cr0);
+ } else {
+ if (if_false != fall_through) __ b(if_false);
+ }
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::VisitCompareOperation(CompareOperation* expr) {
+ Comment cmnt(masm_, "[ CompareOperation");
+ SetExpressionPosition(expr);
+
+ // First we try a fast inlined version of the compare when one of
+ // the operands is a literal.
+ if (TryLiteralCompare(expr)) return;
+
+ // Always perform the comparison for its control flow. Pack the result
+ // into the expression's context after the comparison is performed.
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ Token::Value op = expr->op();
+ VisitForStackValue(expr->left());
+ switch (op) {
+ case Token::IN:
+ VisitForStackValue(expr->right());
+ __ InvokeBuiltin(Builtins::IN, CALL_FUNCTION);
+ PrepareForBailoutBeforeSplit(expr, false, NULL, NULL);
+ __ CompareRoot(r2, Heap::kTrueValueRootIndex);
+ Split(eq, if_true, if_false, fall_through);
+ break;
+
+ case Token::INSTANCEOF: {
+ VisitForStackValue(expr->right());
+ InstanceofStub stub(isolate(), InstanceofStub::kNoFlags);
+ __ CallStub(&stub);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ // The stub returns 0 for true.
+ __ CmpP(r2, Operand::Zero());
+ Split(eq, if_true, if_false, fall_through);
+ break;
+ }
+
+ default: {
+ VisitForAccumulatorValue(expr->right());
+ Condition cond = CompareIC::ComputeCondition(op);
+ __ pop(r3);
+
+ bool inline_smi_code = ShouldInlineSmiCase(op);
+ JumpPatchSite patch_site(masm_);
+ if (inline_smi_code) {
+ Label slow_case;
+ __ LoadRR(r4, r3);
+ __ OrP(r4, r2);
+ patch_site.EmitJumpIfNotSmi(r4, &slow_case);
+ __ CmpP(r3, r2);
+ Split(cond, if_true, if_false, NULL);
+ __ bind(&slow_case);
+ }
+
+ Handle<Code> ic = CodeFactory::CompareIC(
+ isolate(), op, strength(language_mode())).code();
+ CallIC(ic, expr->CompareOperationFeedbackId());
+ patch_site.EmitPatchInfo();
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ __ CmpP(r2, Operand::Zero());
+ Split(cond, if_true, if_false, fall_through);
+ }
+ }
+
+ // Convert the result of the comparison into one expected for this
+ // expression's context.
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::EmitLiteralCompareNil(CompareOperation* expr,
+ Expression* sub_expr,
+ NilValue nil) {
+ Label materialize_true, materialize_false;
+ Label* if_true = NULL;
+ Label* if_false = NULL;
+ Label* fall_through = NULL;
+ context()->PrepareTest(&materialize_true, &materialize_false, &if_true,
+ &if_false, &fall_through);
+
+ VisitForAccumulatorValue(sub_expr);
+ PrepareForBailoutBeforeSplit(expr, true, if_true, if_false);
+ if (expr->op() == Token::EQ_STRICT) {
+ Heap::RootListIndex nil_value = nil == kNullValue
+ ? Heap::kNullValueRootIndex
+ : Heap::kUndefinedValueRootIndex;
+ __ CompareRoot(r2, nil_value);
+ Split(eq, if_true, if_false, fall_through);
+ } else {
+ Handle<Code> ic = CompareNilICStub::GetUninitialized(isolate(), nil);
+ CallIC(ic, expr->CompareOperationFeedbackId());
+ __ CmpP(r2, Operand::Zero());
+ Split(ne, if_true, if_false, fall_through);
+ }
+ context()->Plug(if_true, if_false);
+}
+
+
+void FullCodeGenerator::VisitThisFunction(ThisFunction* expr) {
+ __ LoadP(r2, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ context()->Plug(r2);
+}
+
+
+Register FullCodeGenerator::result_register() { return r2; }
+
+
+Register FullCodeGenerator::context_register() { return cp; }
+
+
+void FullCodeGenerator::StoreToFrameField(int frame_offset, Register value) {
+ DCHECK_EQ(static_cast<int>(POINTER_SIZE_ALIGN(frame_offset)), frame_offset);
+ __ StoreP(value, MemOperand(fp, frame_offset));
+}
+
+
+void FullCodeGenerator::LoadContextField(Register dst, int context_index) {
+ __ LoadP(dst, ContextOperand(cp, context_index), r0);
+}
+
+
+void FullCodeGenerator::PushFunctionArgumentForContextAllocation() {
+ Scope* declaration_scope = scope()->DeclarationScope();
+ if (declaration_scope->is_script_scope() ||
+ declaration_scope->is_module_scope()) {
+ // Contexts nested in the native context have a canonical empty function
+ // as their closure, not the anonymous closure containing the global
+ // code. Pass a smi sentinel and let the runtime look up the empty
+ // function.
+ __ LoadSmiLiteral(ip, Smi::FromInt(0));
+ } else if (declaration_scope->is_eval_scope()) {
+ // Contexts created by a call to eval have the same closure as the
+ // context calling eval, not the anonymous closure containing the eval
+ // code. Fetch it from the context.
+ __ LoadP(ip, ContextOperand(cp, Context::CLOSURE_INDEX));
+ } else {
+ DCHECK(declaration_scope->is_function_scope());
+ __ LoadP(ip, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ }
+ __ push(ip);
+}
+
+
+// ----------------------------------------------------------------------------
+// Non-local control flow support.
+
+void FullCodeGenerator::EnterFinallyBlock() {
+ DCHECK(!result_register().is(r3));
+ // Store result register while executing finally block.
+ __ push(result_register());
+ // Cook return address in link register to stack (smi encoded Code* delta)
+ __ LoadRR(r3, r14);
+ __ CleanseP(r3);
+ __ mov(ip, Operand(masm_->CodeObject()));
+ __ SubP(r3, r3, ip);
+ __ SmiTag(r3);
+
+ // Store result register while executing finally block.
+ __ push(r3);
+
+ // Store pending message while executing finally block.
+ ExternalReference pending_message_obj =
+ ExternalReference::address_of_pending_message_obj(isolate());
+ __ mov(ip, Operand(pending_message_obj));
+ __ LoadP(r3, MemOperand(ip));
+ __ push(r3);
+
+ ClearPendingMessage();
+}
+
+
+void FullCodeGenerator::ExitFinallyBlock() {
+ DCHECK(!result_register().is(r3));
+ // Restore pending message from stack.
+ __ pop(r3);
+ ExternalReference pending_message_obj =
+ ExternalReference::address_of_pending_message_obj(isolate());
+ __ mov(ip, Operand(pending_message_obj));
+ __ StoreP(r3, MemOperand(ip));
+
+ // Restore result register from stack.
+ __ pop(r3);
+
+ // Uncook return address and return.
+ __ pop(result_register());
+ __ SmiUntag(r3);
+ __ mov(ip, Operand(masm_->CodeObject()));
+ __ AddP(ip, r3);
+ __ b(ip);
+}
+
+
+void FullCodeGenerator::ClearPendingMessage() {
+ DCHECK(!result_register().is(r3));
+ ExternalReference pending_message_obj =
+ ExternalReference::address_of_pending_message_obj(isolate());
+ __ LoadRoot(r3, Heap::kTheHoleValueRootIndex);
+ __ mov(ip, Operand(pending_message_obj));
+ __ StoreP(r3, MemOperand(ip));
+}
+
+
+void FullCodeGenerator::EmitLoadStoreICSlot(FeedbackVectorICSlot slot) {
+ DCHECK(FLAG_vector_stores && !slot.IsInvalid());
+ __ mov(VectorStoreICTrampolineDescriptor::SlotRegister(),
+ Operand(SmiFromSlot(slot)));
+}
+
+
+#undef __
+
+#if V8_TARGET_ARCH_S390X
+static const FourByteInstr kInterruptBranchInstruction = 0xA7A40011;
+static const FourByteInstr kOSRBranchInstruction = 0xA7040011;
+static const int16_t kBackEdgeBranchOffset = 0x11 * 2;
+#else
+static const FourByteInstr kInterruptBranchInstruction = 0xA7A4000D;
+static const FourByteInstr kOSRBranchInstruction = 0xA704000D;
+static const int16_t kBackEdgeBranchOffset = 0xD * 2;
+#endif
+
+void BackEdgeTable::PatchAt(Code* unoptimized_code, Address pc,
+ BackEdgeState target_state,
+ Code* replacement_code) {
+ Address call_address = Assembler::target_address_from_return_address(pc);
+ Address branch_address = call_address - 4;
+ CodePatcher patcher(branch_address, 4);
+
+ switch (target_state) {
+ case INTERRUPT: {
+ // <decrement profiling counter>
+ // bge <ok> ;; patched to GE BRC
+ // brasrl r14, <interrupt stub address>
+ // <reset profiling counter>
+ // ok-label
+ patcher.masm()->brc(ge, Operand(kBackEdgeBranchOffset));
+ break;
+ }
+ case ON_STACK_REPLACEMENT:
+ case OSR_AFTER_STACK_CHECK:
+ // <decrement profiling counter>
+ // brc 0x0, <ok> ;; patched to NOP BRC
+ // brasrl r14, <interrupt stub address>
+ // <reset profiling counter>
+ // ok-label ----- pc_after points here
+ patcher.masm()->brc(CC_NOP, Operand(kBackEdgeBranchOffset));
+ break;
+ }
+
+ // Replace the stack check address in the mov sequence with the
+ // entry address of the replacement code.
+ Assembler::set_target_address_at(call_address, unoptimized_code,
+ replacement_code->entry());
+
+ unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch(
+ unoptimized_code, call_address, replacement_code);
+}
+
+
+BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
+ Isolate* isolate, Code* unoptimized_code, Address pc) {
+ Address call_address = Assembler::target_address_from_return_address(pc);
+ Address branch_address = call_address - 4;
+ Address interrupt_address =
+ Assembler::target_address_at(call_address, unoptimized_code);
+
+ DCHECK(BRC == Instruction::S390OpcodeValue(branch_address));
+ // For interrupt, we expect a branch greater than or equal
+ // i.e. BRC 0xa, +XXXX (0xA7A4XXXX)
+ FourByteInstr br_instr = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(branch_address));
+ if (kInterruptBranchInstruction == br_instr) {
+ DCHECK(interrupt_address == isolate->builtins()->InterruptCheck()->entry());
+ return INTERRUPT;
+ }
+
+ // Expect BRC to be patched to NOP branch.
+ // i.e. BRC 0x0, +XXXX (0xA704XXXX)
+ USE(kOSRBranchInstruction);
+ DCHECK(kOSRBranchInstruction == br_instr);
+
+ if (interrupt_address == isolate->builtins()->OnStackReplacement()->entry()) {
+ return ON_STACK_REPLACEMENT;
+ }
+
+ DCHECK(interrupt_address ==
+ isolate->builtins()->OsrAfterStackCheck()->entry());
+ return OSR_AFTER_STACK_CHECK;
+}
+
+
+} // namespace internal
+} // namespace v8
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/interface-descriptors-s390.cc
@@ -0,0 +1,343 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/interface-descriptors.h"
+
+namespace v8 {
+namespace internal {
+
+const Register CallInterfaceDescriptor::ContextRegister() { return cp; }
+
+
+const Register LoadDescriptor::ReceiverRegister() { return r3; }
+const Register LoadDescriptor::NameRegister() { return r4; }
+const Register LoadDescriptor::SlotRegister() { return r2; }
+
+
+const Register LoadWithVectorDescriptor::VectorRegister() { return r5; }
+
+
+const Register StoreDescriptor::ReceiverRegister() { return r3; }
+const Register StoreDescriptor::NameRegister() { return r4; }
+const Register StoreDescriptor::ValueRegister() { return r2; }
+
+
+const Register VectorStoreICTrampolineDescriptor::SlotRegister() { return r6; }
+
+
+const Register VectorStoreICDescriptor::VectorRegister() { return r5; }
+
+
+const Register StoreTransitionDescriptor::MapRegister() { return r5; }
+
+
+const Register ElementTransitionAndStoreDescriptor::MapRegister() { return r5; }
+
+
+const Register InstanceofDescriptor::left() { return r2; }
+const Register InstanceofDescriptor::right() { return r3; }
+
+
+const Register ArgumentsAccessReadDescriptor::index() { return r3; }
+const Register ArgumentsAccessReadDescriptor::parameter_count() { return r2; }
+
+
+const Register ApiGetterDescriptor::function_address() { return r4; }
+
+
+const Register MathPowTaggedDescriptor::exponent() { return r4; }
+
+
+const Register MathPowIntegerDescriptor::exponent() {
+ return MathPowTaggedDescriptor::exponent();
+}
+
+
+const Register GrowArrayElementsDescriptor::ObjectRegister() { return r2; }
+const Register GrowArrayElementsDescriptor::KeyRegister() { return r5; }
+
+
+void FastNewClosureDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r4};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void FastNewContextDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ToNumberDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void NumberToStringDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void TypeofDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r5};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void FastCloneShallowArrayDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r5, r4, r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void FastCloneShallowObjectDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r5, r4, r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CreateAllocationSiteDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r4, r5};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CreateWeakCellDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r4, r5, r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void StoreArrayLiteralElementDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r5, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CallFunctionDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CallFunctionWithFeedbackDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3, r5};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CallFunctionWithFeedbackAndVectorDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3, r5, r4};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CallConstructDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ // r2 : number of arguments
+ // r3 : the function to call
+ // r4 : feedback vector
+ // r5 : (only if r4 is not the megamorphic symbol) slot in feedback
+ // vector (Smi)
+ // TODO(turbofan): So far we don't gather type feedback and hence skip the
+ // slot parameter, but ArrayConstructStub needs the vector to be undefined.
+ Register registers[] = {r2, r3, r4};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void RegExpConstructResultDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r4, r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void TransitionElementsKindDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r2, r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void AllocateHeapNumberDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ data->InitializePlatformSpecific(0, nullptr, nullptr);
+}
+
+
+void ArrayConstructorConstantArgCountDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ // register state
+ // r2 -- number of arguments
+ // r3 -- function
+ // r4 -- allocation site with elements kind
+ Register registers[] = {r3, r4};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ArrayConstructorDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ // stack param count needs (constructor pointer, and single argument)
+ Register registers[] = {r3, r4, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void InternalArrayConstructorConstantArgCountDescriptor::
+ InitializePlatformSpecific(CallInterfaceDescriptorData* data) {
+ // register state
+ // r2 -- number of arguments
+ // r3 -- constructor function
+ Register registers[] = {r3};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void InternalArrayConstructorDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ // stack param count needs (constructor pointer, and single argument)
+ Register registers[] = {r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CompareDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CompareNilDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ToBooleanDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void BinaryOpDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void BinaryOpWithAllocationSiteDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r4, r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void StringAddDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {r3, r2};
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void KeyedDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r4, // key
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void NamedDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r4, // name
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void CallHandlerDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r2, // receiver
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ArgumentAdaptorDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r3, // JSFunction
+ r2, // actual number of arguments
+ r4, // expected number of arguments
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ApiFunctionDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r2, // callee
+ r6, // call_data
+ r4, // holder
+ r3, // api_function_address
+ r5, // actual number of arguments
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void ApiAccessorDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r2, // callee
+ r6, // call_data
+ r4, // holder
+ r3, // api_function_address
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+
+
+void MathRoundVariantDescriptor::InitializePlatformSpecific(
+ CallInterfaceDescriptorData* data) {
+ Register registers[] = {
+ r3, // math rounding function
+ r5, // vector slot id
+ };
+ data->InitializePlatformSpecific(arraysize(registers), registers);
+}
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/lithium-codegen-s390.cc
@@ -0,0 +1,6392 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#include "src/base/bits.h"
+#include "src/code-factory.h"
+#include "src/code-stubs.h"
+#include "src/cpu-profiler.h"
+#include "src/hydrogen-osr.h"
+
+#include "src/ic/ic.h"
+#include "src/ic/stub-cache.h"
+#include "src/s390/lithium-codegen-s390.h"
+#include "src/s390/lithium-gap-resolver-s390.h"
+
+namespace v8 {
+namespace internal {
+
+
+class SafepointGenerator final : public CallWrapper {
+ public:
+ SafepointGenerator(LCodeGen* codegen, LPointerMap* pointers,
+ Safepoint::DeoptMode mode)
+ : codegen_(codegen), pointers_(pointers), deopt_mode_(mode) {}
+ virtual ~SafepointGenerator() {}
+
+ void BeforeCall(int call_size) const override {}
+
+ void AfterCall() const override {
+ codegen_->RecordSafepoint(pointers_, deopt_mode_);
+ }
+
+ private:
+ LCodeGen* codegen_;
+ LPointerMap* pointers_;
+ Safepoint::DeoptMode deopt_mode_;
+};
+
+
+#define __ masm()->
+
+bool LCodeGen::GenerateCode() {
+ LPhase phase("Z_Code generation", chunk());
+ DCHECK(is_unused());
+ status_ = GENERATING;
+
+ // Open a frame scope to indicate that there is a frame on the stack. The
+ // NONE indicates that the scope shouldn't actually generate code to set up
+ // the frame (that is done in GeneratePrologue).
+ FrameScope frame_scope(masm_, StackFrame::NONE);
+
+ return GeneratePrologue() && GenerateBody() && GenerateDeferredCode() &&
+ GenerateJumpTable() && GenerateSafepointTable();
+}
+
+
+void LCodeGen::FinishCode(Handle<Code> code) {
+ DCHECK(is_done());
+ code->set_stack_slots(GetStackSlotCount());
+ code->set_safepoint_table_offset(safepoints_.GetCodeOffset());
+ PopulateDeoptimizationData(code);
+}
+
+
+void LCodeGen::SaveCallerDoubles() {
+ DCHECK(info()->saves_caller_doubles());
+ DCHECK(NeedsEagerFrame());
+ Comment(";;; Save clobbered callee double registers");
+ int count = 0;
+ BitVector* doubles = chunk()->allocated_double_registers();
+ BitVector::Iterator save_iterator(doubles);
+ while (!save_iterator.Done()) {
+ __ std(DoubleRegister::FromAllocationIndex(save_iterator.Current()),
+ MemOperand(sp, count * kDoubleSize));
+ save_iterator.Advance();
+ count++;
+ }
+}
+
+
+void LCodeGen::RestoreCallerDoubles() {
+ DCHECK(info()->saves_caller_doubles());
+ DCHECK(NeedsEagerFrame());
+ Comment(";;; Restore clobbered callee double registers");
+ BitVector* doubles = chunk()->allocated_double_registers();
+ BitVector::Iterator save_iterator(doubles);
+ int count = 0;
+ while (!save_iterator.Done()) {
+ __ ld(DoubleRegister::FromAllocationIndex(save_iterator.Current()),
+ MemOperand(sp, count * kDoubleSize));
+ save_iterator.Advance();
+ count++;
+ }
+}
+
+
+bool LCodeGen::GeneratePrologue() {
+ DCHECK(is_generating());
+
+ if (info()->IsOptimizing()) {
+ ProfileEntryHookStub::MaybeCallEntryHook(masm_);
+
+#ifdef DEBUG
+ if (strlen(FLAG_stop_at) > 0 &&
+ info_->function()->name()->IsUtf8EqualTo(CStrVector(FLAG_stop_at))) {
+ __ stop("stop_at");
+ }
+#endif
+
+ // r3: Callee's JS function.
+ // cp: Callee's context.
+ // fp: Caller's frame pointer.
+ // lr: Caller's pc.
+ // ip: Our own function entry (required by the prologue)
+
+ // Sloppy mode functions and builtins need to replace the receiver with the
+ // global proxy when called as functions (without an explicit receiver
+ // object).
+ if (is_sloppy(info_->language_mode()) && info_->MayUseThis() &&
+ !info_->is_native() && info_->scope()->has_this_declaration()) {
+ Label ok;
+ int receiver_offset = info_->scope()->num_parameters() * kPointerSize;
+ __ LoadP(r4, MemOperand(sp, receiver_offset));
+ __ CompareRoot(r4, Heap::kUndefinedValueRootIndex);
+ __ bne(&ok, Label::kNear);
+
+ __ LoadP(r4, GlobalObjectOperand());
+ __ LoadP(r4, FieldMemOperand(r4, GlobalObject::kGlobalProxyOffset));
+
+ __ StoreP(r4, MemOperand(sp, receiver_offset));
+
+ __ bind(&ok);
+ }
+ }
+
+ int prologue_offset = masm_->pc_offset();
+
+ if (prologue_offset) {
+ // Prologue logic requires it's starting address in ip and the
+ // corresponding offset from the function entry.
+ prologue_offset += Instruction::kInstrSize;
+ __ AddP(ip, ip, Operand(prologue_offset));
+ }
+ info()->set_prologue_offset(prologue_offset);
+ if (NeedsEagerFrame()) {
+ if (info()->IsStub()) {
+ __ StubPrologue(prologue_offset);
+ } else {
+ __ Prologue(info()->IsCodePreAgingActive(), prologue_offset);
+ }
+ frame_is_built_ = true;
+ info_->AddNoFrameRange(0, masm_->pc_offset());
+ }
+
+ // Reserve space for the stack slots needed by the code.
+ int slots = GetStackSlotCount();
+ if (slots > 0) {
+ __ lay(sp, MemOperand(sp, -(slots * kPointerSize)));
+ if (FLAG_debug_code) {
+ __ Push(r2, r3);
+ __ mov(r2, Operand(slots * kPointerSize));
+ __ mov(r3, Operand(kSlotsZapValue));
+ Label loop;
+ __ bind(&loop);
+ __ StoreP(r3, MemOperand(sp, r2, kPointerSize));
+ __ lay(r2, MemOperand(r2, -kPointerSize));
+ __ CmpP(r2, Operand::Zero());
+ __ bne(&loop);
+ __ Pop(r2, r3);
+ }
+ }
+
+ if (info()->saves_caller_doubles()) {
+ SaveCallerDoubles();
+ }
+
+ // Possibly allocate a local context.
+ int heap_slots = info()->num_heap_slots() - Context::MIN_CONTEXT_SLOTS;
+ if (heap_slots > 0) {
+ Comment(";;; Allocate local context");
+ bool need_write_barrier = true;
+ // Argument to NewContext is the function, which is in r3.
+ DCHECK(!info()->scope()->is_script_scope());
+ if (heap_slots <= FastNewContextStub::kMaximumSlots) {
+ FastNewContextStub stub(isolate(), heap_slots);
+ __ CallStub(&stub);
+ // Result of FastNewContextStub is always in new space.
+ need_write_barrier = false;
+ } else {
+ __ push(r3);
+ __ CallRuntime(Runtime::kNewFunctionContext, 1);
+ }
+ RecordSafepoint(Safepoint::kNoLazyDeopt);
+ // Context is returned in both r2 and cp. It replaces the context
+ // passed to us. It's saved in the stack and kept live in cp.
+ __ LoadRR(cp, r2);
+ __ StoreP(r2, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ // Copy any necessary parameters into the context.
+ int num_parameters = scope()->num_parameters();
+ int first_parameter = scope()->has_this_declaration() ? -1 : 0;
+ for (int i = first_parameter; i < num_parameters; i++) {
+ Variable* var = (i == -1) ? scope()->receiver() : scope()->parameter(i);
+ if (var->IsContextSlot()) {
+ int parameter_offset = StandardFrameConstants::kCallerSPOffset +
+ (num_parameters - 1 - i) * kPointerSize;
+ // Load parameter from stack.
+ __ LoadP(r2, MemOperand(fp, parameter_offset));
+ // Store it in the context.
+ MemOperand target = ContextOperand(cp, var->index());
+ __ StoreP(r2, target);
+ // Update the write barrier. This clobbers r5 and r2.
+ if (need_write_barrier) {
+ __ RecordWriteContextSlot(cp, target.offset(), r2, r5,
+ GetLinkRegisterState(), kSaveFPRegs);
+ } else if (FLAG_debug_code) {
+ Label done;
+ __ JumpIfInNewSpace(cp, r2, &done);
+ __ Abort(kExpectedNewSpaceObject);
+ __ bind(&done);
+ }
+ }
+ }
+ Comment(";;; End allocate local context");
+ }
+
+ // Trace the call.
+ if (FLAG_trace && info()->IsOptimizing()) {
+ // We have not executed any compiled code yet, so cp still holds the
+ // incoming context.
+ __ CallRuntime(Runtime::kTraceEnter, 0);
+ }
+ return !is_aborted();
+}
+
+
+void LCodeGen::GenerateOsrPrologue() {
+ // Generate the OSR entry prologue at the first unknown OSR value, or if there
+ // are none, at the OSR entrypoint instruction.
+ if (osr_pc_offset_ >= 0) return;
+
+ osr_pc_offset_ = masm()->pc_offset();
+
+ // Adjust the frame size, subsuming the unoptimized frame into the
+ // optimized frame.
+ int slots = GetStackSlotCount() - graph()->osr()->UnoptimizedFrameSlots();
+ DCHECK(slots >= 0);
+ __ lay(sp, MemOperand(sp, -slots * kPointerSize));
+}
+
+
+void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) {
+ if (instr->IsCall()) {
+ EnsureSpaceForLazyDeopt(Deoptimizer::patch_size());
+ }
+ if (!instr->IsLazyBailout() && !instr->IsGap()) {
+ safepoints_.BumpLastLazySafepointIndex();
+ }
+}
+
+
+bool LCodeGen::GenerateDeferredCode() {
+ DCHECK(is_generating());
+ if (deferred_.length() > 0) {
+ for (int i = 0; !is_aborted() && i < deferred_.length(); i++) {
+ LDeferredCode* code = deferred_[i];
+
+ HValue* value =
+ instructions_->at(code->instruction_index())->hydrogen_value();
+ RecordAndWritePosition(
+ chunk()->graph()->SourcePositionToScriptPosition(value->position()));
+
+ Comment(
+ ";;; <@%d,#%d> "
+ "-------------------- Deferred %s --------------------",
+ code->instruction_index(), code->instr()->hydrogen_value()->id(),
+ code->instr()->Mnemonic());
+ __ bind(code->entry());
+ if (NeedsDeferredFrame()) {
+ Comment(";;; Build frame");
+ DCHECK(!frame_is_built_);
+ DCHECK(info()->IsStub());
+ frame_is_built_ = true;
+ __ LoadSmiLiteral(scratch0(), Smi::FromInt(StackFrame::STUB));
+ __ PushFixedFrame(scratch0());
+ __ la(fp,
+ MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+ Comment(";;; Deferred code");
+ }
+ code->Generate();
+ if (NeedsDeferredFrame()) {
+ Comment(";;; Destroy frame");
+ DCHECK(frame_is_built_);
+ __ PopFixedFrame(ip);
+ frame_is_built_ = false;
+ }
+ __ b(code->exit());
+ }
+ }
+
+ return !is_aborted();
+}
+
+
+
+bool LCodeGen::GenerateJumpTable() {
+ // Check that the jump table is accessible from everywhere in the function
+ // code, i.e. that offsets to the table can be encoded in the 24bit signed
+ // immediate of a branch instruction.
+ // To simplify we consider the code size from the first instruction to the
+ // end of the jump table. We also don't consider the pc load delta.
+ // Each entry in the jump table generates one instruction and inlines one
+ // 32bit data after it.
+ if (!is_int24((masm()->pc_offset() / Assembler::kInstrSize) +
+ jump_table_.length() * 7)) {
+ Abort(kGeneratedCodeIsTooLarge);
+ }
+
+ if (jump_table_.length() > 0) {
+ Label needs_frame, call_deopt_entry;
+
+ Comment(";;; -------------------- Jump table --------------------");
+ Address base = jump_table_[0].address;
+
+ Register entry_offset = scratch0();
+
+ int length = jump_table_.length();
+ for (int i = 0; i < length; i++) {
+ Deoptimizer::JumpTableEntry* table_entry = &jump_table_[i];
+ __ bind(&table_entry->label);
+
+ DCHECK_EQ(jump_table_[0].bailout_type, table_entry->bailout_type);
+ Address entry = table_entry->address;
+ DeoptComment(table_entry->deopt_info);
+
+ // Second-level deopt table entries are contiguous and small, so instead
+ // of loading the full, absolute address of each one, load an immediate
+ // offset which will be added to the base address later.
+ __ mov(entry_offset, Operand(entry - base));
+
+ if (table_entry->needs_frame) {
+ DCHECK(!info()->saves_caller_doubles());
+ Comment(";;; call deopt with frame");
+ __ PushFixedFrame();
+ __ b(r14, &needs_frame);
+ } else {
+ __ b(r14, &call_deopt_entry);
+ }
+ info()->LogDeoptCallPosition(masm()->pc_offset(),
+ table_entry->deopt_info.inlining_id);
+ }
+
+ if (needs_frame.is_linked()) {
+ __ bind(&needs_frame);
+ // This variant of deopt can only be used with stubs. Since we don't
+ // have a function pointer to install in the stack frame that we're
+ // building, install a special marker there instead.
+ DCHECK(info()->IsStub());
+ __ LoadSmiLiteral(ip, Smi::FromInt(StackFrame::STUB));
+ __ push(ip);
+ __ lay(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+ }
+
+ Comment(";;; call deopt");
+ __ bind(&call_deopt_entry);
+
+ if (info()->saves_caller_doubles()) {
+ DCHECK(info()->IsStub());
+ RestoreCallerDoubles();
+ }
+
+ // Add the base address to the offset previously loaded in entry_offset.
+ __ mov(ip, Operand(ExternalReference::ForDeoptEntry(base)));
+ __ AddP(ip, entry_offset, ip);
+ __ Jump(ip);
+ }
+
+ // The deoptimization jump table is the last part of the instruction
+ // sequence. Mark the generated code as done unless we bailed out.
+ if (!is_aborted()) status_ = DONE;
+ return !is_aborted();
+}
+
+
+bool LCodeGen::GenerateSafepointTable() {
+ DCHECK(is_done());
+ safepoints_.Emit(masm(), GetStackSlotCount());
+ return !is_aborted();
+}
+
+
+Register LCodeGen::ToRegister(int index) const {
+ return Register::FromAllocationIndex(index);
+}
+
+
+DoubleRegister LCodeGen::ToDoubleRegister(int index) const {
+ return DoubleRegister::FromAllocationIndex(index);
+}
+
+
+Register LCodeGen::ToRegister(LOperand* op) const {
+ DCHECK(op->IsRegister());
+ return ToRegister(op->index());
+}
+
+
+Register LCodeGen::EmitLoadRegister(LOperand* op, Register scratch) {
+ if (op->IsRegister()) {
+ return ToRegister(op->index());
+ } else if (op->IsConstantOperand()) {
+ LConstantOperand* const_op = LConstantOperand::cast(op);
+ HConstant* constant = chunk_->LookupConstant(const_op);
+ Handle<Object> literal = constant->handle(isolate());
+ Representation r = chunk_->LookupLiteralRepresentation(const_op);
+ if (r.IsInteger32()) {
+ DCHECK(literal->IsNumber());
+ __ LoadIntLiteral(scratch, static_cast<int32_t>(literal->Number()));
+ } else if (r.IsDouble()) {
+ Abort(kEmitLoadRegisterUnsupportedDoubleImmediate);
+ } else {
+ DCHECK(r.IsSmiOrTagged());
+ __ Move(scratch, literal);
+ }
+ return scratch;
+ } else if (op->IsStackSlot()) {
+ __ LoadP(scratch, ToMemOperand(op));
+ return scratch;
+ }
+ UNREACHABLE();
+ return scratch;
+}
+
+
+void LCodeGen::EmitLoadIntegerConstant(LConstantOperand* const_op,
+ Register dst) {
+ DCHECK(IsInteger32(const_op));
+ HConstant* constant = chunk_->LookupConstant(const_op);
+ int32_t value = constant->Integer32Value();
+ if (IsSmi(const_op)) {
+ __ LoadSmiLiteral(dst, Smi::FromInt(value));
+ } else {
+ __ LoadIntLiteral(dst, value);
+ }
+}
+
+
+DoubleRegister LCodeGen::ToDoubleRegister(LOperand* op) const {
+ DCHECK(op->IsDoubleRegister());
+ return ToDoubleRegister(op->index());
+}
+
+
+Handle<Object> LCodeGen::ToHandle(LConstantOperand* op) const {
+ HConstant* constant = chunk_->LookupConstant(op);
+ DCHECK(chunk_->LookupLiteralRepresentation(op).IsSmiOrTagged());
+ return constant->handle(isolate());
+}
+
+
+bool LCodeGen::IsInteger32(LConstantOperand* op) const {
+ return chunk_->LookupLiteralRepresentation(op).IsSmiOrInteger32();
+}
+
+
+bool LCodeGen::IsSmi(LConstantOperand* op) const {
+ return chunk_->LookupLiteralRepresentation(op).IsSmi();
+}
+
+
+int32_t LCodeGen::ToInteger32(LConstantOperand* op) const {
+ return ToRepresentation(op, Representation::Integer32());
+}
+
+
+intptr_t LCodeGen::ToRepresentation(LConstantOperand* op,
+ const Representation& r) const {
+ HConstant* constant = chunk_->LookupConstant(op);
+ int32_t value = constant->Integer32Value();
+ if (r.IsInteger32()) return value;
+ DCHECK(r.IsSmiOrTagged());
+ return reinterpret_cast<intptr_t>(Smi::FromInt(value));
+}
+
+
+Smi* LCodeGen::ToSmi(LConstantOperand* op) const {
+ HConstant* constant = chunk_->LookupConstant(op);
+ return Smi::FromInt(constant->Integer32Value());
+}
+
+
+double LCodeGen::ToDouble(LConstantOperand* op) const {
+ HConstant* constant = chunk_->LookupConstant(op);
+ DCHECK(constant->HasDoubleValue());
+ return constant->DoubleValue();
+}
+
+
+Operand LCodeGen::ToOperand(LOperand* op) {
+ if (op->IsConstantOperand()) {
+ LConstantOperand* const_op = LConstantOperand::cast(op);
+ HConstant* constant = chunk()->LookupConstant(const_op);
+ Representation r = chunk_->LookupLiteralRepresentation(const_op);
+ if (r.IsSmi()) {
+ DCHECK(constant->HasSmiValue());
+ return Operand(Smi::FromInt(constant->Integer32Value()));
+ } else if (r.IsInteger32()) {
+ DCHECK(constant->HasInteger32Value());
+ return Operand(constant->Integer32Value());
+ } else if (r.IsDouble()) {
+ Abort(kToOperandUnsupportedDoubleImmediate);
+ }
+ DCHECK(r.IsTagged());
+ return Operand(constant->handle(isolate()));
+ } else if (op->IsRegister()) {
+ return Operand(ToRegister(op));
+ } else if (op->IsDoubleRegister()) {
+ Abort(kToOperandIsDoubleRegisterUnimplemented);
+ return Operand::Zero();
+ }
+ // Stack slots not implemented, use ToMemOperand instead.
+ UNREACHABLE();
+ return Operand::Zero();
+}
+
+
+static int ArgumentsOffsetWithoutFrame(int index) {
+ DCHECK(index < 0);
+ return -(index + 1) * kPointerSize;
+}
+
+
+MemOperand LCodeGen::ToMemOperand(LOperand* op) const {
+ DCHECK(!op->IsRegister());
+ DCHECK(!op->IsDoubleRegister());
+ DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
+ if (NeedsEagerFrame()) {
+ return MemOperand(fp, StackSlotOffset(op->index()));
+ } else {
+ // Retrieve parameter without eager stack-frame relative to the
+ // stack-pointer.
+ return MemOperand(sp, ArgumentsOffsetWithoutFrame(op->index()));
+ }
+}
+
+
+MemOperand LCodeGen::ToHighMemOperand(LOperand* op) const {
+ DCHECK(op->IsDoubleStackSlot());
+ if (NeedsEagerFrame()) {
+ return MemOperand(fp, StackSlotOffset(op->index()) + kPointerSize);
+ } else {
+ // Retrieve parameter without eager stack-frame relative to the
+ // stack-pointer.
+ return MemOperand(sp,
+ ArgumentsOffsetWithoutFrame(op->index()) + kPointerSize);
+ }
+}
+
+
+void LCodeGen::WriteTranslation(LEnvironment* environment,
+ Translation* translation) {
+ if (environment == NULL) return;
+
+ // The translation includes one command per value in the environment.
+ int translation_size = environment->translation_size();
+
+ WriteTranslation(environment->outer(), translation);
+ WriteTranslationFrame(environment, translation);
+
+ int object_index = 0;
+ int dematerialized_index = 0;
+ for (int i = 0; i < translation_size; ++i) {
+ LOperand* value = environment->values()->at(i);
+ AddToTranslation(
+ environment, translation, value, environment->HasTaggedValueAt(i),
+ environment->HasUint32ValueAt(i), &object_index, &dematerialized_index);
+ }
+}
+
+
+void LCodeGen::AddToTranslation(LEnvironment* environment,
+ Translation* translation, LOperand* op,
+ bool is_tagged, bool is_uint32,
+ int* object_index_pointer,
+ int* dematerialized_index_pointer) {
+ if (op == LEnvironment::materialization_marker()) {
+ int object_index = (*object_index_pointer)++;
+ if (environment->ObjectIsDuplicateAt(object_index)) {
+ int dupe_of = environment->ObjectDuplicateOfAt(object_index);
+ translation->DuplicateObject(dupe_of);
+ return;
+ }
+ int object_length = environment->ObjectLengthAt(object_index);
+ if (environment->ObjectIsArgumentsAt(object_index)) {
+ translation->BeginArgumentsObject(object_length);
+ } else {
+ translation->BeginCapturedObject(object_length);
+ }
+ int dematerialized_index = *dematerialized_index_pointer;
+ int env_offset = environment->translation_size() + dematerialized_index;
+ *dematerialized_index_pointer += object_length;
+ for (int i = 0; i < object_length; ++i) {
+ LOperand* value = environment->values()->at(env_offset + i);
+ AddToTranslation(environment, translation, value,
+ environment->HasTaggedValueAt(env_offset + i),
+ environment->HasUint32ValueAt(env_offset + i),
+ object_index_pointer, dematerialized_index_pointer);
+ }
+ return;
+ }
+
+ if (op->IsStackSlot()) {
+ if (is_tagged) {
+ translation->StoreStackSlot(op->index());
+ } else if (is_uint32) {
+ translation->StoreUint32StackSlot(op->index());
+ } else {
+ translation->StoreInt32StackSlot(op->index());
+ }
+ } else if (op->IsDoubleStackSlot()) {
+ translation->StoreDoubleStackSlot(op->index());
+ } else if (op->IsRegister()) {
+ Register reg = ToRegister(op);
+ if (is_tagged) {
+ translation->StoreRegister(reg);
+ } else if (is_uint32) {
+ translation->StoreUint32Register(reg);
+ } else {
+ translation->StoreInt32Register(reg);
+ }
+ } else if (op->IsDoubleRegister()) {
+ DoubleRegister reg = ToDoubleRegister(op);
+ translation->StoreDoubleRegister(reg);
+ } else if (op->IsConstantOperand()) {
+ HConstant* constant = chunk()->LookupConstant(LConstantOperand::cast(op));
+ int src_index = DefineDeoptimizationLiteral(constant->handle(isolate()));
+ translation->StoreLiteral(src_index);
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+void LCodeGen::CallCode(Handle<Code> code, RelocInfo::Mode mode,
+ LInstruction* instr) {
+ CallCodeGeneric(code, mode, instr, RECORD_SIMPLE_SAFEPOINT);
+}
+
+
+void LCodeGen::CallCodeGeneric(Handle<Code> code, RelocInfo::Mode mode,
+ LInstruction* instr,
+ SafepointMode safepoint_mode) {
+ DCHECK(instr != NULL);
+ __ Call(code, mode);
+ RecordSafepointWithLazyDeopt(instr, safepoint_mode);
+
+ // Signal that we don't inline smi code before these stubs in the
+ // optimizing code generator.
+ if (code->kind() == Code::BINARY_OP_IC || code->kind() == Code::COMPARE_IC) {
+ __ nop();
+ }
+}
+
+
+void LCodeGen::CallRuntime(const Runtime::Function* function, int num_arguments,
+ LInstruction* instr, SaveFPRegsMode save_doubles) {
+ DCHECK(instr != NULL);
+
+ __ CallRuntime(function, num_arguments, save_doubles);
+
+ RecordSafepointWithLazyDeopt(instr, RECORD_SIMPLE_SAFEPOINT);
+}
+
+
+void LCodeGen::LoadContextFromDeferred(LOperand* context) {
+ if (context->IsRegister()) {
+ __ Move(cp, ToRegister(context));
+ } else if (context->IsStackSlot()) {
+ __ LoadP(cp, ToMemOperand(context));
+ } else if (context->IsConstantOperand()) {
+ HConstant* constant =
+ chunk_->LookupConstant(LConstantOperand::cast(context));
+ __ Move(cp, Handle<Object>::cast(constant->handle(isolate())));
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+void LCodeGen::CallRuntimeFromDeferred(Runtime::FunctionId id, int argc,
+ LInstruction* instr, LOperand* context) {
+ LoadContextFromDeferred(context);
+ __ CallRuntimeSaveDoubles(id);
+ RecordSafepointWithRegisters(instr->pointer_map(), argc,
+ Safepoint::kNoLazyDeopt);
+}
+
+
+void LCodeGen::RegisterEnvironmentForDeoptimization(LEnvironment* environment,
+ Safepoint::DeoptMode mode) {
+ environment->set_has_been_used();
+ if (!environment->HasBeenRegistered()) {
+ // Physical stack frame layout:
+ // -x ............. -4 0 ..................................... y
+ // [incoming arguments] [spill slots] [pushed outgoing arguments]
+
+ // Layout of the environment:
+ // 0 ..................................................... size-1
+ // [parameters] [locals] [expression stack including arguments]
+
+ // Layout of the translation:
+ // 0 ........................................................ size - 1 + 4
+ // [expression stack including arguments] [locals] [4 words] [parameters]
+ // |>------------ translation_size ------------<|
+
+ int frame_count = 0;
+ int jsframe_count = 0;
+ for (LEnvironment* e = environment; e != NULL; e = e->outer()) {
+ ++frame_count;
+ if (e->frame_type() == JS_FUNCTION) {
+ ++jsframe_count;
+ }
+ }
+ Translation translation(&translations_, frame_count, jsframe_count, zone());
+ WriteTranslation(environment, &translation);
+ int deoptimization_index = deoptimizations_.length();
+ int pc_offset = masm()->pc_offset();
+ environment->Register(deoptimization_index, translation.index(),
+ (mode == Safepoint::kLazyDeopt) ? pc_offset : -1);
+ deoptimizations_.Add(environment, zone());
+ }
+}
+
+
+void LCodeGen::DeoptimizeIf(Condition cond, LInstruction* instr,
+ Deoptimizer::DeoptReason deopt_reason,
+ Deoptimizer::BailoutType bailout_type,
+ CRegister cr) {
+ LEnvironment* environment = instr->environment();
+ RegisterEnvironmentForDeoptimization(environment, Safepoint::kNoLazyDeopt);
+ DCHECK(environment->HasBeenRegistered());
+ int id = environment->deoptimization_index();
+ DCHECK(info()->IsOptimizing() || info()->IsStub());
+ Address entry =
+ Deoptimizer::GetDeoptimizationEntry(isolate(), id, bailout_type);
+ if (entry == NULL) {
+ Abort(kBailoutWasNotPrepared);
+ return;
+ }
+
+ if (FLAG_deopt_every_n_times != 0 && !info()->IsStub()) {
+ Register scratch = scratch0();
+ ExternalReference count = ExternalReference::stress_deopt_count(isolate());
+ Label no_deopt;
+ __ Push(r3, scratch);
+ __ mov(scratch, Operand(count));
+ __ l(r3, MemOperand(scratch));
+ __ Sub32(r3, r3, Operand(1));
+ __ Cmp32(r3, Operand::Zero() /*, alt_cr*/);
+ __ bne(&no_deopt, Label::kNear /*, alt_cr*/);
+ __ mov(r3, Operand(FLAG_deopt_every_n_times));
+ __ st(r3, MemOperand(scratch));
+ __ Pop(r3, scratch);
+
+ __ Call(entry, RelocInfo::RUNTIME_ENTRY);
+ __ bind(&no_deopt);
+ __ l(r3, MemOperand(scratch));
+ __ Pop(r3, scratch);
+ }
+
+ if (info()->ShouldTrapOnDeopt()) {
+ __ stop("trap_on_deopt", cond, kDefaultStopCode, cr);
+ }
+
+ Deoptimizer::DeoptInfo deopt_info = MakeDeoptInfo(instr, deopt_reason);
+
+ DCHECK(info()->IsStub() || frame_is_built_);
+ // Go through jump table if we need to handle condition, build frame, or
+ // restore caller doubles.
+ if (cond == al && frame_is_built_ && !info()->saves_caller_doubles()) {
+ __ Call(entry, RelocInfo::RUNTIME_ENTRY);
+ info()->LogDeoptCallPosition(masm()->pc_offset(), deopt_info.inlining_id);
+ } else {
+ Deoptimizer::JumpTableEntry table_entry(entry, deopt_info, bailout_type,
+ !frame_is_built_);
+ // We often have several deopts to the same entry, reuse the last
+ // jump entry if this is the case.
+ if (FLAG_trace_deopt || isolate()->cpu_profiler()->is_profiling() ||
+ jump_table_.is_empty() ||
+ !table_entry.IsEquivalentTo(jump_table_.last())) {
+ jump_table_.Add(table_entry, zone());
+ }
+ __ b(cond, &jump_table_.last().label /*, cr*/);
+ }
+}
+
+
+void LCodeGen::DeoptimizeIf(Condition cond, LInstruction* instr,
+ Deoptimizer::DeoptReason deopt_reason,
+ CRegister cr) {
+ Deoptimizer::BailoutType bailout_type =
+ info()->IsStub() ? Deoptimizer::LAZY : Deoptimizer::EAGER;
+ DeoptimizeIf(cond, instr, deopt_reason, bailout_type, cr);
+}
+
+
+void LCodeGen::PopulateDeoptimizationData(Handle<Code> code) {
+ int length = deoptimizations_.length();
+ if (length == 0) return;
+ Handle<DeoptimizationInputData> data =
+ DeoptimizationInputData::New(isolate(), length, TENURED);
+
+ Handle<ByteArray> translations =
+ translations_.CreateByteArray(isolate()->factory());
+ data->SetTranslationByteArray(*translations);
+ data->SetInlinedFunctionCount(Smi::FromInt(inlined_function_count_));
+ data->SetOptimizationId(Smi::FromInt(info_->optimization_id()));
+ if (info_->IsOptimizing()) {
+ // Reference to shared function info does not change between phases.
+ AllowDeferredHandleDereference allow_handle_dereference;
+ data->SetSharedFunctionInfo(*info_->shared_info());
+ } else {
+ data->SetSharedFunctionInfo(Smi::FromInt(0));
+ }
+ data->SetWeakCellCache(Smi::FromInt(0));
+
+ Handle<FixedArray> literals =
+ factory()->NewFixedArray(deoptimization_literals_.length(), TENURED);
+ {
+ AllowDeferredHandleDereference copy_handles;
+ for (int i = 0; i < deoptimization_literals_.length(); i++) {
+ literals->set(i, *deoptimization_literals_[i]);
+ }
+ data->SetLiteralArray(*literals);
+ }
+
+ data->SetOsrAstId(Smi::FromInt(info_->osr_ast_id().ToInt()));
+ data->SetOsrPcOffset(Smi::FromInt(osr_pc_offset_));
+
+ // Populate the deoptimization entries.
+ for (int i = 0; i < length; i++) {
+ LEnvironment* env = deoptimizations_[i];
+ data->SetAstId(i, env->ast_id());
+ data->SetTranslationIndex(i, Smi::FromInt(env->translation_index()));
+ data->SetArgumentsStackHeight(i,
+ Smi::FromInt(env->arguments_stack_height()));
+ data->SetPc(i, Smi::FromInt(env->pc_offset()));
+ }
+ code->set_deoptimization_data(*data);
+}
+
+
+void LCodeGen::PopulateDeoptimizationLiteralsWithInlinedFunctions() {
+ DCHECK_EQ(0, deoptimization_literals_.length());
+ for (auto function : chunk()->inlined_functions()) {
+ DefineDeoptimizationLiteral(function);
+ }
+ inlined_function_count_ = deoptimization_literals_.length();
+}
+
+
+void LCodeGen::RecordSafepointWithLazyDeopt(LInstruction* instr,
+ SafepointMode safepoint_mode) {
+ if (safepoint_mode == RECORD_SIMPLE_SAFEPOINT) {
+ RecordSafepoint(instr->pointer_map(), Safepoint::kLazyDeopt);
+ } else {
+ DCHECK(safepoint_mode == RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS);
+ RecordSafepointWithRegisters(instr->pointer_map(), 0,
+ Safepoint::kLazyDeopt);
+ }
+}
+
+
+void LCodeGen::RecordSafepoint(LPointerMap* pointers, Safepoint::Kind kind,
+ int arguments, Safepoint::DeoptMode deopt_mode) {
+ DCHECK(expected_safepoint_kind_ == kind);
+
+ const ZoneList<LOperand*>* operands = pointers->GetNormalizedOperands();
+ Safepoint safepoint =
+ safepoints_.DefineSafepoint(masm(), kind, arguments, deopt_mode);
+ for (int i = 0; i < operands->length(); i++) {
+ LOperand* pointer = operands->at(i);
+ if (pointer->IsStackSlot()) {
+ safepoint.DefinePointerSlot(pointer->index(), zone());
+ } else if (pointer->IsRegister() && (kind & Safepoint::kWithRegisters)) {
+ safepoint.DefinePointerRegister(ToRegister(pointer), zone());
+ }
+ }
+}
+
+
+void LCodeGen::RecordSafepoint(LPointerMap* pointers,
+ Safepoint::DeoptMode deopt_mode) {
+ RecordSafepoint(pointers, Safepoint::kSimple, 0, deopt_mode);
+}
+
+
+void LCodeGen::RecordSafepoint(Safepoint::DeoptMode deopt_mode) {
+ LPointerMap empty_pointers(zone());
+ RecordSafepoint(&empty_pointers, deopt_mode);
+}
+
+
+void LCodeGen::RecordSafepointWithRegisters(LPointerMap* pointers,
+ int arguments,
+ Safepoint::DeoptMode deopt_mode) {
+ RecordSafepoint(pointers, Safepoint::kWithRegisters, arguments, deopt_mode);
+}
+
+
+void LCodeGen::RecordAndWritePosition(int position) {
+ if (position == RelocInfo::kNoPosition) return;
+ masm()->positions_recorder()->RecordPosition(position);
+ masm()->positions_recorder()->WriteRecordedPositions();
+}
+
+
+static const char* LabelType(LLabel* label) {
+ if (label->is_loop_header()) return " (loop header)";
+ if (label->is_osr_entry()) return " (OSR entry)";
+ return "";
+}
+
+
+void LCodeGen::DoLabel(LLabel* label) {
+ Comment(";;; <@%d,#%d> -------------------- B%d%s --------------------",
+ current_instruction_, label->hydrogen_value()->id(),
+ label->block_id(), LabelType(label));
+ __ bind(label->label());
+ current_block_ = label->block_id();
+ DoGap(label);
+}
+
+
+void LCodeGen::DoParallelMove(LParallelMove* move) { resolver_.Resolve(move); }
+
+
+void LCodeGen::DoGap(LGap* gap) {
+ for (int i = LGap::FIRST_INNER_POSITION; i <= LGap::LAST_INNER_POSITION;
+ i++) {
+ LGap::InnerPosition inner_pos = static_cast<LGap::InnerPosition>(i);
+ LParallelMove* move = gap->GetParallelMove(inner_pos);
+ if (move != NULL) DoParallelMove(move);
+ }
+}
+
+
+void LCodeGen::DoInstructionGap(LInstructionGap* instr) { DoGap(instr); }
+
+
+void LCodeGen::DoParameter(LParameter* instr) {
+ // Nothing to do.
+}
+
+
+void LCodeGen::DoCallStub(LCallStub* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->result()).is(r2));
+ switch (instr->hydrogen()->major_key()) {
+ case CodeStub::RegExpExec: {
+ RegExpExecStub stub(isolate());
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ break;
+ }
+ case CodeStub::SubString: {
+ SubStringStub stub(isolate());
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ break;
+ }
+ case CodeStub::StringCompare: {
+ StringCompareStub stub(isolate());
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ break;
+ }
+ default:
+ UNREACHABLE();
+ }
+}
+
+
+void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) {
+ GenerateOsrPrologue();
+}
+
+
+void LCodeGen::DoModByPowerOf2I(LModByPowerOf2I* instr) {
+ Register dividend = ToRegister(instr->dividend());
+ int32_t divisor = instr->divisor();
+ DCHECK(dividend.is(ToRegister(instr->result())));
+
+ // Theoretically, a variation of the branch-free code for integer division by
+ // a power of 2 (calculating the remainder via an additional multiplication
+ // (which gets simplified to an 'and') and subtraction) should be faster, and
+ // this is exactly what GCC and clang emit. Nevertheless, benchmarks seem to
+ // indicate that positive dividends are heavily favored, so the branching
+ // version performs better.
+ HMod* hmod = instr->hydrogen();
+ int32_t shift = WhichPowerOf2Abs(divisor);
+ Label dividend_is_not_negative, done;
+ if (hmod->CheckFlag(HValue::kLeftCanBeNegative)) {
+ __ CmpP(dividend, Operand::Zero());
+ __ bge(÷nd_is_not_negative, Label::kNear);
+ if (shift) {
+ // Note that this is correct even for kMinInt operands.
+ __ LoadComplementRR(dividend, dividend);
+ __ ExtractBitRange(dividend, dividend, shift - 1, 0);
+ __ LoadComplementRR(dividend, dividend);
+ if (hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+ } else if (!hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ __ mov(dividend, Operand::Zero());
+ } else {
+ DeoptimizeIf(al, instr, Deoptimizer::kMinusZero);
+ }
+ __ b(&done, Label::kNear);
+ }
+
+ __ bind(÷nd_is_not_negative);
+ if (shift) {
+ __ ExtractBitRange(dividend, dividend, shift - 1, 0);
+ } else {
+ __ mov(dividend, Operand::Zero());
+ }
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoModByConstI(LModByConstI* instr) {
+ Register dividend = ToRegister(instr->dividend());
+ int32_t divisor = instr->divisor();
+ Register result = ToRegister(instr->result());
+ DCHECK(!dividend.is(result));
+
+ if (divisor == 0) {
+ DeoptimizeIf(al, instr, Deoptimizer::kDivisionByZero);
+ return;
+ }
+
+ __ TruncatingDiv(result, dividend, Abs(divisor));
+ __ mov(ip, Operand(Abs(divisor)));
+ __ Mul(result, result, ip);
+ __ SubP(result, dividend, result /*, LeaveOE, SetRC*/);
+
+ // Check for negative zero.
+ HMod* hmod = instr->hydrogen();
+ if (hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ Label remainder_not_zero;
+ __ bne(&remainder_not_zero, Label::kNear /*, cr0*/);
+ __ Cmp32(dividend, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ __ bind(&remainder_not_zero);
+ }
+}
+
+
+void LCodeGen::DoModI(LModI* instr) {
+ HMod* hmod = instr->hydrogen();
+ Register left_reg = ToRegister(instr->left());
+ Register right_reg = ToRegister(instr->right());
+ Register result_reg = ToRegister(instr->result());
+ Label done;
+
+ // Check for x % 0.
+ if (hmod->CheckFlag(HValue::kCanBeDivByZero)) {
+ __ Cmp32(right_reg, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kDivisionByZero);
+ }
+
+ // Check for kMinInt % -1, dr will return undefined, which is not what we
+ // want. We have to deopt if we care about -0, because we can't return that.
+ if (hmod->CheckFlag(HValue::kCanOverflow)) {
+ Label no_overflow_possible;
+ __ Cmp32(left_reg, Operand(kMinInt));
+ __ bne(&no_overflow_possible, Label::kNear);
+ __ Cmp32(right_reg, Operand(-1));
+ if (hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ } else {
+ __ b(ne, &no_overflow_possible, Label::kNear);
+ __ mov(result_reg, Operand::Zero());
+ __ b(&done, Label::kNear);
+ }
+ __ bind(&no_overflow_possible);
+ }
+
+ // Divide instruction dr will implicity use register pair
+ // r0 & r1 below.
+ DCHECK(!left_reg.is(r1));
+ DCHECK(!right_reg.is(r1));
+ DCHECK(!result_reg.is(r1));
+ __ LoadRR(r0, left_reg);
+ __ srda(r0, Operand(32));
+ __ dr(r0, right_reg); // R0:R1 = R1 / divisor - R0 remainder
+
+ __ LoadAndTestP_ExtendSrc(result_reg, r0); // Copy remainder to resultreg
+
+ // If we care about -0, test if the dividend is <0 and the result is 0.
+ if (hmod->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ __ bne(&done, Label::kNear);
+ __ Cmp32(left_reg, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ }
+
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoDivByPowerOf2I(LDivByPowerOf2I* instr) {
+ Register dividend = ToRegister(instr->dividend());
+ int32_t divisor = instr->divisor();
+ Register result = ToRegister(instr->result());
+ DCHECK(divisor == kMinInt || base::bits::IsPowerOfTwo32(Abs(divisor)));
+ DCHECK(!result.is(dividend));
+
+ // Check for (0 / -x) that will produce negative zero.
+ HDiv* hdiv = instr->hydrogen();
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) {
+ __ Cmp32(dividend, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+ // Check for (kMinInt / -1).
+ if (hdiv->CheckFlag(HValue::kCanOverflow) && divisor == -1) {
+ __ Cmp32(dividend, Operand(0x80000000));
+ DeoptimizeIf(eq, instr, Deoptimizer::kOverflow);
+ }
+
+ int32_t shift = WhichPowerOf2Abs(divisor);
+
+ // Deoptimize if remainder will not be 0.
+ if (!hdiv->CheckFlag(HInstruction::kAllUsesTruncatingToInt32) && shift) {
+ __ TestBitRange(dividend, shift - 1, 0, r0);
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecision, cr0);
+ }
+
+ if (divisor == -1) { // Nice shortcut, not needed for correctness.
+ __ LoadComplementRR(result, dividend);
+ return;
+ }
+ if (shift == 0) {
+ __ LoadRR(result, dividend);
+ } else {
+ if (shift == 1) {
+ __ ShiftRight(result, dividend, Operand(31));
+ } else {
+ __ ShiftRightArith(result, dividend, Operand(31));
+ __ ShiftRight(result, result, Operand(32 - shift));
+ }
+ __ AddP(result, dividend, result);
+ __ ShiftRightArith(result, result, Operand(shift));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ }
+ if (divisor < 0) __ LoadComplementRR(result, result);
+}
+
+
+void LCodeGen::DoDivByConstI(LDivByConstI* instr) {
+ Register dividend = ToRegister(instr->dividend());
+ int32_t divisor = instr->divisor();
+ Register result = ToRegister(instr->result());
+ DCHECK(!dividend.is(result));
+
+ if (divisor == 0) {
+ DeoptimizeIf(al, instr, Deoptimizer::kDivisionByZero);
+ return;
+ }
+
+ // Check for (0 / -x) that will produce negative zero.
+ HDiv* hdiv = instr->hydrogen();
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) {
+ __ Cmp32(dividend, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+
+ __ TruncatingDiv(result, dividend, Abs(divisor));
+ if (divisor < 0) __ LoadComplementRR(result, result);
+
+ if (!hdiv->CheckFlag(HInstruction::kAllUsesTruncatingToInt32)) {
+ // DCHECK(0);
+ // TODO(joransiu): Port this sequence properly to Z.
+ Register scratch = scratch0();
+ __ mov(ip, Operand(divisor));
+ __ Mul(scratch, result, ip);
+ __ Cmp32(scratch, dividend);
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecision);
+ }
+}
+
+
+// TODO(svenpanne) Refactor this to avoid code duplication with DoFlooringDivI.
+void LCodeGen::DoDivI(LDivI* instr) {
+ HBinaryOperation* hdiv = instr->hydrogen();
+ const Register dividend = ToRegister(instr->dividend());
+ const Register divisor = ToRegister(instr->divisor());
+ Register result = ToRegister(instr->result());
+
+ DCHECK(!dividend.is(result));
+ DCHECK(!divisor.is(result));
+
+ // Check for x / 0.
+ if (hdiv->CheckFlag(HValue::kCanBeDivByZero)) {
+ __ Cmp32(divisor, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kDivisionByZero);
+ }
+
+ // Check for (0 / -x) that will produce negative zero.
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ Label dividend_not_zero;
+ __ Cmp32(dividend, Operand::Zero());
+ __ bne(÷nd_not_zero, Label::kNear);
+ __ Cmp32(divisor, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ __ bind(÷nd_not_zero);
+ }
+
+ // Check for (kMinInt / -1).
+ if (hdiv->CheckFlag(HValue::kCanOverflow)) {
+ Label dividend_not_min_int;
+ __ Cmp32(dividend, Operand(kMinInt));
+ __ bne(÷nd_not_min_int, Label::kNear);
+ __ Cmp32(divisor, Operand(-1));
+ DeoptimizeIf(eq, instr, Deoptimizer::kOverflow);
+ __ bind(÷nd_not_min_int);
+ }
+
+ __ LoadRR(r0, dividend);
+ __ srda(r0, Operand(32));
+ __ dr(r0, divisor); // R0:R1 = R1 / divisor - R0 remainder - R1 quotient
+
+ __ LoadAndTestP_ExtendSrc(result, r1); // Move quotient to result register
+
+ if (!hdiv->CheckFlag(HInstruction::kAllUsesTruncatingToInt32)) {
+ // Deoptimize if remainder is not 0.
+ __ Cmp32(r0, Operand::Zero());
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecision);
+ }
+}
+
+
+void LCodeGen::DoFlooringDivByPowerOf2I(LFlooringDivByPowerOf2I* instr) {
+ HBinaryOperation* hdiv = instr->hydrogen();
+ Register dividend = ToRegister(instr->dividend());
+ Register result = ToRegister(instr->result());
+ int32_t divisor = instr->divisor();
+ bool can_overflow = hdiv->CheckFlag(HValue::kLeftCanBeMinInt);
+
+ // If the divisor is positive, things are easy: There can be no deopts and we
+ // can simply do an arithmetic right shift.
+ int32_t shift = WhichPowerOf2Abs(divisor);
+ if (divisor > 0) {
+ if (shift || !result.is(dividend)) {
+ __ ShiftRightArith(result, dividend, Operand(shift));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ }
+ return;
+ }
+
+ // If the divisor is negative, we have to negate and handle edge cases.
+#if V8_TARGET_ARCH_S390X
+ if (divisor == -1 && can_overflow) {
+ __ Cmp32(dividend, Operand(0x80000000));
+ DeoptimizeIf(eq, instr, Deoptimizer::kOverflow);
+ }
+#endif
+
+
+ __ LoadComplementRR(result, dividend);
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero, cr0);
+ }
+
+// If the negation could not overflow, simply shifting is OK.
+#if !V8_TARGET_ARCH_S390X
+ if (!can_overflow) {
+#endif
+ if (shift) {
+ __ ShiftRightArithP(result, result, Operand(shift));
+ }
+ return;
+#if !V8_TARGET_ARCH_S390X
+ }
+
+ // Dividing by -1 is basically negation, unless we overflow.
+ if (divisor == -1) {
+ DeoptimizeIf(overflow, instr, Deoptimizer::kOverflow, cr0);
+ return;
+ }
+
+ Label overflow_label, done;
+ __ b(overflow, &overflow_label, Label::kNear);
+ __ ShiftRightArith(result, result, Operand(shift));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ __ b(&done, Label::kNear);
+ __ bind(&overflow_label);
+ __ mov(result, Operand(kMinInt / divisor));
+ __ bind(&done);
+#endif
+}
+
+
+void LCodeGen::DoFlooringDivByConstI(LFlooringDivByConstI* instr) {
+ Register dividend = ToRegister(instr->dividend());
+ int32_t divisor = instr->divisor();
+ Register result = ToRegister(instr->result());
+ DCHECK(!dividend.is(result));
+
+ if (divisor == 0) {
+ DeoptimizeIf(al, instr, Deoptimizer::kDivisionByZero);
+ return;
+ }
+
+ // Check for (0 / -x) that will produce negative zero.
+ HMathFloorOfDiv* hdiv = instr->hydrogen();
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) {
+ __ Cmp32(dividend, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+
+ // Easy case: We need no dynamic check for the dividend and the flooring
+ // division is the same as the truncating division.
+ if ((divisor > 0 && !hdiv->CheckFlag(HValue::kLeftCanBeNegative)) ||
+ (divisor < 0 && !hdiv->CheckFlag(HValue::kLeftCanBePositive))) {
+ __ TruncatingDiv(result, dividend, Abs(divisor));
+ if (divisor < 0) __ LoadComplementRR(result, result);
+ return;
+ }
+
+ // In the general case we may need to adjust before and after the truncating
+ // division to get a flooring division.
+ Register temp = ToRegister(instr->temp());
+ DCHECK(!temp.is(dividend) && !temp.is(result));
+ Label needs_adjustment, done;
+ __ Cmp32(dividend, Operand::Zero());
+ __ b(divisor > 0 ? lt : gt, &needs_adjustment);
+ __ TruncatingDiv(result, dividend, Abs(divisor));
+ if (divisor < 0) __ LoadComplementRR(result, result);
+ __ b(&done, Label::kNear);
+ __ bind(&needs_adjustment);
+ __ AddP(temp, dividend, Operand(divisor > 0 ? 1 : -1));
+ __ TruncatingDiv(result, temp, Abs(divisor));
+ if (divisor < 0) __ LoadComplementRR(result, result);
+ __ SubP(result, result, Operand(1));
+ __ bind(&done);
+}
+
+
+// TODO(svenpanne) Refactor this to avoid code duplication with DoDivI.
+void LCodeGen::DoFlooringDivI(LFlooringDivI* instr) {
+ HBinaryOperation* hdiv = instr->hydrogen();
+ const Register dividend = ToRegister(instr->dividend());
+ const Register divisor = ToRegister(instr->divisor());
+ Register result = ToRegister(instr->result());
+
+ DCHECK(!dividend.is(result));
+ DCHECK(!divisor.is(result));
+
+ // Check for x / 0.
+ if (hdiv->CheckFlag(HValue::kCanBeDivByZero)) {
+ __ Cmp32(divisor, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kDivisionByZero);
+ }
+
+ // Check for (0 / -x) that will produce negative zero.
+ if (hdiv->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ Label dividend_not_zero;
+ __ Cmp32(dividend, Operand::Zero());
+ __ bne(÷nd_not_zero, Label::kNear);
+ __ Cmp32(divisor, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ __ bind(÷nd_not_zero);
+ }
+
+ // Check for (kMinInt / -1).
+ if (hdiv->CheckFlag(HValue::kCanOverflow)) {
+ Label no_overflow_possible;
+ __ Cmp32(dividend, Operand(kMinInt));
+ __ bne(&no_overflow_possible, Label::kNear);
+ __ Cmp32(divisor, Operand(-1));
+ if (!hdiv->CheckFlag(HValue::kAllUsesTruncatingToInt32)) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kOverflow);
+ } else {
+ __ bne(&no_overflow_possible, Label::kNear);
+ __ LoadRR(result, dividend);
+ }
+ __ bind(&no_overflow_possible);
+ }
+
+ __ LoadRR(r0, dividend);
+ __ srda(r0, Operand(32));
+ __ dr(r0, divisor); // R0:R1 = R1 / divisor - R0 remainder - R1 quotient
+
+ __ lr(result, r1); // Move quotient to result register
+
+ Label done;
+ Register scratch = scratch0();
+ // If both operands have the same sign then we are done.
+ __ Xor(scratch, dividend, divisor);
+ __ ltr(scratch, scratch); // use 32 bit version LoadAndTestRR even in 64 bit
+ __ bge(&done, Label::kNear);
+
+ // If there is no remainder then we are done.
+ __ lr(scratch, result);
+ __ msr(scratch, divisor);
+ __ Cmp32(dividend, scratch);
+ __ beq(&done, Label::kNear);
+
+ // We performed a truncating division. Correct the result.
+ __ Sub32(result, result, Operand(1));
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoMultiplyAddD(LMultiplyAddD* instr) {
+ DoubleRegister addend = ToDoubleRegister(instr->addend());
+ DoubleRegister multiplier = ToDoubleRegister(instr->multiplier());
+ DoubleRegister multiplicand = ToDoubleRegister(instr->multiplicand());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+
+ // Unable to use madbr as the intermediate value is not rounded
+ // to proper precision
+ __ ldr(result, multiplier);
+ __ mdbr(result, multiplicand);
+ __ adbr(result, addend);
+}
+
+
+void LCodeGen::DoMultiplySubD(LMultiplySubD* instr) {
+ DoubleRegister minuend = ToDoubleRegister(instr->minuend());
+ DoubleRegister multiplier = ToDoubleRegister(instr->multiplier());
+ DoubleRegister multiplicand = ToDoubleRegister(instr->multiplicand());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+
+ // Unable to use msdbr as the intermediate value is not rounded
+ // to proper precision
+ __ ldr(result, multiplier);
+ __ mdbr(result, multiplicand);
+ __ sdbr(result, minuend);
+}
+
+
+void LCodeGen::DoMulI(LMulI* instr) {
+ Register scratch = scratch0();
+ Register result = ToRegister(instr->result());
+ // Note that result may alias left.
+ Register left = ToRegister(instr->left());
+ LOperand* right_op = instr->right();
+
+ bool bailout_on_minus_zero =
+ instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero);
+ bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
+
+ if (right_op->IsConstantOperand()) {
+ int32_t constant = ToInteger32(LConstantOperand::cast(right_op));
+
+ if (bailout_on_minus_zero && (constant < 0)) {
+ // The case of a null constant will be handled separately.
+ // If constant is negative and left is null, the result should be -0.
+ __ CmpP(left, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+
+ switch (constant) {
+ case -1:
+ if (can_overflow) {
+#if V8_TARGET_ARCH_S390X
+ if (instr->hydrogen()->representation().IsSmi()) {
+#endif
+ __ LoadComplementRR(result, left);
+ DeoptimizeIf(overflow, instr, Deoptimizer::kOverflow);
+#if V8_TARGET_ARCH_S390X
+ } else {
+ __ LoadComplementRR(result, left);
+ __ TestIfInt32(result, r0);
+ DeoptimizeIf(ne, instr, Deoptimizer::kOverflow);
+ }
+#endif
+ } else {
+ __ LoadComplementRR(result, left);
+ }
+ break;
+ case 0:
+ if (bailout_on_minus_zero) {
+// If left is strictly negative and the constant is null, the
+// result is -0. Deoptimize if required, otherwise return 0.
+#if V8_TARGET_ARCH_S390X
+ if (instr->hydrogen()->representation().IsSmi()) {
+#endif
+ __ Cmp32(left, Operand::Zero());
+#if V8_TARGET_ARCH_S390X
+ } else {
+ __ Cmp32(left, Operand::Zero());
+ }
+#endif
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ }
+ __ LoadImmP(result, Operand::Zero());
+ break;
+ case 1:
+ __ Move(result, left);
+ break;
+ default:
+ // Multiplying by powers of two and powers of two plus or minus
+ // one can be done faster with shifted operands.
+ // For other constants we emit standard code.
+ int32_t mask = constant >> 31;
+ uint32_t constant_abs = (constant + mask) ^ mask;
+
+ if (base::bits::IsPowerOfTwo32(constant_abs)) {
+ int32_t shift = WhichPowerOf2(constant_abs);
+ __ ShiftLeftP(result, left, Operand(shift));
+ // Correct the sign of the result if the constant is negative.
+ if (constant < 0) __ LoadComplementRR(result, result);
+ } else if (base::bits::IsPowerOfTwo32(constant_abs - 1)) {
+ int32_t shift = WhichPowerOf2(constant_abs - 1);
+ __ ShiftLeftP(scratch, left, Operand(shift));
+ __ AddP(result, scratch, left);
+ // Correct the sign of the result if the constant is negative.
+ if (constant < 0) __ LoadComplementRR(result, result);
+ } else if (base::bits::IsPowerOfTwo32(constant_abs + 1)) {
+ int32_t shift = WhichPowerOf2(constant_abs + 1);
+ __ ShiftLeftP(scratch, left, Operand(shift));
+ __ SubP(result, scratch, left);
+ // Correct the sign of the result if the constant is negative.
+ if (constant < 0) __ LoadComplementRR(result, result);
+ } else {
+ // Generate standard code.
+ __ Move(result, left);
+ __ MulP(result, Operand(constant));
+ }
+ }
+
+ } else {
+ DCHECK(right_op->IsRegister());
+ Register right = ToRegister(right_op);
+
+ if (can_overflow) {
+#if V8_TARGET_ARCH_S390X
+ // result = left * right.
+ if (instr->hydrogen()->representation().IsSmi()) {
+ __ SmiUntag(result, left);
+ __ SmiUntag(scratch, right);
+ __ msgr(result, scratch);
+ } else {
+ __ LoadRR(result, left);
+ __ msgr(result, right);
+ }
+ __ TestIfInt32(result, r0);
+ DeoptimizeIf(ne, instr, Deoptimizer::kOverflow);
+ if (instr->hydrogen()->representation().IsSmi()) {
+ __ SmiTag(result);
+ }
+#else
+ // r0:scratch = scratch * right
+ if (instr->hydrogen()->representation().IsSmi()) {
+ __ SmiUntag(scratch, left);
+ __ mr_z(r0, right);
+ __ LoadRR(result, scratch);
+ } else {
+ // r0:scratch = scratch * right
+ __ LoadRR(scratch, left);
+ __ mr_z(r0, right);
+ __ LoadRR(result, scratch);
+ }
+ __ TestIfInt32(r0, result, scratch);
+ DeoptimizeIf(ne, instr, Deoptimizer::kOverflow);
+#endif
+ } else {
+ if (instr->hydrogen()->representation().IsSmi()) {
+ __ SmiUntag(result, left);
+ __ Mul(result, result, right);
+ } else {
+ __ Mul(result, left, right);
+ }
+ }
+
+ if (bailout_on_minus_zero) {
+ Label done;
+#if V8_TARGET_ARCH_S390X
+ if (instr->hydrogen()->representation().IsSmi()) {
+#endif
+ __ XorP(r0, left, right);
+ __ LoadAndTestRR(r0, r0);
+ __ bge(&done, Label::kNear);
+#if V8_TARGET_ARCH_S390X
+ } else {
+ __ XorP(r0, left, right);
+ __ Cmp32(r0, Operand::Zero());
+ __ bge(&done, Label::kNear);
+ }
+#endif
+ // Bail out if the result is minus zero.
+ __ CmpP(result, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ __ bind(&done);
+ }
+ }
+}
+
+
+void LCodeGen::DoBitI(LBitI* instr) {
+ LOperand* left_op = instr->left();
+ LOperand* right_op = instr->right();
+ DCHECK(left_op->IsRegister());
+ Register left = ToRegister(left_op);
+ Register result = ToRegister(instr->result());
+
+ if (right_op->IsConstantOperand()) {
+ switch (instr->op()) {
+ case Token::BIT_AND:
+ __ AndP(result, left,
+ Operand(ToOperand(right_op)));
+ break;
+ case Token::BIT_OR:
+ __ OrP(result, left,
+ Operand(ToOperand(right_op)));
+ break;
+ case Token::BIT_XOR:
+ __ XorP(result, left,
+ Operand(ToOperand(right_op)));
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ } else if (right_op->IsStackSlot()) {
+ // Reg-Mem instruction clobbers, so copy src to dst first.
+ if (!left.is(result))
+ __ LoadRR(result, left);
+ switch (instr->op()) {
+ case Token::BIT_AND:
+ __ AndP(result, ToMemOperand(right_op));
+ break;
+ case Token::BIT_OR:
+ __ OrP(result, ToMemOperand(right_op));
+ break;
+ case Token::BIT_XOR:
+ __ XorP(result, ToMemOperand(right_op));
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ } else {
+ DCHECK(right_op->IsRegister());
+
+ switch (instr->op()) {
+ case Token::BIT_AND:
+ __ AndP(result, left, ToRegister(right_op));
+ break;
+ case Token::BIT_OR:
+ __ OrP(result, left, ToRegister(right_op));
+ break;
+ case Token::BIT_XOR:
+ __ XorP(result, left, ToRegister(right_op));
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ }
+}
+
+
+void LCodeGen::DoShiftI(LShiftI* instr) {
+ // Both 'left' and 'right' are "used at start" (see LCodeGen::DoShift), so
+ // result may alias either of them.
+ LOperand* right_op = instr->right();
+ Register left = ToRegister(instr->left());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+ if (right_op->IsRegister()) {
+ // Mask the right_op operand.
+ __ AndP(scratch, ToRegister(right_op), Operand(0x1F));
+ switch (instr->op()) {
+ case Token::ROR:
+ // rotate_right(a, b) == rotate_left(a, 32 - b)
+ __ LoadComplementRR(scratch, scratch);
+ __ rll(result, left, scratch, Operand(32));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ break;
+ case Token::SAR:
+ __ ShiftRightArith(result, left, scratch);
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ break;
+ case Token::SHR:
+ __ ShiftRight(result, left, scratch);
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ if (instr->can_deopt()) {
+#if V8_TARGET_ARCH_S390X
+ __ ltgfr(result, result/*, SetRC*/);
+#else
+ __ ltr(result, result); // Set the <,==,> condition
+#endif
+ DeoptimizeIf(lt, instr, Deoptimizer::kNegativeValue, cr0);
+ }
+ break;
+ case Token::SHL:
+ __ ShiftLeft(result, left, scratch);
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ } else {
+ // Mask the right_op operand.
+ int value = ToInteger32(LConstantOperand::cast(right_op));
+ uint8_t shift_count = static_cast<uint8_t>(value & 0x1F);
+ switch (instr->op()) {
+ case Token::ROR:
+ if (shift_count != 0) {
+ __ rll(result, left, Operand(32 - shift_count));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ } else {
+ __ Move(result, left);
+ }
+ break;
+ case Token::SAR:
+ if (shift_count != 0) {
+ __ ShiftRightArith(result, left, Operand(shift_count));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ } else {
+ __ Move(result, left);
+ }
+ break;
+ case Token::SHR:
+ if (shift_count != 0) {
+ __ ShiftRight(result, left, Operand(shift_count));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ } else {
+ if (instr->can_deopt()) {
+ __ Cmp32(left, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kNegativeValue);
+ }
+ __ Move(result, left);
+ }
+ break;
+ case Token::SHL:
+ if (shift_count != 0) {
+#if V8_TARGET_ARCH_S390X
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+ // TODO(joransiu): Fix proper Z equivalent to sldi
+ DCHECK(0);
+ // __ sldi(result, left, Operand(shift_count));
+#else
+ if (instr->hydrogen_value()->representation().IsSmi() &&
+ instr->can_deopt()) {
+ if (shift_count != 1) {
+ __ ShiftLeft(result, left, Operand(shift_count - 1));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ __ SmiTagCheckOverflow(result, result, scratch);
+ } else {
+ __ SmiTagCheckOverflow(result, left, scratch);
+ }
+ DeoptimizeIf(lt, instr, Deoptimizer::kOverflow, cr0);
+#endif
+ } else {
+ __ ShiftLeft(result, left, Operand(shift_count));
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(result, result);
+#endif
+ }
+ } else {
+ __ Move(result, left);
+ }
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ }
+}
+
+
+void LCodeGen::DoSubI(LSubI* instr) {
+ LOperand* left = instr->left();
+ LOperand* right = instr->right();
+ LOperand* result = instr->result();
+
+ bool isInteger = !(instr->hydrogen()->representation().IsSmi() ||
+ instr->hydrogen()->representation().IsExternal());
+
+#if V8_TARGET_ARCH_S390X
+ // The overflow detection needs to be tested on the lower 32-bits.
+ // As a result, on 64-bit, we need to force 32-bit arithmetic operations
+ // to set the CC overflow bit properly. The result is then sign-extended.
+ bool checkOverflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
+#else
+ bool checkOverflow = true;
+#endif
+
+ if (right->IsConstantOperand()) {
+ if (!isInteger || !checkOverflow)
+ __ SubP(ToRegister(result), ToRegister(left), ToOperand(right));
+ else
+ __ Sub32(ToRegister(result), ToRegister(left), ToOperand(right));
+ } else if (right->IsRegister()) {
+ if (!isInteger)
+ __ SubP(ToRegister(result), ToRegister(left), ToRegister(right));
+ else if (!checkOverflow)
+ __ SubP_ExtendSrc(ToRegister(result), ToRegister(left),
+ ToRegister(right));
+ else
+ __ Sub32(ToRegister(result), ToRegister(left), ToRegister(right));
+ } else {
+ if (!left->Equals(instr->result()))
+ __ LoadRR(ToRegister(result), ToRegister(left));
+
+ MemOperand mem = ToMemOperand(right);
+ if (!isInteger) {
+ __ SubP(ToRegister(result), mem);
+ } else {
+#if V8_TARGET_ARCH_S390X && !V8_TARGET_LITTLE_ENDIAN
+ // We want to read the 32-bits directly from memory
+ MemOperand Upper32Mem = MemOperand(mem.rb(), mem.rx(),
+ mem.offset() + 4);
+#else
+ MemOperand Upper32Mem = ToMemOperand(right);
+#endif
+ if (checkOverflow) {
+ __ Sub32(ToRegister(result), Upper32Mem);
+ } else {
+ __ SubP_ExtendSrc(ToRegister(result), Upper32Mem);
+ }
+ }
+ }
+
+#if V8_TARGET_ARCH_S390X
+ if (isInteger && checkOverflow)
+ __ lgfr(ToRegister(result), ToRegister(result));
+#endif
+ if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow)) {
+ DeoptimizeIf(overflow, instr, Deoptimizer::kOverflow);
+ }
+}
+
+
+void LCodeGen::DoRSubI(LRSubI* instr) {
+ LOperand* left = instr->left();
+ LOperand* right = instr->right();
+ LOperand* result = instr->result();
+
+ DCHECK(!instr->hydrogen()->CheckFlag(HValue::kCanOverflow) &&
+ right->IsConstantOperand());
+
+#if V8_TARGET_ARCH_S390X
+ // The overflow detection needs to be tested on the lower 32-bits.
+ // As a result, on 64-bit, we need to force 32-bit arithmetic operations
+ // to set the CC overflow bit properly. The result is then sign-extended.
+ bool checkOverflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
+#else
+ bool checkOverflow = true;
+#endif
+
+ Operand right_operand = ToOperand(right);
+ __ mov(r0, right_operand);
+
+ if (!checkOverflow) {
+ __ SubP_ExtendSrc(ToRegister(result), r0,
+ ToRegister(left));
+ } else {
+ __ Sub32(ToRegister(result), r0, ToRegister(left));
+ }
+}
+
+
+void LCodeGen::DoConstantI(LConstantI* instr) {
+ __ mov(ToRegister(instr->result()), Operand(instr->value()));
+}
+
+
+void LCodeGen::DoConstantS(LConstantS* instr) {
+ __ LoadSmiLiteral(ToRegister(instr->result()), instr->value());
+}
+
+
+void LCodeGen::DoConstantD(LConstantD* instr) {
+ DCHECK(instr->result()->IsDoubleRegister());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ uint64_t bits = instr->bits();
+ __ LoadDoubleLiteral(result, bits, scratch0());
+}
+
+
+
+void LCodeGen::DoConstantE(LConstantE* instr) {
+ __ mov(ToRegister(instr->result()), Operand(instr->value()));
+}
+
+
+void LCodeGen::DoConstantT(LConstantT* instr) {
+ Handle<Object> object = instr->value(isolate());
+ AllowDeferredHandleDereference smi_check;
+ __ Move(ToRegister(instr->result()), object);
+}
+
+
+void LCodeGen::DoMapEnumLength(LMapEnumLength* instr) {
+ Register result = ToRegister(instr->result());
+ Register map = ToRegister(instr->value());
+ __ EnumLength(result, map);
+}
+
+
+void LCodeGen::DoDateField(LDateField* instr) {
+ Register object = ToRegister(instr->date());
+ Register result = ToRegister(instr->result());
+ Register scratch = ToRegister(instr->temp());
+ Smi* index = instr->index();
+ DCHECK(object.is(result));
+ DCHECK(object.is(r2));
+ DCHECK(!scratch.is(scratch0()));
+ DCHECK(!scratch.is(object));
+
+ if (index->value() == 0) {
+ __ LoadP(result, FieldMemOperand(object, JSDate::kValueOffset));
+ } else {
+ Label runtime, done;
+ if (index->value() < JSDate::kFirstUncachedField) {
+ ExternalReference stamp = ExternalReference::date_cache_stamp(isolate());
+ __ mov(scratch, Operand(stamp));
+ __ LoadP(scratch, MemOperand(scratch));
+ __ LoadP(scratch0(), FieldMemOperand(object, JSDate::kCacheStampOffset));
+ __ CmpP(scratch, scratch0());
+ __ bne(&runtime, Label::kNear);
+ __ LoadP(result,
+ FieldMemOperand(object, JSDate::kValueOffset +
+ kPointerSize * index->value()));
+ __ b(&done, Label::kNear);
+ }
+ __ bind(&runtime);
+ __ PrepareCallCFunction(2, scratch);
+ __ LoadSmiLiteral(r3, index);
+ __ CallCFunction(ExternalReference::get_date_field_function(isolate()), 2);
+ __ bind(&done);
+ }
+}
+
+
+MemOperand LCodeGen::BuildSeqStringOperand(Register string, LOperand* index,
+ String::Encoding encoding) {
+ if (index->IsConstantOperand()) {
+ int offset = ToInteger32(LConstantOperand::cast(index));
+ if (encoding == String::TWO_BYTE_ENCODING) {
+ offset *= kUC16Size;
+ }
+ STATIC_ASSERT(kCharSize == 1);
+ return FieldMemOperand(string, SeqString::kHeaderSize + offset);
+ }
+ Register scratch = scratch0();
+ DCHECK(!scratch.is(string));
+ DCHECK(!scratch.is(ToRegister(index)));
+ // TODO(joransiu) : Fold Add into FieldMemOperand
+ if (encoding == String::ONE_BYTE_ENCODING) {
+ __ AddP(scratch, string, ToRegister(index));
+ } else {
+ STATIC_ASSERT(kUC16Size == 2);
+ __ ShiftLeftP(scratch, ToRegister(index), Operand(1));
+ __ AddP(scratch, string, scratch);
+ }
+ return FieldMemOperand(scratch, SeqString::kHeaderSize);
+}
+
+
+void LCodeGen::DoSeqStringGetChar(LSeqStringGetChar* instr) {
+ String::Encoding encoding = instr->hydrogen()->encoding();
+ Register string = ToRegister(instr->string());
+ Register result = ToRegister(instr->result());
+
+ if (FLAG_debug_code) {
+ Register scratch = scratch0();
+ __ LoadP(scratch, FieldMemOperand(string, HeapObject::kMapOffset));
+ __ llc(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+
+ __ AndP(scratch, scratch,
+ Operand(kStringRepresentationMask | kStringEncodingMask));
+ static const uint32_t one_byte_seq_type = kSeqStringTag | kOneByteStringTag;
+ static const uint32_t two_byte_seq_type = kSeqStringTag | kTwoByteStringTag;
+ __ CmpP(scratch,
+ Operand(encoding == String::ONE_BYTE_ENCODING ? one_byte_seq_type
+ : two_byte_seq_type));
+ __ Check(eq, kUnexpectedStringType);
+ }
+
+ MemOperand operand = BuildSeqStringOperand(string, instr->index(), encoding);
+ if (encoding == String::ONE_BYTE_ENCODING) {
+ __ llc(result, operand);
+ } else {
+ __ llh(result, operand);
+ }
+}
+
+
+void LCodeGen::DoSeqStringSetChar(LSeqStringSetChar* instr) {
+ String::Encoding encoding = instr->hydrogen()->encoding();
+ Register string = ToRegister(instr->string());
+ Register value = ToRegister(instr->value());
+
+ if (FLAG_debug_code) {
+ Register index = ToRegister(instr->index());
+ static const uint32_t one_byte_seq_type = kSeqStringTag | kOneByteStringTag;
+ static const uint32_t two_byte_seq_type = kSeqStringTag | kTwoByteStringTag;
+ int encoding_mask =
+ instr->hydrogen()->encoding() == String::ONE_BYTE_ENCODING
+ ? one_byte_seq_type
+ : two_byte_seq_type;
+ __ EmitSeqStringSetCharCheck(string, index, value, encoding_mask);
+ }
+
+ MemOperand operand = BuildSeqStringOperand(string, instr->index(), encoding);
+ if (encoding == String::ONE_BYTE_ENCODING) {
+ __ stc(value, operand);
+ } else {
+ __ sth(value, operand);
+ }
+}
+
+
+void LCodeGen::DoAddI(LAddI* instr) {
+ LOperand* left = instr->left();
+ LOperand* right = instr->right();
+ LOperand* result = instr->result();
+ bool isInteger = !(instr->hydrogen()->representation().IsSmi() ||
+ instr->hydrogen()->representation().IsExternal());
+#if V8_TARGET_ARCH_S390X
+ // The overflow detection needs to be tested on the lower 32-bits.
+ // As a result, on 64-bit, we need to force 32-bit arithmetic operations
+ // to set the CC overflow bit properly. The result is then sign-extended.
+ bool checkOverflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
+#else
+ bool checkOverflow = true;
+#endif
+
+ if (right->IsConstantOperand()) {
+ if (!isInteger || !checkOverflow)
+ __ AddP(ToRegister(result), ToRegister(left), ToOperand(right));
+ else
+ __ Add32(ToRegister(result), ToRegister(left), ToOperand(right));
+ } else if (right->IsRegister()) {
+ if (!isInteger)
+ __ AddP(ToRegister(result), ToRegister(left), ToRegister(right));
+ else if (!checkOverflow)
+ __ AddP_ExtendSrc(ToRegister(result), ToRegister(left),
+ ToRegister(right));
+ else
+ __ Add32(ToRegister(result), ToRegister(left), ToRegister(right));
+ } else {
+ if (!left->Equals(instr->result()))
+ __ LoadRR(ToRegister(result), ToRegister(left));
+
+ MemOperand mem = ToMemOperand(right);
+ if (!isInteger) {
+ __ AddP(ToRegister(result), mem);
+ } else {
+#if V8_TARGET_ARCH_S390X && !V8_TARGET_LITTLE_ENDIAN
+ // We want to read the 32-bits directly from memory
+ MemOperand Upper32Mem = MemOperand(mem.rb(), mem.rx(),
+ mem.offset() + 4);
+#else
+ MemOperand Upper32Mem = ToMemOperand(right);
+#endif
+ if (checkOverflow) {
+ __ Add32(ToRegister(result), Upper32Mem);
+ } else {
+ __ AddP_ExtendSrc(ToRegister(result), Upper32Mem);
+ }
+ }
+ }
+
+#if V8_TARGET_ARCH_S390X
+ if (isInteger && checkOverflow)
+ __ lgfr(ToRegister(result), ToRegister(result));
+#endif
+ // Doptimize on overflow
+ if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow)) {
+ DeoptimizeIf(overflow, instr, Deoptimizer::kOverflow);
+ }
+}
+
+
+void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
+ LOperand* left = instr->left();
+ LOperand* right = instr->right();
+ HMathMinMax::Operation operation = instr->hydrogen()->operation();
+ Condition cond = (operation == HMathMinMax::kMathMin) ? le : ge;
+ if (instr->hydrogen()->representation().IsSmiOrInteger32()) {
+ Register left_reg = ToRegister(left);
+ Register right_reg = EmitLoadRegister(right, ip);
+ Register result_reg = ToRegister(instr->result());
+ Label return_left, done;
+#if V8_TARGET_ARCH_S390X
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+#endif
+ __ CmpP(left_reg, right_reg);
+#if V8_TARGET_ARCH_S390X
+ } else {
+ __ Cmp32(left_reg, right_reg);
+ }
+#endif
+ __ b(cond, &return_left, Label::kNear);
+ __ Move(result_reg, right_reg);
+ __ b(&done, Label::kNear);
+ __ bind(&return_left);
+ __ Move(result_reg, left_reg);
+ __ bind(&done);
+ } else {
+ DCHECK(instr->hydrogen()->representation().IsDouble());
+ DoubleRegister left_reg = ToDoubleRegister(left);
+ DoubleRegister right_reg = ToDoubleRegister(right);
+ DoubleRegister result_reg = ToDoubleRegister(instr->result());
+ Label check_nan_left, check_zero, return_left, return_right, done;
+ __ cdbr(left_reg, right_reg);
+ __ bunordered(&check_nan_left, Label::kNear);
+ __ beq(&check_zero);
+ __ b(cond, &return_left, Label::kNear);
+ __ b(&return_right, Label::kNear);
+
+ __ bind(&check_zero);
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(left_reg, kDoubleRegZero);
+ __ bne(&return_left, Label::kNear); // left == right != 0.
+
+ // At this point, both left and right are either 0 or -0.
+ // N.B. The following works because +0 + -0 == +0
+ if (operation == HMathMinMax::kMathMin) {
+ // For min we want logical-or of sign bit: -(-L + -R)
+ __ lcdbr(left_reg, left_reg);
+ __ ldr(result_reg, left_reg);
+ if (left_reg.is(right_reg)) {
+ __ adbr(result_reg, right_reg);
+ } else {
+ __ sdbr(result_reg, right_reg);
+ }
+ __ lcdbr(result_reg, result_reg);
+ } else {
+ // For max we want logical-and of sign bit: (L + R)
+ __ ldr(result_reg, left_reg);
+ __ adbr(result_reg, right_reg);
+ }
+ __ b(&done, Label::kNear);
+
+ __ bind(&check_nan_left);
+ __ cdbr(left_reg, left_reg);
+ __ bunordered(&return_left, Label::kNear); // left == NaN.
+
+ __ bind(&return_right);
+ if (!right_reg.is(result_reg)) {
+ __ ldr(result_reg, right_reg);
+ }
+ __ b(&done, Label::kNear);
+
+ __ bind(&return_left);
+ if (!left_reg.is(result_reg)) {
+ __ ldr(result_reg, left_reg);
+ }
+ __ bind(&done);
+ }
+}
+
+
+void LCodeGen::DoArithmeticD(LArithmeticD* instr) {
+ DoubleRegister left = ToDoubleRegister(instr->left());
+ DoubleRegister right = ToDoubleRegister(instr->right());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ // All operations except MOD are computed in-place.
+ DCHECK(instr->op() == Token::MOD || left.is(result));
+ switch (instr->op()) {
+ case Token::ADD:
+ __ adbr(result, right);
+ break;
+ case Token::SUB:
+ __ sdbr(result, right);
+ break;
+ case Token::MUL:
+ __ mdbr(result, right);
+ break;
+ case Token::DIV:
+ __ ddbr(result, right);
+ break;
+ case Token::MOD: {
+ __ PrepareCallCFunction(0, 2, scratch0());
+ __ MovToFloatParameters(left, right);
+ __ CallCFunction(ExternalReference::mod_two_doubles_operation(isolate()),
+ 0, 2);
+ // Move the result in the double result register.
+ __ MovFromFloatResult(result);
+ break;
+ }
+ default:
+ UNREACHABLE();
+ break;
+ }
+}
+
+
+void LCodeGen::DoArithmeticT(LArithmeticT* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->left()).is(r3));
+ DCHECK(ToRegister(instr->right()).is(r2));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ Handle<Code> code =
+ CodeFactory::BinaryOpIC(isolate(), instr->op(), instr->strength()).code();
+ CallCode(code, RelocInfo::CODE_TARGET, instr);
+}
+
+
+template <class InstrType>
+void LCodeGen::EmitBranch(InstrType instr, Condition cond, CRegister cr) {
+ int left_block = instr->TrueDestination(chunk_);
+ int right_block = instr->FalseDestination(chunk_);
+
+ int next_block = GetNextEmittedBlock();
+
+ if (right_block == left_block || cond == al) {
+ EmitGoto(left_block);
+ } else if (left_block == next_block) {
+ __ b(NegateCondition(cond), chunk_->GetAssemblyLabel(right_block));
+ } else if (right_block == next_block) {
+ __ b(cond, chunk_->GetAssemblyLabel(left_block));
+ } else {
+ __ b(cond, chunk_->GetAssemblyLabel(left_block));
+ __ b(chunk_->GetAssemblyLabel(right_block));
+ }
+}
+
+
+template <class InstrType>
+void LCodeGen::EmitFalseBranch(InstrType instr, Condition cond, CRegister cr) {
+ int false_block = instr->FalseDestination(chunk_);
+ // TODO(joransiu) : Cleanup unused CRegister cr
+ __ b(cond, chunk_->GetAssemblyLabel(false_block) /*, cr*/);
+}
+
+
+void LCodeGen::DoDebugBreak(LDebugBreak* instr) { __ stop("LBreak"); }
+
+
+void LCodeGen::DoBranch(LBranch* instr) {
+ Representation r = instr->hydrogen()->value()->representation();
+ DoubleRegister dbl_scratch = double_scratch0();
+
+ if (r.IsInteger32()) {
+ DCHECK(!info()->IsStub());
+ Register reg = ToRegister(instr->value());
+ __ Cmp32(reg, Operand::Zero());
+ EmitBranch(instr, ne);
+ } else if (r.IsSmi()) {
+ DCHECK(!info()->IsStub());
+ Register reg = ToRegister(instr->value());
+ __ CmpP(reg, Operand::Zero());
+ EmitBranch(instr, ne);
+ } else if (r.IsDouble()) {
+ DCHECK(!info()->IsStub());
+ DoubleRegister reg = ToDoubleRegister(instr->value());
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(reg, kDoubleRegZero);
+ // Test the double value. Zero and NaN are false.
+ Condition lt_gt = static_cast<Condition>(lt | gt);
+
+ EmitBranch(instr, lt_gt, cr0);
+ } else {
+ DCHECK(r.IsTagged());
+ Register reg = ToRegister(instr->value());
+ HType type = instr->hydrogen()->value()->type();
+ if (type.IsBoolean()) {
+ DCHECK(!info()->IsStub());
+ __ CompareRoot(reg, Heap::kTrueValueRootIndex);
+ EmitBranch(instr, eq);
+ } else if (type.IsSmi()) {
+ DCHECK(!info()->IsStub());
+ __ CmpP(reg, Operand::Zero());
+ EmitBranch(instr, ne);
+ } else if (type.IsJSArray()) {
+ DCHECK(!info()->IsStub());
+ EmitBranch(instr, al);
+ } else if (type.IsHeapNumber()) {
+ DCHECK(!info()->IsStub());
+ __ ld(dbl_scratch, FieldMemOperand(reg, HeapNumber::kValueOffset));
+ // Test the double value. Zero and NaN are false.
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(dbl_scratch, kDoubleRegZero);
+ Condition lt_gt = static_cast<Condition>(lt | gt);
+ EmitBranch(instr, lt_gt, cr0);
+ } else if (type.IsString()) {
+ DCHECK(!info()->IsStub());
+ __ LoadP(ip, FieldMemOperand(reg, String::kLengthOffset));
+ __ CmpP(ip, Operand::Zero());
+ EmitBranch(instr, ne);
+ } else {
+ ToBooleanStub::Types expected = instr->hydrogen()->expected_input_types();
+ // Avoid deopts in the case where we've never executed this path before.
+ if (expected.IsEmpty()) expected = ToBooleanStub::Types::Generic();
+
+ if (expected.Contains(ToBooleanStub::UNDEFINED)) {
+ // undefined -> false.
+ __ CompareRoot(reg, Heap::kUndefinedValueRootIndex);
+ __ beq(instr->FalseLabel(chunk_));
+ }
+ if (expected.Contains(ToBooleanStub::BOOLEAN)) {
+ // Boolean -> its value.
+ __ CompareRoot(reg, Heap::kTrueValueRootIndex);
+ __ beq(instr->TrueLabel(chunk_));
+ __ CompareRoot(reg, Heap::kFalseValueRootIndex);
+ __ beq(instr->FalseLabel(chunk_));
+ }
+ if (expected.Contains(ToBooleanStub::NULL_TYPE)) {
+ // 'null' -> false.
+ __ CompareRoot(reg, Heap::kNullValueRootIndex);
+ __ beq(instr->FalseLabel(chunk_));
+ }
+
+ if (expected.Contains(ToBooleanStub::SMI)) {
+ // Smis: 0 -> false, all other -> true.
+ __ CmpP(reg, Operand::Zero());
+ __ beq(instr->FalseLabel(chunk_));
+ __ JumpIfSmi(reg, instr->TrueLabel(chunk_));
+ } else if (expected.NeedsMap()) {
+ // If we need a map later and have a Smi -> deopt.
+ __ TestIfSmi(reg);
+ DeoptimizeIf(eq, instr, Deoptimizer::kSmi, cr0);
+ }
+
+ const Register map = scratch0();
+ if (expected.NeedsMap()) {
+ __ LoadP(map, FieldMemOperand(reg, HeapObject::kMapOffset));
+
+ if (expected.CanBeUndetectable()) {
+ // Undetectable -> false.
+ __ tm(FieldMemOperand(map, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ __ bne(instr->FalseLabel(chunk_));
+ }
+ }
+
+ if (expected.Contains(ToBooleanStub::SPEC_OBJECT)) {
+ // spec object -> true.
+ __ CompareInstanceType(map, ip, FIRST_SPEC_OBJECT_TYPE);
+ __ bge(instr->TrueLabel(chunk_));
+ }
+
+ if (expected.Contains(ToBooleanStub::STRING)) {
+ // String value -> false iff empty.
+ Label not_string;
+ __ CompareInstanceType(map, ip, FIRST_NONSTRING_TYPE);
+ __ bge(¬_string, Label::kNear);
+ __ LoadP(ip, FieldMemOperand(reg, String::kLengthOffset));
+ __ CmpP(ip, Operand::Zero());
+ __ bne(instr->TrueLabel(chunk_));
+ __ b(instr->FalseLabel(chunk_));
+ __ bind(¬_string);
+ }
+
+ if (expected.Contains(ToBooleanStub::SYMBOL)) {
+ // Symbol value -> true.
+ __ CompareInstanceType(map, ip, SYMBOL_TYPE);
+ __ beq(instr->TrueLabel(chunk_));
+ }
+
+ if (expected.Contains(ToBooleanStub::HEAP_NUMBER)) {
+ // heap number -> false iff +0, -0, or NaN.
+ Label not_heap_number;
+ __ CompareRoot(map, Heap::kHeapNumberMapRootIndex);
+ __ bne(¬_heap_number, Label::kNear);
+ __ LoadF(dbl_scratch, FieldMemOperand(reg, HeapNumber::kValueOffset));
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(dbl_scratch, kDoubleRegZero);
+ __ bunordered(instr->FalseLabel(chunk_)); // NaN -> false.
+ __ beq(instr->FalseLabel(chunk_)); // +0, -0 -> false.
+ __ b(instr->TrueLabel(chunk_));
+ __ bind(¬_heap_number);
+ }
+
+ if (!expected.IsGeneric()) {
+ // We've seen something for the first time -> deopt.
+ // This can only happen if we are not generic already.
+ DeoptimizeIf(al, instr, Deoptimizer::kUnexpectedObject);
+ }
+ }
+ }
+}
+
+
+void LCodeGen::EmitGoto(int block) {
+ if (!IsNextEmittedBlock(block)) {
+ __ b(chunk_->GetAssemblyLabel(LookupDestination(block)));
+ }
+}
+
+
+void LCodeGen::DoGoto(LGoto* instr) { EmitGoto(instr->block_id()); }
+
+
+Condition LCodeGen::TokenToCondition(Token::Value op) {
+ Condition cond = kNoCondition;
+ switch (op) {
+ case Token::EQ:
+ case Token::EQ_STRICT:
+ cond = eq;
+ break;
+ case Token::NE:
+ case Token::NE_STRICT:
+ cond = ne;
+ break;
+ case Token::LT:
+ cond = lt;
+ break;
+ case Token::GT:
+ cond = gt;
+ break;
+ case Token::LTE:
+ cond = le;
+ break;
+ case Token::GTE:
+ cond = ge;
+ break;
+ case Token::IN:
+ case Token::INSTANCEOF:
+ default:
+ UNREACHABLE();
+ }
+ return cond;
+}
+
+
+void LCodeGen::DoCompareNumericAndBranch(LCompareNumericAndBranch* instr) {
+ LOperand* left = instr->left();
+ LOperand* right = instr->right();
+ bool is_unsigned =
+ instr->hydrogen()->left()->CheckFlag(HInstruction::kUint32) ||
+ instr->hydrogen()->right()->CheckFlag(HInstruction::kUint32);
+ Condition cond = TokenToCondition(instr->op());
+
+ if (left->IsConstantOperand() && right->IsConstantOperand()) {
+ // We can statically evaluate the comparison.
+ double left_val = ToDouble(LConstantOperand::cast(left));
+ double right_val = ToDouble(LConstantOperand::cast(right));
+ int next_block = EvalComparison(instr->op(), left_val, right_val)
+ ? instr->TrueDestination(chunk_)
+ : instr->FalseDestination(chunk_);
+ EmitGoto(next_block);
+ } else {
+ if (instr->is_double()) {
+ // Compare left and right operands as doubles and load the
+ // resulting flags into the normal status register.
+ __ cdbr(ToDoubleRegister(left), ToDoubleRegister(right));
+ // If a NaN is involved, i.e. the result is unordered,
+ // jump to false block label.
+ __ bunordered(instr->FalseLabel(chunk_));
+ } else {
+ if (right->IsConstantOperand()) {
+ int32_t value = ToInteger32(LConstantOperand::cast(right));
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+ if (is_unsigned) {
+ __ CmpLogicalSmiLiteral(ToRegister(left), Smi::FromInt(value), r0);
+ } else {
+ __ CmpSmiLiteral(ToRegister(left), Smi::FromInt(value), r0);
+ }
+ } else {
+ if (is_unsigned) {
+ __ CmpLogical32(ToRegister(left), ToOperand(right));
+ } else {
+ __ Cmp32(ToRegister(left), ToOperand(right));
+ }
+ }
+ } else if (left->IsConstantOperand()) {
+ int32_t value = ToInteger32(LConstantOperand::cast(left));
+ if (instr->hydrogen_value()->representation().IsSmi()) {
+ if (is_unsigned) {
+ __ CmpLogicalSmiLiteral(ToRegister(right), Smi::FromInt(value), r0);
+ } else {
+ __ CmpSmiLiteral(ToRegister(right), Smi::FromInt(value), r0);
+ }
+ } else {
+ if (is_unsigned) {
+ __ CmpLogical32(ToRegister(right), ToOperand(left));
+ } else {
+ __ Cmp32(ToRegister(right), ToOperand(left));
+ }
+ }
+ // We commuted the operands, so commute the condition.
+ cond = CommuteCondition(cond);
+ } else if (instr->hydrogen_value()->representation().IsSmi()) {
+ if (is_unsigned) {
+ __ CmpLogicalP(ToRegister(left), ToRegister(right));
+ } else {
+ __ CmpP(ToRegister(left), ToRegister(right));
+ }
+ } else {
+ if (is_unsigned) {
+ __ CmpLogical32(ToRegister(left), ToRegister(right));
+ } else {
+ __ Cmp32(ToRegister(left), ToRegister(right));
+ }
+ }
+ }
+ EmitBranch(instr, cond);
+ }
+}
+
+
+void LCodeGen::DoCmpObjectEqAndBranch(LCmpObjectEqAndBranch* instr) {
+ Register left = ToRegister(instr->left());
+ Register right = ToRegister(instr->right());
+
+ __ CmpP(left, right);
+ EmitBranch(instr, eq);
+}
+
+
+void LCodeGen::DoCmpHoleAndBranch(LCmpHoleAndBranch* instr) {
+ if (instr->hydrogen()->representation().IsTagged()) {
+ Register input_reg = ToRegister(instr->object());
+ __ CmpP(input_reg, Operand(factory()->the_hole_value()));
+ EmitBranch(instr, eq);
+ return;
+ }
+
+ DoubleRegister input_reg = ToDoubleRegister(instr->object());
+ __ cdbr(input_reg, input_reg);
+ EmitFalseBranch(instr, ordered);
+
+ Register scratch = scratch0();
+ // TODO(joransiu): Use double to int instruction instead.
+ __ stdy(input_reg, MemOperand(sp, -kDoubleSize));
+ __ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ __ Cmp32(scratch, Operand(kHoleNanUpper32));
+ EmitBranch(instr, eq);
+}
+
+
+void LCodeGen::DoCompareMinusZeroAndBranch(LCompareMinusZeroAndBranch* instr) {
+ Representation rep = instr->hydrogen()->value()->representation();
+ DCHECK(!rep.IsInteger32());
+ Register scratch = ToRegister(instr->temp());
+
+ if (rep.IsDouble()) {
+ DoubleRegister value = ToDoubleRegister(instr->value());
+ __ lzdr(kDoubleRegZero);
+ __ cdbr(value, kDoubleRegZero);
+ EmitFalseBranch(instr, ne);
+ // TODO(joransiu): Use doubleToInt instruction.
+ __ stdy(value, MemOperand(sp, -kDoubleSize));
+ __ LoadlW(scratch,
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ __ Cmp32(scratch, Operand::Zero());
+ EmitBranch(instr, lt);
+ } else {
+ Register value = ToRegister(instr->value());
+ __ CheckMap(value, scratch, Heap::kHeapNumberMapRootIndex,
+ instr->FalseLabel(chunk()), DO_SMI_CHECK);
+#if V8_TARGET_ARCH_S390X
+ __ LoadP(scratch, FieldMemOperand(value, HeapNumber::kValueOffset));
+ __ llihf(ip, Operand(0x80000000)); // ip = 0x80000000_00000000
+ __ CmpP(scratch, ip);
+#else
+ __ LoadlW(scratch, FieldMemOperand(value, HeapNumber::kExponentOffset));
+ __ LoadlW(ip, FieldMemOperand(value, HeapNumber::kMantissaOffset));
+ Label skip;
+ __ CmpP(scratch, Operand(0x80000000));
+ __ bne(&skip, Label::kNear);
+ __ CmpP(ip, Operand::Zero());
+ __ bind(&skip);
+#endif
+ EmitBranch(instr, eq);
+ }
+}
+
+
+Condition LCodeGen::EmitIsObject(Register input, Register temp1,
+ Label* is_not_object, Label* is_object) {
+ __ JumpIfSmi(input, is_not_object);
+
+ __ CompareRoot(input, Heap::kNullValueRootIndex);
+ __ beq(is_object);
+
+ // Load map.
+ __ LoadP(temp1, FieldMemOperand(input, HeapObject::kMapOffset));
+ // Undetectable objects behave like undefined.
+ __ tm(FieldMemOperand(temp1, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ __ bne(is_not_object /*, cr0*/);
+
+ // Load instance type and check that it is in object type range.
+ __ CmpLogicalByte(FieldMemOperand(temp1, Map::kInstanceTypeOffset),
+ Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ __ blt(is_not_object);
+ __ CmpLogicalByte(FieldMemOperand(temp1, Map::kInstanceTypeOffset),
+ Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ return le;
+}
+
+
+void LCodeGen::DoIsObjectAndBranch(LIsObjectAndBranch* instr) {
+ Register reg = ToRegister(instr->value());
+ Register temp1 = ToRegister(instr->temp());
+
+ Condition true_cond = EmitIsObject(reg, temp1, instr->FalseLabel(chunk_),
+ instr->TrueLabel(chunk_));
+
+ EmitBranch(instr, true_cond);
+}
+
+
+Condition LCodeGen::EmitIsString(Register input, Register temp1,
+ Label* is_not_string,
+ SmiCheck check_needed = INLINE_SMI_CHECK) {
+ if (check_needed == INLINE_SMI_CHECK) {
+ __ JumpIfSmi(input, is_not_string);
+ }
+ __ CompareObjectType(input, temp1, temp1, FIRST_NONSTRING_TYPE);
+
+ return lt;
+}
+
+
+void LCodeGen::DoIsStringAndBranch(LIsStringAndBranch* instr) {
+ Register reg = ToRegister(instr->value());
+ Register temp1 = ToRegister(instr->temp());
+
+ SmiCheck check_needed = instr->hydrogen()->value()->type().IsHeapObject()
+ ? OMIT_SMI_CHECK
+ : INLINE_SMI_CHECK;
+ Condition true_cond =
+ EmitIsString(reg, temp1, instr->FalseLabel(chunk_), check_needed);
+
+ EmitBranch(instr, true_cond);
+}
+
+
+void LCodeGen::DoIsSmiAndBranch(LIsSmiAndBranch* instr) {
+ Register input_reg = EmitLoadRegister(instr->value(), ip);
+ __ TestIfSmi(input_reg);
+ EmitBranch(instr, eq, cr0);
+}
+
+
+void LCodeGen::DoIsUndetectableAndBranch(LIsUndetectableAndBranch* instr) {
+ Register input = ToRegister(instr->value());
+ Register temp = ToRegister(instr->temp());
+
+ if (!instr->hydrogen()->value()->type().IsHeapObject()) {
+ __ JumpIfSmi(input, instr->FalseLabel(chunk_));
+ }
+ __ LoadP(temp, FieldMemOperand(input, HeapObject::kMapOffset));
+ __ tm(FieldMemOperand(temp, Map::kBitFieldOffset),
+ Operand(1 << Map::kIsUndetectable));
+ EmitBranch(instr, ne, cr0);
+}
+
+
+static Condition ComputeCompareCondition(Token::Value op) {
+ switch (op) {
+ case Token::EQ_STRICT:
+ case Token::EQ:
+ return eq;
+ case Token::LT:
+ return lt;
+ case Token::GT:
+ return gt;
+ case Token::LTE:
+ return le;
+ case Token::GTE:
+ return ge;
+ default:
+ UNREACHABLE();
+ return kNoCondition;
+ }
+}
+
+
+void LCodeGen::DoStringCompareAndBranch(LStringCompareAndBranch* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ Token::Value op = instr->op();
+
+ Handle<Code> ic =
+ CodeFactory::CompareIC(isolate(), op, Strength::WEAK).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+ // This instruction also signals no smi code inlined
+ __ CmpP(r2, Operand::Zero());
+
+ Condition condition = ComputeCompareCondition(op);
+
+ EmitBranch(instr, condition);
+}
+
+
+static InstanceType TestType(HHasInstanceTypeAndBranch* instr) {
+ InstanceType from = instr->from();
+ InstanceType to = instr->to();
+ if (from == FIRST_TYPE) return to;
+ DCHECK(from == to || to == LAST_TYPE);
+ return from;
+}
+
+
+static Condition BranchCondition(HHasInstanceTypeAndBranch* instr) {
+ InstanceType from = instr->from();
+ InstanceType to = instr->to();
+ if (from == to) return eq;
+ if (to == LAST_TYPE) return ge;
+ if (from == FIRST_TYPE) return le;
+ UNREACHABLE();
+ return eq;
+}
+
+
+void LCodeGen::DoHasInstanceTypeAndBranch(LHasInstanceTypeAndBranch* instr) {
+ Register scratch = scratch0();
+ Register input = ToRegister(instr->value());
+
+ if (!instr->hydrogen()->value()->type().IsHeapObject()) {
+ __ JumpIfSmi(input, instr->FalseLabel(chunk_));
+ }
+
+ __ CompareObjectType(input, scratch, scratch, TestType(instr->hydrogen()));
+ EmitBranch(instr, BranchCondition(instr->hydrogen()));
+}
+
+
+void LCodeGen::DoGetCachedArrayIndex(LGetCachedArrayIndex* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+
+ __ AssertString(input);
+
+ __ LoadlW(result, FieldMemOperand(input, String::kHashFieldOffset));
+ __ IndexFromHash(result, result);
+}
+
+
+void LCodeGen::DoHasCachedArrayIndexAndBranch(
+ LHasCachedArrayIndexAndBranch* instr) {
+ Register input = ToRegister(instr->value());
+ Register scratch = scratch0();
+
+ __ LoadlW(scratch, FieldMemOperand(input, String::kHashFieldOffset));
+ __ mov(r0, Operand(String::kContainsCachedArrayIndexMask));
+ __ AndP(r0, scratch);
+ EmitBranch(instr, eq, cr0);
+}
+
+
+// Branches to a label or falls through with the answer in flags. Trashes
+// the temp registers, but not the input.
+void LCodeGen::EmitClassOfTest(Label* is_true, Label* is_false,
+ Handle<String>class_name, Register input,
+ Register temp, Register temp2) {
+ DCHECK(!input.is(temp));
+ DCHECK(!input.is(temp2));
+ DCHECK(!temp.is(temp2));
+
+ __ JumpIfSmi(input, is_false);
+
+ if (String::Equals(isolate()->factory()->Function_string(), class_name)) {
+ // Assuming the following assertions, we can use the same compares to test
+ // for both being a function type and being in the object type range.
+ STATIC_ASSERT(NUM_OF_CALLABLE_SPEC_OBJECT_TYPES == 2);
+ STATIC_ASSERT(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE ==
+ FIRST_SPEC_OBJECT_TYPE + 1);
+ STATIC_ASSERT(LAST_NONCALLABLE_SPEC_OBJECT_TYPE ==
+ LAST_SPEC_OBJECT_TYPE - 1);
+ STATIC_ASSERT(LAST_SPEC_OBJECT_TYPE == LAST_TYPE);
+ __ CompareObjectType(input, temp, temp2, FIRST_SPEC_OBJECT_TYPE);
+ __ blt(is_false);
+ __ beq(is_true);
+ __ CmpP(temp2, Operand(LAST_SPEC_OBJECT_TYPE));
+ __ beq(is_true);
+ } else {
+ // Faster code path to avoid two compares: subtract lower bound from the
+ // actual type and do a signed compare with the width of the type range.
+ __ LoadP(temp, FieldMemOperand(input, HeapObject::kMapOffset));
+ __ LoadlB(temp2, FieldMemOperand(temp, Map::kInstanceTypeOffset));
+ __ SubP(temp2, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ __ CmpP(temp2, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE -
+ FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ __ bgt(is_false);
+ }
+
+ // Now we are in the FIRST-LAST_NONCALLABLE_SPEC_OBJECT_TYPE range.
+ // Check if the constructor in the map is a function.
+ Register instance_type = ip;
+ __ GetMapConstructor(temp, temp, temp2, instance_type);
+
+ // Objects with a non-function constructor have class 'Object'.
+ __ CmpP(instance_type, Operand(JS_FUNCTION_TYPE));
+ if (class_name->IsOneByteEqualTo(STATIC_CHAR_VECTOR("Object"))) {
+ __ bne(is_true);
+ } else {
+ __ bne(is_false);
+ }
+
+ // temp now contains the constructor function. Grab the
+ // instance class name from there.
+ __ LoadP(temp, FieldMemOperand(temp, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadP(temp,
+ FieldMemOperand(temp, SharedFunctionInfo::kInstanceClassNameOffset));
+ // The class name we are testing against is internalized since it's a literal.
+ // The name in the constructor is internalized because of the way the context
+ // is booted. This routine isn't expected to work for random API-created
+ // classes and it doesn't have to because you can't access it with natives
+ // syntax. Since both sides are internalized it is sufficient to use an
+ // identity comparison.
+ __ CmpP(temp, Operand(class_name));
+ // End with the answer in flags.
+}
+
+
+void LCodeGen::DoClassOfTestAndBranch(LClassOfTestAndBranch* instr) {
+ Register input = ToRegister(instr->value());
+ Register temp = scratch0();
+ Register temp2 = ToRegister(instr->temp());
+ Handle<String> class_name = instr->hydrogen()->class_name();
+
+ EmitClassOfTest(instr->TrueLabel(chunk_), instr->FalseLabel(chunk_),
+ class_name, input, temp, temp2);
+
+ EmitBranch(instr, eq);
+}
+
+
+void LCodeGen::DoCmpMapAndBranch(LCmpMapAndBranch* instr) {
+ Register reg = ToRegister(instr->value());
+ Register temp = ToRegister(instr->temp());
+
+ __ mov(temp, Operand(instr->map()));
+ __ CmpP(temp, FieldMemOperand(reg, HeapObject::kMapOffset));
+ EmitBranch(instr, eq);
+}
+
+
+void LCodeGen::DoInstanceOf(LInstanceOf* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->left()).is(r2)); // Object is in r2.
+ DCHECK(ToRegister(instr->right()).is(r3)); // Function is in r3.
+
+ InstanceofStub stub(isolate(), InstanceofStub::kArgsInRegisters);
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+
+ Label equal, done;
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&equal, Label::kNear);
+ __ mov(r2, Operand(factory()->false_value()));
+ __ b(&done, Label::kNear);
+
+ __ bind(&equal);
+ __ mov(r2, Operand(factory()->true_value()));
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoInstanceOfKnownGlobal(LInstanceOfKnownGlobal* instr) {
+ class DeferredInstanceOfKnownGlobal final : public LDeferredCode {
+ public:
+ DeferredInstanceOfKnownGlobal(LCodeGen* codegen,
+ LInstanceOfKnownGlobal* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override {
+ codegen()->DoDeferredInstanceOfKnownGlobal(instr_, &map_check_,
+ &load_bool_);
+ }
+ LInstruction* instr() override { return instr_; }
+ Label* map_check() { return &map_check_; }
+ Label* load_bool() { return &load_bool_; }
+
+ private:
+ LInstanceOfKnownGlobal* instr_;
+ Label map_check_;
+ Label load_bool_;
+ };
+
+ DeferredInstanceOfKnownGlobal* deferred;
+ deferred = new (zone()) DeferredInstanceOfKnownGlobal(this, instr);
+
+ Label done, false_result;
+ Register object = ToRegister(instr->value());
+ Register temp = ToRegister(instr->temp());
+ Register result = ToRegister(instr->result());
+
+ // A Smi is not instance of anything.
+ __ JumpIfSmi(object, &false_result);
+
+ // This is the inlined call site instanceof cache. The two occurences of the
+ // hole value will be patched to the last map/result pair generated by the
+ // instanceof stub.
+ Label cache_miss;
+ Register map = temp;
+ __ LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
+ {
+ // Block constant pool emission to ensure the positions of instructions are
+ // as expected by the patcher. See InstanceofStub::Generate().
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ __ bind(deferred->map_check()); // Label for calculating code patching.
+ // We use Factory::the_hole_value() on purpose instead of loading from the
+ // root array to force relocation to be able to later patch with
+ // the cached map.
+ Handle<Cell> cell = factory()->NewCell(factory()->the_hole_value());
+ __ mov(ip, Operand(cell));
+ __ LoadP(ip, FieldMemOperand(ip, Cell::kValueOffset));
+ __ CmpP(map, ip);
+ __ bc_short(ne, &cache_miss);
+ __ bind(deferred->load_bool()); // Label for calculating code patching.
+ // We use Factory::the_hole_value() on purpose instead of loading from the
+ // root array to force relocation to be able to later patch
+ // with true or false.
+ __ mov(result, Operand(factory()->the_hole_value()));
+ }
+ __ b(&done);
+
+ // The inlined call site cache did not match. Check null and string before
+ // calling the deferred code.
+ __ bind(&cache_miss);
+ // Null is not instance of anything.
+ __ CompareRoot(object, Heap::kNullValueRootIndex);
+ __ beq(&false_result, Label::kNear);
+
+ // String values is not instance of anything.
+ Condition is_string = masm_->IsObjectStringType(object, temp);
+ __ b(is_string, &false_result, Label::kNear /*, cr0*/);
+
+ // Go to the deferred code.
+ __ b(deferred->entry());
+
+ __ bind(&false_result);
+ __ LoadRoot(result, Heap::kFalseValueRootIndex);
+
+ // Here result has either true or false. Deferred code also produces true or
+ // false object.
+ __ bind(deferred->exit());
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoDeferredInstanceOfKnownGlobal(LInstanceOfKnownGlobal* instr,
+ Label* map_check,
+ Label* bool_load) {
+ InstanceofStub::Flags flags = InstanceofStub::kNoFlags;
+ flags = static_cast<InstanceofStub::Flags>(
+ flags | InstanceofStub::kArgsInRegisters);
+ flags = static_cast<InstanceofStub::Flags>(
+ flags | InstanceofStub::kCallSiteInlineCheck);
+ flags = static_cast<InstanceofStub::Flags>(
+ flags | InstanceofStub::kReturnTrueFalseObject);
+ InstanceofStub stub(isolate(), flags);
+
+ PushSafepointRegistersScope scope(this);
+ LoadContextFromDeferred(instr->context());
+
+ __ Move(InstanceofStub::right(), instr->function());
+ {
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm_);
+ Handle<Code> code = stub.GetCode();
+ // Include instructions below in delta: LLILF * 2 + call
+ int additional_delta = 12 + masm_->CallSize(code);
+ // The labels must be already bound since the code has predictabel size up
+ // to the call instruction.
+ DCHECK(map_check->is_bound());
+ DCHECK(bool_load->is_bound());
+ int map_check_delta =
+ masm_->SizeOfCodeGeneratedSince(map_check);
+ int bool_load_delta =
+ masm_->SizeOfCodeGeneratedSince(bool_load);
+ // r7 is the delta from our callee's lr to the location of the map check.
+ // llilf is used here, as delta can exceed 16-bits.
+ __ llilf(r7, Operand(map_check_delta + additional_delta));
+ // r8 is the delta from map check to bool load.
+ __ llilf(r8, Operand(map_check_delta - bool_load_delta));
+ CallCodeGeneric(code, RelocInfo::CODE_TARGET, instr,
+ RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS);
+ DCHECK_EQ((map_check_delta + additional_delta),
+ masm_->SizeOfCodeGeneratedSince(map_check));
+ }
+ LEnvironment* env = instr->GetDeferredLazyDeoptimizationEnvironment();
+ safepoints_.RecordLazyDeoptimizationIndex(env->deoptimization_index());
+ // Put the result value (r2) into the result register slot and
+ // restore all registers.
+ __ StoreToSafepointRegisterSlot(r2, ToRegister(instr->result()));
+}
+
+
+void LCodeGen::DoCmpT(LCmpT* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ Token::Value op = instr->op();
+
+ Handle<Code> ic =
+ CodeFactory::CompareIC(isolate(), op, instr->strength()).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+ // This instruction also signals no smi code inlined
+ __ CmpP(r2, Operand::Zero());
+
+ Condition condition = ComputeCompareCondition(op);
+ Label true_value, done;
+
+ __ b(condition, &true_value, Label::kNear);
+
+ __ LoadRoot(ToRegister(instr->result()), Heap::kFalseValueRootIndex);
+ __ b(&done, Label::kNear);
+
+ __ bind(&true_value);
+ __ LoadRoot(ToRegister(instr->result()), Heap::kTrueValueRootIndex);
+
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoReturn(LReturn* instr) {
+ if (FLAG_trace && info()->IsOptimizing()) {
+ // Push the return value on the stack as the parameter.
+ // Runtime::TraceExit returns its parameter in r2. We're leaving the code
+ // managed by the register allocator and tearing down the frame, it's
+ // safe to write to the context register.
+ __ push(r2);
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ CallRuntime(Runtime::kTraceExit, 1);
+ }
+ if (info()->saves_caller_doubles()) {
+ RestoreCallerDoubles();
+ }
+ int no_frame_start = -1;
+ if (instr->has_constant_parameter_count()) {
+ int parameter_count = ToInteger32(instr->constant_parameter_count());
+ int32_t sp_delta = (parameter_count + 1) * kPointerSize;
+ if (NeedsEagerFrame()) {
+ no_frame_start = masm_->LeaveFrame(StackFrame::JAVA_SCRIPT, sp_delta);
+ } else if (sp_delta != 0) {
+ // TODO(joransiu): Clean this up into Macro Assembler
+ if (sp_delta >= 0 && sp_delta < 4096)
+ __ la(sp, MemOperand(sp, sp_delta));
+ else
+ __ lay(sp, MemOperand(sp, sp_delta));
+ }
+ } else {
+ DCHECK(info()->IsStub()); // Functions would need to drop one more value.
+ Register reg = ToRegister(instr->parameter_count());
+ // The argument count parameter is a smi
+ if (NeedsEagerFrame()) {
+ no_frame_start = masm_->LeaveFrame(StackFrame::JAVA_SCRIPT);
+ }
+ __ SmiToPtrArrayOffset(r0, reg);
+ __ AddP(sp, sp, r0);
+ }
+
+ __ Ret();
+
+ if (no_frame_start != -1) {
+ info_->AddNoFrameRange(no_frame_start, masm_->pc_offset());
+ }
+}
+
+
+template <class T>
+void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
+ Register vector_register = ToRegister(instr->temp_vector());
+ Register slot_register = LoadDescriptor::SlotRegister();
+ DCHECK(vector_register.is(LoadWithVectorDescriptor::VectorRegister()));
+ DCHECK(slot_register.is(r2));
+
+ AllowDeferredHandleDereference vector_structure_check;
+ Handle<TypeFeedbackVector> vector = instr->hydrogen()->feedback_vector();
+ __ Move(vector_register, vector);
+ // No need to allocate this register.
+ FeedbackVectorICSlot slot = instr->hydrogen()->slot();
+ int index = vector->GetIndex(slot);
+ __ LoadSmiLiteral(slot_register, Smi::FromInt(index));
+}
+
+
+template <class T>
+void LCodeGen::EmitVectorStoreICRegisters(T* instr) {
+ Register vector_register = ToRegister(instr->temp_vector());
+ Register slot_register = ToRegister(instr->temp_slot());
+
+ AllowDeferredHandleDereference vector_structure_check;
+ Handle<TypeFeedbackVector> vector = instr->hydrogen()->feedback_vector();
+ __ Move(vector_register, vector);
+ FeedbackVectorICSlot slot = instr->hydrogen()->slot();
+ int index = vector->GetIndex(slot);
+ __ LoadSmiLiteral(slot_register, Smi::FromInt(index));
+}
+
+
+void LCodeGen::DoLoadGlobalGeneric(LLoadGlobalGeneric* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->global_object())
+ .is(LoadDescriptor::ReceiverRegister()));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ __ mov(LoadDescriptor::NameRegister(), Operand(instr->name()));
+ EmitVectorLoadICRegisters<LLoadGlobalGeneric>(instr);
+ ContextualMode mode = instr->for_typeof() ? NOT_CONTEXTUAL : CONTEXTUAL;
+ Handle<Code> ic = CodeFactory::LoadICInOptimizedCode(isolate(), mode, SLOPPY,
+ PREMONOMORPHIC).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoLoadContextSlot(LLoadContextSlot* instr) {
+ Register context = ToRegister(instr->context());
+ Register result = ToRegister(instr->result());
+ __ LoadP(result, ContextOperand(context, instr->slot_index()));
+ if (instr->hydrogen()->RequiresHoleCheck()) {
+ __ CompareRoot(result, Heap::kTheHoleValueRootIndex);
+ if (instr->hydrogen()->DeoptimizesOnHole()) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kHole);
+ } else {
+ Label skip;
+ __ bne(&skip, Label::kNear);
+ __ mov(result, Operand(factory()->undefined_value()));
+ __ bind(&skip);
+ }
+ }
+}
+
+
+void LCodeGen::DoStoreContextSlot(LStoreContextSlot* instr) {
+ Register context = ToRegister(instr->context());
+ Register value = ToRegister(instr->value());
+ Register scratch = scratch0();
+ MemOperand target = ContextOperand(context, instr->slot_index());
+
+ Label skip_assignment;
+
+ if (instr->hydrogen()->RequiresHoleCheck()) {
+ __ LoadP(scratch, target);
+ __ CompareRoot(scratch, Heap::kTheHoleValueRootIndex);
+ if (instr->hydrogen()->DeoptimizesOnHole()) {
+ DeoptimizeIf(eq, instr, Deoptimizer::kHole);
+ } else {
+ __ bne(&skip_assignment);
+ }
+ }
+
+ __ StoreP(value, target);
+ if (instr->hydrogen()->NeedsWriteBarrier()) {
+ SmiCheck check_needed = instr->hydrogen()->value()->type().IsHeapObject()
+ ? OMIT_SMI_CHECK
+ : INLINE_SMI_CHECK;
+ __ RecordWriteContextSlot(context, target.offset(), value, scratch,
+ GetLinkRegisterState(), kSaveFPRegs,
+ EMIT_REMEMBERED_SET, check_needed);
+ }
+
+ __ bind(&skip_assignment);
+}
+
+
+void LCodeGen::DoLoadNamedField(LLoadNamedField* instr) {
+ HObjectAccess access = instr->hydrogen()->access();
+ int offset = access.offset();
+ Register object = ToRegister(instr->object());
+
+ if (access.IsExternalMemory()) {
+ Register result = ToRegister(instr->result());
+ MemOperand operand = MemOperand(object, offset);
+ __ LoadRepresentation(result, operand, access.representation(), r0);
+ return;
+ }
+
+ if (instr->hydrogen()->representation().IsDouble()) {
+ DCHECK(access.IsInobject());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ __ ld(result, FieldMemOperand(object, offset));
+ return;
+ }
+
+ Register result = ToRegister(instr->result());
+ if (!access.IsInobject()) {
+ __ LoadP(result, FieldMemOperand(object, JSObject::kPropertiesOffset));
+ object = result;
+ }
+
+ Representation representation = access.representation();
+
+#if V8_TARGET_ARCH_S390X
+ // 64-bit Smi optimization
+ if (representation.IsSmi() &&
+ instr->hydrogen()->representation().IsInteger32()) {
+ // Read int value directly from upper half of the smi.
+ offset = SmiWordOffset(offset);
+ representation = Representation::Integer32();
+ }
+#endif
+
+ __ LoadRepresentation(result, FieldMemOperand(object, offset), representation,
+ r0);
+}
+
+
+void LCodeGen::DoLoadNamedGeneric(LLoadNamedGeneric* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->object()).is(LoadDescriptor::ReceiverRegister()));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ // Name is always in r4.
+ __ mov(LoadDescriptor::NameRegister(), Operand(instr->name()));
+ EmitVectorLoadICRegisters<LLoadNamedGeneric>(instr);
+ Handle<Code> ic =
+ CodeFactory::LoadICInOptimizedCode(
+ isolate(), NOT_CONTEXTUAL, instr->hydrogen()->language_mode(),
+ instr->hydrogen()->initialization_state()).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoLoadFunctionPrototype(LLoadFunctionPrototype* instr) {
+ Register scratch = scratch0();
+ Register function = ToRegister(instr->function());
+ Register result = ToRegister(instr->result());
+
+ // Get the prototype or initial map from the function.
+ __ LoadP(result,
+ FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
+
+ // Check that the function has a prototype or an initial map.
+ __ CompareRoot(result, Heap::kTheHoleValueRootIndex);
+ DeoptimizeIf(eq, instr, Deoptimizer::kHole);
+
+ // If the function does not have an initial map, we're done.
+ Label done;
+ __ CompareObjectType(result, scratch, scratch, MAP_TYPE);
+ __ bne(&done, Label::kNear);
+
+ // Get the prototype from the initial map.
+ __ LoadP(result, FieldMemOperand(result, Map::kPrototypeOffset));
+
+
+ // All done.
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoLoadRoot(LLoadRoot* instr) {
+ Register result = ToRegister(instr->result());
+ __ LoadRoot(result, instr->index());
+}
+
+
+void LCodeGen::DoAccessArgumentsAt(LAccessArgumentsAt* instr) {
+ Register arguments = ToRegister(instr->arguments());
+ Register result = ToRegister(instr->result());
+ // There are two words between the frame pointer and the last argument.
+ // Subtracting from length accounts for one of them add one more.
+ if (instr->length()->IsConstantOperand()) {
+ int const_length = ToInteger32(LConstantOperand::cast(instr->length()));
+ if (instr->index()->IsConstantOperand()) {
+ int const_index = ToInteger32(LConstantOperand::cast(instr->index()));
+ int index = (const_length - const_index) + 1;
+ __ LoadP(result, MemOperand(arguments, index * kPointerSize));
+ } else {
+ Register index = ToRegister(instr->index());
+ __ SubP(result, index, Operand(const_length + 1));
+ __ LoadComplementRR(result, result);
+ __ ShiftLeftP(result, result, Operand(kPointerSizeLog2));
+ __ LoadP(result, MemOperand(arguments, result));
+ }
+ } else if (instr->index()->IsConstantOperand()) {
+ Register length = ToRegister(instr->length());
+ int const_index = ToInteger32(LConstantOperand::cast(instr->index()));
+ int loc = const_index - 1;
+ if (loc != 0) {
+ __ SubP(result, length, Operand(loc));
+ __ ShiftLeftP(result, result, Operand(kPointerSizeLog2));
+ __ LoadP(result, MemOperand(arguments, result));
+ } else {
+ __ ShiftLeftP(result, length, Operand(kPointerSizeLog2));
+ __ LoadP(result, MemOperand(arguments, result));
+ }
+ } else {
+ Register length = ToRegister(instr->length());
+ Register index = ToRegister(instr->index());
+ __ SubP(result, length, index);
+ __ AddP(result, result, Operand(1));
+ __ ShiftLeftP(result, result, Operand(kPointerSizeLog2));
+ __ LoadP(result, MemOperand(arguments, result));
+ }
+}
+
+
+void LCodeGen::DoLoadKeyedExternalArray(LLoadKeyed* instr) {
+ Register external_pointer = ToRegister(instr->elements());
+ Register key = no_reg;
+ ElementsKind elements_kind = instr->elements_kind();
+ bool key_is_constant = instr->key()->IsConstantOperand();
+ int constant_key = 0;
+ if (key_is_constant) {
+ constant_key = ToInteger32(LConstantOperand::cast(instr->key()));
+ if (constant_key & 0xF0000000) {
+ Abort(kArrayIndexConstantValueTooBig);
+ }
+ } else {
+ key = ToRegister(instr->key());
+ }
+ int element_size_shift = ElementsKindToShiftSize(elements_kind);
+ bool key_is_smi = instr->hydrogen()->key()->representation().IsSmi();
+ bool keyMaybeNegative = instr->hydrogen()->IsDehoisted();
+ int base_offset = instr->base_offset();
+ bool use_scratch = false;
+
+ if (elements_kind == EXTERNAL_FLOAT32_ELEMENTS ||
+ elements_kind == FLOAT32_ELEMENTS ||
+ elements_kind == EXTERNAL_FLOAT64_ELEMENTS ||
+ elements_kind == FLOAT64_ELEMENTS) {
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ if (key_is_constant) {
+ base_offset += constant_key << element_size_shift;
+ if (!is_int20(base_offset)) {
+ __ mov(scratch0(), Operand(base_offset));
+ base_offset = 0;
+ use_scratch = true;
+ }
+ } else {
+ __ IndexToArrayOffset(scratch0(), key, element_size_shift, key_is_smi,
+ keyMaybeNegative);
+ use_scratch = true;
+ }
+ if (elements_kind == EXTERNAL_FLOAT32_ELEMENTS ||
+ elements_kind == FLOAT32_ELEMENTS) {
+ if (!use_scratch) {
+ __ ldeb(result, MemOperand(external_pointer, base_offset));
+ } else {
+ __ ldeb(result,
+ MemOperand(scratch0(), external_pointer, base_offset));
+ }
+ } else { // i.e. elements_kind == EXTERNAL_DOUBLE_ELEMENTS
+ if (!use_scratch) {
+ __ ld(result, MemOperand(external_pointer, base_offset));
+ } else {
+ __ ld(result, MemOperand(scratch0(), external_pointer, base_offset));
+ }
+ }
+ } else {
+ Register result = ToRegister(instr->result());
+ MemOperand mem_operand =
+ PrepareKeyedOperand(key, external_pointer, key_is_constant, key_is_smi,
+ constant_key, element_size_shift, base_offset,
+ keyMaybeNegative);
+ switch (elements_kind) {
+ case EXTERNAL_INT8_ELEMENTS:
+ case INT8_ELEMENTS:
+ __ LoadB(result, mem_operand);
+ break;
+ case EXTERNAL_UINT8_CLAMPED_ELEMENTS:
+ case EXTERNAL_UINT8_ELEMENTS:
+ case UINT8_ELEMENTS:
+ case UINT8_CLAMPED_ELEMENTS:
+ __ LoadlB(result, mem_operand);
+ break;
+ case EXTERNAL_INT16_ELEMENTS:
+ case INT16_ELEMENTS:
+ __ LoadHalfWordP(result, mem_operand);
+ break;
+ case EXTERNAL_UINT16_ELEMENTS:
+ case UINT16_ELEMENTS:
+ __ LoadLogicalHalfWordP(result, mem_operand);
+ break;
+ case EXTERNAL_INT32_ELEMENTS:
+ case INT32_ELEMENTS:
+ __ LoadW(result, mem_operand, r0);
+ break;
+ case EXTERNAL_UINT32_ELEMENTS:
+ case UINT32_ELEMENTS:
+ __ LoadlW(result, mem_operand, r0);
+ if (!instr->hydrogen()->CheckFlag(HInstruction::kUint32)) {
+ __ CmpLogical32(result, Operand(0x80000000));
+ DeoptimizeIf(ge, instr, Deoptimizer::kNegativeValue);
+ }
+ break;
+ case FLOAT32_ELEMENTS:
+ case FLOAT64_ELEMENTS:
+ case EXTERNAL_FLOAT32_ELEMENTS:
+ case EXTERNAL_FLOAT64_ELEMENTS:
+ case FAST_HOLEY_DOUBLE_ELEMENTS:
+ case FAST_HOLEY_ELEMENTS:
+ case FAST_HOLEY_SMI_ELEMENTS:
+ case FAST_DOUBLE_ELEMENTS:
+ case FAST_ELEMENTS:
+ case FAST_SMI_ELEMENTS:
+ case DICTIONARY_ELEMENTS:
+ case FAST_SLOPPY_ARGUMENTS_ELEMENTS:
+ case SLOW_SLOPPY_ARGUMENTS_ELEMENTS:
+ UNREACHABLE();
+ break;
+ }
+ }
+}
+
+
+void LCodeGen::DoLoadKeyedFixedDoubleArray(LLoadKeyed* instr) {
+ Register elements = ToRegister(instr->elements());
+ bool key_is_constant = instr->key()->IsConstantOperand();
+ Register key = no_reg;
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ Register scratch = scratch0();
+
+ int element_size_shift = ElementsKindToShiftSize(FAST_DOUBLE_ELEMENTS);
+ bool key_is_smi = instr->hydrogen()->key()->representation().IsSmi();
+ bool keyMaybeNegative = instr->hydrogen()->IsDehoisted();
+ int constant_key = 0;
+ if (key_is_constant) {
+ constant_key = ToInteger32(LConstantOperand::cast(instr->key()));
+ if (constant_key & 0xF0000000) {
+ Abort(kArrayIndexConstantValueTooBig);
+ }
+ } else {
+ key = ToRegister(instr->key());
+ }
+
+ bool use_scratch = false;
+ intptr_t base_offset = instr->base_offset() + constant_key * kDoubleSize;
+ if (!key_is_constant) {
+ use_scratch = true;
+ __ IndexToArrayOffset(scratch, key, element_size_shift, key_is_smi,
+ keyMaybeNegative);
+ }
+
+ // Memory references support up to 20-bits signed displacement in RXY form
+ // Include Register::kExponentOffset in check, so we are guaranteed not to
+ // overflow displacement later.
+ if (!is_int20(base_offset + Register::kExponentOffset)) {
+ use_scratch = true;
+ if (key_is_constant) {
+ __ mov(scratch, Operand(base_offset));
+ } else {
+ __ AddP(scratch, Operand(base_offset));
+ }
+ base_offset = 0;
+ }
+
+ if (!use_scratch) {
+ __ ld(result, MemOperand(elements, base_offset));
+ } else {
+ __ ld(result, MemOperand(scratch, elements, base_offset));
+ }
+
+ if (instr->hydrogen()->RequiresHoleCheck()) {
+ if (!use_scratch) {
+ __ LoadlW(r0, MemOperand(elements,
+ base_offset + Register::kExponentOffset));
+ } else {
+ __ LoadlW(r0, MemOperand(scratch, elements,
+ base_offset + Register::kExponentOffset));
+ }
+ __ Cmp32(r0, Operand(kHoleNanUpper32));
+ DeoptimizeIf(eq, instr, Deoptimizer::kHole);
+ }
+}
+
+
+void LCodeGen::DoLoadKeyedFixedArray(LLoadKeyed* instr) {
+ HLoadKeyed* hinstr = instr->hydrogen();
+ Register elements = ToRegister(instr->elements());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+ int offset = instr->base_offset();
+
+ if (instr->key()->IsConstantOperand()) {
+ LConstantOperand* const_operand = LConstantOperand::cast(instr->key());
+ offset += ToInteger32(const_operand) * kPointerSize;
+ } else {
+ Register key = ToRegister(instr->key());
+ // Even though the HLoadKeyed instruction forces the input
+ // representation for the key to be an integer, the input gets replaced
+ // during bound check elimination with the index argument to the bounds
+ // check, which can be tagged, so that case must be handled here, too.
+ if (hinstr->key()->representation().IsSmi()) {
+ __ SmiToPtrArrayOffset(scratch, key);
+ } else {
+ __ ShiftLeftP(scratch, key, Operand(kPointerSizeLog2));
+ }
+ }
+
+ bool requires_hole_check = hinstr->RequiresHoleCheck();
+ Representation representation = hinstr->representation();
+
+#if V8_TARGET_ARCH_S390X
+ // 64-bit Smi optimization
+ if (representation.IsInteger32() &&
+ hinstr->elements_kind() == FAST_SMI_ELEMENTS) {
+ DCHECK(!requires_hole_check);
+ // Read int value directly from upper half of the smi.
+ offset = SmiWordOffset(offset);
+ }
+#endif
+
+ if (instr->key()->IsConstantOperand()) {
+ __ LoadRepresentation(result, MemOperand(elements, offset),
+ representation, r1);
+ } else {
+ __ LoadRepresentation(result, MemOperand(scratch, elements, offset),
+ representation, r1);
+}
+
+ // Check for the hole value.
+ if (requires_hole_check) {
+ if (IsFastSmiElementsKind(hinstr->elements_kind())) {
+ __ TestIfSmi(result);
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotASmi, cr0);
+ } else {
+ __ CompareRoot(result, Heap::kTheHoleValueRootIndex);
+ DeoptimizeIf(eq, instr, Deoptimizer::kHole);
+ }
+ } else if (instr->hydrogen()->hole_mode() == CONVERT_HOLE_TO_UNDEFINED) {
+ DCHECK(instr->hydrogen()->elements_kind() == FAST_HOLEY_ELEMENTS);
+ Label done;
+ __ LoadRoot(scratch, Heap::kTheHoleValueRootIndex);
+ __ CmpP(result, scratch);
+ __ bne(&done);
+ if (info()->IsStub()) {
+ // A stub can safely convert the hole to undefined only if the array
+ // protector cell contains (Smi) Isolate::kArrayProtectorValid. Otherwise
+ // it needs to bail out.
+ __ LoadRoot(result, Heap::kArrayProtectorRootIndex);
+ __ LoadP(result, FieldMemOperand(result, Cell::kValueOffset));
+ __ CmpSmiLiteral(result, Smi::FromInt(Isolate::kArrayProtectorValid), r0);
+ DeoptimizeIf(ne, instr, Deoptimizer::kHole);
+ }
+ __ LoadRoot(result, Heap::kUndefinedValueRootIndex);
+ __ bind(&done);
+ }
+}
+
+
+void LCodeGen::DoLoadKeyed(LLoadKeyed* instr) {
+ if (instr->is_typed_elements()) {
+ DoLoadKeyedExternalArray(instr);
+ } else if (instr->hydrogen()->representation().IsDouble()) {
+ DoLoadKeyedFixedDoubleArray(instr);
+ } else {
+ DoLoadKeyedFixedArray(instr);
+ }
+}
+
+
+MemOperand LCodeGen::PrepareKeyedOperand(Register key, Register base,
+ bool key_is_constant, bool key_is_smi,
+ int constant_key,
+ int element_size_shift,
+ int base_offset,
+ bool keyMaybeNegative) {
+ Register scratch = scratch0();
+
+ if (key_is_constant) {
+ int offset = (base_offset + (constant_key << element_size_shift));
+ if (!is_int20(offset)) {
+ __ mov(scratch, Operand(offset));
+ return MemOperand(base, scratch);
+ } else {
+ return MemOperand(base,
+ (constant_key << element_size_shift) + base_offset);
+ }
+ }
+
+ bool needs_shift =
+ (element_size_shift != (key_is_smi ? kSmiTagSize + kSmiShiftSize : 0));
+
+ if (needs_shift) {
+ __ IndexToArrayOffset(scratch, key, element_size_shift, key_is_smi,
+ keyMaybeNegative);
+ } else {
+ scratch = key;
+ }
+
+ if (!is_int20(base_offset)) {
+ __ AddP(scratch, Operand(base_offset));
+ base_offset = 0;
+ }
+ return MemOperand(scratch, base, base_offset);
+}
+
+
+void LCodeGen::DoLoadKeyedGeneric(LLoadKeyedGeneric* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->object()).is(LoadDescriptor::ReceiverRegister()));
+ DCHECK(ToRegister(instr->key()).is(LoadDescriptor::NameRegister()));
+
+ if (instr->hydrogen()->HasVectorAndSlot()) {
+ EmitVectorLoadICRegisters<LLoadKeyedGeneric>(instr);
+ }
+
+ Handle<Code> ic = CodeFactory::KeyedLoadICInOptimizedCode(
+ isolate(), instr->hydrogen()->language_mode(),
+ instr->hydrogen()->initialization_state()).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoArgumentsElements(LArgumentsElements* instr) {
+ Register scratch = scratch0();
+ Register result = ToRegister(instr->result());
+
+ if (instr->hydrogen()->from_inlined()) {
+ __ lay(result, MemOperand(sp, -2 * kPointerSize));
+ } else {
+ // Check if the calling frame is an arguments adaptor frame.
+ Label done, adapted;
+ __ LoadP(scratch, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(result,
+ MemOperand(scratch, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(result, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+
+ // Result is the frame pointer for the frame if not adapted and for the real
+ // frame below the adaptor frame if adapted.
+ __ beq(&adapted, Label::kNear);
+ __ LoadRR(result, fp);
+ __ b(&done, Label::kNear);
+
+ __ bind(&adapted);
+ __ LoadRR(result, scratch);
+ __ bind(&done);
+ }
+}
+
+
+void LCodeGen::DoArgumentsLength(LArgumentsLength* instr) {
+ Register elem = ToRegister(instr->elements());
+ Register result = ToRegister(instr->result());
+
+ Label done;
+
+ // If no arguments adaptor frame the number of arguments is fixed.
+ __ CmpP(fp, elem);
+ __ mov(result, Operand(scope()->num_parameters()));
+ __ beq(&done, Label::kNear);
+
+ // Arguments adaptor frame present. Get argument length from there.
+ __ LoadP(result, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ __ LoadP(result,
+ MemOperand(result, ArgumentsAdaptorFrameConstants::kLengthOffset));
+ __ SmiUntag(result);
+
+ // Argument length is in result register.
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoWrapReceiver(LWrapReceiver* instr) {
+ Register receiver = ToRegister(instr->receiver());
+ Register function = ToRegister(instr->function());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+
+ // If the receiver is null or undefined, we have to pass the global
+ // object as a receiver to normal functions. Values have to be
+ // passed unchanged to builtins and strict-mode functions.
+ Label global_object, result_in_receiver;
+
+ if (!instr->hydrogen()->known_function()) {
+ // Do not transform the receiver to object for strict mode
+ // functions.
+ __ LoadP(scratch,
+ FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
+ __ LoadlW(scratch,
+ FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
+ __ TestBit(scratch,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kStrictModeFunction,
+#else
+ SharedFunctionInfo::kStrictModeFunction + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&result_in_receiver, Label::kNear);
+
+ // Do not transform the receiver to object for builtins.
+ __ TestBit(scratch,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kNative,
+#else
+ SharedFunctionInfo::kNative + kSmiTagSize,
+#endif
+ r0);
+ __ bne(&result_in_receiver, Label::kNear);
+ }
+
+ // Normal function. Replace undefined or null with global receiver.
+ __ CompareRoot(receiver, Heap::kNullValueRootIndex);
+ __ beq(&global_object, Label::kNear);
+ __ CompareRoot(receiver, Heap::kUndefinedValueRootIndex);
+ __ beq(&global_object, Label::kNear);
+
+ // Deoptimize if the receiver is not a JS object.
+ __ TestIfSmi(receiver);
+ DeoptimizeIf(eq, instr, Deoptimizer::kSmi, cr0);
+ __ CompareObjectType(receiver, scratch, scratch, FIRST_SPEC_OBJECT_TYPE);
+ DeoptimizeIf(lt, instr, Deoptimizer::kNotAJavaScriptObject);
+
+ __ b(&result_in_receiver, Label::kNear);
+ __ bind(&global_object);
+ __ LoadP(result, FieldMemOperand(function, JSFunction::kContextOffset));
+ __ LoadP(result, ContextOperand(result, Context::GLOBAL_OBJECT_INDEX));
+ __ LoadP(result, FieldMemOperand(result, GlobalObject::kGlobalProxyOffset));
+ if (result.is(receiver)) {
+ __ bind(&result_in_receiver);
+ } else {
+ Label result_ok;
+ __ b(&result_ok, Label::kNear);
+ __ bind(&result_in_receiver);
+ __ LoadRR(result, receiver);
+ __ bind(&result_ok);
+ }
+}
+
+
+void LCodeGen::DoApplyArguments(LApplyArguments* instr) {
+ Register receiver = ToRegister(instr->receiver());
+ Register function = ToRegister(instr->function());
+ Register length = ToRegister(instr->length());
+ Register elements = ToRegister(instr->elements());
+ Register scratch = scratch0();
+ DCHECK(receiver.is(r2)); // Used for parameter count.
+ DCHECK(function.is(r3)); // Required by InvokeFunction.
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ // Copy the arguments to this function possibly from the
+ // adaptor frame below it.
+ const uint32_t kArgumentsLimit = 1 * KB;
+ __ CmpLogicalP(length, Operand(kArgumentsLimit));
+ DeoptimizeIf(gt, instr, Deoptimizer::kTooManyArguments);
+
+ // Push the receiver and use the register to keep the original
+ // number of arguments.
+ __ push(receiver);
+ __ LoadRR(receiver, length);
+ // The arguments are at a one pointer size offset from elements.
+ __ AddP(elements, Operand(1 * kPointerSize));
+
+ // Loop through the arguments pushing them onto the execution
+ // stack.
+ Label invoke, loop;
+ // length is a small non-negative integer, due to the test above.
+ __ CmpP(length, Operand::Zero());
+ __ beq(&invoke, Label::kNear);
+ __ bind(&loop);
+ __ ShiftLeftP(r1, length, Operand(kPointerSizeLog2));
+ __ LoadP(scratch, MemOperand(elements, r1));
+ __ push(scratch);
+ __ BranchOnCount(length, &loop);
+
+ __ bind(&invoke);
+ DCHECK(instr->HasPointerMap());
+ LPointerMap* pointers = instr->pointer_map();
+ SafepointGenerator safepoint_generator(this, pointers, Safepoint::kLazyDeopt);
+ // The number of arguments is stored in receiver which is r2, as expected
+ // by InvokeFunction.
+ ParameterCount actual(receiver);
+ __ InvokeFunction(function, actual, CALL_FUNCTION, safepoint_generator);
+}
+
+
+void LCodeGen::DoPushArgument(LPushArgument* instr) {
+ LOperand* argument = instr->value();
+ if (argument->IsDoubleRegister() || argument->IsDoubleStackSlot()) {
+ Abort(kDoPushArgumentNotImplementedForDoubleType);
+ } else {
+ Register argument_reg = EmitLoadRegister(argument, ip);
+ __ push(argument_reg);
+ }
+}
+
+
+void LCodeGen::DoDrop(LDrop* instr) { __ Drop(instr->count()); }
+
+
+void LCodeGen::DoThisFunction(LThisFunction* instr) {
+ Register result = ToRegister(instr->result());
+ __ LoadP(result, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+}
+
+
+void LCodeGen::DoContext(LContext* instr) {
+ // If there is a non-return use, the context must be moved to a register.
+ Register result = ToRegister(instr->result());
+ if (info()->IsOptimizing()) {
+ __ LoadP(result, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ } else {
+ // If there is no frame, the context must be in cp.
+ DCHECK(result.is(cp));
+ }
+}
+
+
+void LCodeGen::DoDeclareGlobals(LDeclareGlobals* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ __ push(cp); // The context is the first argument.
+ __ Move(scratch0(), instr->hydrogen()->pairs());
+ __ push(scratch0());
+ __ LoadSmiLiteral(scratch0(), Smi::FromInt(instr->hydrogen()->flags()));
+ __ push(scratch0());
+ CallRuntime(Runtime::kDeclareGlobals, 3, instr);
+}
+
+
+void LCodeGen::CallKnownFunction(Handle<JSFunction> function,
+ int formal_parameter_count, int arity,
+ LInstruction* instr) {
+ bool dont_adapt_arguments =
+ formal_parameter_count == SharedFunctionInfo::kDontAdaptArgumentsSentinel;
+ bool can_invoke_directly =
+ dont_adapt_arguments || formal_parameter_count == arity;
+
+ Register function_reg = r3;
+
+ LPointerMap* pointers = instr->pointer_map();
+
+ if (can_invoke_directly) {
+ // Change context.
+ __ LoadP(cp, FieldMemOperand(function_reg, JSFunction::kContextOffset));
+
+ // Set r2 to arguments count if adaption is not needed. Assumes that r2
+ // is available to write to at this point.
+ if (dont_adapt_arguments) {
+ __ mov(r2, Operand(arity));
+ }
+
+ bool is_self_call = function.is_identical_to(info()->closure());
+
+ // Invoke function.
+ if (is_self_call) {
+ __ CallSelf();
+ } else {
+ __ LoadP(ip, FieldMemOperand(function_reg, JSFunction::kCodeEntryOffset));
+ __ CallJSEntry(ip);
+ }
+
+ // Set up deoptimization.
+ RecordSafepointWithLazyDeopt(instr, RECORD_SIMPLE_SAFEPOINT);
+ } else {
+ SafepointGenerator generator(this, pointers, Safepoint::kLazyDeopt);
+ ParameterCount count(arity);
+ ParameterCount expected(formal_parameter_count);
+ __ InvokeFunction(function_reg, expected, count, CALL_FUNCTION, generator);
+ }
+}
+
+
+void LCodeGen::DoDeferredMathAbsTaggedHeapNumber(LMathAbs* instr) {
+ DCHECK(instr->context() != NULL);
+ DCHECK(ToRegister(instr->context()).is(cp));
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+
+ // Deoptimize if not a heap number.
+ __ LoadP(scratch, FieldMemOperand(input, HeapObject::kMapOffset));
+ __ CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumber);
+
+ Label done;
+ Register exponent = scratch0();
+ scratch = no_reg;
+ __ LoadlW(exponent, FieldMemOperand(input, HeapNumber::kExponentOffset));
+ // Check the sign of the argument. If the argument is positive, just
+ // return it.
+ __ Cmp32(exponent, Operand::Zero());
+ // Move the input to the result if necessary.
+ __ Move(result, input);
+ __ bge(&done);
+
+ // Input is negative. Reverse its sign.
+ // Preserve the value of all registers.
+ {
+ PushSafepointRegistersScope scope(this);
+
+ // Registers were saved at the safepoint, so we can use
+ // many scratch registers.
+ Register tmp1 = input.is(r3) ? r2 : r3;
+ Register tmp2 = input.is(r4) ? r2 : r4;
+ Register tmp3 = input.is(r5) ? r2 : r5;
+ Register tmp4 = input.is(r6) ? r2 : r6;
+
+ // exponent: floating point exponent value.
+
+ Label allocated, slow;
+ __ LoadRoot(tmp4, Heap::kHeapNumberMapRootIndex);
+ __ AllocateHeapNumber(tmp1, tmp2, tmp3, tmp4, &slow);
+ __ b(&allocated);
+
+ // Slow case: Call the runtime system to do the number allocation.
+ __ bind(&slow);
+
+ CallRuntimeFromDeferred(Runtime::kAllocateHeapNumber, 0, instr,
+ instr->context());
+ // Set the pointer to the new heap number in tmp.
+ if (!tmp1.is(r2)) __ LoadRR(tmp1, r2);
+ // Restore input_reg after call to runtime.
+ __ LoadFromSafepointRegisterSlot(input, input);
+ __ LoadlW(exponent, FieldMemOperand(input, HeapNumber::kExponentOffset));
+
+ __ bind(&allocated);
+ // exponent: floating point exponent value.
+ // tmp1: allocated heap number.
+
+ // Clear the sign bit.
+ __ nilf(exponent, Operand(~HeapNumber::kSignMask));
+ __ StoreW(exponent, FieldMemOperand(tmp1, HeapNumber::kExponentOffset));
+ __ LoadlW(tmp2, FieldMemOperand(input, HeapNumber::kMantissaOffset));
+ __ StoreW(tmp2, FieldMemOperand(tmp1, HeapNumber::kMantissaOffset));
+
+ __ StoreToSafepointRegisterSlot(tmp1, result);
+ }
+
+ __ bind(&done);
+}
+
+
+void LCodeGen::EmitMathAbs(LMathAbs* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ Label done;
+ __ CmpP(input, Operand::Zero());
+ __ Move(result, input);
+ __ bge(&done, Label::kNear);
+ __ LoadComplementRR(result, result/*, SetOE, SetRC*/);
+ // TODO(john): might be a problem removing SetOE here.
+ // Deoptimize on overflow.
+ DeoptimizeIf(overflow, instr, Deoptimizer::kOverflow, cr0);
+ __ bind(&done);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void LCodeGen::EmitInteger32MathAbs(LMathAbs* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ Label done;
+ __ Cmp32(input, Operand::Zero());
+ __ Move(result, input);
+ __ bge(&done, Label::kNear);
+
+ // Deoptimize on overflow.
+ __ Cmp32(input, Operand(0x80000000));
+ DeoptimizeIf(eq, instr, Deoptimizer::kOverflow);
+
+ __ LoadComplementRR(result, result);
+ __ bind(&done);
+}
+#endif
+
+
+void LCodeGen::DoMathAbs(LMathAbs* instr) {
+ // Class for deferred case.
+ class DeferredMathAbsTaggedHeapNumber final : public LDeferredCode {
+ public:
+ DeferredMathAbsTaggedHeapNumber(LCodeGen* codegen, LMathAbs* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override {
+ codegen()->DoDeferredMathAbsTaggedHeapNumber(instr_);
+ }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LMathAbs* instr_;
+ };
+
+ Representation r = instr->hydrogen()->value()->representation();
+ if (r.IsDouble()) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ __ lpdbr(result, input);
+#if V8_TARGET_ARCH_S390X
+ } else if (r.IsInteger32()) {
+ EmitInteger32MathAbs(instr);
+ } else if (r.IsSmi()) {
+#else
+ } else if (r.IsSmiOrInteger32()) {
+#endif
+ EmitMathAbs(instr);
+ } else {
+ // Representation is tagged.
+ DeferredMathAbsTaggedHeapNumber* deferred =
+ new (zone()) DeferredMathAbsTaggedHeapNumber(this, instr);
+ Register input = ToRegister(instr->value());
+ // Smi check.
+ __ JumpIfNotSmi(input, deferred->entry());
+ // If smi, handle it directly.
+ EmitMathAbs(instr);
+ __ bind(deferred->exit());
+ }
+}
+
+
+void LCodeGen::DoMathFloor(LMathFloor* instr) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ Register input_high = scratch0();
+ Register scratch = ip;
+ Label done, exact;
+
+ __ TryInt32Floor(result, input, input_high, scratch, double_scratch0(), &done,
+ &exact);
+ DeoptimizeIf(al, instr, Deoptimizer::kLostPrecisionOrNaN);
+
+ __ bind(&exact);
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ // Test for -0.
+ __ CmpP(result, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ __ Cmp32(input_high, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ }
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoMathRound(LMathRound* instr) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ DoubleRegister double_scratch1 = ToDoubleRegister(instr->temp());
+ DoubleRegister input_plus_dot_five = double_scratch1;
+ Register scratch1 = scratch0();
+ Register scratch2 = ip;
+ DoubleRegister dot_five = double_scratch0();
+ Label convert, done;
+
+ __ LoadDoubleLiteral(dot_five, 0.5, r0);
+ __ lpdbr(double_scratch1, input);
+ __ cdbr(double_scratch1, dot_five);
+ DeoptimizeIf(unordered, instr, Deoptimizer::kLostPrecisionOrNaN);
+ // If input is in [-0.5, -0], the result is -0.
+ // If input is in [+0, +0.5[, the result is +0.
+ // If the input is +0.5, the result is 1.
+ __ bgt(&convert, Label::kNear); // Out of [-0.5, +0.5].
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ // TODO(joransiu): Better Sequence here?
+ __ stdy(input, MemOperand(sp, -kDoubleSize));
+ __ LoadlW(scratch1,
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ __ Cmp32(scratch1, Operand::Zero());
+ // [-0.5, -0].
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ }
+ Label return_zero;
+ __ cdbr(input, dot_five);
+ __ bne(&return_zero, Label::kNear);
+ __ LoadImmP(result, Operand(1)); // +0.5.
+ __ b(&done, Label::kNear);
+ // Remaining cases: [+0, +0.5[ or [-0.5, +0.5[, depending on
+ // flag kBailoutOnMinusZero.
+ __ bind(&return_zero);
+ __ LoadImmP(result, Operand::Zero());
+ __ b(&done, Label::kNear);
+
+ __ bind(&convert);
+ __ ldr(input_plus_dot_five, input);
+ __ adbr(input_plus_dot_five, dot_five);
+ // Reuse dot_five (double_scratch0) as we no longer need this value.
+ __ TryInt32Floor(result, input_plus_dot_five, scratch1, scratch2,
+ double_scratch0(), &done, &done);
+ DeoptimizeIf(al, instr, Deoptimizer::kLostPrecisionOrNaN);
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoMathFround(LMathFround* instr) {
+ DoubleRegister input_reg = ToDoubleRegister(instr->value());
+ DoubleRegister output_reg = ToDoubleRegister(instr->result());
+
+ // Round double to float
+ __ ledbr(output_reg, input_reg);
+ // Extend from float to double
+ __ ldebr(output_reg, output_reg);
+}
+
+
+void LCodeGen::DoMathSqrt(LMathSqrt* instr) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ __ sqdbr(result, input);
+}
+
+
+void LCodeGen::DoMathPowHalf(LMathPowHalf* instr) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ DoubleRegister temp = double_scratch0();
+
+ // Note that according to ECMA-262 15.8.2.13:
+ // Math.pow(-Infinity, 0.5) == Infinity
+ // Math.sqrt(-Infinity) == NaN
+ Label skip, done;
+
+ __ LoadDoubleLiteral(temp, -V8_INFINITY, scratch0());
+ __ cdbr(input, temp);
+ __ bne(&skip, Label::kNear);
+ __ lcdbr(result, temp);
+ __ b(&done, Label::kNear);
+
+ // Add +0 to convert -0 to +0.
+ __ bind(&skip);
+ __ ldr(result, input);
+ __ lzdr(kDoubleRegZero);
+ __ adbr(result, kDoubleRegZero);
+ __ sqdbr(result, result);
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoPower(LPower* instr) {
+ Representation exponent_type = instr->hydrogen()->right()->representation();
+ // Having marked this as a call, we can use any registers.
+ // Just make sure that the input/output registers are the expected ones.
+ Register tagged_exponent = MathPowTaggedDescriptor::exponent();
+ DCHECK(!instr->right()->IsDoubleRegister() ||
+ ToDoubleRegister(instr->right()).is(d2));
+ DCHECK(!instr->right()->IsRegister() ||
+ ToRegister(instr->right()).is(tagged_exponent));
+ DCHECK(ToDoubleRegister(instr->left()).is(d1));
+ DCHECK(ToDoubleRegister(instr->result()).is(d3));
+
+ if (exponent_type.IsSmi()) {
+ MathPowStub stub(isolate(), MathPowStub::TAGGED);
+ __ CallStub(&stub);
+ } else if (exponent_type.IsTagged()) {
+ Label no_deopt;
+ __ JumpIfSmi(tagged_exponent, &no_deopt);
+ __ LoadP(r9, FieldMemOperand(tagged_exponent, HeapObject::kMapOffset));
+ __ CompareRoot(r9, Heap::kHeapNumberMapRootIndex);
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumber);
+ __ bind(&no_deopt);
+ MathPowStub stub(isolate(), MathPowStub::TAGGED);
+ __ CallStub(&stub);
+ } else if (exponent_type.IsInteger32()) {
+ MathPowStub stub(isolate(), MathPowStub::INTEGER);
+ __ CallStub(&stub);
+ } else {
+ DCHECK(exponent_type.IsDouble());
+ MathPowStub stub(isolate(), MathPowStub::DOUBLE);
+ __ CallStub(&stub);
+ }
+}
+
+
+void LCodeGen::DoMathExp(LMathExp* instr) {
+ DoubleRegister input = ToDoubleRegister(instr->value());
+ DoubleRegister result = ToDoubleRegister(instr->result());
+ DoubleRegister double_scratch1 = ToDoubleRegister(instr->double_temp());
+ DoubleRegister double_scratch2 = double_scratch0();
+ Register temp1 = ToRegister(instr->temp1());
+ Register temp2 = ToRegister(instr->temp2());
+
+ MathExpGenerator::EmitMathExp(masm(), input, result, double_scratch1,
+ double_scratch2, temp1, temp2, scratch0());
+}
+
+
+void LCodeGen::DoMathLog(LMathLog* instr) {
+ __ PrepareCallCFunction(0, 1, scratch0());
+ __ MovToFloatParameter(ToDoubleRegister(instr->value()));
+ __ CallCFunction(ExternalReference::math_log_double_function(isolate()),
+ 0, 1);
+ __ MovFromFloatResult(ToDoubleRegister(instr->result()));
+}
+
+
+void LCodeGen::DoMathClz32(LMathClz32* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ Label done;
+ // TODO(joransiu) : Figure out proper sequence for Z.
+ // TODO(john): not sure how flogr behave in 31 bit mode
+ __ llgfr(result, input);
+ __ flogr(r0, result);
+ __ LoadRR(result, r0);
+ __ CmpP(r0, Operand::Zero());
+ __ beq(&done, Label::kNear);
+ __ SubP(result, Operand(32));
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoInvokeFunction(LInvokeFunction* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->function()).is(r3));
+ DCHECK(instr->HasPointerMap());
+
+ Handle<JSFunction> known_function = instr->hydrogen()->known_function();
+ if (known_function.is_null()) {
+ LPointerMap* pointers = instr->pointer_map();
+ SafepointGenerator generator(this, pointers, Safepoint::kLazyDeopt);
+ ParameterCount count(instr->arity());
+ __ InvokeFunction(r3, count, CALL_FUNCTION, generator);
+ } else {
+ CallKnownFunction(known_function,
+ instr->hydrogen()->formal_parameter_count(),
+ instr->arity(), instr);
+ }
+}
+
+
+void LCodeGen::DoCallWithDescriptor(LCallWithDescriptor* instr) {
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ if (instr->hydrogen()->IsTailCall()) {
+ if (NeedsEagerFrame()) __ LeaveFrame(StackFrame::INTERNAL);
+
+ if (instr->target()->IsConstantOperand()) {
+ LConstantOperand* target = LConstantOperand::cast(instr->target());
+ Handle<Code> code = Handle<Code>::cast(ToHandle(target));
+ __ Jump(code, RelocInfo::CODE_TARGET);
+ } else {
+ DCHECK(instr->target()->IsRegister());
+ Register target = ToRegister(instr->target());
+ __ AddP(ip, target, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ JumpToJSEntry(ip);
+ }
+ } else {
+ LPointerMap* pointers = instr->pointer_map();
+ SafepointGenerator generator(this, pointers, Safepoint::kLazyDeopt);
+
+ if (instr->target()->IsConstantOperand()) {
+ LConstantOperand* target = LConstantOperand::cast(instr->target());
+ Handle<Code> code = Handle<Code>::cast(ToHandle(target));
+ generator.BeforeCall(__ CallSize(code, RelocInfo::CODE_TARGET));
+ __ Call(code, RelocInfo::CODE_TARGET);
+ } else {
+ DCHECK(instr->target()->IsRegister());
+ Register target = ToRegister(instr->target());
+ generator.BeforeCall(__ CallSize(target));
+ __ AddP(ip, target, Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ CallJSEntry(ip);
+ }
+ generator.AfterCall();
+ }
+}
+
+
+void LCodeGen::DoCallJSFunction(LCallJSFunction* instr) {
+ DCHECK(ToRegister(instr->function()).is(r3));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ if (instr->hydrogen()->pass_argument_count()) {
+ __ mov(r2, Operand(instr->arity()));
+ }
+
+ // Change context.
+ __ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+
+ bool is_self_call = false;
+ if (instr->hydrogen()->function()->IsConstant()) {
+ HConstant* fun_const = HConstant::cast(instr->hydrogen()->function());
+ Handle<JSFunction> jsfun =
+ Handle<JSFunction>::cast(fun_const->handle(isolate()));
+ is_self_call = jsfun.is_identical_to(info()->closure());
+ }
+
+ if (is_self_call) {
+ __ CallSelf();
+ } else {
+ __ LoadP(ip, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+ __ CallJSEntry(ip);
+ }
+
+ RecordSafepointWithLazyDeopt(instr, RECORD_SIMPLE_SAFEPOINT);
+}
+
+
+void LCodeGen::DoCallFunction(LCallFunction* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->function()).is(r3));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ int arity = instr->arity();
+ CallFunctionFlags flags = instr->hydrogen()->function_flags();
+ if (instr->hydrogen()->HasVectorAndSlot()) {
+ Register slot_register = ToRegister(instr->temp_slot());
+ Register vector_register = ToRegister(instr->temp_vector());
+ DCHECK(slot_register.is(r5));
+ DCHECK(vector_register.is(r4));
+
+ AllowDeferredHandleDereference vector_structure_check;
+ Handle<TypeFeedbackVector> vector = instr->hydrogen()->feedback_vector();
+ int index = vector->GetIndex(instr->hydrogen()->slot());
+
+ __ Move(vector_register, vector);
+ __ LoadSmiLiteral(slot_register, Smi::FromInt(index));
+
+ CallICState::CallType call_type =
+ (flags & CALL_AS_METHOD) ? CallICState::METHOD : CallICState::FUNCTION;
+
+ Handle<Code> ic =
+ CodeFactory::CallICInOptimizedCode(isolate(), arity, call_type).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+ } else {
+ CallFunctionStub stub(isolate(), arity, flags);
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ }
+}
+
+
+void LCodeGen::DoCallNew(LCallNew* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->constructor()).is(r3));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ __ mov(r2, Operand(instr->arity()));
+ // No cell in r4 for construct type feedback in optimized code
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ CallConstructStub stub(isolate(), NO_CALL_CONSTRUCTOR_FLAGS);
+ CallCode(stub.GetCode(), RelocInfo::CONSTRUCT_CALL, instr);
+}
+
+
+void LCodeGen::DoCallNewArray(LCallNewArray* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->constructor()).is(r3));
+ DCHECK(ToRegister(instr->result()).is(r2));
+
+ __ mov(r2, Operand(instr->arity()));
+ if (instr->arity() == 1) {
+ // We only need the allocation site for the case we have a length argument.
+ // The case may bail out to the runtime, which will determine the correct
+ // elements kind with the site.
+ __ Move(r4, instr->hydrogen()->site());
+ } else {
+ __ LoadRoot(r4, Heap::kUndefinedValueRootIndex);
+ }
+ ElementsKind kind = instr->hydrogen()->elements_kind();
+ AllocationSiteOverrideMode override_mode =
+ (AllocationSite::GetMode(kind) == TRACK_ALLOCATION_SITE)
+ ? DISABLE_ALLOCATION_SITES
+ : DONT_OVERRIDE;
+
+ if (instr->arity() == 0) {
+ ArrayNoArgumentConstructorStub stub(isolate(), kind, override_mode);
+ CallCode(stub.GetCode(), RelocInfo::CONSTRUCT_CALL, instr);
+ } else if (instr->arity() == 1) {
+ Label done;
+ if (IsFastPackedElementsKind(kind)) {
+ Label packed_case;
+ // We might need a change here
+ // look at the first argument
+ __ LoadP(r7, MemOperand(sp, 0));
+ __ CmpP(r7, Operand::Zero());
+ __ beq(&packed_case, Label::kNear);
+
+ ElementsKind holey_kind = GetHoleyElementsKind(kind);
+ ArraySingleArgumentConstructorStub stub(isolate(), holey_kind,
+ override_mode);
+ CallCode(stub.GetCode(), RelocInfo::CONSTRUCT_CALL, instr);
+ __ b(&done, Label::kNear);
+ __ bind(&packed_case);
+ }
+
+ ArraySingleArgumentConstructorStub stub(isolate(), kind, override_mode);
+ CallCode(stub.GetCode(), RelocInfo::CONSTRUCT_CALL, instr);
+ __ bind(&done);
+ } else {
+ ArrayNArgumentsConstructorStub stub(isolate(), kind, override_mode);
+ CallCode(stub.GetCode(), RelocInfo::CONSTRUCT_CALL, instr);
+ }
+}
+
+
+void LCodeGen::DoCallRuntime(LCallRuntime* instr) {
+ CallRuntime(instr->function(), instr->arity(), instr);
+}
+
+
+void LCodeGen::DoStoreCodeEntry(LStoreCodeEntry* instr) {
+ Register function = ToRegister(instr->function());
+ Register code_object = ToRegister(instr->code_object());
+ __ lay(code_object, MemOperand(code_object,
+ Code::kHeaderSize - kHeapObjectTag));
+ __ StoreP(code_object,
+ FieldMemOperand(function, JSFunction::kCodeEntryOffset), r0);
+}
+
+
+void LCodeGen::DoInnerAllocatedObject(LInnerAllocatedObject* instr) {
+ Register result = ToRegister(instr->result());
+ Register base = ToRegister(instr->base_object());
+ if (instr->offset()->IsConstantOperand()) {
+ LConstantOperand* offset = LConstantOperand::cast(instr->offset());
+ __ lay(result, MemOperand(base, ToInteger32(offset)));
+ } else {
+ Register offset = ToRegister(instr->offset());
+ __ lay(result, MemOperand(base, offset));
+ }
+}
+
+
+void LCodeGen::DoStoreNamedField(LStoreNamedField* instr) {
+ HStoreNamedField* hinstr = instr->hydrogen();
+ Representation representation = instr->representation();
+
+ Register object = ToRegister(instr->object());
+ Register scratch = scratch0();
+ HObjectAccess access = hinstr->access();
+ int offset = access.offset();
+
+ if (access.IsExternalMemory()) {
+ Register value = ToRegister(instr->value());
+ MemOperand operand = MemOperand(object, offset);
+ __ StoreRepresentation(value, operand, representation, r0);
+ return;
+ }
+
+ __ AssertNotSmi(object);
+
+#if V8_TARGET_ARCH_S390X
+ DCHECK(!representation.IsSmi() || !instr->value()->IsConstantOperand() ||
+ IsInteger32(LConstantOperand::cast(instr->value())));
+#else
+ DCHECK(!representation.IsSmi() || !instr->value()->IsConstantOperand() ||
+ IsSmi(LConstantOperand::cast(instr->value())));
+#endif
+ if (!FLAG_unbox_double_fields && representation.IsDouble()) {
+ DCHECK(access.IsInobject());
+ DCHECK(!hinstr->has_transition());
+ DCHECK(!hinstr->NeedsWriteBarrier());
+ DoubleRegister value = ToDoubleRegister(instr->value());
+ DCHECK(offset >= 0);
+ __ std(value, FieldMemOperand(object, offset));
+ return;
+ }
+
+ if (hinstr->has_transition()) {
+ Handle<Map> transition = hinstr->transition_map();
+ AddDeprecationDependency(transition);
+ __ mov(scratch, Operand(transition));
+ __ StoreP(scratch, FieldMemOperand(object, HeapObject::kMapOffset), r0);
+ if (hinstr->NeedsWriteBarrierForMap()) {
+ Register temp = ToRegister(instr->temp());
+ // Update the write barrier for the map field.
+ __ RecordWriteForMap(object, scratch, temp, GetLinkRegisterState(),
+ kSaveFPRegs);
+ }
+ }
+
+ // Do the store.
+ Register record_dest = object;
+ Register record_value = no_reg;
+ Register record_scratch = scratch;
+#if V8_TARGET_ARCH_S390X
+ if (FLAG_unbox_double_fields && representation.IsDouble()) {
+ DCHECK(access.IsInobject());
+ DoubleRegister value = ToDoubleRegister(instr->value());
+ __ std(value, FieldMemOperand(object, offset));
+ if (hinstr->NeedsWriteBarrier()) {
+ record_value = ToRegister(instr->value());
+ }
+ } else {
+ if (representation.IsSmi() &&
+ hinstr->value()->representation().IsInteger32()) {
+ DCHECK(hinstr->store_mode() == STORE_TO_INITIALIZED_ENTRY);
+ // 64-bit Smi optimization
+ // Store int value directly to upper half of the smi.
+ offset = SmiWordOffset(offset);
+ representation = Representation::Integer32();
+ }
+#endif
+ if (access.IsInobject()) {
+ Register value = ToRegister(instr->value());
+ MemOperand operand = FieldMemOperand(object, offset);
+ __ StoreRepresentation(value, operand, representation, r0);
+ record_value = value;
+ } else {
+ Register value = ToRegister(instr->value());
+ __ LoadP(scratch, FieldMemOperand(object, JSObject::kPropertiesOffset));
+ MemOperand operand = FieldMemOperand(scratch, offset);
+ __ StoreRepresentation(value, operand, representation, r0);
+ record_dest = scratch;
+ record_value = value;
+ record_scratch = object;
+ }
+#if V8_TARGET_ARCH_S390X
+ }
+#endif
+
+ if (hinstr->NeedsWriteBarrier()) {
+ __ RecordWriteField(record_dest, offset, record_value, record_scratch,
+ GetLinkRegisterState(), kSaveFPRegs,
+ EMIT_REMEMBERED_SET, hinstr->SmiCheckForWriteBarrier(),
+ hinstr->PointersToHereCheckForValue());
+ }
+}
+
+
+void LCodeGen::DoStoreNamedGeneric(LStoreNamedGeneric* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->object()).is(StoreDescriptor::ReceiverRegister()));
+ DCHECK(ToRegister(instr->value()).is(StoreDescriptor::ValueRegister()));
+
+ if (instr->hydrogen()->HasVectorAndSlot()) {
+ EmitVectorStoreICRegisters<LStoreNamedGeneric>(instr);
+ }
+
+ __ mov(StoreDescriptor::NameRegister(), Operand(instr->name()));
+ Handle<Code> ic = CodeFactory::StoreICInOptimizedCode(
+ isolate(), instr->language_mode(),
+ instr->hydrogen()->initialization_state()).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoBoundsCheck(LBoundsCheck* instr) {
+ Representation representation = instr->hydrogen()->length()->representation();
+ DCHECK(representation.Equals(instr->hydrogen()->index()->representation()));
+ DCHECK(representation.IsSmiOrInteger32());
+
+ Condition cc = instr->hydrogen()->allow_equality() ? lt : le;
+ if (instr->length()->IsConstantOperand()) {
+ int32_t length = ToInteger32(LConstantOperand::cast(instr->length()));
+ Register index = ToRegister(instr->index());
+ if (representation.IsSmi()) {
+ __ CmpLogicalP(index, Operand(Smi::FromInt(length)));
+ } else {
+ __ CmpLogical32(index, Operand(length));
+ }
+ cc = CommuteCondition(cc);
+ } else if (instr->index()->IsConstantOperand()) {
+ int32_t index = ToInteger32(LConstantOperand::cast(instr->index()));
+ Register length = ToRegister(instr->length());
+ if (representation.IsSmi()) {
+ __ CmpLogicalP(length, Operand(Smi::FromInt(index)));
+ } else {
+ __ CmpLogical32(length, Operand(index));
+ }
+ } else {
+ Register index = ToRegister(instr->index());
+ Register length = ToRegister(instr->length());
+ if (representation.IsSmi()) {
+ __ CmpLogicalP(length, index);
+ } else {
+ __ CmpLogical32(length, index);
+ }
+ }
+ if (FLAG_debug_code && instr->hydrogen()->skip_check()) {
+ Label done;
+ __ b(NegateCondition(cc), &done, Label::kNear);
+ __ stop("eliminated bounds check failed");
+ __ bind(&done);
+ } else {
+ DeoptimizeIf(cc, instr, Deoptimizer::kOutOfBounds);
+ }
+}
+
+
+void LCodeGen::DoStoreKeyedExternalArray(LStoreKeyed* instr) {
+ Register external_pointer = ToRegister(instr->elements());
+ Register key = no_reg;
+ ElementsKind elements_kind = instr->elements_kind();
+ bool key_is_constant = instr->key()->IsConstantOperand();
+ int constant_key = 0;
+ if (key_is_constant) {
+ constant_key = ToInteger32(LConstantOperand::cast(instr->key()));
+ if (constant_key & 0xF0000000) {
+ Abort(kArrayIndexConstantValueTooBig);
+ }
+ } else {
+ key = ToRegister(instr->key());
+ }
+ int element_size_shift = ElementsKindToShiftSize(elements_kind);
+ bool key_is_smi = instr->hydrogen()->key()->representation().IsSmi();
+ bool keyMaybeNegative = instr->hydrogen()->IsDehoisted();
+ int base_offset = instr->base_offset();
+ bool use_scratch = false;
+
+ if (elements_kind == EXTERNAL_FLOAT32_ELEMENTS ||
+ elements_kind == FLOAT32_ELEMENTS ||
+ elements_kind == EXTERNAL_FLOAT64_ELEMENTS ||
+ elements_kind == FLOAT64_ELEMENTS) {
+ Register scratch = scratch0();
+ DoubleRegister value(ToDoubleRegister(instr->value()));
+ if (key_is_constant) {
+ if (constant_key != 0) {
+ base_offset += constant_key << element_size_shift;
+ if (!is_int20(base_offset)) {
+ __ mov(scratch, Operand(base_offset));
+ base_offset = 0;
+ use_scratch = true;
+ }
+ }
+ } else {
+ __ IndexToArrayOffset(scratch, key, element_size_shift, key_is_smi,
+ keyMaybeNegative);
+ use_scratch = true;
+ }
+ if (elements_kind == EXTERNAL_FLOAT32_ELEMENTS ||
+ elements_kind == FLOAT32_ELEMENTS) {
+ __ ledbr(double_scratch0(), value);
+ if (!use_scratch) {
+ __ StoreShortF(double_scratch0(),
+ MemOperand(external_pointer, base_offset));
+ } else {
+ __ StoreShortF(double_scratch0(),
+ MemOperand(scratch, external_pointer, base_offset));
+ }
+ } else { // Storing doubles, not floats.
+ if (!use_scratch) {
+ __ StoreF(value, MemOperand(external_pointer, base_offset));
+ } else {
+ __ StoreF(value,
+ MemOperand(scratch, external_pointer, base_offset));
+ }
+ }
+ } else {
+ Register value(ToRegister(instr->value()));
+ MemOperand mem_operand =
+ PrepareKeyedOperand(key, external_pointer, key_is_constant, key_is_smi,
+ constant_key, element_size_shift, base_offset,
+ keyMaybeNegative);
+ switch (elements_kind) {
+ case EXTERNAL_UINT8_CLAMPED_ELEMENTS:
+ case EXTERNAL_INT8_ELEMENTS:
+ case EXTERNAL_UINT8_ELEMENTS:
+ case UINT8_ELEMENTS:
+ case UINT8_CLAMPED_ELEMENTS:
+ case INT8_ELEMENTS:
+ if (key_is_constant) {
+ __ StoreByte(value, mem_operand, r0);
+ } else {
+ __ StoreByte(value, mem_operand);
+ }
+ break;
+ case EXTERNAL_INT16_ELEMENTS:
+ case EXTERNAL_UINT16_ELEMENTS:
+ case INT16_ELEMENTS:
+ case UINT16_ELEMENTS:
+ if (key_is_constant) {
+ __ StoreHalfWord(value, mem_operand, r0);
+ } else {
+ __ StoreHalfWord(value, mem_operand);
+ }
+ break;
+ case EXTERNAL_INT32_ELEMENTS:
+ case EXTERNAL_UINT32_ELEMENTS:
+ case INT32_ELEMENTS:
+ case UINT32_ELEMENTS:
+ if (key_is_constant) {
+ __ StoreW(value, mem_operand, r0);
+ } else {
+ __ StoreW(value, mem_operand);
+ }
+ break;
+ case FLOAT32_ELEMENTS:
+ case FLOAT64_ELEMENTS:
+ case EXTERNAL_FLOAT32_ELEMENTS:
+ case EXTERNAL_FLOAT64_ELEMENTS:
+ case FAST_DOUBLE_ELEMENTS:
+ case FAST_ELEMENTS:
+ case FAST_SMI_ELEMENTS:
+ case FAST_HOLEY_DOUBLE_ELEMENTS:
+ case FAST_HOLEY_ELEMENTS:
+ case FAST_HOLEY_SMI_ELEMENTS:
+ case DICTIONARY_ELEMENTS:
+ case FAST_SLOPPY_ARGUMENTS_ELEMENTS:
+ case SLOW_SLOPPY_ARGUMENTS_ELEMENTS:
+ UNREACHABLE();
+ break;
+ }
+ }
+}
+
+
+void LCodeGen::DoStoreKeyedFixedDoubleArray(LStoreKeyed* instr) {
+ DoubleRegister value = ToDoubleRegister(instr->value());
+ Register elements = ToRegister(instr->elements());
+ Register key = no_reg;
+ Register scratch = scratch0();
+ DoubleRegister double_scratch = double_scratch0();
+ bool key_is_constant = instr->key()->IsConstantOperand();
+ int constant_key = 0;
+
+ // Calculate the effective address of the slot in the array to store the
+ // double value.
+ if (key_is_constant) {
+ constant_key = ToInteger32(LConstantOperand::cast(instr->key()));
+ if (constant_key & 0xF0000000) {
+ Abort(kArrayIndexConstantValueTooBig);
+ }
+ } else {
+ key = ToRegister(instr->key());
+ }
+ int element_size_shift = ElementsKindToShiftSize(FAST_DOUBLE_ELEMENTS);
+ bool key_is_smi = instr->hydrogen()->key()->representation().IsSmi();
+ bool keyMaybeNegative = instr->hydrogen()->IsDehoisted();
+ int base_offset = instr->base_offset() + constant_key * kDoubleSize;
+ bool use_scratch = false;
+ intptr_t address_offset = base_offset;
+
+ if (key_is_constant) {
+ // Memory references support up to 20-bits signed displacement in RXY form
+ if (!is_int20((address_offset))) {
+ __ mov(scratch, Operand(address_offset));
+ address_offset = 0;
+ use_scratch = true;
+ }
+ } else {
+ use_scratch = true;
+ __ IndexToArrayOffset(scratch, key, element_size_shift, key_is_smi,
+ keyMaybeNegative);
+ // Memory references support up to 20-bits signed displacement in RXY form
+ if (!is_int20((address_offset))) {
+ __ AddP(scratch, Operand(address_offset));
+ address_offset = 0;
+ }
+ }
+
+ if (instr->NeedsCanonicalization()) {
+ // Turn potential sNaN value into qNaN.
+ __ CanonicalizeNaN(double_scratch, value);
+ DCHECK(address_offset >= 0);
+ if (use_scratch)
+ __ std(double_scratch, MemOperand(scratch, elements, address_offset));
+ else
+ __ std(double_scratch, MemOperand(elements, address_offset));
+ } else {
+ if (use_scratch)
+ __ std(value, MemOperand(scratch, elements, address_offset));
+ else
+ __ std(value, MemOperand(elements, address_offset));
+ }
+}
+
+
+void LCodeGen::DoStoreKeyedFixedArray(LStoreKeyed* instr) {
+ HStoreKeyed* hinstr = instr->hydrogen();
+ Register value = ToRegister(instr->value());
+ Register elements = ToRegister(instr->elements());
+ Register key = instr->key()->IsRegister() ? ToRegister(instr->key()) : no_reg;
+ Register scratch = scratch0();
+ int offset = instr->base_offset();
+
+ // Do the store.
+ if (instr->key()->IsConstantOperand()) {
+ DCHECK(!hinstr->NeedsWriteBarrier());
+ LConstantOperand* const_operand = LConstantOperand::cast(instr->key());
+ offset += ToInteger32(const_operand) * kPointerSize;
+ } else {
+ // Even though the HLoadKeyed instruction forces the input
+ // representation for the key to be an integer, the input gets replaced
+ // during bound check elimination with the index argument to the bounds
+ // check, which can be tagged, so that case must be handled here, too.
+ if (hinstr->key()->representation().IsSmi()) {
+ __ SmiToPtrArrayOffset(scratch, key);
+ } else {
+ if (instr->hydrogen()->IsDehoisted() ||
+ !CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+#if V8_TARGET_ARCH_S390X
+ // If array access is dehoisted, the key, being an int32, can contain
+ // a negative value, as needs to be sign-extended to 64-bit for
+ // memory access.
+ __ lgfr(key, key);
+#endif
+ __ ShiftLeftP(scratch, key, Operand(kPointerSizeLog2));
+ } else {
+ // Small optimization to reduce pathlength. After Bounds Check,
+ // the key is guaranteed to be non-negative. Leverage RISBG,
+ // which also performs zero-extension.
+ __ risbg(scratch, key, Operand(32 - kPointerSizeLog2),
+ Operand(63 - kPointerSizeLog2), Operand(kPointerSizeLog2),
+ true);
+ }
+ }
+ }
+
+ Representation representation = hinstr->value()->representation();
+
+#if V8_TARGET_ARCH_S390X
+ // 64-bit Smi optimization
+ if (representation.IsInteger32()) {
+ DCHECK(hinstr->store_mode() == STORE_TO_INITIALIZED_ENTRY);
+ DCHECK(hinstr->elements_kind() == FAST_SMI_ELEMENTS);
+ // Store int value directly to upper half of the smi.
+ offset = SmiWordOffset(offset);
+ }
+#endif
+
+ if (instr->key()->IsConstantOperand()) {
+ __ StoreRepresentation(value, MemOperand(elements, offset),
+ representation, scratch);
+ } else {
+ __ StoreRepresentation(value, MemOperand(scratch, elements, offset),
+ representation, r0);
+ }
+
+ if (hinstr->NeedsWriteBarrier()) {
+ SmiCheck check_needed = hinstr->value()->type().IsHeapObject()
+ ? OMIT_SMI_CHECK
+ : INLINE_SMI_CHECK;
+ // Compute address of modified element and store it into key register.
+ if (instr->key()->IsConstantOperand()) {
+ __ lay(key, MemOperand(elements, offset));
+ } else {
+ __ lay(key, MemOperand(scratch, elements, offset));
+ }
+ __ RecordWrite(elements, key, value, GetLinkRegisterState(), kSaveFPRegs,
+ EMIT_REMEMBERED_SET, check_needed,
+ hinstr->PointersToHereCheckForValue());
+ }
+}
+
+
+void LCodeGen::DoStoreKeyed(LStoreKeyed* instr) {
+ // By cases: external, fast double
+ if (instr->is_typed_elements()) {
+ DoStoreKeyedExternalArray(instr);
+ } else if (instr->hydrogen()->value()->representation().IsDouble()) {
+ DoStoreKeyedFixedDoubleArray(instr);
+ } else {
+ DoStoreKeyedFixedArray(instr);
+ }
+}
+
+
+void LCodeGen::DoStoreKeyedGeneric(LStoreKeyedGeneric* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->object()).is(StoreDescriptor::ReceiverRegister()));
+ DCHECK(ToRegister(instr->key()).is(StoreDescriptor::NameRegister()));
+ DCHECK(ToRegister(instr->value()).is(StoreDescriptor::ValueRegister()));
+
+ if (instr->hydrogen()->HasVectorAndSlot()) {
+ EmitVectorStoreICRegisters<LStoreKeyedGeneric>(instr);
+ }
+
+ Handle<Code> ic = CodeFactory::KeyedStoreICInOptimizedCode(
+ isolate(), instr->language_mode(),
+ instr->hydrogen()->initialization_state()).code();
+ CallCode(ic, RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoMaybeGrowElements(LMaybeGrowElements* instr) {
+ class DeferredMaybeGrowElements final : public LDeferredCode {
+ public:
+ DeferredMaybeGrowElements(LCodeGen* codegen, LMaybeGrowElements* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredMaybeGrowElements(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LMaybeGrowElements* instr_;
+ };
+
+ Register result = r2;
+ DeferredMaybeGrowElements* deferred =
+ new (zone()) DeferredMaybeGrowElements(this, instr);
+ LOperand* key = instr->key();
+ LOperand* current_capacity = instr->current_capacity();
+
+ DCHECK(instr->hydrogen()->key()->representation().IsInteger32());
+ DCHECK(instr->hydrogen()->current_capacity()->representation().IsInteger32());
+ DCHECK(key->IsConstantOperand() || key->IsRegister());
+ DCHECK(current_capacity->IsConstantOperand() ||
+ current_capacity->IsRegister());
+
+ if (key->IsConstantOperand() && current_capacity->IsConstantOperand()) {
+ int32_t constant_key = ToInteger32(LConstantOperand::cast(key));
+ int32_t constant_capacity =
+ ToInteger32(LConstantOperand::cast(current_capacity));
+ if (constant_key >= constant_capacity) {
+ // Deferred case.
+ __ b(deferred->entry());
+ }
+ } else if (key->IsConstantOperand()) {
+ int32_t constant_key = ToInteger32(LConstantOperand::cast(key));
+ __ Cmp32(ToRegister(current_capacity), Operand(constant_key));
+ __ ble(deferred->entry());
+ } else if (current_capacity->IsConstantOperand()) {
+ int32_t constant_capacity =
+ ToInteger32(LConstantOperand::cast(current_capacity));
+ __ Cmp32(ToRegister(key), Operand(constant_capacity));
+ __ bge(deferred->entry());
+ } else {
+ __ Cmp32(ToRegister(key), ToRegister(current_capacity));
+ __ bge(deferred->entry());
+ }
+
+ if (instr->elements()->IsRegister()) {
+ __ Move(result, ToRegister(instr->elements()));
+ } else {
+ __ LoadP(result, ToMemOperand(instr->elements()));
+ }
+
+ __ bind(deferred->exit());
+}
+
+
+void LCodeGen::DoDeferredMaybeGrowElements(LMaybeGrowElements* instr) {
+ // TODO(3095996): Get rid of this. For now, we need to make the
+ // result register contain a valid pointer because it is already
+ // contained in the register pointer map.
+ Register result = r2;
+ __ LoadImmP(result, Operand::Zero());
+
+ // We have to call a stub.
+ {
+ PushSafepointRegistersScope scope(this);
+ if (instr->object()->IsRegister()) {
+ __ Move(result, ToRegister(instr->object()));
+ } else {
+ __ LoadP(result, ToMemOperand(instr->object()));
+ }
+
+ LOperand* key = instr->key();
+ if (key->IsConstantOperand()) {
+ __ LoadSmiLiteral(r5, ToSmi(LConstantOperand::cast(key)));
+ } else {
+ __ SmiTag(r5, ToRegister(key));
+ }
+
+ GrowArrayElementsStub stub(isolate(), instr->hydrogen()->is_js_array(),
+ instr->hydrogen()->kind());
+ __ CallStub(&stub);
+ RecordSafepointWithLazyDeopt(
+ instr, RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS);
+ __ StoreToSafepointRegisterSlot(result, result);
+ }
+
+ // Deopt on smi, which means the elements array changed to dictionary mode.
+ __ TestIfSmi(result);
+ DeoptimizeIf(eq, instr, Deoptimizer::kSmi, cr0);
+}
+
+
+void LCodeGen::DoTransitionElementsKind(LTransitionElementsKind* instr) {
+ Register object_reg = ToRegister(instr->object());
+ Register scratch = scratch0();
+
+ Handle<Map> from_map = instr->original_map();
+ Handle<Map> to_map = instr->transitioned_map();
+ ElementsKind from_kind = instr->from_kind();
+ ElementsKind to_kind = instr->to_kind();
+
+ Label not_applicable;
+ __ LoadP(scratch, FieldMemOperand(object_reg, HeapObject::kMapOffset));
+ __ CmpP(scratch, Operand(from_map));
+ __ bne(¬_applicable);
+
+ if (IsSimpleMapChangeTransition(from_kind, to_kind)) {
+ Register new_map_reg = ToRegister(instr->new_map_temp());
+ __ mov(new_map_reg, Operand(to_map));
+ __ StoreP(new_map_reg, FieldMemOperand(object_reg, HeapObject::kMapOffset));
+ // Write barrier.
+ __ RecordWriteForMap(object_reg, new_map_reg, scratch,
+ GetLinkRegisterState(), kDontSaveFPRegs);
+ } else {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(object_reg.is(r2));
+ PushSafepointRegistersScope scope(this);
+ __ Move(r3, to_map);
+ bool is_js_array = from_map->instance_type() == JS_ARRAY_TYPE;
+ TransitionElementsKindStub stub(isolate(), from_kind, to_kind, is_js_array);
+ __ CallStub(&stub);
+ RecordSafepointWithRegisters(instr->pointer_map(), 0,
+ Safepoint::kLazyDeopt);
+ }
+ __ bind(¬_applicable);
+}
+
+
+void LCodeGen::DoTrapAllocationMemento(LTrapAllocationMemento* instr) {
+ Register object = ToRegister(instr->object());
+ Register temp = ToRegister(instr->temp());
+ Label no_memento_found;
+ __ TestJSArrayForAllocationMemento(object, temp, &no_memento_found);
+ DeoptimizeIf(eq, instr, Deoptimizer::kMementoFound);
+ __ bind(&no_memento_found);
+}
+
+
+void LCodeGen::DoStringAdd(LStringAdd* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ DCHECK(ToRegister(instr->left()).is(r3));
+ DCHECK(ToRegister(instr->right()).is(r2));
+ StringAddStub stub(isolate(), instr->hydrogen()->flags(),
+ instr->hydrogen()->pretenure_flag());
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+}
+
+
+void LCodeGen::DoStringCharCodeAt(LStringCharCodeAt* instr) {
+ class DeferredStringCharCodeAt final : public LDeferredCode {
+ public:
+ DeferredStringCharCodeAt(LCodeGen* codegen, LStringCharCodeAt* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredStringCharCodeAt(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LStringCharCodeAt* instr_;
+ };
+
+ DeferredStringCharCodeAt* deferred =
+ new (zone()) DeferredStringCharCodeAt(this, instr);
+
+ StringCharLoadGenerator::Generate(
+ masm(), ToRegister(instr->string()), ToRegister(instr->index()),
+ ToRegister(instr->result()), deferred->entry());
+ __ bind(deferred->exit());
+}
+
+
+void LCodeGen::DoDeferredStringCharCodeAt(LStringCharCodeAt* instr) {
+ Register string = ToRegister(instr->string());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+
+ // TODO(3095996): Get rid of this. For now, we need to make the
+ // result register contain a valid pointer because it is already
+ // contained in the register pointer map.
+ __ LoadImmP(result, Operand::Zero());
+
+ PushSafepointRegistersScope scope(this);
+ __ push(string);
+ // Push the index as a smi. This is safe because of the checks in
+ // DoStringCharCodeAt above.
+ if (instr->index()->IsConstantOperand()) {
+ int const_index = ToInteger32(LConstantOperand::cast(instr->index()));
+ __ LoadSmiLiteral(scratch, Smi::FromInt(const_index));
+ __ push(scratch);
+ } else {
+ Register index = ToRegister(instr->index());
+ __ SmiTag(index);
+ __ push(index);
+ }
+ CallRuntimeFromDeferred(Runtime::kStringCharCodeAtRT, 2, instr,
+ instr->context());
+ __ AssertSmi(r2);
+ __ SmiUntag(r2);
+ __ StoreToSafepointRegisterSlot(r2, result);
+}
+
+
+void LCodeGen::DoStringCharFromCode(LStringCharFromCode* instr) {
+ class DeferredStringCharFromCode final : public LDeferredCode {
+ public:
+ DeferredStringCharFromCode(LCodeGen* codegen, LStringCharFromCode* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override {
+ codegen()->DoDeferredStringCharFromCode(instr_);
+ }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LStringCharFromCode* instr_;
+ };
+
+ DeferredStringCharFromCode* deferred =
+ new (zone()) DeferredStringCharFromCode(this, instr);
+
+ DCHECK(instr->hydrogen()->value()->representation().IsInteger32());
+ Register char_code = ToRegister(instr->char_code());
+ Register result = ToRegister(instr->result());
+ DCHECK(!char_code.is(result));
+
+ __ CmpLogicalP(char_code, Operand(String::kMaxOneByteCharCode));
+ __ bgt(deferred->entry());
+ __ LoadRoot(result, Heap::kSingleCharacterStringCacheRootIndex);
+ __ ShiftLeftP(r0, char_code, Operand(kPointerSizeLog2));
+ __ AddP(result, r0);
+ __ LoadP(result, FieldMemOperand(result, FixedArray::kHeaderSize));
+ __ CompareRoot(result, Heap::kUndefinedValueRootIndex);
+ __ beq(deferred->entry());
+ __ bind(deferred->exit());
+}
+
+
+void LCodeGen::DoDeferredStringCharFromCode(LStringCharFromCode* instr) {
+ Register char_code = ToRegister(instr->char_code());
+ Register result = ToRegister(instr->result());
+
+ // TODO(3095996): Get rid of this. For now, we need to make the
+ // result register contain a valid pointer because it is already
+ // contained in the register pointer map.
+ __ LoadImmP(result, Operand::Zero());
+
+ PushSafepointRegistersScope scope(this);
+ __ SmiTag(char_code);
+ __ push(char_code);
+ CallRuntimeFromDeferred(Runtime::kCharFromCode, 1, instr, instr->context());
+ __ StoreToSafepointRegisterSlot(r2, result);
+}
+
+
+void LCodeGen::DoInteger32ToDouble(LInteger32ToDouble* instr) {
+ LOperand* input = instr->value();
+ DCHECK(input->IsRegister() || input->IsStackSlot());
+ LOperand* output = instr->result();
+ DCHECK(output->IsDoubleRegister());
+ if (input->IsStackSlot()) {
+ Register scratch = scratch0();
+ __ LoadP(scratch, ToMemOperand(input));
+ __ ConvertIntToDouble(scratch, ToDoubleRegister(output));
+ } else {
+ __ ConvertIntToDouble(ToRegister(input), ToDoubleRegister(output));
+ }
+}
+
+
+void LCodeGen::DoUint32ToDouble(LUint32ToDouble* instr) {
+ LOperand* input = instr->value();
+ LOperand* output = instr->result();
+ __ ConvertUnsignedIntToDouble(ToRegister(input), ToDoubleRegister(output));
+}
+
+
+void LCodeGen::DoNumberTagI(LNumberTagI* instr) {
+ class DeferredNumberTagI final : public LDeferredCode {
+ public:
+ DeferredNumberTagI(LCodeGen* codegen, LNumberTagI* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override {
+ codegen()->DoDeferredNumberTagIU(instr_, instr_->value(), instr_->temp1(),
+ instr_->temp2(), SIGNED_INT32);
+ }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LNumberTagI* instr_;
+ };
+
+ Register src = ToRegister(instr->value());
+ Register dst = ToRegister(instr->result());
+
+ DeferredNumberTagI* deferred = new (zone()) DeferredNumberTagI(this, instr);
+#if V8_TARGET_ARCH_S390X
+ __ SmiTag(dst, src);
+#else
+ // Add src to itself to defect SMI overflow.
+ __ Add32(dst, src, src);
+ __ b(overflow, deferred->entry());
+#endif
+ __ bind(deferred->exit());
+}
+
+
+void LCodeGen::DoNumberTagU(LNumberTagU* instr) {
+ class DeferredNumberTagU final : public LDeferredCode {
+ public:
+ DeferredNumberTagU(LCodeGen* codegen, LNumberTagU* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override {
+ codegen()->DoDeferredNumberTagIU(instr_, instr_->value(), instr_->temp1(),
+ instr_->temp2(), UNSIGNED_INT32);
+ }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LNumberTagU* instr_;
+ };
+
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+
+ DeferredNumberTagU* deferred = new (zone()) DeferredNumberTagU(this, instr);
+ __ CmpLogicalP(input, Operand(Smi::kMaxValue));
+ __ bgt(deferred->entry());
+ __ SmiTag(result, input);
+ __ bind(deferred->exit());
+}
+
+
+void LCodeGen::DoDeferredNumberTagIU(LInstruction* instr, LOperand* value,
+ LOperand* temp1, LOperand* temp2,
+ IntegerSignedness signedness) {
+ Label done, slow;
+ Register src = ToRegister(value);
+ Register dst = ToRegister(instr->result());
+ Register tmp1 = scratch0();
+ Register tmp2 = ToRegister(temp1);
+ Register tmp3 = ToRegister(temp2);
+ DoubleRegister dbl_scratch = double_scratch0();
+
+ if (signedness == SIGNED_INT32) {
+ // There was overflow, so bits 30 and 31 of the original integer
+ // disagree. Try to allocate a heap number in new space and store
+ // the value in there. If that fails, call the runtime system.
+ if (dst.is(src)) {
+ __ SmiUntag(src, dst);
+ __ xilf(src, Operand(HeapNumber::kSignMask));
+ }
+ __ ConvertIntToDouble(src, dbl_scratch);
+ } else {
+ __ ConvertUnsignedIntToDouble(src, dbl_scratch);
+ }
+
+ if (FLAG_inline_new) {
+ __ LoadRoot(tmp3, Heap::kHeapNumberMapRootIndex);
+ __ AllocateHeapNumber(dst, tmp1, tmp2, tmp3, &slow);
+ __ b(&done);
+ }
+
+ // Slow case: Call the runtime system to do the number allocation.
+ __ bind(&slow);
+ {
+ // TODO(3095996): Put a valid pointer value in the stack slot where the
+ // result register is stored, as this register is in the pointer map, but
+ // contains an integer value.
+ __ LoadImmP(dst, Operand::Zero());
+
+ // Preserve the value of all registers.
+ PushSafepointRegistersScope scope(this);
+
+ // NumberTagI and NumberTagD use the context from the frame, rather than
+ // the environment's HContext or HInlinedContext value.
+ // They only call Runtime::kAllocateHeapNumber.
+ // The corresponding HChange instructions are added in a phase that does
+ // not have easy access to the local context.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ CallRuntimeSaveDoubles(Runtime::kAllocateHeapNumber);
+ RecordSafepointWithRegisters(instr->pointer_map(), 0,
+ Safepoint::kNoLazyDeopt);
+ __ StoreToSafepointRegisterSlot(r2, dst);
+ }
+
+ // Done. Put the value in dbl_scratch into the value of the allocated heap
+ // number.
+ __ bind(&done);
+ __ StoreF(dbl_scratch, FieldMemOperand(dst, HeapNumber::kValueOffset));
+}
+
+
+void LCodeGen::DoNumberTagD(LNumberTagD* instr) {
+ class DeferredNumberTagD final : public LDeferredCode {
+ public:
+ DeferredNumberTagD(LCodeGen* codegen, LNumberTagD* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredNumberTagD(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LNumberTagD* instr_;
+ };
+
+ DoubleRegister input_reg = ToDoubleRegister(instr->value());
+ Register scratch = scratch0();
+ Register reg = ToRegister(instr->result());
+ Register temp1 = ToRegister(instr->temp());
+ Register temp2 = ToRegister(instr->temp2());
+
+ DeferredNumberTagD* deferred = new(zone()) DeferredNumberTagD(this, instr);
+ if (FLAG_inline_new) {
+ __ LoadRoot(scratch, Heap::kHeapNumberMapRootIndex);
+ __ AllocateHeapNumber(reg, temp1, temp2, scratch, deferred->entry());
+ } else {
+ __ b(deferred->entry());
+ }
+ __ bind(deferred->exit());
+ __ StoreF(input_reg, FieldMemOperand(reg, HeapNumber::kValueOffset));
+}
+
+
+void LCodeGen::DoDeferredNumberTagD(LNumberTagD* instr) {
+ // TODO(3095996): Get rid of this. For now, we need to make the
+ // result register contain a valid pointer because it is already
+ // contained in the register pointer map.
+ Register reg = ToRegister(instr->result());
+ __ LoadImmP(reg, Operand::Zero());
+
+ PushSafepointRegistersScope scope(this);
+ // NumberTagI and NumberTagD use the context from the frame, rather than
+ // the environment's HContext or HInlinedContext value.
+ // They only call Runtime::kAllocateHeapNumber.
+ // The corresponding HChange instructions are added in a phase that does
+ // not have easy access to the local context.
+ __ LoadP(cp, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ __ CallRuntimeSaveDoubles(Runtime::kAllocateHeapNumber);
+ RecordSafepointWithRegisters(
+ instr->pointer_map(), 0, Safepoint::kNoLazyDeopt);
+ __ StoreToSafepointRegisterSlot(r2, reg);
+}
+
+
+void LCodeGen::DoSmiTag(LSmiTag* instr) {
+ HChange* hchange = instr->hydrogen();
+ Register input = ToRegister(instr->value());
+ Register output = ToRegister(instr->result());
+ if (hchange->CheckFlag(HValue::kCanOverflow) &&
+ hchange->value()->CheckFlag(HValue::kUint32)) {
+ __ TestUnsignedSmiCandidate(input, r0);
+ DeoptimizeIf(ne, instr, Deoptimizer::kOverflow, cr0);
+ }
+#if !V8_TARGET_ARCH_S390X
+ if (hchange->CheckFlag(HValue::kCanOverflow) &&
+ !hchange->value()->CheckFlag(HValue::kUint32)) {
+ __ SmiTagCheckOverflow(output, input, r0);
+ DeoptimizeIf(lt, instr, Deoptimizer::kOverflow, cr0);
+ } else {
+#endif
+ __ SmiTag(output, input);
+#if !V8_TARGET_ARCH_S390X
+ }
+#endif
+}
+
+
+void LCodeGen::DoSmiUntag(LSmiUntag* instr) {
+ Register input = ToRegister(instr->value());
+ Register result = ToRegister(instr->result());
+ if (instr->needs_check()) {
+ __ tmll(input, Operand(kHeapObjectTag));
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotASmi, cr0);
+ __ SmiUntag(result, input);
+ } else {
+ __ SmiUntag(result, input);
+ }
+}
+
+
+void LCodeGen::EmitNumberUntagD(LNumberUntagD* instr, Register input_reg,
+ DoubleRegister result_reg,
+ NumberUntagDMode mode) {
+ bool can_convert_undefined_to_nan =
+ instr->hydrogen()->can_convert_undefined_to_nan();
+ bool deoptimize_on_minus_zero = instr->hydrogen()->deoptimize_on_minus_zero();
+
+ Register scratch = scratch0();
+ DCHECK(!result_reg.is(double_scratch0()));
+
+ Label convert, load_smi, done;
+
+ if (mode == NUMBER_CANDIDATE_IS_ANY_TAGGED) {
+ // Smi check.
+ __ UntagAndJumpIfSmi(scratch, input_reg, &load_smi);
+
+ // Heap number map check.
+ __ LoadP(scratch, FieldMemOperand(input_reg, HeapObject::kMapOffset));
+ __ CmpP(scratch, RootMemOperand(Heap::kHeapNumberMapRootIndex));
+
+ if (can_convert_undefined_to_nan) {
+ __ bne(&convert, Label::kNear);
+ } else {
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumber);
+ }
+ // load heap number
+ __ ld(result_reg, FieldMemOperand(input_reg, HeapNumber::kValueOffset));
+ if (deoptimize_on_minus_zero) {
+ __ lgdr(scratch, result_reg);
+ __ srlg(ip, scratch, Operand(32));
+
+ __ CmpP(ip, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ __ CmpP(scratch, Operand(HeapNumber::kSignMask));
+ DeoptimizeIf(eq, instr, Deoptimizer::kMinusZero);
+ }
+ __ b(&done, Label::kNear);
+ if (can_convert_undefined_to_nan) {
+ __ bind(&convert);
+ // Convert undefined (and hole) to NaN.
+ __ CompareRoot(input_reg, Heap::kUndefinedValueRootIndex);
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumberUndefined);
+ __ LoadRoot(scratch, Heap::kNanValueRootIndex);
+ __ ld(result_reg, FieldMemOperand(scratch, HeapNumber::kValueOffset));
+ __ b(&done, Label::kNear);
+ }
+ } else {
+ __ SmiUntag(scratch, input_reg);
+ DCHECK(mode == NUMBER_CANDIDATE_IS_SMI);
+ }
+ // Smi to double register conversion
+ __ bind(&load_smi);
+ // scratch: untagged value of input_reg
+ __ ConvertIntToDouble(scratch, result_reg);
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoDeferredTaggedToI(LTaggedToI* instr) {
+ Register input_reg = ToRegister(instr->value());
+ Register scratch1 = scratch0();
+ Register scratch2 = ToRegister(instr->temp());
+ DoubleRegister double_scratch = double_scratch0();
+ DoubleRegister double_scratch2 = ToDoubleRegister(instr->temp2());
+
+ DCHECK(!scratch1.is(input_reg) && !scratch1.is(scratch2));
+ DCHECK(!scratch2.is(input_reg) && !scratch2.is(scratch1));
+
+ Label done;
+
+ // Heap number map check.
+ __ LoadP(scratch1, FieldMemOperand(input_reg, HeapObject::kMapOffset));
+ __ CompareRoot(scratch1, Heap::kHeapNumberMapRootIndex);
+
+ if (instr->truncating()) {
+ // Performs a truncating conversion of a floating point number as used by
+ // the JS bitwise operations.
+ Label no_heap_number, check_bools, check_false;
+ __ bne(&no_heap_number, Label::kNear);
+ __ LoadRR(scratch2, input_reg);
+ __ TruncateHeapNumberToI(input_reg, scratch2);
+ __ b(&done, Label::kNear);
+
+ // Check for Oddballs. Undefined/False is converted to zero and True to one
+ // for truncating conversions.
+ __ bind(&no_heap_number);
+ __ CompareRoot(input_reg, Heap::kUndefinedValueRootIndex);
+ __ bne(&check_bools);
+ __ LoadImmP(input_reg, Operand::Zero());
+ __ b(&done, Label::kNear);
+
+ __ bind(&check_bools);
+ __ CompareRoot(input_reg, Heap::kTrueValueRootIndex);
+ __ bne(&check_false, Label::kNear);
+ __ LoadImmP(input_reg, Operand(1));
+ __ b(&done, Label::kNear);
+
+ __ bind(&check_false);
+ __ CompareRoot(input_reg, Heap::kFalseValueRootIndex);
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumberUndefinedBoolean);
+ __ LoadImmP(input_reg, Operand::Zero());
+ } else {
+ // Deoptimize if we don't have a heap number.
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumber);
+
+ __ ld(double_scratch2,
+ FieldMemOperand(input_reg, HeapNumber::kValueOffset));
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ // preserve heap number pointer in scratch2 for minus zero check below
+ __ LoadRR(scratch2, input_reg);
+ }
+ __ TryDoubleToInt32Exact(input_reg, double_scratch2, scratch1,
+ double_scratch);
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecisionOrNaN);
+
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ __ CmpP(input_reg, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ __ LoadlW(scratch1,
+ FieldMemOperand(scratch2, HeapNumber::kValueOffset +
+ Register::kExponentOffset));
+ __ Cmp32(scratch1, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ }
+ }
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoTaggedToI(LTaggedToI* instr) {
+ class DeferredTaggedToI final : public LDeferredCode {
+ public:
+ DeferredTaggedToI(LCodeGen* codegen, LTaggedToI* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredTaggedToI(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LTaggedToI* instr_;
+ };
+
+ LOperand* input = instr->value();
+ DCHECK(input->IsRegister());
+ DCHECK(input->Equals(instr->result()));
+
+ Register input_reg = ToRegister(input);
+
+ if (instr->hydrogen()->value()->representation().IsSmi()) {
+ __ SmiUntag(input_reg);
+ } else {
+ DeferredTaggedToI* deferred = new (zone()) DeferredTaggedToI(this, instr);
+
+ // Branch to deferred code if the input is a HeapObject.
+ __ JumpIfNotSmi(input_reg, deferred->entry());
+
+ __ SmiUntag(input_reg);
+ __ bind(deferred->exit());
+ }
+}
+
+
+void LCodeGen::DoNumberUntagD(LNumberUntagD* instr) {
+ LOperand* input = instr->value();
+ DCHECK(input->IsRegister());
+ LOperand* result = instr->result();
+ DCHECK(result->IsDoubleRegister());
+
+ Register input_reg = ToRegister(input);
+ DoubleRegister result_reg = ToDoubleRegister(result);
+
+ HValue* value = instr->hydrogen()->value();
+ NumberUntagDMode mode = value->representation().IsSmi()
+ ? NUMBER_CANDIDATE_IS_SMI
+ : NUMBER_CANDIDATE_IS_ANY_TAGGED;
+
+ EmitNumberUntagD(instr, input_reg, result_reg, mode);
+}
+
+
+void LCodeGen::DoDoubleToI(LDoubleToI* instr) {
+ Register result_reg = ToRegister(instr->result());
+ Register scratch1 = scratch0();
+ DoubleRegister double_input = ToDoubleRegister(instr->value());
+ DoubleRegister double_scratch = double_scratch0();
+
+ if (instr->truncating()) {
+ __ TruncateDoubleToI(result_reg, double_input);
+ } else {
+ __ TryDoubleToInt32Exact(result_reg, double_input, scratch1,
+ double_scratch);
+ // Deoptimize if the input wasn't a int32 (inside a double).
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecisionOrNaN);
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ Label done;
+ __ CmpP(result_reg, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ // TODO(joransiu): Use move double to int.
+ __ stdy(double_input, MemOperand(sp, -kDoubleSize));
+ __ LoadlW(scratch1,
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ __ Cmp32(scratch1, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ __ bind(&done);
+ }
+ }
+}
+
+
+void LCodeGen::DoDoubleToSmi(LDoubleToSmi* instr) {
+ Register result_reg = ToRegister(instr->result());
+ Register scratch1 = scratch0();
+ DoubleRegister double_input = ToDoubleRegister(instr->value());
+ DoubleRegister double_scratch = double_scratch0();
+
+ if (instr->truncating()) {
+ __ TruncateDoubleToI(result_reg, double_input);
+ } else {
+ __ TryDoubleToInt32Exact(result_reg, double_input, scratch1,
+ double_scratch);
+ // Deoptimize if the input wasn't a int32 (inside a double).
+ DeoptimizeIf(ne, instr, Deoptimizer::kLostPrecisionOrNaN);
+ if (instr->hydrogen()->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ Label done;
+ __ CmpP(result_reg, Operand::Zero());
+ __ bne(&done, Label::kNear);
+ // TODO(joransiu): Use move double to int.
+ __ stdy(double_input, MemOperand(sp, -kDoubleSize));
+ __ LoadlW(scratch1,
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ __ Cmp32(scratch1, Operand::Zero());
+ DeoptimizeIf(lt, instr, Deoptimizer::kMinusZero);
+ __ bind(&done);
+ }
+ }
+#if V8_TARGET_ARCH_S390X
+ __ SmiTag(result_reg);
+#else
+ __ SmiTagCheckOverflow(result_reg, r0);
+ DeoptimizeIf(lt, instr, Deoptimizer::kOverflow, cr0);
+#endif
+}
+
+
+void LCodeGen::DoCheckSmi(LCheckSmi* instr) {
+ LOperand* input = instr->value();
+ __ TestIfSmi(ToRegister(input));
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotASmi, cr0);
+}
+
+
+void LCodeGen::DoCheckNonSmi(LCheckNonSmi* instr) {
+ if (!instr->hydrogen()->value()->type().IsHeapObject()) {
+ LOperand* input = instr->value();
+ __ TestIfSmi(ToRegister(input));
+ DeoptimizeIf(eq, instr, Deoptimizer::kSmi, cr0);
+ }
+}
+
+
+void LCodeGen::DoCheckArrayBufferNotNeutered(
+ LCheckArrayBufferNotNeutered* instr) {
+ Register view = ToRegister(instr->view());
+ Register scratch = scratch0();
+
+ __ LoadP(scratch, FieldMemOperand(view, JSArrayBufferView::kBufferOffset));
+ __ LoadlW(scratch, FieldMemOperand(scratch, JSArrayBuffer::kBitFieldOffset));
+ __ And(r0, scratch, Operand(1 << JSArrayBuffer::WasNeutered::kShift));
+ DeoptimizeIf(ne, instr, Deoptimizer::kOutOfBounds, cr0);
+}
+
+
+void LCodeGen::DoCheckInstanceType(LCheckInstanceType* instr) {
+ Register input = ToRegister(instr->value());
+ Register scratch = scratch0();
+
+ __ LoadP(scratch, FieldMemOperand(input, HeapObject::kMapOffset));
+
+ if (instr->hydrogen()->is_interval_check()) {
+ InstanceType first;
+ InstanceType last;
+ instr->hydrogen()->GetCheckInterval(&first, &last);
+
+ __ CmpLogicalByte(FieldMemOperand(scratch, Map::kInstanceTypeOffset),
+ Operand(first));
+
+ // If there is only one type in the interval check for equality.
+ if (first == last) {
+ DeoptimizeIf(ne, instr, Deoptimizer::kWrongInstanceType);
+ } else {
+ DeoptimizeIf(lt, instr, Deoptimizer::kWrongInstanceType);
+ // Omit check for the last type.
+ if (last != LAST_TYPE) {
+ __ CmpLogicalByte(FieldMemOperand(scratch, Map::kInstanceTypeOffset),
+ Operand(last));
+ DeoptimizeIf(gt, instr, Deoptimizer::kWrongInstanceType);
+ }
+ }
+ } else {
+ uint8_t mask;
+ uint8_t tag;
+ instr->hydrogen()->GetCheckMaskAndTag(&mask, &tag);
+
+ __ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+
+ if (base::bits::IsPowerOfTwo32(mask)) {
+ DCHECK(tag == 0 || base::bits::IsPowerOfTwo32(tag));
+ __ AndP(scratch, Operand(mask));
+ DeoptimizeIf(tag == 0 ? ne : eq, instr, Deoptimizer::kWrongInstanceType);
+ } else {
+ __ AndP(scratch, Operand(mask));
+ __ CmpP(scratch, Operand(tag));
+ DeoptimizeIf(ne, instr, Deoptimizer::kWrongInstanceType);
+ }
+ }
+}
+
+
+void LCodeGen::DoCheckValue(LCheckValue* instr) {
+ Register reg = ToRegister(instr->value());
+ Handle<HeapObject> object = instr->hydrogen()->object().handle();
+ AllowDeferredHandleDereference smi_check;
+ if (isolate()->heap()->InNewSpace(*object)) {
+ Register reg = ToRegister(instr->value());
+ Handle<Cell> cell = isolate()->factory()->NewCell(object);
+ __ mov(ip, Operand(cell));
+ __ CmpP(reg, FieldMemOperand(ip, Cell::kValueOffset));
+ } else {
+ __ CmpP(reg, Operand(object));
+ }
+ DeoptimizeIf(ne, instr, Deoptimizer::kValueMismatch);
+}
+
+
+void LCodeGen::DoDeferredInstanceMigration(LCheckMaps* instr, Register object) {
+ {
+ PushSafepointRegistersScope scope(this);
+ __ push(object);
+ __ LoadImmP(cp, Operand::Zero());
+ __ CallRuntimeSaveDoubles(Runtime::kTryMigrateInstance);
+ RecordSafepointWithRegisters(
+ instr->pointer_map(), 1, Safepoint::kNoLazyDeopt);
+ __ StoreToSafepointRegisterSlot(r2, scratch0());
+ }
+ __ TestIfSmi(scratch0());
+ DeoptimizeIf(eq, instr, Deoptimizer::kInstanceMigrationFailed, cr0);
+}
+
+
+void LCodeGen::DoCheckMaps(LCheckMaps* instr) {
+ class DeferredCheckMaps final : public LDeferredCode {
+ public:
+ DeferredCheckMaps(LCodeGen* codegen, LCheckMaps* instr, Register object)
+ : LDeferredCode(codegen), instr_(instr), object_(object) {
+ SetExit(check_maps());
+ }
+ void Generate() override {
+ codegen()->DoDeferredInstanceMigration(instr_, object_);
+ }
+ Label* check_maps() { return &check_maps_; }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LCheckMaps* instr_;
+ Label check_maps_;
+ Register object_;
+ };
+
+ if (instr->hydrogen()->IsStabilityCheck()) {
+ const UniqueSet<Map>* maps = instr->hydrogen()->maps();
+ for (int i = 0; i < maps->size(); ++i) {
+ AddStabilityDependency(maps->at(i).handle());
+ }
+ return;
+ }
+
+ LOperand* input = instr->value();
+ DCHECK(input->IsRegister());
+ Register reg = ToRegister(input);
+
+ DeferredCheckMaps* deferred = NULL;
+ if (instr->hydrogen()->HasMigrationTarget()) {
+ deferred = new(zone()) DeferredCheckMaps(this, instr, reg);
+ __ bind(deferred->check_maps());
+ }
+
+ const UniqueSet<Map>* maps = instr->hydrogen()->maps();
+ Label success;
+ for (int i = 0; i < maps->size() - 1; i++) {
+ Handle<Map> map = maps->at(i).handle();
+ __ CompareMap(reg, map, &success);
+ __ beq(&success);
+ }
+
+ Handle<Map> map = maps->at(maps->size() - 1).handle();
+ __ CompareMap(reg, map, &success);
+ if (instr->hydrogen()->HasMigrationTarget()) {
+ __ bne(deferred->entry());
+ } else {
+ DeoptimizeIf(ne, instr, Deoptimizer::kWrongMap);
+ }
+
+ __ bind(&success);
+}
+
+
+void LCodeGen::DoClampDToUint8(LClampDToUint8* instr) {
+ DoubleRegister value_reg = ToDoubleRegister(instr->unclamped());
+ Register result_reg = ToRegister(instr->result());
+ __ ClampDoubleToUint8(result_reg, value_reg, double_scratch0());
+}
+
+
+void LCodeGen::DoClampIToUint8(LClampIToUint8* instr) {
+ Register unclamped_reg = ToRegister(instr->unclamped());
+ Register result_reg = ToRegister(instr->result());
+ __ ClampUint8(result_reg, unclamped_reg);
+}
+
+
+void LCodeGen::DoClampTToUint8(LClampTToUint8* instr) {
+ Register scratch = scratch0();
+ Register input_reg = ToRegister(instr->unclamped());
+ Register result_reg = ToRegister(instr->result());
+ DoubleRegister temp_reg = ToDoubleRegister(instr->temp());
+ Label is_smi, done, heap_number;
+
+ // Both smi and heap number cases are handled.
+ __ UntagAndJumpIfSmi(result_reg, input_reg, &is_smi);
+
+ // Check for heap number
+ __ LoadP(scratch, FieldMemOperand(input_reg, HeapObject::kMapOffset));
+ __ CmpP(scratch, Operand(factory()->heap_number_map()));
+ __ beq(&heap_number, Label::kNear);
+
+ // Check for undefined. Undefined is converted to zero for clamping
+ // conversions.
+ __ CmpP(input_reg, Operand(factory()->undefined_value()));
+ DeoptimizeIf(ne, instr, Deoptimizer::kNotAHeapNumberUndefined);
+ __ LoadImmP(result_reg, Operand::Zero());
+ __ b(&done, Label::kNear);
+
+ // Heap number
+ __ bind(&heap_number);
+ __ ld(temp_reg, FieldMemOperand(input_reg, HeapNumber::kValueOffset));
+ __ ClampDoubleToUint8(result_reg, temp_reg, double_scratch0());
+ __ b(&done, Label::kNear);
+
+ // smi
+ __ bind(&is_smi);
+ __ ClampUint8(result_reg, result_reg);
+
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoDoubleBits(LDoubleBits* instr) {
+ DoubleRegister value_reg = ToDoubleRegister(instr->value());
+ Register result_reg = ToRegister(instr->result());
+ // TODO(joransiu): Use non-memory version.
+ __ stdy(value_reg, MemOperand(sp, -kDoubleSize));
+ if (instr->hydrogen()->bits() == HDoubleBits::HIGH) {
+ __ LoadlW(result_reg,
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ } else {
+ __ LoadlW(result_reg,
+ MemOperand(sp, -kDoubleSize + Register::kMantissaOffset));
+ }
+}
+
+
+void LCodeGen::DoConstructDouble(LConstructDouble* instr) {
+ Register hi_reg = ToRegister(instr->hi());
+ Register lo_reg = ToRegister(instr->lo());
+ DoubleRegister result_reg = ToDoubleRegister(instr->result());
+ // TODO(joransiu): Construct with ldgr
+#if V8_TARGET_LITTLE_ENDIAN
+ __ StoreW(hi_reg, MemOperand(sp, -kDoubleSize / 2));
+ __ StoreW(lo_reg, MemOperand(sp, -kDoubleSize));
+#else
+ __ StoreW(lo_reg, MemOperand(sp, -kDoubleSize / 2));
+ __ StoreW(hi_reg, MemOperand(sp, -kDoubleSize));
+#endif
+ __ ldy(result_reg, MemOperand(sp, -kDoubleSize));
+}
+
+
+void LCodeGen::DoAllocate(LAllocate* instr) {
+ class DeferredAllocate final : public LDeferredCode {
+ public:
+ DeferredAllocate(LCodeGen* codegen, LAllocate* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredAllocate(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LAllocate* instr_;
+ };
+
+ DeferredAllocate* deferred = new (zone()) DeferredAllocate(this, instr);
+
+ Register result = ToRegister(instr->result());
+ Register scratch = ToRegister(instr->temp1());
+ Register scratch2 = ToRegister(instr->temp2());
+
+ // Allocate memory for the object.
+ AllocationFlags flags = TAG_OBJECT;
+ if (instr->hydrogen()->MustAllocateDoubleAligned()) {
+ flags = static_cast<AllocationFlags>(flags | DOUBLE_ALIGNMENT);
+ }
+ if (instr->hydrogen()->IsOldSpaceAllocation()) {
+ DCHECK(!instr->hydrogen()->IsNewSpaceAllocation());
+ flags = static_cast<AllocationFlags>(flags | PRETENURE);
+ }
+
+ if (instr->size()->IsConstantOperand()) {
+ int32_t size = ToInteger32(LConstantOperand::cast(instr->size()));
+ if (size <= Page::kMaxRegularHeapObjectSize) {
+ __ Allocate(size, result, scratch, scratch2, deferred->entry(), flags);
+ } else {
+ __ b(deferred->entry());
+ }
+ } else {
+ Register size = ToRegister(instr->size());
+ __ Allocate(size, result, scratch, scratch2, deferred->entry(), flags);
+ }
+
+ __ bind(deferred->exit());
+
+ if (instr->hydrogen()->MustPrefillWithFiller()) {
+ if (instr->size()->IsConstantOperand()) {
+ int32_t size = ToInteger32(LConstantOperand::cast(instr->size()));
+ __ LoadIntLiteral(scratch, size);
+ } else {
+ scratch = ToRegister(instr->size());
+ }
+ __ lay(scratch, MemOperand(scratch, -kPointerSize));
+ Label loop;
+ __ mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
+ __ bind(&loop);
+ __ StoreP(scratch2, MemOperand(scratch, result, -kHeapObjectTag));
+#if V8_TARGET_ARCH_S390X
+ __ lay(scratch, MemOperand(scratch, -kPointerSize));
+#else
+ // TODO(joransiu): Improve the following sequence.
+ // Need to use AHI instead of LAY as top nibble is not set with LAY, causing
+ // incorrect result with the signed compare
+ __ AddP(scratch, Operand(-kPointerSize));
+#endif
+ __ CmpP(scratch, Operand::Zero());
+ __ bge(&loop);
+ }
+}
+
+
+void LCodeGen::DoDeferredAllocate(LAllocate* instr) {
+ Register result = ToRegister(instr->result());
+
+ // TODO(3095996): Get rid of this. For now, we need to make the
+ // result register contain a valid pointer because it is already
+ // contained in the register pointer map.
+ __ LoadSmiLiteral(result, Smi::FromInt(0));
+
+ PushSafepointRegistersScope scope(this);
+ if (instr->size()->IsRegister()) {
+ Register size = ToRegister(instr->size());
+ DCHECK(!size.is(result));
+ __ SmiTag(size);
+ __ push(size);
+ } else {
+ int32_t size = ToInteger32(LConstantOperand::cast(instr->size()));
+#if !V8_TARGET_ARCH_S390X
+ if (size >= 0 && size <= Smi::kMaxValue) {
+#endif
+ __ Push(Smi::FromInt(size));
+#if !V8_TARGET_ARCH_S390X
+ } else {
+ // We should never get here at runtime => abort
+ __ stop("invalid allocation size");
+ return;
+ }
+#endif
+ }
+
+ int flags = AllocateDoubleAlignFlag::encode(
+ instr->hydrogen()->MustAllocateDoubleAligned());
+ if (instr->hydrogen()->IsOldSpaceAllocation()) {
+ DCHECK(!instr->hydrogen()->IsNewSpaceAllocation());
+ flags = AllocateTargetSpace::update(flags, OLD_SPACE);
+ } else {
+ flags = AllocateTargetSpace::update(flags, NEW_SPACE);
+ }
+ __ Push(Smi::FromInt(flags));
+
+ CallRuntimeFromDeferred(Runtime::kAllocateInTargetSpace, 2, instr,
+ instr->context());
+ __ StoreToSafepointRegisterSlot(r2, result);
+}
+
+
+void LCodeGen::DoToFastProperties(LToFastProperties* instr) {
+ DCHECK(ToRegister(instr->value()).is(r2));
+ __ push(r2);
+ CallRuntime(Runtime::kToFastProperties, 1, instr);
+}
+
+
+void LCodeGen::DoRegExpLiteral(LRegExpLiteral* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ Label materialized;
+ // Registers will be used as follows:
+ // r9 = literals array.
+ // r3 = regexp literal.
+ // r2 = regexp literal clone.
+ // r4 and r6-r8 are used as temporaries.
+ int literal_offset =
+ FixedArray::OffsetOfElementAt(instr->hydrogen()->literal_index());
+ __ Move(r9, instr->hydrogen()->literals());
+ __ LoadP(r3, FieldMemOperand(r9, literal_offset));
+ __ CompareRoot(r3, Heap::kUndefinedValueRootIndex);
+ __ bne(&materialized);
+
+ // Create regexp literal using runtime function
+ // Result will be in r2.
+ __ LoadSmiLiteral(r8, Smi::FromInt(instr->hydrogen()->literal_index()));
+ __ mov(r7, Operand(instr->hydrogen()->pattern()));
+ __ mov(r6, Operand(instr->hydrogen()->flags()));
+ __ Push(r9, r8, r7, r6);
+ CallRuntime(Runtime::kMaterializeRegExpLiteral, 4, instr);
+ __ LoadRR(r3, r2);
+
+ __ bind(&materialized);
+ int size = JSRegExp::kSize + JSRegExp::kInObjectFieldCount * kPointerSize;
+ Label allocated, runtime_allocate;
+
+ __ Allocate(size, r2, r4, r5, &runtime_allocate, TAG_OBJECT);
+ __ b(&allocated);
+
+ __ bind(&runtime_allocate);
+ __ LoadSmiLiteral(r2, Smi::FromInt(size));
+ __ Push(r3, r2);
+ CallRuntime(Runtime::kAllocateInNewSpace, 1, instr);
+ __ pop(r3);
+
+ __ bind(&allocated);
+ // Copy the content into the newly allocated memory.
+ __ CopyFields(r2, r3, r4.bit(), size / kPointerSize);
+}
+
+
+void LCodeGen::DoFunctionLiteral(LFunctionLiteral* instr) {
+ DCHECK(ToRegister(instr->context()).is(cp));
+ // Use the fast case closure allocation code that allocates in new
+ // space for nested functions that don't need literals cloning.
+ bool pretenure = instr->hydrogen()->pretenure();
+ if (!pretenure && instr->hydrogen()->has_no_literals()) {
+ FastNewClosureStub stub(isolate(), instr->hydrogen()->language_mode(),
+ instr->hydrogen()->kind());
+ __ mov(r4, Operand(instr->hydrogen()->shared_info()));
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ } else {
+ __ mov(r4, Operand(instr->hydrogen()->shared_info()));
+ __ mov(r3, Operand(pretenure ? factory()->true_value()
+ : factory()->false_value()));
+ __ Push(cp, r4, r3);
+ CallRuntime(Runtime::kNewClosure, 3, instr);
+ }
+}
+
+
+void LCodeGen::DoTypeof(LTypeof* instr) {
+ DCHECK(ToRegister(instr->value()).is(r5));
+ DCHECK(ToRegister(instr->result()).is(r2));
+ Label end, do_call;
+ Register value_register = ToRegister(instr->value());
+ __ JumpIfNotSmi(value_register, &do_call);
+ __ mov(r2, Operand(isolate()->factory()->number_string()));
+ __ b(&end);
+ __ bind(&do_call);
+ TypeofStub stub(isolate());
+ CallCode(stub.GetCode(), RelocInfo::CODE_TARGET, instr);
+ __ bind(&end);
+}
+
+
+void LCodeGen::DoTypeofIsAndBranch(LTypeofIsAndBranch* instr) {
+ Register input = ToRegister(instr->value());
+
+ Condition final_branch_condition =
+ EmitTypeofIs(instr->TrueLabel(chunk_), instr->FalseLabel(chunk_), input,
+ instr->type_literal());
+ if (final_branch_condition != kNoCondition) {
+ EmitBranch(instr, final_branch_condition);
+ }
+}
+
+
+Condition LCodeGen::EmitTypeofIs(Label* true_label, Label* false_label,
+ Register input, Handle<String> type_name) {
+ Condition final_branch_condition = kNoCondition;
+ Register scratch = scratch0();
+ Factory* factory = isolate()->factory();
+ if (String::Equals(type_name, factory->number_string())) {
+ __ JumpIfSmi(input, true_label);
+ __ LoadP(scratch, FieldMemOperand(input, HeapObject::kMapOffset));
+ __ CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);
+ final_branch_condition = eq;
+
+ } else if (String::Equals(type_name, factory->string_string())) {
+ __ JumpIfSmi(input, false_label);
+ __ CompareObjectType(input, scratch, no_reg, FIRST_NONSTRING_TYPE);
+ __ bge(false_label, Label::kNear);
+ __ LoadlB(scratch, FieldMemOperand(scratch, Map::kBitFieldOffset));
+ __ ExtractBit(r0, scratch, Map::kIsUndetectable);
+ __ CmpP(r0, Operand::Zero());
+ final_branch_condition = eq;
+
+ } else if (String::Equals(type_name, factory->symbol_string())) {
+ __ JumpIfSmi(input, false_label);
+ __ CompareObjectType(input, scratch, no_reg, SYMBOL_TYPE);
+ final_branch_condition = eq;
+
+ } else if (String::Equals(type_name, factory->boolean_string())) {
+ __ CompareRoot(input, Heap::kTrueValueRootIndex);
+ __ beq(true_label);
+ __ CompareRoot(input, Heap::kFalseValueRootIndex);
+ final_branch_condition = eq;
+
+ } else if (String::Equals(type_name, factory->undefined_string())) {
+ __ CompareRoot(input, Heap::kUndefinedValueRootIndex);
+ __ beq(true_label);
+ __ JumpIfSmi(input, false_label);
+ // Check for undetectable objects => true.
+ __ LoadP(scratch, FieldMemOperand(input, HeapObject::kMapOffset));
+ __ LoadlB(scratch, FieldMemOperand(scratch, Map::kBitFieldOffset));
+ __ ExtractBit(r0, scratch, Map::kIsUndetectable);
+ __ CmpP(r0, Operand::Zero());
+ final_branch_condition = ne;
+
+ } else if (String::Equals(type_name, factory->function_string())) {
+ STATIC_ASSERT(NUM_OF_CALLABLE_SPEC_OBJECT_TYPES == 2);
+ Register type_reg = scratch;
+ __ JumpIfSmi(input, false_label);
+ __ CompareObjectType(input, scratch, type_reg, JS_FUNCTION_TYPE);
+ __ beq(true_label, Label::kNear);
+ __ CmpP(type_reg, Operand(JS_FUNCTION_PROXY_TYPE));
+ final_branch_condition = eq;
+
+ } else if (String::Equals(type_name, factory->object_string())) {
+ Register map = scratch;
+ __ JumpIfSmi(input, false_label);
+ __ CompareRoot(input, Heap::kNullValueRootIndex);
+ __ beq(true_label);
+ __ CheckObjectTypeRange(input, map,
+ FIRST_NONCALLABLE_SPEC_OBJECT_TYPE,
+ LAST_NONCALLABLE_SPEC_OBJECT_TYPE,
+ false_label);
+ // Check for undetectable objects => false.
+ __ LoadlB(scratch, FieldMemOperand(map, Map::kBitFieldOffset));
+ __ ExtractBit(r0, scratch, Map::kIsUndetectable);
+ __ CmpP(r0, Operand::Zero());
+ final_branch_condition = eq;
+
+ } else {
+ __ b(false_label);
+ }
+
+ return final_branch_condition;
+}
+
+
+void LCodeGen::DoIsConstructCallAndBranch(LIsConstructCallAndBranch* instr) {
+ Register temp1 = ToRegister(instr->temp());
+
+ EmitIsConstructCall(temp1, scratch0());
+ EmitBranch(instr, eq);
+}
+
+
+void LCodeGen::EmitIsConstructCall(Register temp1, Register temp2) {
+ DCHECK(!temp1.is(temp2));
+ // Get the frame pointer for the calling frame.
+ __ LoadP(temp1, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+
+ // Skip the arguments adaptor frame if it exists.
+ Label check_frame_marker;
+ __ LoadP(temp2, MemOperand(temp1, StandardFrameConstants::kContextOffset));
+ __ CmpSmiLiteral(temp2, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
+ __ bne(&check_frame_marker);
+ __ LoadP(temp1, MemOperand(temp1, StandardFrameConstants::kCallerFPOffset));
+
+ // Check the marker in the calling frame.
+ __ bind(&check_frame_marker);
+ __ LoadP(temp1, MemOperand(temp1, StandardFrameConstants::kMarkerOffset));
+ __ CmpSmiLiteral(temp1, Smi::FromInt(StackFrame::CONSTRUCT), r0);
+}
+
+
+void LCodeGen::EnsureSpaceForLazyDeopt(int space_needed) {
+ if (!info()->IsStub()) {
+ // Ensure that we have enough space after the previous lazy-bailout
+ // instruction for patching the code here.
+ int current_pc = masm()->pc_offset();
+ if (current_pc < last_lazy_deopt_pc_ + space_needed) {
+ int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
+ DCHECK_EQ(0, padding_size % 2);
+ while (padding_size > 0) {
+ __ nop();
+ padding_size -= 2;
+ }
+ }
+ }
+ last_lazy_deopt_pc_ = masm()->pc_offset();
+}
+
+
+void LCodeGen::DoLazyBailout(LLazyBailout* instr) {
+ last_lazy_deopt_pc_ = masm()->pc_offset();
+ DCHECK(instr->HasEnvironment());
+ LEnvironment* env = instr->environment();
+ RegisterEnvironmentForDeoptimization(env, Safepoint::kLazyDeopt);
+ safepoints_.RecordLazyDeoptimizationIndex(env->deoptimization_index());
+}
+
+
+void LCodeGen::DoDeoptimize(LDeoptimize* instr) {
+ Deoptimizer::BailoutType type = instr->hydrogen()->type();
+ // TODO(danno): Stubs expect all deopts to be lazy for historical reasons (the
+ // needed return address), even though the implementation of LAZY and EAGER is
+ // now identical. When LAZY is eventually completely folded into EAGER, remove
+ // the special case below.
+ if (info()->IsStub() && type == Deoptimizer::EAGER) {
+ type = Deoptimizer::LAZY;
+ }
+
+ DeoptimizeIf(al, instr, instr->hydrogen()->reason(), type);
+}
+
+
+void LCodeGen::DoDummy(LDummy* instr) {
+ // Nothing to see here, move on!
+}
+
+
+void LCodeGen::DoDummyUse(LDummyUse* instr) {
+ // Nothing to see here, move on!
+}
+
+
+void LCodeGen::DoDeferredStackCheck(LStackCheck* instr) {
+ PushSafepointRegistersScope scope(this);
+ LoadContextFromDeferred(instr->context());
+ __ CallRuntimeSaveDoubles(Runtime::kStackGuard);
+ RecordSafepointWithLazyDeopt(
+ instr, RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS);
+ DCHECK(instr->HasEnvironment());
+ LEnvironment* env = instr->environment();
+ safepoints_.RecordLazyDeoptimizationIndex(env->deoptimization_index());
+}
+
+
+void LCodeGen::DoStackCheck(LStackCheck* instr) {
+ class DeferredStackCheck final : public LDeferredCode {
+ public:
+ DeferredStackCheck(LCodeGen* codegen, LStackCheck* instr)
+ : LDeferredCode(codegen), instr_(instr) {}
+ void Generate() override { codegen()->DoDeferredStackCheck(instr_); }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LStackCheck* instr_;
+ };
+
+ DCHECK(instr->HasEnvironment());
+ LEnvironment* env = instr->environment();
+ // There is no LLazyBailout instruction for stack-checks. We have to
+ // prepare for lazy deoptimization explicitly here.
+ if (instr->hydrogen()->is_function_entry()) {
+ // Perform stack overflow check.
+ Label done;
+ __ CmpLogicalP(sp, RootMemOperand(Heap::kStackLimitRootIndex));
+ __ bge(&done, Label::kNear);
+ DCHECK(instr->context()->IsRegister());
+ DCHECK(ToRegister(instr->context()).is(cp));
+ CallCode(isolate()->builtins()->StackCheck(), RelocInfo::CODE_TARGET,
+ instr);
+ __ bind(&done);
+ } else {
+ DCHECK(instr->hydrogen()->is_backwards_branch());
+ // Perform stack overflow check if this goto needs it before jumping.
+ DeferredStackCheck* deferred_stack_check =
+ new (zone()) DeferredStackCheck(this, instr);
+ __ CmpLogicalP(sp, RootMemOperand(Heap::kStackLimitRootIndex));
+ __ blt(deferred_stack_check->entry());
+ EnsureSpaceForLazyDeopt(Deoptimizer::patch_size());
+ __ bind(instr->done_label());
+ deferred_stack_check->SetExit(instr->done_label());
+ RegisterEnvironmentForDeoptimization(env, Safepoint::kLazyDeopt);
+ // Don't record a deoptimization index for the safepoint here.
+ // This will be done explicitly when emitting call and the safepoint in
+ // the deferred code.
+ }
+}
+
+
+void LCodeGen::DoOsrEntry(LOsrEntry* instr) {
+ // This is a pseudo-instruction that ensures that the environment here is
+ // properly registered for deoptimization and records the assembler's PC
+ // offset.
+ LEnvironment* environment = instr->environment();
+
+ // If the environment were already registered, we would have no way of
+ // backpatching it with the spill slot operands.
+ DCHECK(!environment->HasBeenRegistered());
+ RegisterEnvironmentForDeoptimization(environment, Safepoint::kNoLazyDeopt);
+
+ GenerateOsrPrologue();
+}
+
+
+void LCodeGen::DoForInPrepareMap(LForInPrepareMap* instr) {
+ __ TestIfSmi(r2);
+ DeoptimizeIf(eq, instr, Deoptimizer::kSmi, cr0);
+
+ STATIC_ASSERT(FIRST_JS_PROXY_TYPE == FIRST_SPEC_OBJECT_TYPE);
+ __ CompareObjectType(r2, r3, r3, LAST_JS_PROXY_TYPE);
+ DeoptimizeIf(le, instr, Deoptimizer::kWrongInstanceType);
+
+ Label use_cache, call_runtime;
+ Register null_value = r7;
+ __ LoadRoot(null_value, Heap::kNullValueRootIndex);
+ __ CheckEnumCache(null_value, &call_runtime);
+
+ __ LoadP(r2, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ b(&use_cache);
+
+ // Get the set of properties to enumerate.
+ __ bind(&call_runtime);
+ __ push(r2);
+ CallRuntime(Runtime::kGetPropertyNamesFast, 1, instr);
+
+ __ LoadP(r3, FieldMemOperand(r2, HeapObject::kMapOffset));
+ __ CompareRoot(r3, Heap::kMetaMapRootIndex);
+ DeoptimizeIf(ne, instr, Deoptimizer::kWrongMap);
+ __ bind(&use_cache);
+}
+
+
+void LCodeGen::DoForInCacheArray(LForInCacheArray* instr) {
+ Register map = ToRegister(instr->map());
+ Register result = ToRegister(instr->result());
+ Label load_cache, done;
+ __ EnumLength(result, map);
+ __ CmpSmiLiteral(result, Smi::FromInt(0), r0);
+ __ bne(&load_cache, Label::kNear);
+ __ mov(result, Operand(isolate()->factory()->empty_fixed_array()));
+ __ b(&done, Label::kNear);
+
+ __ bind(&load_cache);
+ __ LoadInstanceDescriptors(map, result);
+ __ LoadP(result, FieldMemOperand(result, DescriptorArray::kEnumCacheOffset));
+ __ LoadP(result, FieldMemOperand(result, FixedArray::SizeFor(instr->idx())));
+ __ CmpP(result, Operand::Zero());
+ DeoptimizeIf(eq, instr, Deoptimizer::kNoCache);
+
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoCheckMapValue(LCheckMapValue* instr) {
+ Register object = ToRegister(instr->value());
+ Register map = ToRegister(instr->map());
+ __ LoadP(scratch0(), FieldMemOperand(object, HeapObject::kMapOffset));
+ __ CmpP(map, scratch0());
+ DeoptimizeIf(ne, instr, Deoptimizer::kWrongMap);
+}
+
+
+void LCodeGen::DoDeferredLoadMutableDouble(LLoadFieldByIndex* instr,
+ Register result, Register object,
+ Register index) {
+ PushSafepointRegistersScope scope(this);
+ __ Push(object, index);
+ __ LoadImmP(cp, Operand::Zero());
+ __ CallRuntimeSaveDoubles(Runtime::kLoadMutableDouble);
+ RecordSafepointWithRegisters(instr->pointer_map(), 2,
+ Safepoint::kNoLazyDeopt);
+ __ StoreToSafepointRegisterSlot(r2, result);
+}
+
+
+void LCodeGen::DoLoadFieldByIndex(LLoadFieldByIndex* instr) {
+ class DeferredLoadMutableDouble final : public LDeferredCode {
+ public:
+ DeferredLoadMutableDouble(LCodeGen* codegen, LLoadFieldByIndex* instr,
+ Register result, Register object, Register index)
+ : LDeferredCode(codegen),
+ instr_(instr),
+ result_(result),
+ object_(object),
+ index_(index) {}
+ void Generate() override {
+ codegen()->DoDeferredLoadMutableDouble(instr_, result_, object_, index_);
+ }
+ LInstruction* instr() override { return instr_; }
+
+ private:
+ LLoadFieldByIndex* instr_;
+ Register result_;
+ Register object_;
+ Register index_;
+ };
+
+ Register object = ToRegister(instr->object());
+ Register index = ToRegister(instr->index());
+ Register result = ToRegister(instr->result());
+ Register scratch = scratch0();
+
+ DeferredLoadMutableDouble* deferred;
+ deferred = new (zone())
+ DeferredLoadMutableDouble(this, instr, result, object, index);
+
+ Label out_of_object, done;
+
+ __ TestBitMask(index, reinterpret_cast<uintptr_t>(Smi::FromInt(1)), r0);
+ __ bne(deferred->entry());
+ __ ShiftRightArithP(index, index, Operand(1));
+
+ __ CmpP(index, Operand::Zero());
+ __ blt(&out_of_object, Label::kNear);
+
+ __ SmiToPtrArrayOffset(r0, index);
+ __ AddP(scratch, object, r0);
+ __ LoadP(result, FieldMemOperand(scratch, JSObject::kHeaderSize));
+
+ __ b(&done, Label::kNear);
+
+ __ bind(&out_of_object);
+ __ LoadP(result, FieldMemOperand(object, JSObject::kPropertiesOffset));
+ // Index is equal to negated out of object property index plus 1.
+ __ SmiToPtrArrayOffset(r0, index);
+ __ SubP(scratch, result, r0);
+ __ LoadP(result,
+ FieldMemOperand(scratch, FixedArray::kHeaderSize - kPointerSize));
+ __ bind(deferred->exit());
+ __ bind(&done);
+}
+
+
+void LCodeGen::DoStoreFrameContext(LStoreFrameContext* instr) {
+ Register context = ToRegister(instr->context());
+ __ StoreP(context, MemOperand(fp, StandardFrameConstants::kContextOffset));
+}
+
+
+void LCodeGen::DoAllocateBlockContext(LAllocateBlockContext* instr) {
+ Handle<ScopeInfo> scope_info = instr->scope_info();
+ __ Push(scope_info);
+ __ push(ToRegister(instr->function()));
+ CallRuntime(Runtime::kPushBlockContext, 2, instr);
+ RecordSafepoint(Safepoint::kNoLazyDeopt);
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
--- /dev/null
+++ b/deps/v8/src/s390/lithium-codegen-s390.h
@@ -0,0 +1,374 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_LITHIUM_CODEGEN_S390_H_
+#define V8_S390_LITHIUM_CODEGEN_S390_H_
+
+#include "src/deoptimizer.h"
+#include "src/lithium-codegen.h"
+#include "src/s390/lithium-gap-resolver-s390.h"
+#include "src/s390/lithium-s390.h"
+#include "src/safepoint-table.h"
+#include "src/scopes.h"
+#include "src/utils.h"
+
+namespace v8 {
+namespace internal {
+
+// Forward declarations.
+class LDeferredCode;
+class SafepointGenerator;
+
+class LCodeGen : public LCodeGenBase {
+ public:
+ LCodeGen(LChunk* chunk, MacroAssembler* assembler, CompilationInfo* info)
+ : LCodeGenBase(chunk, assembler, info),
+ deoptimizations_(4, info->zone()),
+ jump_table_(4, info->zone()),
+ inlined_function_count_(0),
+ scope_(info->scope()),
+ translations_(info->zone()),
+ deferred_(8, info->zone()),
+ osr_pc_offset_(-1),
+ frame_is_built_(false),
+ safepoints_(info->zone()),
+ resolver_(this),
+ expected_safepoint_kind_(Safepoint::kSimple) {
+ PopulateDeoptimizationLiteralsWithInlinedFunctions();
+ }
+
+
+ int LookupDestination(int block_id) const {
+ return chunk()->LookupDestination(block_id);
+ }
+
+ bool IsNextEmittedBlock(int block_id) const {
+ return LookupDestination(block_id) == GetNextEmittedBlock();
+ }
+
+ bool NeedsEagerFrame() const {
+ return GetStackSlotCount() > 0 || info()->is_non_deferred_calling() ||
+ !info()->IsStub() || info()->requires_frame();
+ }
+ bool NeedsDeferredFrame() const {
+ return !NeedsEagerFrame() && info()->is_deferred_calling();
+ }
+
+ LinkRegisterStatus GetLinkRegisterState() const {
+ return frame_is_built_ ? kLRHasBeenSaved : kLRHasNotBeenSaved;
+ }
+
+ // Support for converting LOperands to assembler types.
+ // LOperand must be a register.
+ Register ToRegister(LOperand* op) const;
+
+ // LOperand is loaded into scratch, unless already a register.
+ Register EmitLoadRegister(LOperand* op, Register scratch);
+
+ // LConstantOperand must be an Integer32 or Smi
+ void EmitLoadIntegerConstant(LConstantOperand* const_op, Register dst);
+
+ // LOperand must be a double register.
+ DoubleRegister ToDoubleRegister(LOperand* op) const;
+
+ intptr_t ToRepresentation(LConstantOperand* op,
+ const Representation& r) const;
+ int32_t ToInteger32(LConstantOperand* op) const;
+ Smi* ToSmi(LConstantOperand* op) const;
+ double ToDouble(LConstantOperand* op) const;
+ Operand ToOperand(LOperand* op);
+ MemOperand ToMemOperand(LOperand* op) const;
+ // Returns a MemOperand pointing to the high word of a DoubleStackSlot.
+ MemOperand ToHighMemOperand(LOperand* op) const;
+
+ bool IsInteger32(LConstantOperand* op) const;
+ bool IsSmi(LConstantOperand* op) const;
+ Handle<Object> ToHandle(LConstantOperand* op) const;
+
+ // Try to generate code for the entire chunk, but it may fail if the
+ // chunk contains constructs we cannot handle. Returns true if the
+ // code generation attempt succeeded.
+ bool GenerateCode();
+
+ // Finish the code by setting stack height, safepoint, and bailout
+ // information on it.
+ void FinishCode(Handle<Code> code);
+
+ // Deferred code support.
+ void DoDeferredNumberTagD(LNumberTagD* instr);
+
+ enum IntegerSignedness { SIGNED_INT32, UNSIGNED_INT32 };
+ void DoDeferredNumberTagIU(LInstruction* instr, LOperand* value,
+ LOperand* temp1, LOperand* temp2,
+ IntegerSignedness signedness);
+
+ void DoDeferredTaggedToI(LTaggedToI* instr);
+ void DoDeferredMathAbsTaggedHeapNumber(LMathAbs* instr);
+ void DoDeferredStackCheck(LStackCheck* instr);
+ void DoDeferredMaybeGrowElements(LMaybeGrowElements* instr);
+ void DoDeferredStringCharCodeAt(LStringCharCodeAt* instr);
+ void DoDeferredStringCharFromCode(LStringCharFromCode* instr);
+ void DoDeferredAllocate(LAllocate* instr);
+ void DoDeferredInstanceOfKnownGlobal(LInstanceOfKnownGlobal* instr,
+ Label* map_check, Label* bool_load);
+ void DoDeferredInstanceMigration(LCheckMaps* instr, Register object);
+ void DoDeferredLoadMutableDouble(LLoadFieldByIndex* instr, Register result,
+ Register object, Register index);
+
+ // Parallel move support.
+ void DoParallelMove(LParallelMove* move);
+ void DoGap(LGap* instr);
+
+ MemOperand PrepareKeyedOperand(Register key, Register base,
+ bool key_is_constant, bool key_is_tagged,
+ int constant_key, int element_size_shift,
+ int base_offset,
+ bool keyMaybeNegative = true);
+
+ // Emit frame translation commands for an environment.
+ void WriteTranslation(LEnvironment* environment, Translation* translation);
+
+ // Declare methods that deal with the individual node types.
+#define DECLARE_DO(type) void Do##type(L##type* node);
+ LITHIUM_CONCRETE_INSTRUCTION_LIST(DECLARE_DO)
+#undef DECLARE_DO
+
+ private:
+ LanguageMode language_mode() const { return info()->language_mode(); }
+
+ Scope* scope() const { return scope_; }
+
+ Register scratch0() { return r1; }
+ DoubleRegister double_scratch0() { return kScratchDoubleReg; }
+
+ LInstruction* GetNextInstruction();
+
+ void EmitClassOfTest(Label* if_true, Label* if_false,
+ Handle<String> class_name, Register input,
+ Register temporary, Register temporary2);
+
+ int GetStackSlotCount() const { return chunk()->spill_slot_count(); }
+
+ void AddDeferredCode(LDeferredCode* code) { deferred_.Add(code, zone()); }
+
+ void SaveCallerDoubles();
+ void RestoreCallerDoubles();
+
+ // Code generation passes. Returns true if code generation should
+ // continue.
+ void GenerateBodyInstructionPre(LInstruction* instr) override;
+ bool GeneratePrologue();
+ bool GenerateDeferredCode();
+ bool GenerateJumpTable();
+ bool GenerateSafepointTable();
+
+ // Generates the custom OSR entrypoint and sets the osr_pc_offset.
+ void GenerateOsrPrologue();
+
+ enum SafepointMode {
+ RECORD_SIMPLE_SAFEPOINT,
+ RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS
+ };
+
+ void CallCode(Handle<Code> code, RelocInfo::Mode mode, LInstruction* instr);
+
+ void CallCodeGeneric(Handle<Code> code, RelocInfo::Mode mode,
+ LInstruction* instr, SafepointMode safepoint_mode);
+
+ void CallRuntime(const Runtime::Function* function, int num_arguments,
+ LInstruction* instr,
+ SaveFPRegsMode save_doubles = kDontSaveFPRegs);
+
+ void CallRuntime(Runtime::FunctionId id, int num_arguments,
+ LInstruction* instr) {
+ const Runtime::Function* function = Runtime::FunctionForId(id);
+ CallRuntime(function, num_arguments, instr);
+ }
+
+ void LoadContextFromDeferred(LOperand* context);
+ void CallRuntimeFromDeferred(Runtime::FunctionId id, int argc,
+ LInstruction* instr, LOperand* context);
+
+ // Generate a direct call to a known function. Expects the function
+ // to be in r4.
+ void CallKnownFunction(Handle<JSFunction> function,
+ int formal_parameter_count, int arity,
+ LInstruction* instr);
+
+ void RecordSafepointWithLazyDeopt(LInstruction* instr,
+ SafepointMode safepoint_mode);
+
+ void RegisterEnvironmentForDeoptimization(LEnvironment* environment,
+ Safepoint::DeoptMode mode);
+ void DeoptimizeIf(Condition condition, LInstruction* instr,
+ Deoptimizer::DeoptReason deopt_reason,
+ Deoptimizer::BailoutType bailout_type, CRegister cr = cr7);
+ void DeoptimizeIf(Condition condition, LInstruction* instr,
+ Deoptimizer::DeoptReason deopt_reason, CRegister cr = cr7);
+
+ void AddToTranslation(LEnvironment* environment, Translation* translation,
+ LOperand* op, bool is_tagged, bool is_uint32,
+ int* object_index_pointer,
+ int* dematerialized_index_pointer);
+ void PopulateDeoptimizationData(Handle<Code> code);
+
+ void PopulateDeoptimizationLiteralsWithInlinedFunctions();
+
+ Register ToRegister(int index) const;
+ DoubleRegister ToDoubleRegister(int index) const;
+
+ MemOperand BuildSeqStringOperand(Register string, LOperand* index,
+ String::Encoding encoding);
+
+ void EmitMathAbs(LMathAbs* instr);
+#if V8_TARGET_ARCH_S390X
+ void EmitInteger32MathAbs(LMathAbs* instr);
+#endif
+
+ // Support for recording safepoint and position information.
+ void RecordSafepoint(LPointerMap* pointers, Safepoint::Kind kind,
+ int arguments, Safepoint::DeoptMode mode);
+ void RecordSafepoint(LPointerMap* pointers, Safepoint::DeoptMode mode);
+ void RecordSafepoint(Safepoint::DeoptMode mode);
+ void RecordSafepointWithRegisters(LPointerMap* pointers, int arguments,
+ Safepoint::DeoptMode mode);
+
+ void RecordAndWritePosition(int position) override;
+
+ static Condition TokenToCondition(Token::Value op);
+ void EmitGoto(int block);
+
+ // EmitBranch expects to be the last instruction of a block.
+ template <class InstrType>
+ void EmitBranch(InstrType instr, Condition condition, CRegister cr = cr7);
+ template <class InstrType>
+ void EmitFalseBranch(InstrType instr, Condition condition,
+ CRegister cr = cr7);
+ void EmitNumberUntagD(LNumberUntagD* instr, Register input,
+ DoubleRegister result, NumberUntagDMode mode);
+
+ // Emits optimized code for typeof x == "y". Modifies input register.
+ // Returns the condition on which a final split to
+ // true and false label should be made, to optimize fallthrough.
+ Condition EmitTypeofIs(Label* true_label, Label* false_label, Register input,
+ Handle<String> type_name);
+
+ // Emits optimized code for %_IsObject(x). Preserves input register.
+ // Returns the condition on which a final split to
+ // true and false label should be made, to optimize fallthrough.
+ Condition EmitIsObject(Register input, Register temp1, Label* is_not_object,
+ Label* is_object);
+
+ // Emits optimized code for %_IsString(x). Preserves input register.
+ // Returns the condition on which a final split to
+ // true and false label should be made, to optimize fallthrough.
+ Condition EmitIsString(Register input, Register temp1, Label* is_not_string,
+ SmiCheck check_needed);
+
+ // Emits optimized code for %_IsConstructCall().
+ // Caller should branch on equal condition.
+ void EmitIsConstructCall(Register temp1, Register temp2);
+
+ // Emits optimized code to deep-copy the contents of statically known
+ // object graphs (e.g. object literal boilerplate).
+ void EmitDeepCopy(Handle<JSObject> object, Register result, Register source,
+ int* offset, AllocationSiteMode mode);
+
+ void EnsureSpaceForLazyDeopt(int space_needed) override;
+ void DoLoadKeyedExternalArray(LLoadKeyed* instr);
+ void DoLoadKeyedFixedDoubleArray(LLoadKeyed* instr);
+ void DoLoadKeyedFixedArray(LLoadKeyed* instr);
+ void DoStoreKeyedExternalArray(LStoreKeyed* instr);
+ void DoStoreKeyedFixedDoubleArray(LStoreKeyed* instr);
+ void DoStoreKeyedFixedArray(LStoreKeyed* instr);
+
+ template <class T>
+ void EmitVectorLoadICRegisters(T* instr);
+ template <class T>
+ void EmitVectorStoreICRegisters(T* instr);
+
+ ZoneList<LEnvironment*> deoptimizations_;
+ ZoneList<Deoptimizer::JumpTableEntry> jump_table_;
+ int inlined_function_count_;
+ Scope* const scope_;
+ TranslationBuffer translations_;
+ ZoneList<LDeferredCode*> deferred_;
+ int osr_pc_offset_;
+ bool frame_is_built_;
+
+ // Builder that keeps track of safepoints in the code. The table
+ // itself is emitted at the end of the generated code.
+ SafepointTableBuilder safepoints_;
+
+ // Compiler from a set of parallel moves to a sequential list of moves.
+ LGapResolver resolver_;
+
+ Safepoint::Kind expected_safepoint_kind_;
+
+ class PushSafepointRegistersScope final BASE_EMBEDDED {
+ public:
+ explicit PushSafepointRegistersScope(LCodeGen* codegen)
+ : codegen_(codegen) {
+ DCHECK(codegen_->info()->is_calling());
+ DCHECK(codegen_->expected_safepoint_kind_ == Safepoint::kSimple);
+ codegen_->expected_safepoint_kind_ = Safepoint::kWithRegisters;
+ StoreRegistersStateStub stub(codegen_->isolate());
+ codegen_->masm_->CallStub(&stub);
+ }
+
+ ~PushSafepointRegistersScope() {
+ DCHECK(codegen_->expected_safepoint_kind_ == Safepoint::kWithRegisters);
+ RestoreRegistersStateStub stub(codegen_->isolate());
+ codegen_->masm_->CallStub(&stub);
+ codegen_->expected_safepoint_kind_ = Safepoint::kSimple;
+ }
+
+ private:
+ LCodeGen* codegen_;
+ };
+
+ friend class LDeferredCode;
+ friend class LEnvironment;
+ friend class SafepointGenerator;
+ DISALLOW_COPY_AND_ASSIGN(LCodeGen);
+};
+
+
+class LDeferredCode : public ZoneObject {
+ public:
+ explicit LDeferredCode(LCodeGen* codegen)
+ : codegen_(codegen),
+ external_exit_(NULL),
+ instruction_index_(codegen->current_instruction_) {
+ codegen->AddDeferredCode(this);
+ }
+
+ virtual ~LDeferredCode() {}
+ virtual void Generate() = 0;
+ virtual LInstruction* instr() = 0;
+
+ void SetExit(Label* exit) { external_exit_ = exit; }
+ Label* entry() { return &entry_; }
+ Label* exit() { return external_exit_ != NULL ? external_exit_ : &exit_; }
+ int instruction_index() const { return instruction_index_; }
+
+ protected:
+ LCodeGen* codegen() const { return codegen_; }
+ MacroAssembler* masm() const { return codegen_->masm(); }
+
+ private:
+ LCodeGen* codegen_;
+ Label entry_;
+ Label exit_;
+ Label* external_exit_;
+ int instruction_index_;
+};
+
+}
+} // namespace v8::internal
+
+#endif // V8_S390_LITHIUM_CODEGEN_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/lithium-gap-resolver-s390.cc
@@ -0,0 +1,288 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#include "src/s390/lithium-codegen-s390.h"
+#include "src/s390/lithium-gap-resolver-s390.h"
+
+namespace v8 {
+namespace internal {
+
+static const Register kSavedValueRegister = {1};
+
+LGapResolver::LGapResolver(LCodeGen* owner)
+ : cgen_(owner),
+ moves_(32, owner->zone()),
+ root_index_(0),
+ in_cycle_(false),
+ saved_destination_(NULL) {}
+
+
+void LGapResolver::Resolve(LParallelMove* parallel_move) {
+ DCHECK(moves_.is_empty());
+ // Build up a worklist of moves.
+ BuildInitialMoveList(parallel_move);
+
+ for (int i = 0; i < moves_.length(); ++i) {
+ LMoveOperands move = moves_[i];
+ // Skip constants to perform them last. They don't block other moves
+ // and skipping such moves with register destinations keeps those
+ // registers free for the whole algorithm.
+ if (!move.IsEliminated() && !move.source()->IsConstantOperand()) {
+ root_index_ = i; // Any cycle is found when by reaching this move again.
+ PerformMove(i);
+ if (in_cycle_) {
+ RestoreValue();
+ }
+ }
+ }
+
+ // Perform the moves with constant sources.
+ for (int i = 0; i < moves_.length(); ++i) {
+ if (!moves_[i].IsEliminated()) {
+ DCHECK(moves_[i].source()->IsConstantOperand());
+ EmitMove(i);
+ }
+ }
+
+ moves_.Rewind(0);
+}
+
+
+void LGapResolver::BuildInitialMoveList(LParallelMove* parallel_move) {
+ // Perform a linear sweep of the moves to add them to the initial list of
+ // moves to perform, ignoring any move that is redundant (the source is
+ // the same as the destination, the destination is ignored and
+ // unallocated, or the move was already eliminated).
+ const ZoneList<LMoveOperands>* moves = parallel_move->move_operands();
+ for (int i = 0; i < moves->length(); ++i) {
+ LMoveOperands move = moves->at(i);
+ if (!move.IsRedundant()) moves_.Add(move, cgen_->zone());
+ }
+ Verify();
+}
+
+
+void LGapResolver::PerformMove(int index) {
+ // Each call to this function performs a move and deletes it from the move
+ // graph. We first recursively perform any move blocking this one. We
+ // mark a move as "pending" on entry to PerformMove in order to detect
+ // cycles in the move graph.
+
+ // We can only find a cycle, when doing a depth-first traversal of moves,
+ // be encountering the starting move again. So by spilling the source of
+ // the starting move, we break the cycle. All moves are then unblocked,
+ // and the starting move is completed by writing the spilled value to
+ // its destination. All other moves from the spilled source have been
+ // completed prior to breaking the cycle.
+ // An additional complication is that moves to MemOperands with large
+ // offsets (more than 1K or 4K) require us to spill this spilled value to
+ // the stack, to free up the register.
+ DCHECK(!moves_[index].IsPending());
+ DCHECK(!moves_[index].IsRedundant());
+
+ // Clear this move's destination to indicate a pending move. The actual
+ // destination is saved in a stack allocated local. Multiple moves can
+ // be pending because this function is recursive.
+ DCHECK(moves_[index].source() != NULL); // Or else it will look eliminated.
+ LOperand* destination = moves_[index].destination();
+ moves_[index].set_destination(NULL);
+
+ // Perform a depth-first traversal of the move graph to resolve
+ // dependencies. Any unperformed, unpending move with a source the same
+ // as this one's destination blocks this one so recursively perform all
+ // such moves.
+ for (int i = 0; i < moves_.length(); ++i) {
+ LMoveOperands other_move = moves_[i];
+ if (other_move.Blocks(destination) && !other_move.IsPending()) {
+ PerformMove(i);
+ // If there is a blocking, pending move it must be moves_[root_index_]
+ // and all other moves with the same source as moves_[root_index_] are
+ // sucessfully executed (because they are cycle-free) by this loop.
+ }
+ }
+
+ // We are about to resolve this move and don't need it marked as
+ // pending, so restore its destination.
+ moves_[index].set_destination(destination);
+
+ // The move may be blocked on a pending move, which must be the starting move.
+ // In this case, we have a cycle, and we save the source of this move to
+ // a scratch register to break it.
+ LMoveOperands other_move = moves_[root_index_];
+ if (other_move.Blocks(destination)) {
+ DCHECK(other_move.IsPending());
+ BreakCycle(index);
+ return;
+ }
+
+ // This move is no longer blocked.
+ EmitMove(index);
+}
+
+
+void LGapResolver::Verify() {
+#ifdef ENABLE_SLOW_DCHECKS
+ // No operand should be the destination for more than one move.
+ for (int i = 0; i < moves_.length(); ++i) {
+ LOperand* destination = moves_[i].destination();
+ for (int j = i + 1; j < moves_.length(); ++j) {
+ SLOW_DCHECK(!destination->Equals(moves_[j].destination()));
+ }
+ }
+#endif
+}
+
+#define __ ACCESS_MASM(cgen_->masm())
+
+void LGapResolver::BreakCycle(int index) {
+ // We save in a register the value that should end up in the source of
+ // moves_[root_index]. After performing all moves in the tree rooted
+ // in that move, we save the value to that source.
+ DCHECK(moves_[index].destination()->Equals(moves_[root_index_].source()));
+ DCHECK(!in_cycle_);
+ in_cycle_ = true;
+ LOperand* source = moves_[index].source();
+ saved_destination_ = moves_[index].destination();
+ if (source->IsRegister()) {
+ __ LoadRR(kSavedValueRegister, cgen_->ToRegister(source));
+ } else if (source->IsStackSlot()) {
+ __ LoadP(kSavedValueRegister, cgen_->ToMemOperand(source));
+ } else if (source->IsDoubleRegister()) {
+ __ ldr(kScratchDoubleReg, cgen_->ToDoubleRegister(source));
+ } else if (source->IsDoubleStackSlot()) {
+ __ LoadF(kScratchDoubleReg, cgen_->ToMemOperand(source));
+ } else {
+ UNREACHABLE();
+ }
+ // This move will be done by restoring the saved value to the destination.
+ moves_[index].Eliminate();
+}
+
+
+void LGapResolver::RestoreValue() {
+ DCHECK(in_cycle_);
+ DCHECK(saved_destination_ != NULL);
+
+ // Spilled value is in kSavedValueRegister or kSavedDoubleValueRegister.
+ if (saved_destination_->IsRegister()) {
+ __ LoadRR(cgen_->ToRegister(saved_destination_), kSavedValueRegister);
+ } else if (saved_destination_->IsStackSlot()) {
+ __ StoreP(kSavedValueRegister, cgen_->ToMemOperand(saved_destination_));
+ } else if (saved_destination_->IsDoubleRegister()) {
+ __ ldr(cgen_->ToDoubleRegister(saved_destination_), kScratchDoubleReg);
+ } else if (saved_destination_->IsDoubleStackSlot()) {
+ __ StoreF(kScratchDoubleReg, cgen_->ToMemOperand(saved_destination_));
+ } else {
+ UNREACHABLE();
+ }
+
+ in_cycle_ = false;
+ saved_destination_ = NULL;
+}
+
+
+void LGapResolver::EmitMove(int index) {
+ LOperand* source = moves_[index].source();
+ LOperand* destination = moves_[index].destination();
+
+ // Dispatch on the source and destination operand kinds. Not all
+ // combinations are possible.
+
+ if (source->IsRegister()) {
+ Register source_register = cgen_->ToRegister(source);
+ if (destination->IsRegister()) {
+ __ LoadRR(cgen_->ToRegister(destination), source_register);
+ } else {
+ DCHECK(destination->IsStackSlot());
+ __ StoreP(source_register, cgen_->ToMemOperand(destination));
+ }
+ } else if (source->IsStackSlot()) {
+ MemOperand source_operand = cgen_->ToMemOperand(source);
+ if (destination->IsRegister()) {
+ __ LoadP(cgen_->ToRegister(destination), source_operand);
+ } else {
+ DCHECK(destination->IsStackSlot());
+ MemOperand destination_operand = cgen_->ToMemOperand(destination);
+ if (in_cycle_) {
+ __ LoadP(ip, source_operand);
+ __ StoreP(ip, destination_operand);
+ } else {
+ __ LoadP(kSavedValueRegister, source_operand);
+ __ StoreP(kSavedValueRegister, destination_operand);
+ }
+ }
+
+ } else if (source->IsConstantOperand()) {
+ LConstantOperand* constant_source = LConstantOperand::cast(source);
+ if (destination->IsRegister()) {
+ Register dst = cgen_->ToRegister(destination);
+ if (cgen_->IsInteger32(constant_source)) {
+ cgen_->EmitLoadIntegerConstant(constant_source, dst);
+ } else {
+ __ Move(dst, cgen_->ToHandle(constant_source));
+ }
+ } else if (destination->IsDoubleRegister()) {
+ DoubleRegister result = cgen_->ToDoubleRegister(destination);
+ double v = cgen_->ToDouble(constant_source);
+ __ LoadDoubleLiteral(result, v, ip);
+ } else {
+ DCHECK(destination->IsStackSlot());
+ DCHECK(!in_cycle_); // Constant moves happen after all cycles are gone.
+ if (cgen_->IsInteger32(constant_source)) {
+ cgen_->EmitLoadIntegerConstant(constant_source, kSavedValueRegister);
+ } else {
+ __ Move(kSavedValueRegister, cgen_->ToHandle(constant_source));
+ }
+ __ StoreP(kSavedValueRegister, cgen_->ToMemOperand(destination));
+ }
+
+ } else if (source->IsDoubleRegister()) {
+ DoubleRegister source_register = cgen_->ToDoubleRegister(source);
+ if (destination->IsDoubleRegister()) {
+ __ ldr(cgen_->ToDoubleRegister(destination), source_register);
+ } else {
+ DCHECK(destination->IsDoubleStackSlot());
+ __ StoreF(source_register, cgen_->ToMemOperand(destination));
+ }
+
+ } else if (source->IsDoubleStackSlot()) {
+ MemOperand source_operand = cgen_->ToMemOperand(source);
+ if (destination->IsDoubleRegister()) {
+ __ LoadF(cgen_->ToDoubleRegister(destination), source_operand);
+ } else {
+ DCHECK(destination->IsDoubleStackSlot());
+ MemOperand destination_operand = cgen_->ToMemOperand(destination);
+ if (in_cycle_) {
+// kSavedDoubleValueRegister was used to break the cycle,
+// but kSavedValueRegister is free.
+#if V8_TARGET_ARCH_S390X
+ __ lg(kSavedValueRegister, source_operand);
+ __ stg(kSavedValueRegister, destination_operand);
+#else
+ MemOperand source_high_operand = cgen_->ToHighMemOperand(source);
+ MemOperand destination_high_operand =
+ cgen_->ToHighMemOperand(destination);
+ __ LoadlW(kSavedValueRegister, source_operand);
+ __ StoreW(kSavedValueRegister, destination_operand);
+ __ LoadlW(kSavedValueRegister, source_high_operand);
+ __ StoreW(kSavedValueRegister, destination_high_operand);
+#endif
+ } else {
+ __ LoadF(kScratchDoubleReg, source_operand);
+ __ StoreF(kScratchDoubleReg, destination_operand);
+ }
+ }
+ } else {
+ UNREACHABLE();
+ }
+
+ moves_[index].Eliminate();
+}
+
+
+#undef __
+} // namespace internal
+} // namespace v8
--- /dev/null
+++ b/deps/v8/src/s390/lithium-gap-resolver-s390.h
@@ -0,0 +1,64 @@
+// Copyright 2011 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+
+#ifndef V8_S390_LITHIUM_GAP_RESOLVER_S390_H_
+#define V8_S390_LITHIUM_GAP_RESOLVER_S390_H_
+
+#include "src/v8.h"
+
+#include "src/lithium.h"
+
+namespace v8 {
+namespace internal {
+
+class LCodeGen;
+class LGapResolver;
+
+class LGapResolver final BASE_EMBEDDED {
+ public:
+ explicit LGapResolver(LCodeGen* owner);
+
+ // Resolve a set of parallel moves, emitting assembler instructions.
+ void Resolve(LParallelMove* parallel_move);
+
+ private:
+ // Build the initial list of moves.
+ void BuildInitialMoveList(LParallelMove* parallel_move);
+
+ // Perform the move at the moves_ index in question (possibly requiring
+ // other moves to satisfy dependencies).
+ void PerformMove(int index);
+
+ // If a cycle is found in the series of moves, save the blocking value to
+ // a scratch register. The cycle must be found by hitting the root of the
+ // depth-first search.
+ void BreakCycle(int index);
+
+ // After a cycle has been resolved, restore the value from the scratch
+ // register to its proper destination.
+ void RestoreValue();
+
+ // Emit a move and remove it from the move graph.
+ void EmitMove(int index);
+
+ // Verify the move list before performing moves.
+ void Verify();
+
+ LCodeGen* cgen_;
+
+ // List of moves not yet resolved.
+ ZoneList<LMoveOperands> moves_;
+
+ int root_index_;
+ bool in_cycle_;
+ LOperand* saved_destination_;
+};
+}
+} // namespace v8::internal
+
+#endif // V8_S390_LITHIUM_GAP_RESOLVER_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/lithium-s390.cc
@@ -0,0 +1,2648 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include <sstream>
+
+#include "src/v8.h"
+
+#include "src/hydrogen-osr.h"
+#include "src/lithium-inl.h"
+#include "src/s390/lithium-codegen-s390.h"
+
+namespace v8 {
+namespace internal {
+
+#define DEFINE_COMPILE(type) \
+ void L##type::CompileToNative(LCodeGen* generator) { \
+ generator->Do##type(this); \
+ }
+LITHIUM_CONCRETE_INSTRUCTION_LIST(DEFINE_COMPILE)
+#undef DEFINE_COMPILE
+
+#ifdef DEBUG
+void LInstruction::VerifyCall() {
+ // Call instructions can use only fixed registers as temporaries and
+ // outputs because all registers are blocked by the calling convention.
+ // Inputs operands must use a fixed register or use-at-start policy or
+ // a non-register policy.
+ DCHECK(Output() == NULL || LUnallocated::cast(Output())->HasFixedPolicy() ||
+ !LUnallocated::cast(Output())->HasRegisterPolicy());
+ for (UseIterator it(this); !it.Done(); it.Advance()) {
+ LUnallocated* operand = LUnallocated::cast(it.Current());
+ DCHECK(operand->HasFixedPolicy() || operand->IsUsedAtStart());
+ }
+ for (TempIterator it(this); !it.Done(); it.Advance()) {
+ LUnallocated* operand = LUnallocated::cast(it.Current());
+ DCHECK(operand->HasFixedPolicy() || !operand->HasRegisterPolicy());
+ }
+}
+#endif
+
+
+void LInstruction::PrintTo(StringStream* stream) {
+ stream->Add("%s ", this->Mnemonic());
+
+ PrintOutputOperandTo(stream);
+
+ PrintDataTo(stream);
+
+ if (HasEnvironment()) {
+ stream->Add(" ");
+ environment()->PrintTo(stream);
+ }
+
+ if (HasPointerMap()) {
+ stream->Add(" ");
+ pointer_map()->PrintTo(stream);
+ }
+}
+
+
+void LInstruction::PrintDataTo(StringStream* stream) {
+ stream->Add("= ");
+ for (int i = 0; i < InputCount(); i++) {
+ if (i > 0) stream->Add(" ");
+ if (InputAt(i) == NULL) {
+ stream->Add("NULL");
+ } else {
+ InputAt(i)->PrintTo(stream);
+ }
+ }
+}
+
+
+void LInstruction::PrintOutputOperandTo(StringStream* stream) {
+ if (HasResult()) result()->PrintTo(stream);
+}
+
+
+void LLabel::PrintDataTo(StringStream* stream) {
+ LGap::PrintDataTo(stream);
+ LLabel* rep = replacement();
+ if (rep != NULL) {
+ stream->Add(" Dead block replaced with B%d", rep->block_id());
+ }
+}
+
+
+bool LGap::IsRedundant() const {
+ for (int i = 0; i < 4; i++) {
+ if (parallel_moves_[i] != NULL && !parallel_moves_[i]->IsRedundant()) {
+ return false;
+ }
+ }
+
+ return true;
+}
+
+
+void LGap::PrintDataTo(StringStream* stream) {
+ for (int i = 0; i < 4; i++) {
+ stream->Add("(");
+ if (parallel_moves_[i] != NULL) {
+ parallel_moves_[i]->PrintDataTo(stream);
+ }
+ stream->Add(") ");
+ }
+}
+
+
+const char* LArithmeticD::Mnemonic() const {
+ switch (op()) {
+ case Token::ADD:
+ return "add-d";
+ case Token::SUB:
+ return "sub-d";
+ case Token::MUL:
+ return "mul-d";
+ case Token::DIV:
+ return "div-d";
+ case Token::MOD:
+ return "mod-d";
+ default:
+ UNREACHABLE();
+ return NULL;
+ }
+}
+
+
+const char* LArithmeticT::Mnemonic() const {
+ switch (op()) {
+ case Token::ADD:
+ return "add-t";
+ case Token::SUB:
+ return "sub-t";
+ case Token::MUL:
+ return "mul-t";
+ case Token::MOD:
+ return "mod-t";
+ case Token::DIV:
+ return "div-t";
+ case Token::BIT_AND:
+ return "bit-and-t";
+ case Token::BIT_OR:
+ return "bit-or-t";
+ case Token::BIT_XOR:
+ return "bit-xor-t";
+ case Token::ROR:
+ return "ror-t";
+ case Token::SHL:
+ return "shl-t";
+ case Token::SAR:
+ return "sar-t";
+ case Token::SHR:
+ return "shr-t";
+ default:
+ UNREACHABLE();
+ return NULL;
+ }
+}
+
+
+bool LGoto::HasInterestingComment(LCodeGen* gen) const {
+ return !gen->IsNextEmittedBlock(block_id());
+}
+
+
+void LGoto::PrintDataTo(StringStream* stream) {
+ stream->Add("B%d", block_id());
+}
+
+
+void LBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("B%d | B%d on ", true_block_id(), false_block_id());
+ value()->PrintTo(stream);
+}
+
+
+void LCompareNumericAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if ");
+ left()->PrintTo(stream);
+ stream->Add(" %s ", Token::String(op()));
+ right()->PrintTo(stream);
+ stream->Add(" then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LIsObjectAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if is_object(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LIsStringAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if is_string(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LIsSmiAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if is_smi(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LIsUndetectableAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if is_undetectable(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LStringCompareAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if string_compare(");
+ left()->PrintTo(stream);
+ right()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LHasInstanceTypeAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if has_instance_type(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LHasCachedArrayIndexAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if has_cached_array_index(");
+ value()->PrintTo(stream);
+ stream->Add(") then B%d else B%d", true_block_id(), false_block_id());
+}
+
+
+void LClassOfTestAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if class_of_test(");
+ value()->PrintTo(stream);
+ stream->Add(", \"%o\") then B%d else B%d", *hydrogen()->class_name(),
+ true_block_id(), false_block_id());
+}
+
+
+void LTypeofIsAndBranch::PrintDataTo(StringStream* stream) {
+ stream->Add("if typeof ");
+ value()->PrintTo(stream);
+ stream->Add(" == \"%s\" then B%d else B%d",
+ hydrogen()->type_literal()->ToCString().get(), true_block_id(),
+ false_block_id());
+}
+
+
+void LStoreCodeEntry::PrintDataTo(StringStream* stream) {
+ stream->Add(" = ");
+ function()->PrintTo(stream);
+ stream->Add(".code_entry = ");
+ code_object()->PrintTo(stream);
+}
+
+
+void LInnerAllocatedObject::PrintDataTo(StringStream* stream) {
+ stream->Add(" = ");
+ base_object()->PrintTo(stream);
+ stream->Add(" + ");
+ offset()->PrintTo(stream);
+}
+
+
+void LCallFunction::PrintDataTo(StringStream* stream) {
+ context()->PrintTo(stream);
+ stream->Add(" ");
+ function()->PrintTo(stream);
+ if (hydrogen()->HasVectorAndSlot()) {
+ stream->Add(" (type-feedback-vector ");
+ temp_vector()->PrintTo(stream);
+ stream->Add(" ");
+ temp_slot()->PrintTo(stream);
+ stream->Add(")");
+ }
+}
+
+
+void LCallJSFunction::PrintDataTo(StringStream* stream) {
+ stream->Add("= ");
+ function()->PrintTo(stream);
+ stream->Add("#%d / ", arity());
+}
+
+
+void LCallWithDescriptor::PrintDataTo(StringStream* stream) {
+ for (int i = 0; i < InputCount(); i++) {
+ InputAt(i)->PrintTo(stream);
+ stream->Add(" ");
+ }
+ stream->Add("#%d / ", arity());
+}
+
+
+void LLoadContextSlot::PrintDataTo(StringStream* stream) {
+ context()->PrintTo(stream);
+ stream->Add("[%d]", slot_index());
+}
+
+
+void LStoreContextSlot::PrintDataTo(StringStream* stream) {
+ context()->PrintTo(stream);
+ stream->Add("[%d] <- ", slot_index());
+ value()->PrintTo(stream);
+}
+
+
+void LInvokeFunction::PrintDataTo(StringStream* stream) {
+ stream->Add("= ");
+ function()->PrintTo(stream);
+ stream->Add(" #%d / ", arity());
+}
+
+
+void LCallNew::PrintDataTo(StringStream* stream) {
+ stream->Add("= ");
+ constructor()->PrintTo(stream);
+ stream->Add(" #%d / ", arity());
+}
+
+
+void LCallNewArray::PrintDataTo(StringStream* stream) {
+ stream->Add("= ");
+ constructor()->PrintTo(stream);
+ stream->Add(" #%d / ", arity());
+ ElementsKind kind = hydrogen()->elements_kind();
+ stream->Add(" (%s) ", ElementsKindToString(kind));
+}
+
+
+void LAccessArgumentsAt::PrintDataTo(StringStream* stream) {
+ arguments()->PrintTo(stream);
+ stream->Add(" length ");
+ length()->PrintTo(stream);
+ stream->Add(" index ");
+ index()->PrintTo(stream);
+}
+
+
+void LStoreNamedField::PrintDataTo(StringStream* stream) {
+ object()->PrintTo(stream);
+ std::ostringstream os;
+ os << hydrogen()->access() << " <- ";
+ stream->Add(os.str().c_str());
+ value()->PrintTo(stream);
+}
+
+
+void LStoreNamedGeneric::PrintDataTo(StringStream* stream) {
+ object()->PrintTo(stream);
+ stream->Add(".");
+ stream->Add(String::cast(*name())->ToCString().get());
+ stream->Add(" <- ");
+ value()->PrintTo(stream);
+}
+
+
+void LLoadKeyed::PrintDataTo(StringStream* stream) {
+ elements()->PrintTo(stream);
+ stream->Add("[");
+ key()->PrintTo(stream);
+ if (hydrogen()->IsDehoisted()) {
+ stream->Add(" + %d]", base_offset());
+ } else {
+ stream->Add("]");
+ }
+}
+
+
+void LStoreKeyed::PrintDataTo(StringStream* stream) {
+ elements()->PrintTo(stream);
+ stream->Add("[");
+ key()->PrintTo(stream);
+ if (hydrogen()->IsDehoisted()) {
+ stream->Add(" + %d] <-", base_offset());
+ } else {
+ stream->Add("] <- ");
+ }
+
+ if (value() == NULL) {
+ DCHECK(hydrogen()->IsConstantHoleStore() &&
+ hydrogen()->value()->representation().IsDouble());
+ stream->Add("<the hole(nan)>");
+ } else {
+ value()->PrintTo(stream);
+ }
+}
+
+
+void LStoreKeyedGeneric::PrintDataTo(StringStream* stream) {
+ object()->PrintTo(stream);
+ stream->Add("[");
+ key()->PrintTo(stream);
+ stream->Add("] <- ");
+ value()->PrintTo(stream);
+}
+
+
+void LTransitionElementsKind::PrintDataTo(StringStream* stream) {
+ object()->PrintTo(stream);
+ stream->Add(" %p -> %p", *original_map(), *transitioned_map());
+}
+
+
+int LPlatformChunk::GetNextSpillIndex(RegisterKind kind) {
+ // Skip a slot if for a double-width slot.
+ if (kind == DOUBLE_REGISTERS) spill_slot_count_++;
+ return spill_slot_count_++;
+}
+
+
+LOperand* LPlatformChunk::GetNextSpillSlot(RegisterKind kind) {
+ int index = GetNextSpillIndex(kind);
+ if (kind == DOUBLE_REGISTERS) {
+ return LDoubleStackSlot::Create(index, zone());
+ } else {
+ DCHECK(kind == GENERAL_REGISTERS);
+ return LStackSlot::Create(index, zone());
+ }
+}
+
+
+LPlatformChunk* LChunkBuilder::Build() {
+ DCHECK(is_unused());
+ chunk_ = new (zone()) LPlatformChunk(info(), graph());
+ LPhase phase("L_Building chunk", chunk_);
+ status_ = BUILDING;
+
+ // If compiling for OSR, reserve space for the unoptimized frame,
+ // which will be subsumed into this frame.
+ if (graph()->has_osr()) {
+ for (int i = graph()->osr()->UnoptimizedFrameSlots(); i > 0; i--) {
+ chunk_->GetNextSpillIndex(GENERAL_REGISTERS);
+ }
+ }
+
+ const ZoneList<HBasicBlock*>* blocks = graph()->blocks();
+ for (int i = 0; i < blocks->length(); i++) {
+ HBasicBlock* next = NULL;
+ if (i < blocks->length() - 1) next = blocks->at(i + 1);
+ DoBasicBlock(blocks->at(i), next);
+ if (is_aborted()) return NULL;
+ }
+ status_ = DONE;
+ return chunk_;
+}
+
+
+LUnallocated* LChunkBuilder::ToUnallocated(Register reg) {
+ return new (zone()) LUnallocated(LUnallocated::FIXED_REGISTER,
+ Register::ToAllocationIndex(reg));
+}
+
+
+LUnallocated* LChunkBuilder::ToUnallocated(DoubleRegister reg) {
+ return new (zone()) LUnallocated(LUnallocated::FIXED_DOUBLE_REGISTER,
+ DoubleRegister::ToAllocationIndex(reg));
+}
+
+
+LOperand* LChunkBuilder::UseFixed(HValue* value, Register fixed_register) {
+ return Use(value, ToUnallocated(fixed_register));
+}
+
+
+LOperand* LChunkBuilder::UseFixedDouble(HValue* value, DoubleRegister reg) {
+ return Use(value, ToUnallocated(reg));
+}
+
+
+LOperand* LChunkBuilder::UseRegister(HValue* value) {
+ return Use(value,
+ new (zone()) LUnallocated(LUnallocated::MUST_HAVE_REGISTER));
+}
+
+
+LOperand* LChunkBuilder::UseRegisterAtStart(HValue* value) {
+ return Use(value, new (zone()) LUnallocated(LUnallocated::MUST_HAVE_REGISTER,
+ LUnallocated::USED_AT_START));
+}
+
+
+LOperand* LChunkBuilder::UseTempRegister(HValue* value) {
+ return Use(value, new (zone()) LUnallocated(LUnallocated::WRITABLE_REGISTER));
+}
+
+
+LOperand* LChunkBuilder::Use(HValue* value) {
+ return Use(value, new (zone()) LUnallocated(LUnallocated::NONE));
+}
+
+
+LOperand* LChunkBuilder::UseAtStart(HValue* value) {
+ return Use(value, new (zone())
+ LUnallocated(LUnallocated::NONE, LUnallocated::USED_AT_START));
+}
+
+
+LOperand* LChunkBuilder::UseOrConstant(HValue* value) {
+ return value->IsConstant()
+ ? chunk_->DefineConstantOperand(HConstant::cast(value))
+ : Use(value);
+}
+
+
+LOperand* LChunkBuilder::UseOrConstantAtStart(HValue* value) {
+ return value->IsConstant()
+ ? chunk_->DefineConstantOperand(HConstant::cast(value))
+ : UseAtStart(value);
+}
+
+
+LOperand* LChunkBuilder::UseRegisterOrConstant(HValue* value) {
+ return value->IsConstant()
+ ? chunk_->DefineConstantOperand(HConstant::cast(value))
+ : UseRegister(value);
+}
+
+
+LOperand* LChunkBuilder::UseRegisterOrConstantAtStart(HValue* value) {
+ return value->IsConstant()
+ ? chunk_->DefineConstantOperand(HConstant::cast(value))
+ : UseRegisterAtStart(value);
+}
+
+
+LOperand* LChunkBuilder::UseConstant(HValue* value) {
+ return chunk_->DefineConstantOperand(HConstant::cast(value));
+}
+
+
+LOperand* LChunkBuilder::UseAny(HValue* value) {
+ return value->IsConstant()
+ ? chunk_->DefineConstantOperand(HConstant::cast(value))
+ : Use(value, new (zone()) LUnallocated(LUnallocated::ANY));
+}
+
+
+LOperand* LChunkBuilder::Use(HValue* value, LUnallocated* operand) {
+ if (value->EmitAtUses()) {
+ HInstruction* instr = HInstruction::cast(value);
+ VisitInstruction(instr);
+ }
+ operand->set_virtual_register(value->id());
+ return operand;
+}
+
+
+LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr,
+ LUnallocated* result) {
+ result->set_virtual_register(current_instruction_->id());
+ instr->set_result(result);
+ return instr;
+}
+
+
+LInstruction* LChunkBuilder::DefineAsRegister(
+ LTemplateResultInstruction<1>* instr) {
+ return Define(instr,
+ new (zone()) LUnallocated(LUnallocated::MUST_HAVE_REGISTER));
+}
+
+
+LInstruction* LChunkBuilder::DefineAsSpilled(
+ LTemplateResultInstruction<1>* instr, int index) {
+ return Define(instr,
+ new (zone()) LUnallocated(LUnallocated::FIXED_SLOT, index));
+}
+
+
+LInstruction* LChunkBuilder::DefineSameAsFirst(
+ LTemplateResultInstruction<1>* instr) {
+ return Define(instr,
+ new (zone()) LUnallocated(LUnallocated::SAME_AS_FIRST_INPUT));
+}
+
+
+LInstruction* LChunkBuilder::DefineFixed(LTemplateResultInstruction<1>* instr,
+ Register reg) {
+ return Define(instr, ToUnallocated(reg));
+}
+
+
+LInstruction* LChunkBuilder::DefineFixedDouble(
+ LTemplateResultInstruction<1>* instr, DoubleRegister reg) {
+ return Define(instr, ToUnallocated(reg));
+}
+
+
+LInstruction* LChunkBuilder::AssignEnvironment(LInstruction* instr) {
+ HEnvironment* hydrogen_env = current_block_->last_environment();
+ int argument_index_accumulator = 0;
+ ZoneList<HValue*> objects_to_materialize(0, zone());
+ instr->set_environment(CreateEnvironment(
+ hydrogen_env, &argument_index_accumulator, &objects_to_materialize));
+ return instr;
+}
+
+
+LInstruction* LChunkBuilder::MarkAsCall(LInstruction* instr,
+ HInstruction* hinstr,
+ CanDeoptimize can_deoptimize) {
+ info()->MarkAsNonDeferredCalling();
+#ifdef DEBUG
+ instr->VerifyCall();
+#endif
+ instr->MarkAsCall();
+ instr = AssignPointerMap(instr);
+
+ // If instruction does not have side-effects lazy deoptimization
+ // after the call will try to deoptimize to the point before the call.
+ // Thus we still need to attach environment to this call even if
+ // call sequence can not deoptimize eagerly.
+ bool needs_environment = (can_deoptimize == CAN_DEOPTIMIZE_EAGERLY) ||
+ !hinstr->HasObservableSideEffects();
+ if (needs_environment && !instr->HasEnvironment()) {
+ instr = AssignEnvironment(instr);
+ // We can't really figure out if the environment is needed or not.
+ instr->environment()->set_has_been_used();
+ }
+
+ return instr;
+}
+
+
+LInstruction* LChunkBuilder::AssignPointerMap(LInstruction* instr) {
+ DCHECK(!instr->HasPointerMap());
+ instr->set_pointer_map(new (zone()) LPointerMap(zone()));
+ return instr;
+}
+
+
+LUnallocated* LChunkBuilder::TempRegister() {
+ LUnallocated* operand =
+ new (zone()) LUnallocated(LUnallocated::MUST_HAVE_REGISTER);
+ int vreg = allocator_->GetVirtualRegister();
+ if (!allocator_->AllocationOk()) {
+ Abort(kOutOfVirtualRegistersWhileTryingToAllocateTempRegister);
+ vreg = 0;
+ }
+ operand->set_virtual_register(vreg);
+ return operand;
+}
+
+
+LUnallocated* LChunkBuilder::TempDoubleRegister() {
+ LUnallocated* operand =
+ new (zone()) LUnallocated(LUnallocated::MUST_HAVE_DOUBLE_REGISTER);
+ int vreg = allocator_->GetVirtualRegister();
+ if (!allocator_->AllocationOk()) {
+ Abort(kOutOfVirtualRegistersWhileTryingToAllocateTempRegister);
+ vreg = 0;
+ }
+ operand->set_virtual_register(vreg);
+ return operand;
+}
+
+
+LOperand* LChunkBuilder::FixedTemp(Register reg) {
+ LUnallocated* operand = ToUnallocated(reg);
+ DCHECK(operand->HasFixedPolicy());
+ return operand;
+}
+
+
+LOperand* LChunkBuilder::FixedTemp(DoubleRegister reg) {
+ LUnallocated* operand = ToUnallocated(reg);
+ DCHECK(operand->HasFixedPolicy());
+ return operand;
+}
+
+
+LInstruction* LChunkBuilder::DoBlockEntry(HBlockEntry* instr) {
+ return new (zone()) LLabel(instr->block());
+}
+
+
+LInstruction* LChunkBuilder::DoDummyUse(HDummyUse* instr) {
+ return DefineAsRegister(new (zone()) LDummyUse(UseAny(instr->value())));
+}
+
+
+LInstruction* LChunkBuilder::DoEnvironmentMarker(HEnvironmentMarker* instr) {
+ UNREACHABLE();
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoDeoptimize(HDeoptimize* instr) {
+ return AssignEnvironment(new (zone()) LDeoptimize);
+}
+
+
+LInstruction* LChunkBuilder::DoShift(Token::Value op,
+ HBitwiseBinaryOperation* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* left = UseRegisterAtStart(instr->left());
+
+ HValue* right_value = instr->right();
+ LOperand* right = NULL;
+ int constant_value = 0;
+ bool does_deopt = false;
+ if (right_value->IsConstant()) {
+ HConstant* constant = HConstant::cast(right_value);
+ right = chunk_->DefineConstantOperand(constant);
+ constant_value = constant->Integer32Value() & 0x1f;
+ // Left shifts can deoptimize if we shift by > 0 and the result cannot be
+ // truncated to smi.
+ if (instr->representation().IsSmi() && constant_value > 0) {
+ does_deopt = !instr->CheckUsesForFlag(HValue::kTruncatingToSmi);
+ }
+ } else {
+ right = UseRegisterAtStart(right_value);
+ }
+
+ // Shift operations can only deoptimize if we do a logical shift
+ // by 0 and the result cannot be truncated to int32.
+ if (op == Token::SHR && constant_value == 0) {
+ does_deopt = !instr->CheckFlag(HInstruction::kUint32);
+ }
+
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LShiftI(op, left, right, does_deopt));
+ return does_deopt ? AssignEnvironment(result) : result;
+ } else {
+ return DoArithmeticT(op, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoArithmeticD(Token::Value op,
+ HArithmeticBinaryOperation* instr) {
+ DCHECK(instr->representation().IsDouble());
+ DCHECK(instr->left()->representation().IsDouble());
+ DCHECK(instr->right()->representation().IsDouble());
+ if (op == Token::MOD) {
+ LOperand* left = UseFixedDouble(instr->left(), d1);
+ LOperand* right = UseFixedDouble(instr->right(), d2);
+ LArithmeticD* result = new (zone()) LArithmeticD(op, left, right);
+ // We call a C function for double modulo. It can't trigger a GC. We need
+ // to use fixed result register for the call.
+ // TODO(fschneider): Allow any register as input registers.
+ return MarkAsCall(DefineFixedDouble(result, d1), instr);
+ } else {
+ LOperand* left = UseRegisterAtStart(instr->BetterLeftOperand());
+ LOperand* right = UseRegisterAtStart(instr->BetterRightOperand());
+ LArithmeticD* result = new (zone()) LArithmeticD(op, left, right);
+ return DefineSameAsFirst(result);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoArithmeticT(Token::Value op,
+ HBinaryOperation* instr) {
+ HValue* left = instr->left();
+ HValue* right = instr->right();
+ DCHECK(left->representation().IsTagged());
+ DCHECK(right->representation().IsTagged());
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* left_operand = UseFixed(left, r3);
+ LOperand* right_operand = UseFixed(right, r2);
+ LArithmeticT* result =
+ new (zone()) LArithmeticT(op, context, left_operand, right_operand);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+void LChunkBuilder::DoBasicBlock(HBasicBlock* block, HBasicBlock* next_block) {
+ DCHECK(is_building());
+ current_block_ = block;
+ next_block_ = next_block;
+ if (block->IsStartBlock()) {
+ block->UpdateEnvironment(graph_->start_environment());
+ argument_count_ = 0;
+ } else if (block->predecessors()->length() == 1) {
+ // We have a single predecessor => copy environment and outgoing
+ // argument count from the predecessor.
+ DCHECK(block->phis()->length() == 0);
+ HBasicBlock* pred = block->predecessors()->at(0);
+ HEnvironment* last_environment = pred->last_environment();
+ DCHECK(last_environment != NULL);
+ // Only copy the environment, if it is later used again.
+ if (pred->end()->SecondSuccessor() == NULL) {
+ DCHECK(pred->end()->FirstSuccessor() == block);
+ } else {
+ if (pred->end()->FirstSuccessor()->block_id() > block->block_id() ||
+ pred->end()->SecondSuccessor()->block_id() > block->block_id()) {
+ last_environment = last_environment->Copy();
+ }
+ }
+ block->UpdateEnvironment(last_environment);
+ DCHECK(pred->argument_count() >= 0);
+ argument_count_ = pred->argument_count();
+ } else {
+ // We are at a state join => process phis.
+ HBasicBlock* pred = block->predecessors()->at(0);
+ // No need to copy the environment, it cannot be used later.
+ HEnvironment* last_environment = pred->last_environment();
+ for (int i = 0; i < block->phis()->length(); ++i) {
+ HPhi* phi = block->phis()->at(i);
+ if (phi->HasMergedIndex()) {
+ last_environment->SetValueAt(phi->merged_index(), phi);
+ }
+ }
+ for (int i = 0; i < block->deleted_phis()->length(); ++i) {
+ if (block->deleted_phis()->at(i) < last_environment->length()) {
+ last_environment->SetValueAt(block->deleted_phis()->at(i),
+ graph_->GetConstantUndefined());
+ }
+ }
+ block->UpdateEnvironment(last_environment);
+ // Pick up the outgoing argument count of one of the predecessors.
+ argument_count_ = pred->argument_count();
+ }
+ HInstruction* current = block->first();
+ int start = chunk_->instructions()->length();
+ while (current != NULL && !is_aborted()) {
+ // Code for constants in registers is generated lazily.
+ if (!current->EmitAtUses()) {
+ VisitInstruction(current);
+ }
+ current = current->next();
+ }
+ int end = chunk_->instructions()->length() - 1;
+ if (end >= start) {
+ block->set_first_instruction_index(start);
+ block->set_last_instruction_index(end);
+ }
+ block->set_argument_count(argument_count_);
+ next_block_ = NULL;
+ current_block_ = NULL;
+}
+
+
+void LChunkBuilder::VisitInstruction(HInstruction* current) {
+ HInstruction* old_current = current_instruction_;
+ current_instruction_ = current;
+
+ LInstruction* instr = NULL;
+ if (current->CanReplaceWithDummyUses()) {
+ if (current->OperandCount() == 0) {
+ instr = DefineAsRegister(new (zone()) LDummy());
+ } else {
+ DCHECK(!current->OperandAt(0)->IsControlInstruction());
+ instr = DefineAsRegister(new (zone())
+ LDummyUse(UseAny(current->OperandAt(0))));
+ }
+ for (int i = 1; i < current->OperandCount(); ++i) {
+ if (current->OperandAt(i)->IsControlInstruction()) continue;
+ LInstruction* dummy =
+ new (zone()) LDummyUse(UseAny(current->OperandAt(i)));
+ dummy->set_hydrogen_value(current);
+ chunk_->AddInstruction(dummy, current_block_);
+ }
+ } else {
+ HBasicBlock* successor;
+ if (current->IsControlInstruction() &&
+ HControlInstruction::cast(current)->KnownSuccessorBlock(&successor) &&
+ successor != NULL) {
+ instr = new (zone()) LGoto(successor);
+ } else {
+ instr = current->CompileToLithium(this);
+ }
+ }
+
+ argument_count_ += current->argument_delta();
+ DCHECK(argument_count_ >= 0);
+
+ if (instr != NULL) {
+ AddInstruction(instr, current);
+ }
+
+ current_instruction_ = old_current;
+}
+
+
+void LChunkBuilder::AddInstruction(LInstruction* instr,
+ HInstruction* hydrogen_val) {
+ // Associate the hydrogen instruction first, since we may need it for
+ // the ClobbersRegisters() or ClobbersDoubleRegisters() calls below.
+ instr->set_hydrogen_value(hydrogen_val);
+
+#if DEBUG
+ // Make sure that the lithium instruction has either no fixed register
+ // constraints in temps or the result OR no uses that are only used at
+ // start. If this invariant doesn't hold, the register allocator can decide
+ // to insert a split of a range immediately before the instruction due to an
+ // already allocated register needing to be used for the instruction's fixed
+ // register constraint. In this case, The register allocator won't see an
+ // interference between the split child and the use-at-start (it would if
+ // the it was just a plain use), so it is free to move the split child into
+ // the same register that is used for the use-at-start.
+ // See https://code.google.com/p/chromium/issues/detail?id=201590
+ if (!(instr->ClobbersRegisters() &&
+ instr->ClobbersDoubleRegisters(isolate()))) {
+ int fixed = 0;
+ int used_at_start = 0;
+ for (UseIterator it(instr); !it.Done(); it.Advance()) {
+ LUnallocated* operand = LUnallocated::cast(it.Current());
+ if (operand->IsUsedAtStart()) ++used_at_start;
+ }
+ if (instr->Output() != NULL) {
+ if (LUnallocated::cast(instr->Output())->HasFixedPolicy()) ++fixed;
+ }
+ for (TempIterator it(instr); !it.Done(); it.Advance()) {
+ LUnallocated* operand = LUnallocated::cast(it.Current());
+ if (operand->HasFixedPolicy()) ++fixed;
+ }
+ DCHECK(fixed == 0 || used_at_start == 0);
+ }
+#endif
+
+ if (FLAG_stress_pointer_maps && !instr->HasPointerMap()) {
+ instr = AssignPointerMap(instr);
+ }
+ if (FLAG_stress_environments && !instr->HasEnvironment()) {
+ instr = AssignEnvironment(instr);
+ }
+ chunk_->AddInstruction(instr, current_block_);
+
+ if (instr->IsCall()) {
+ HValue* hydrogen_value_for_lazy_bailout = hydrogen_val;
+ LInstruction* instruction_needing_environment = NULL;
+ if (hydrogen_val->HasObservableSideEffects()) {
+ HSimulate* sim = HSimulate::cast(hydrogen_val->next());
+ instruction_needing_environment = instr;
+ sim->ReplayEnvironment(current_block_->last_environment());
+ hydrogen_value_for_lazy_bailout = sim;
+ }
+ LInstruction* bailout = AssignEnvironment(new (zone()) LLazyBailout());
+ bailout->set_hydrogen_value(hydrogen_value_for_lazy_bailout);
+ chunk_->AddInstruction(bailout, current_block_);
+ if (instruction_needing_environment != NULL) {
+ // Store the lazy deopt environment with the instruction if needed.
+ // Right now it is only used for LInstanceOfKnownGlobal.
+ instruction_needing_environment->SetDeferredLazyDeoptimizationEnvironment(
+ bailout->environment());
+ }
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoGoto(HGoto* instr) {
+ return new (zone()) LGoto(instr->FirstSuccessor());
+}
+
+
+LInstruction* LChunkBuilder::DoBranch(HBranch* instr) {
+ HValue* value = instr->value();
+ Representation r = value->representation();
+ HType type = value->type();
+ ToBooleanStub::Types expected = instr->expected_input_types();
+ if (expected.IsEmpty()) expected = ToBooleanStub::Types::Generic();
+
+ bool easy_case = !r.IsTagged() || type.IsBoolean() || type.IsSmi() ||
+ type.IsJSArray() || type.IsHeapNumber() || type.IsString();
+ LInstruction* branch = new (zone()) LBranch(UseRegister(value));
+ if (!easy_case &&
+ ((!expected.Contains(ToBooleanStub::SMI) && expected.NeedsMap()) ||
+ !expected.IsGeneric())) {
+ branch = AssignEnvironment(branch);
+ }
+ return branch;
+}
+
+
+LInstruction* LChunkBuilder::DoDebugBreak(HDebugBreak* instr) {
+ return new (zone()) LDebugBreak();
+}
+
+
+LInstruction* LChunkBuilder::DoCompareMap(HCompareMap* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegister(instr->value());
+ LOperand* temp = TempRegister();
+ return new (zone()) LCmpMapAndBranch(value, temp);
+}
+
+
+LInstruction* LChunkBuilder::DoArgumentsLength(HArgumentsLength* instr) {
+ info()->MarkAsRequiresFrame();
+ LOperand* value = UseRegister(instr->value());
+ return DefineAsRegister(new (zone()) LArgumentsLength(value));
+}
+
+
+LInstruction* LChunkBuilder::DoArgumentsElements(HArgumentsElements* elems) {
+ info()->MarkAsRequiresFrame();
+ return DefineAsRegister(new (zone()) LArgumentsElements);
+}
+
+
+LInstruction* LChunkBuilder::DoInstanceOf(HInstanceOf* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LInstanceOf* result = new (zone()) LInstanceOf(
+ context, UseFixed(instr->left(), r2), UseFixed(instr->right(), r3));
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoInstanceOfKnownGlobal(
+ HInstanceOfKnownGlobal* instr) {
+ LInstanceOfKnownGlobal* result = new (zone())
+ LInstanceOfKnownGlobal(UseFixed(instr->context(), cp),
+ UseFixed(instr->left(), r2), FixedTemp(r6));
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoWrapReceiver(HWrapReceiver* instr) {
+ LOperand* receiver = UseRegisterAtStart(instr->receiver());
+ LOperand* function = UseRegisterAtStart(instr->function());
+ LWrapReceiver* result = new (zone()) LWrapReceiver(receiver, function);
+ return AssignEnvironment(DefineAsRegister(result));
+}
+
+
+LInstruction* LChunkBuilder::DoApplyArguments(HApplyArguments* instr) {
+ LOperand* function = UseFixed(instr->function(), r3);
+ LOperand* receiver = UseFixed(instr->receiver(), r2);
+ LOperand* length = UseFixed(instr->length(), r4);
+ LOperand* elements = UseFixed(instr->elements(), r5);
+ LApplyArguments* result =
+ new (zone()) LApplyArguments(function, receiver, length, elements);
+ return MarkAsCall(DefineFixed(result, r2), instr, CAN_DEOPTIMIZE_EAGERLY);
+}
+
+
+LInstruction* LChunkBuilder::DoPushArguments(HPushArguments* instr) {
+ int argc = instr->OperandCount();
+ for (int i = 0; i < argc; ++i) {
+ LOperand* argument = Use(instr->argument(i));
+ AddInstruction(new (zone()) LPushArgument(argument), instr);
+ }
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoStoreCodeEntry(
+ HStoreCodeEntry* store_code_entry) {
+ LOperand* function = UseRegister(store_code_entry->function());
+ LOperand* code_object = UseTempRegister(store_code_entry->code_object());
+ return new (zone()) LStoreCodeEntry(function, code_object);
+}
+
+
+LInstruction* LChunkBuilder::DoInnerAllocatedObject(
+ HInnerAllocatedObject* instr) {
+ LOperand* base_object = UseRegisterAtStart(instr->base_object());
+ LOperand* offset = UseRegisterOrConstantAtStart(instr->offset());
+ return DefineAsRegister(new (zone())
+ LInnerAllocatedObject(base_object, offset));
+}
+
+
+LInstruction* LChunkBuilder::DoThisFunction(HThisFunction* instr) {
+ return instr->HasNoUses() ? NULL
+ : DefineAsRegister(new (zone()) LThisFunction);
+}
+
+
+LInstruction* LChunkBuilder::DoContext(HContext* instr) {
+ if (instr->HasNoUses()) return NULL;
+
+ if (info()->IsStub()) {
+ return DefineFixed(new (zone()) LContext, cp);
+ }
+
+ return DefineAsRegister(new (zone()) LContext);
+}
+
+
+LInstruction* LChunkBuilder::DoDeclareGlobals(HDeclareGlobals* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(new (zone()) LDeclareGlobals(context), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCallJSFunction(HCallJSFunction* instr) {
+ LOperand* function = UseFixed(instr->function(), r3);
+
+ LCallJSFunction* result = new (zone()) LCallJSFunction(function);
+
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCallWithDescriptor(HCallWithDescriptor* instr) {
+ CallInterfaceDescriptor descriptor = instr->descriptor();
+
+ LOperand* target = UseRegisterOrConstantAtStart(instr->target());
+ ZoneList<LOperand*> ops(instr->OperandCount(), zone());
+ // Target
+ ops.Add(target, zone());
+ // Context
+ LOperand* op = UseFixed(instr->OperandAt(1), cp);
+ ops.Add(op, zone());
+ // Other register parameters
+ for (int i = LCallWithDescriptor::kImplicitRegisterParameterCount;
+ i < instr->OperandCount(); i++) {
+ op =
+ UseFixed(instr->OperandAt(i),
+ descriptor.GetRegisterParameter(
+ i - LCallWithDescriptor::kImplicitRegisterParameterCount));
+ ops.Add(op, zone());
+ }
+
+ LCallWithDescriptor* result =
+ new (zone()) LCallWithDescriptor(descriptor, ops, zone());
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoInvokeFunction(HInvokeFunction* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* function = UseFixed(instr->function(), r3);
+ LInvokeFunction* result = new (zone()) LInvokeFunction(context, function);
+ return MarkAsCall(DefineFixed(result, r2), instr, CANNOT_DEOPTIMIZE_EAGERLY);
+}
+
+
+LInstruction* LChunkBuilder::DoUnaryMathOperation(HUnaryMathOperation* instr) {
+ switch (instr->op()) {
+ case kMathFloor:
+ return DoMathFloor(instr);
+ case kMathRound:
+ return DoMathRound(instr);
+ case kMathFround:
+ return DoMathFround(instr);
+ case kMathAbs:
+ return DoMathAbs(instr);
+ case kMathLog:
+ return DoMathLog(instr);
+ case kMathExp:
+ return DoMathExp(instr);
+ case kMathSqrt:
+ return DoMathSqrt(instr);
+ case kMathPowHalf:
+ return DoMathPowHalf(instr);
+ case kMathClz32:
+ return DoMathClz32(instr);
+ default:
+ UNREACHABLE();
+ return NULL;
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoMathFloor(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegister(instr->value());
+ LMathFloor* result = new (zone()) LMathFloor(input);
+ return AssignEnvironment(AssignPointerMap(DefineAsRegister(result)));
+}
+
+
+LInstruction* LChunkBuilder::DoMathRound(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegister(instr->value());
+ LOperand* temp = TempDoubleRegister();
+ LMathRound* result = new (zone()) LMathRound(input, temp);
+ return AssignEnvironment(DefineAsRegister(result));
+}
+
+
+LInstruction* LChunkBuilder::DoMathFround(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegister(instr->value());
+ LMathFround* result = new (zone()) LMathFround(input);
+ return DefineAsRegister(result);
+}
+
+
+LInstruction* LChunkBuilder::DoMathAbs(HUnaryMathOperation* instr) {
+ Representation r = instr->value()->representation();
+ LOperand* context = (r.IsDouble() || r.IsSmiOrInteger32())
+ ? NULL
+ : UseFixed(instr->context(), cp);
+ LOperand* input = UseRegister(instr->value());
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LMathAbs(context, input));
+ if (!r.IsDouble() && !r.IsSmiOrInteger32()) result = AssignPointerMap(result);
+ if (!r.IsDouble()) result = AssignEnvironment(result);
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoMathLog(HUnaryMathOperation* instr) {
+ DCHECK(instr->representation().IsDouble());
+ DCHECK(instr->value()->representation().IsDouble());
+ LOperand* input = UseFixedDouble(instr->value(), d1);
+ return MarkAsCall(DefineFixedDouble(new (zone()) LMathLog(input), d1), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoMathClz32(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegisterAtStart(instr->value());
+ LMathClz32* result = new (zone()) LMathClz32(input);
+ return DefineAsRegister(result);
+}
+
+
+LInstruction* LChunkBuilder::DoMathExp(HUnaryMathOperation* instr) {
+ DCHECK(instr->representation().IsDouble());
+ DCHECK(instr->value()->representation().IsDouble());
+ LOperand* input = UseRegister(instr->value());
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempRegister();
+ LOperand* double_temp = TempDoubleRegister();
+ LMathExp* result = new (zone()) LMathExp(input, double_temp, temp1, temp2);
+ return DefineAsRegister(result);
+}
+
+
+LInstruction* LChunkBuilder::DoMathSqrt(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegisterAtStart(instr->value());
+ LMathSqrt* result = new (zone()) LMathSqrt(input);
+ return DefineAsRegister(result);
+}
+
+
+LInstruction* LChunkBuilder::DoMathPowHalf(HUnaryMathOperation* instr) {
+ LOperand* input = UseRegisterAtStart(instr->value());
+ LMathPowHalf* result = new (zone()) LMathPowHalf(input);
+ return DefineAsRegister(result);
+}
+
+
+LInstruction* LChunkBuilder::DoCallNew(HCallNew* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* constructor = UseFixed(instr->constructor(), r3);
+ LCallNew* result = new (zone()) LCallNew(context, constructor);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCallNewArray(HCallNewArray* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* constructor = UseFixed(instr->constructor(), r3);
+ LCallNewArray* result = new(zone()) LCallNewArray(context, constructor);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCallFunction(HCallFunction* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* function = UseFixed(instr->function(), r3);
+ LOperand* slot = NULL;
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ slot = FixedTemp(r5);
+ vector = FixedTemp(r4);
+ }
+
+ LCallFunction* call =
+ new (zone()) LCallFunction(context, function, slot, vector);
+ return MarkAsCall(DefineFixed(call, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCallRuntime(HCallRuntime* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(DefineFixed(new (zone()) LCallRuntime(context), r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoRor(HRor* instr) {
+ return DoShift(Token::ROR, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoShr(HShr* instr) {
+ return DoShift(Token::SHR, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoSar(HSar* instr) {
+ return DoShift(Token::SAR, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoShl(HShl* instr) {
+ return DoShift(Token::SHL, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoBitwise(HBitwise* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ DCHECK(instr->CheckFlag(HValue::kTruncatingToInt32));
+
+ LOperand* left = UseRegisterAtStart(instr->BetterLeftOperand());
+ LOperand* right = UseOrConstantAtStart(instr->BetterRightOperand());
+ return DefineAsRegister(new (zone()) LBitI(left, right));
+ } else {
+ return DoArithmeticT(instr->op(), instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoDivByPowerOf2I(HDiv* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LDivByPowerOf2I(dividend, divisor));
+ if ((instr->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) ||
+ (instr->CheckFlag(HValue::kCanOverflow) && divisor == -1) ||
+ (!instr->CheckFlag(HInstruction::kAllUsesTruncatingToInt32) &&
+ divisor != 1 && divisor != -1)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoDivByConstI(HDiv* instr) {
+ DCHECK(instr->representation().IsInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LDivByConstI(dividend, divisor));
+ if (divisor == 0 ||
+ (instr->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) ||
+ !instr->CheckFlag(HInstruction::kAllUsesTruncatingToInt32)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoDivI(HDiv* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ LOperand* divisor = UseRegister(instr->right());
+ LInstruction* result =
+ DefineAsRegister( new (zone()) LDivI(dividend, divisor));
+ if (instr->CheckFlag(HValue::kCanBeDivByZero) ||
+ instr->CheckFlag(HValue::kBailoutOnMinusZero) ||
+ (instr->CheckFlag(HValue::kCanOverflow) &&
+ !instr->CheckFlag(HValue::kAllUsesTruncatingToInt32)) ||
+ (!instr->IsMathFloorOfDiv() &&
+ !instr->CheckFlag(HValue::kAllUsesTruncatingToInt32))) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoDiv(HDiv* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ if (instr->RightIsPowerOf2()) {
+ return DoDivByPowerOf2I(instr);
+ } else if (instr->right()->IsConstant()) {
+ return DoDivByConstI(instr);
+ } else {
+ return DoDivI(instr);
+ }
+ } else if (instr->representation().IsDouble()) {
+ return DoArithmeticD(Token::DIV, instr);
+ } else {
+ return DoArithmeticT(Token::DIV, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoFlooringDivByPowerOf2I(HMathFloorOfDiv* instr) {
+ LOperand* dividend = UseRegisterAtStart(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LFlooringDivByPowerOf2I(dividend, divisor));
+ if ((instr->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0) ||
+ (instr->CheckFlag(HValue::kLeftCanBeMinInt) && divisor == -1)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoFlooringDivByConstI(HMathFloorOfDiv* instr) {
+ DCHECK(instr->representation().IsInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LOperand* temp =
+ ((divisor > 0 && !instr->CheckFlag(HValue::kLeftCanBeNegative)) ||
+ (divisor < 0 && !instr->CheckFlag(HValue::kLeftCanBePositive)))
+ ? NULL
+ : TempRegister();
+ LInstruction* result = DefineAsRegister(
+ new (zone()) LFlooringDivByConstI(dividend, divisor, temp));
+ if (divisor == 0 ||
+ (instr->CheckFlag(HValue::kBailoutOnMinusZero) && divisor < 0)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoFlooringDivI(HMathFloorOfDiv* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ LOperand* divisor = UseRegister(instr->right());
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LFlooringDivI(dividend, divisor));
+ if (instr->CheckFlag(HValue::kCanBeDivByZero) ||
+ instr->CheckFlag(HValue::kBailoutOnMinusZero) ||
+ (instr->CheckFlag(HValue::kCanOverflow) &&
+ !instr->CheckFlag(HValue::kAllUsesTruncatingToInt32))) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoMathFloorOfDiv(HMathFloorOfDiv* instr) {
+ if (instr->RightIsPowerOf2()) {
+ return DoFlooringDivByPowerOf2I(instr);
+ } else if (instr->right()->IsConstant()) {
+ return DoFlooringDivByConstI(instr);
+ } else {
+ return DoFlooringDivI(instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoModByPowerOf2I(HMod* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegisterAtStart(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LInstruction* result =
+ DefineSameAsFirst(new (zone()) LModByPowerOf2I(dividend, divisor));
+ if (instr->CheckFlag(HValue::kLeftCanBeNegative) &&
+ instr->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoModByConstI(HMod* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ int32_t divisor = instr->right()->GetInteger32Constant();
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LModByConstI(dividend, divisor));
+ if (divisor == 0 || instr->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoModI(HMod* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* dividend = UseRegister(instr->left());
+ LOperand* divisor = UseRegister(instr->right());
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LModI(dividend, divisor));
+ if (instr->CheckFlag(HValue::kCanBeDivByZero) ||
+ instr->CheckFlag(HValue::kBailoutOnMinusZero)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoMod(HMod* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ if (instr->RightIsPowerOf2()) {
+ return DoModByPowerOf2I(instr);
+ } else if (instr->right()->IsConstant()) {
+ return DoModByConstI(instr);
+ } else {
+ return DoModI(instr);
+ }
+ } else if (instr->representation().IsDouble()) {
+ return DoArithmeticD(Token::MOD, instr);
+ } else {
+ return DoArithmeticT(Token::MOD, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoMul(HMul* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ HValue* left = instr->BetterLeftOperand();
+ HValue* right = instr->BetterRightOperand();
+ LOperand* left_op;
+ LOperand* right_op;
+ bool can_overflow = instr->CheckFlag(HValue::kCanOverflow);
+ bool bailout_on_minus_zero = instr->CheckFlag(HValue::kBailoutOnMinusZero);
+
+ int32_t constant_value = 0;
+ if (right->IsConstant()) {
+ HConstant* constant = HConstant::cast(right);
+ constant_value = constant->Integer32Value();
+ // Constants -1, 0 and 1 can be optimized if the result can overflow.
+ // For other constants, it can be optimized only without overflow.
+ if (!can_overflow || ((constant_value >= -1) && (constant_value <= 1))) {
+ left_op = UseRegisterAtStart(left);
+ right_op = UseConstant(right);
+ } else {
+ if (bailout_on_minus_zero) {
+ left_op = UseRegister(left);
+ } else {
+ left_op = UseRegisterAtStart(left);
+ }
+ right_op = UseRegister(right);
+ }
+ } else {
+ if (bailout_on_minus_zero) {
+ left_op = UseRegister(left);
+ } else {
+ left_op = UseRegisterAtStart(left);
+ }
+ right_op = UseRegister(right);
+ }
+ LMulI* mul = new (zone()) LMulI(left_op, right_op);
+ if (right_op->IsConstantOperand()
+ ? ((can_overflow && constant_value == -1) ||
+ (bailout_on_minus_zero && constant_value <= 0))
+ : (can_overflow || bailout_on_minus_zero)) {
+ AssignEnvironment(mul);
+ }
+ return DefineAsRegister(mul);
+
+ } else if (instr->representation().IsDouble()) {
+ return DoArithmeticD(Token::MUL, instr);
+ } else {
+ return DoArithmeticT(Token::MUL, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoSub(HSub* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+
+ if (instr->left()->IsConstant() &&
+ !instr->CheckFlag(HValue::kCanOverflow)) {
+ // If lhs is constant, do reverse subtraction instead.
+ return DoRSub(instr);
+ }
+
+ LOperand* left = UseRegisterAtStart(instr->left());
+ LOperand* right = UseOrConstantAtStart(instr->right());
+ LSubI* sub = new (zone()) LSubI(left, right);
+ LInstruction* result = DefineAsRegister(sub);
+ if (instr->CheckFlag(HValue::kCanOverflow)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+ } else if (instr->representation().IsDouble()) {
+ return DoArithmeticD(Token::SUB, instr);
+ } else {
+ return DoArithmeticT(Token::SUB, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoRSub(HSub* instr) {
+ DCHECK(instr->representation().IsSmiOrInteger32());
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ DCHECK(!instr->CheckFlag(HValue::kCanOverflow));
+
+ // Note: The lhs of the subtraction becomes the rhs of the
+ // reverse-subtraction.
+ LOperand* left = UseRegisterAtStart(instr->right());
+ LOperand* right = UseOrConstantAtStart(instr->left());
+ LRSubI* rsb = new (zone()) LRSubI(left, right);
+ LInstruction* result = DefineAsRegister(rsb);
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoMultiplyAdd(HMul* mul, HValue* addend) {
+ LOperand* multiplier_op = UseRegister(mul->left());
+ LOperand* multiplicand_op = UseRegister(mul->right());
+ LOperand* addend_op = UseRegister(addend);
+ return DefineAsRegister(
+ new (zone()) LMultiplyAddD(addend_op, multiplier_op, multiplicand_op));
+}
+
+
+LInstruction* LChunkBuilder::DoMultiplySub(HValue* minuend, HMul* mul) {
+ LOperand* minuend_op = UseRegister(minuend);
+ LOperand* multiplier_op = UseRegister(mul->left());
+ LOperand* multiplicand_op = UseRegister(mul->right());
+
+ return DefineAsRegister(
+ new (zone()) LMultiplySubD(minuend_op, multiplier_op, multiplicand_op));
+}
+
+
+LInstruction* LChunkBuilder::DoAdd(HAdd* instr) {
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ LOperand* left = UseRegisterAtStart(instr->BetterLeftOperand());
+ LOperand* right = UseOrConstantAtStart(instr->BetterRightOperand());
+ LAddI* add = new (zone()) LAddI(left, right);
+ LInstruction* result = DefineAsRegister(add);
+ if (instr->CheckFlag(HValue::kCanOverflow)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+ } else if (instr->representation().IsExternal()) {
+ DCHECK(instr->left()->representation().IsExternal());
+ DCHECK(instr->right()->representation().IsInteger32());
+ DCHECK(!instr->CheckFlag(HValue::kCanOverflow));
+ LOperand* left = UseRegisterAtStart(instr->left());
+ LOperand* right = UseOrConstantAtStart(instr->right());
+ LAddI* add = new (zone()) LAddI(left, right);
+ LInstruction* result = DefineAsRegister(add);
+ return result;
+ } else if (instr->representation().IsDouble()) {
+ return DoArithmeticD(Token::ADD, instr);
+ } else {
+ return DoArithmeticT(Token::ADD, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoMathMinMax(HMathMinMax* instr) {
+ LOperand* left = NULL;
+ LOperand* right = NULL;
+ if (instr->representation().IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(instr->representation()));
+ DCHECK(instr->right()->representation().Equals(instr->representation()));
+ left = UseRegisterAtStart(instr->BetterLeftOperand());
+ right = UseOrConstantAtStart(instr->BetterRightOperand());
+ } else {
+ DCHECK(instr->representation().IsDouble());
+ DCHECK(instr->left()->representation().IsDouble());
+ DCHECK(instr->right()->representation().IsDouble());
+ left = UseRegister(instr->left());
+ right = UseRegister(instr->right());
+ }
+ return DefineAsRegister(new (zone()) LMathMinMax(left, right));
+}
+
+
+LInstruction* LChunkBuilder::DoPower(HPower* instr) {
+ DCHECK(instr->representation().IsDouble());
+ // We call a C function for double power. It can't trigger a GC.
+ // We need to use fixed result register for the call.
+ Representation exponent_type = instr->right()->representation();
+ DCHECK(instr->left()->representation().IsDouble());
+ LOperand* left = UseFixedDouble(instr->left(), d1);
+ LOperand* right =
+ exponent_type.IsDouble()
+ ? UseFixedDouble(instr->right(), d2)
+ : UseFixed(instr->right(), r4);
+ LPower* result = new (zone()) LPower(left, right);
+ return MarkAsCall(DefineFixedDouble(result, d3), instr,
+ CAN_DEOPTIMIZE_EAGERLY);
+}
+
+
+LInstruction* LChunkBuilder::DoCompareGeneric(HCompareGeneric* instr) {
+ DCHECK(instr->left()->representation().IsTagged());
+ DCHECK(instr->right()->representation().IsTagged());
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* left = UseFixed(instr->left(), r3);
+ LOperand* right = UseFixed(instr->right(), r2);
+ LCmpT* result = new (zone()) LCmpT(context, left, right);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoCompareNumericAndBranch(
+ HCompareNumericAndBranch* instr) {
+ Representation r = instr->representation();
+ if (r.IsSmiOrInteger32()) {
+ DCHECK(instr->left()->representation().Equals(r));
+ DCHECK(instr->right()->representation().Equals(r));
+ LOperand* left = UseRegisterOrConstantAtStart(instr->left());
+ LOperand* right = UseRegisterOrConstantAtStart(instr->right());
+ return new (zone()) LCompareNumericAndBranch(left, right);
+ } else {
+ DCHECK(r.IsDouble());
+ DCHECK(instr->left()->representation().IsDouble());
+ DCHECK(instr->right()->representation().IsDouble());
+ LOperand* left = UseRegisterAtStart(instr->left());
+ LOperand* right = UseRegisterAtStart(instr->right());
+ return new (zone()) LCompareNumericAndBranch(left, right);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoCompareObjectEqAndBranch(
+ HCompareObjectEqAndBranch* instr) {
+ LOperand* left = UseRegisterAtStart(instr->left());
+ LOperand* right = UseRegisterAtStart(instr->right());
+ return new (zone()) LCmpObjectEqAndBranch(left, right);
+}
+
+
+LInstruction* LChunkBuilder::DoCompareHoleAndBranch(
+ HCompareHoleAndBranch* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return new (zone()) LCmpHoleAndBranch(value);
+}
+
+
+LInstruction* LChunkBuilder::DoCompareMinusZeroAndBranch(
+ HCompareMinusZeroAndBranch* instr) {
+ LOperand* value = UseRegister(instr->value());
+ LOperand* scratch = TempRegister();
+ return new (zone()) LCompareMinusZeroAndBranch(value, scratch);
+}
+
+
+LInstruction* LChunkBuilder::DoIsObjectAndBranch(HIsObjectAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LOperand* temp = TempRegister();
+ return new (zone()) LIsObjectAndBranch(value, temp);
+}
+
+
+LInstruction* LChunkBuilder::DoIsStringAndBranch(HIsStringAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LOperand* temp = TempRegister();
+ return new (zone()) LIsStringAndBranch(value, temp);
+}
+
+
+LInstruction* LChunkBuilder::DoIsSmiAndBranch(HIsSmiAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ return new (zone()) LIsSmiAndBranch(Use(instr->value()));
+}
+
+
+LInstruction* LChunkBuilder::DoIsUndetectableAndBranch(
+ HIsUndetectableAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return new (zone()) LIsUndetectableAndBranch(value, TempRegister());
+}
+
+
+LInstruction* LChunkBuilder::DoStringCompareAndBranch(
+ HStringCompareAndBranch* instr) {
+ DCHECK(instr->left()->representation().IsTagged());
+ DCHECK(instr->right()->representation().IsTagged());
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* left = UseFixed(instr->left(), r3);
+ LOperand* right = UseFixed(instr->right(), r2);
+ LStringCompareAndBranch* result =
+ new (zone()) LStringCompareAndBranch(context, left, right);
+ return MarkAsCall(result, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoHasInstanceTypeAndBranch(
+ HHasInstanceTypeAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return new (zone()) LHasInstanceTypeAndBranch(value);
+}
+
+
+LInstruction* LChunkBuilder::DoGetCachedArrayIndex(
+ HGetCachedArrayIndex* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegisterAtStart(instr->value());
+
+ return DefineAsRegister(new (zone()) LGetCachedArrayIndex(value));
+}
+
+
+LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch(
+ HHasCachedArrayIndexAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ return new (zone()) LHasCachedArrayIndexAndBranch(
+ UseRegisterAtStart(instr->value()));
+}
+
+
+LInstruction* LChunkBuilder::DoClassOfTestAndBranch(
+ HClassOfTestAndBranch* instr) {
+ DCHECK(instr->value()->representation().IsTagged());
+ LOperand* value = UseRegister(instr->value());
+ return new (zone()) LClassOfTestAndBranch(value, TempRegister());
+}
+
+
+LInstruction* LChunkBuilder::DoMapEnumLength(HMapEnumLength* instr) {
+ LOperand* map = UseRegisterAtStart(instr->value());
+ return DefineAsRegister(new (zone()) LMapEnumLength(map));
+}
+
+
+LInstruction* LChunkBuilder::DoDateField(HDateField* instr) {
+ LOperand* object = UseFixed(instr->value(), r2);
+ LDateField* result =
+ new (zone()) LDateField(object, FixedTemp(r3), instr->index());
+ return MarkAsCall(DefineFixed(result, r2), instr, CANNOT_DEOPTIMIZE_EAGERLY);
+}
+
+
+LInstruction* LChunkBuilder::DoSeqStringGetChar(HSeqStringGetChar* instr) {
+ LOperand* string = UseRegisterAtStart(instr->string());
+ LOperand* index = UseRegisterOrConstantAtStart(instr->index());
+ return DefineAsRegister(new (zone()) LSeqStringGetChar(string, index));
+}
+
+
+LInstruction* LChunkBuilder::DoSeqStringSetChar(HSeqStringSetChar* instr) {
+ LOperand* string = UseRegisterAtStart(instr->string());
+ LOperand* index = FLAG_debug_code
+ ? UseRegisterAtStart(instr->index())
+ : UseRegisterOrConstantAtStart(instr->index());
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LOperand* context = FLAG_debug_code ? UseFixed(instr->context(), cp) : NULL;
+ return new (zone()) LSeqStringSetChar(context, string, index, value);
+}
+
+
+LInstruction* LChunkBuilder::DoBoundsCheck(HBoundsCheck* instr) {
+ if (!FLAG_debug_code && instr->skip_check()) return NULL;
+ LOperand* index = UseRegisterOrConstantAtStart(instr->index());
+ LOperand* length = !index->IsConstantOperand()
+ ? UseRegisterOrConstantAtStart(instr->length())
+ : UseRegisterAtStart(instr->length());
+ LInstruction* result = new (zone()) LBoundsCheck(index, length);
+ if (!FLAG_debug_code || !instr->skip_check()) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoBoundsCheckBaseIndexInformation(
+ HBoundsCheckBaseIndexInformation* instr) {
+ UNREACHABLE();
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoAbnormalExit(HAbnormalExit* instr) {
+ // The control instruction marking the end of a block that completed
+ // abruptly (e.g., threw an exception). There is nothing specific to do.
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoUseConst(HUseConst* instr) { return NULL; }
+
+
+LInstruction* LChunkBuilder::DoForceRepresentation(HForceRepresentation* bad) {
+ // All HForceRepresentation instructions should be eliminated in the
+ // representation change phase of Hydrogen.
+ UNREACHABLE();
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoChange(HChange* instr) {
+ Representation from = instr->from();
+ Representation to = instr->to();
+ HValue* val = instr->value();
+ if (from.IsSmi()) {
+ if (to.IsTagged()) {
+ LOperand* value = UseRegister(val);
+ return DefineSameAsFirst(new (zone()) LDummyUse(value));
+ }
+ from = Representation::Tagged();
+ }
+ if (from.IsTagged()) {
+ if (to.IsDouble()) {
+ LOperand* value = UseRegister(val);
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LNumberUntagD(value));
+ if (!val->representation().IsSmi()) result = AssignEnvironment(result);
+ return result;
+ } else if (to.IsSmi()) {
+ LOperand* value = UseRegister(val);
+ if (val->type().IsSmi()) {
+ return DefineSameAsFirst(new (zone()) LDummyUse(value));
+ }
+ return AssignEnvironment(
+ DefineSameAsFirst(new (zone()) LCheckSmi(value)));
+ } else {
+ DCHECK(to.IsInteger32());
+ if (val->type().IsSmi() || val->representation().IsSmi()) {
+ LOperand* value = UseRegisterAtStart(val);
+ return DefineAsRegister(new (zone()) LSmiUntag(value, false));
+ } else {
+ LOperand* value = UseRegister(val);
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempDoubleRegister();
+ LInstruction* result =
+ DefineSameAsFirst(new (zone()) LTaggedToI(value, temp1, temp2));
+ if (!val->representation().IsSmi()) result = AssignEnvironment(result);
+ return result;
+ }
+ }
+ } else if (from.IsDouble()) {
+ if (to.IsTagged()) {
+ info()->MarkAsDeferredCalling();
+ LOperand* value = UseRegister(val);
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempRegister();
+ LUnallocated* result_temp = TempRegister();
+ LNumberTagD* result = new (zone()) LNumberTagD(value, temp1, temp2);
+ return AssignPointerMap(Define(result, result_temp));
+ } else if (to.IsSmi()) {
+ LOperand* value = UseRegister(val);
+ return AssignEnvironment(
+ DefineAsRegister(new (zone()) LDoubleToSmi(value)));
+ } else {
+ DCHECK(to.IsInteger32());
+ LOperand* value = UseRegister(val);
+ LInstruction* result = DefineAsRegister(new (zone()) LDoubleToI(value));
+ if (!instr->CanTruncateToInt32()) result = AssignEnvironment(result);
+ return result;
+ }
+ } else if (from.IsInteger32()) {
+ info()->MarkAsDeferredCalling();
+ if (to.IsTagged()) {
+ if (!instr->CheckFlag(HValue::kCanOverflow)) {
+ LOperand* value = UseRegisterAtStart(val);
+ return DefineAsRegister(new (zone()) LSmiTag(value));
+ } else if (val->CheckFlag(HInstruction::kUint32)) {
+ LOperand* value = UseRegisterAtStart(val);
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempRegister();
+ LNumberTagU* result = new (zone()) LNumberTagU(value, temp1, temp2);
+ return AssignPointerMap(DefineAsRegister(result));
+ } else {
+ LOperand* value = UseRegisterAtStart(val);
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempRegister();
+ LNumberTagI* result = new (zone()) LNumberTagI(value, temp1, temp2);
+ return AssignPointerMap(DefineAsRegister(result));
+ }
+ } else if (to.IsSmi()) {
+ LOperand* value = UseRegister(val);
+ LInstruction* result = DefineAsRegister(new (zone()) LSmiTag(value));
+ if (instr->CheckFlag(HValue::kCanOverflow)) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+ } else {
+ DCHECK(to.IsDouble());
+ if (val->CheckFlag(HInstruction::kUint32)) {
+ return DefineAsRegister(new (zone()) LUint32ToDouble(UseRegister(val)));
+ } else {
+ return DefineAsRegister(new (zone()) LInteger32ToDouble(Use(val)));
+ }
+ }
+ }
+ UNREACHABLE();
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoCheckHeapObject(HCheckHeapObject* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LInstruction* result = new (zone()) LCheckNonSmi(value);
+ if (!instr->value()->type().IsHeapObject()) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoCheckSmi(HCheckSmi* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return AssignEnvironment(new (zone()) LCheckSmi(value));
+}
+
+
+LInstruction* LChunkBuilder::DoCheckArrayBufferNotNeutered(
+ HCheckArrayBufferNotNeutered* instr) {
+ LOperand* view = UseRegisterAtStart(instr->value());
+ LCheckArrayBufferNotNeutered* result =
+ new (zone()) LCheckArrayBufferNotNeutered(view);
+ return AssignEnvironment(result);
+}
+
+
+LInstruction* LChunkBuilder::DoCheckInstanceType(HCheckInstanceType* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LInstruction* result = new (zone()) LCheckInstanceType(value);
+ return AssignEnvironment(result);
+}
+
+
+LInstruction* LChunkBuilder::DoCheckValue(HCheckValue* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ return AssignEnvironment(new (zone()) LCheckValue(value));
+}
+
+
+LInstruction* LChunkBuilder::DoCheckMaps(HCheckMaps* instr) {
+ if (instr->IsStabilityCheck()) return new (zone()) LCheckMaps;
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LInstruction* result = AssignEnvironment(new (zone()) LCheckMaps(value));
+ if (instr->HasMigrationTarget()) {
+ info()->MarkAsDeferredCalling();
+ result = AssignPointerMap(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoClampToUint8(HClampToUint8* instr) {
+ HValue* value = instr->value();
+ Representation input_rep = value->representation();
+ LOperand* reg = UseRegister(value);
+ if (input_rep.IsDouble()) {
+ return DefineAsRegister(new (zone()) LClampDToUint8(reg));
+ } else if (input_rep.IsInteger32()) {
+ return DefineAsRegister(new (zone()) LClampIToUint8(reg));
+ } else {
+ DCHECK(input_rep.IsSmiOrTagged());
+ LClampTToUint8* result =
+ new (zone()) LClampTToUint8(reg, TempDoubleRegister());
+ return AssignEnvironment(DefineAsRegister(result));
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoDoubleBits(HDoubleBits* instr) {
+ HValue* value = instr->value();
+ DCHECK(value->representation().IsDouble());
+ return DefineAsRegister(new (zone()) LDoubleBits(UseRegister(value)));
+}
+
+
+LInstruction* LChunkBuilder::DoConstructDouble(HConstructDouble* instr) {
+ LOperand* lo = UseRegister(instr->lo());
+ LOperand* hi = UseRegister(instr->hi());
+ return DefineAsRegister(new (zone()) LConstructDouble(hi, lo));
+}
+
+
+LInstruction* LChunkBuilder::DoReturn(HReturn* instr) {
+ LOperand* context = info()->IsStub() ? UseFixed(instr->context(), cp) : NULL;
+ LOperand* parameter_count = UseRegisterOrConstant(instr->parameter_count());
+ return new (zone())
+ LReturn(UseFixed(instr->value(), r2), context, parameter_count);
+}
+
+
+LInstruction* LChunkBuilder::DoConstant(HConstant* instr) {
+ Representation r = instr->representation();
+ if (r.IsSmi()) {
+ return DefineAsRegister(new (zone()) LConstantS);
+ } else if (r.IsInteger32()) {
+ return DefineAsRegister(new (zone()) LConstantI);
+ } else if (r.IsDouble()) {
+ return DefineAsRegister(new (zone()) LConstantD);
+ } else if (r.IsExternal()) {
+ return DefineAsRegister(new (zone()) LConstantE);
+ } else if (r.IsTagged()) {
+ return DefineAsRegister(new (zone()) LConstantT);
+ } else {
+ UNREACHABLE();
+ return NULL;
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoLoadGlobalGeneric(HLoadGlobalGeneric* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* global_object =
+ UseFixed(instr->global_object(), LoadDescriptor::ReceiverRegister());
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
+ }
+ LLoadGlobalGeneric* result =
+ new (zone()) LLoadGlobalGeneric(context, global_object, vector);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoLoadContextSlot(HLoadContextSlot* instr) {
+ LOperand* context = UseRegisterAtStart(instr->value());
+ LInstruction* result =
+ DefineAsRegister(new (zone()) LLoadContextSlot(context));
+ if (instr->RequiresHoleCheck() && instr->DeoptimizesOnHole()) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoStoreContextSlot(HStoreContextSlot* instr) {
+ LOperand* context;
+ LOperand* value;
+ if (instr->NeedsWriteBarrier()) {
+ context = UseTempRegister(instr->context());
+ value = UseTempRegister(instr->value());
+ } else {
+ context = UseRegister(instr->context());
+ value = UseRegister(instr->value());
+ }
+ LInstruction* result = new (zone()) LStoreContextSlot(context, value);
+ if (instr->RequiresHoleCheck() && instr->DeoptimizesOnHole()) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoLoadNamedField(HLoadNamedField* instr) {
+ LOperand* obj = UseRegisterAtStart(instr->object());
+ return DefineAsRegister(new (zone()) LLoadNamedField(obj));
+}
+
+
+LInstruction* LChunkBuilder::DoLoadNamedGeneric(HLoadNamedGeneric* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* object =
+ UseFixed(instr->object(), LoadDescriptor::ReceiverRegister());
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
+ }
+
+ LInstruction* result =
+ DefineFixed(new (zone()) LLoadNamedGeneric(context, object, vector), r2);
+ return MarkAsCall(result, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoLoadFunctionPrototype(
+ HLoadFunctionPrototype* instr) {
+ return AssignEnvironment(DefineAsRegister(
+ new (zone()) LLoadFunctionPrototype(UseRegister(instr->function()))));
+}
+
+
+LInstruction* LChunkBuilder::DoLoadRoot(HLoadRoot* instr) {
+ return DefineAsRegister(new (zone()) LLoadRoot);
+}
+
+
+LInstruction* LChunkBuilder::DoLoadKeyed(HLoadKeyed* instr) {
+ DCHECK(instr->key()->representation().IsSmiOrInteger32());
+ ElementsKind elements_kind = instr->elements_kind();
+ LOperand* key = UseRegisterOrConstantAtStart(instr->key());
+ LInstruction* result = NULL;
+
+ if (!instr->is_typed_elements()) {
+ LOperand* obj = NULL;
+ if (instr->representation().IsDouble()) {
+ obj = UseRegister(instr->elements());
+ } else {
+ obj = UseRegisterAtStart(instr->elements());
+ }
+ result = DefineAsRegister(new (zone()) LLoadKeyed(obj, key));
+ } else {
+ DCHECK((instr->representation().IsInteger32() &&
+ !IsDoubleOrFloatElementsKind(elements_kind)) ||
+ (instr->representation().IsDouble() &&
+ IsDoubleOrFloatElementsKind(elements_kind)));
+ LOperand* backing_store = UseRegister(instr->elements());
+ result = DefineAsRegister(new (zone()) LLoadKeyed(backing_store, key));
+ }
+
+ bool needs_environment;
+ if (instr->is_external() || instr->is_fixed_typed_array()) {
+ // see LCodeGen::DoLoadKeyedExternalArray
+ needs_environment = (elements_kind == EXTERNAL_UINT32_ELEMENTS ||
+ elements_kind == UINT32_ELEMENTS) &&
+ !instr->CheckFlag(HInstruction::kUint32);
+ } else {
+ // see LCodeGen::DoLoadKeyedFixedDoubleArray and
+ // LCodeGen::DoLoadKeyedFixedArray
+ needs_environment =
+ instr->RequiresHoleCheck() ||
+ (instr->hole_mode() == CONVERT_HOLE_TO_UNDEFINED && info()->IsStub());
+ }
+
+ if (needs_environment) {
+ result = AssignEnvironment(result);
+ }
+ return result;
+}
+
+
+LInstruction* LChunkBuilder::DoLoadKeyedGeneric(HLoadKeyedGeneric* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* object =
+ UseFixed(instr->object(), LoadDescriptor::ReceiverRegister());
+ LOperand* key = UseFixed(instr->key(), LoadDescriptor::NameRegister());
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
+ }
+
+ LInstruction* result = DefineFixed(
+ new (zone()) LLoadKeyedGeneric(context, object, key, vector), r2);
+ return MarkAsCall(result, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoStoreKeyed(HStoreKeyed* instr) {
+ if (!instr->is_typed_elements()) {
+ DCHECK(instr->elements()->representation().IsTagged());
+ bool needs_write_barrier = instr->NeedsWriteBarrier();
+ LOperand* object = NULL;
+ LOperand* key = NULL;
+ LOperand* val = NULL;
+
+ if (instr->value()->representation().IsDouble()) {
+ object = UseRegisterAtStart(instr->elements());
+ val = UseRegister(instr->value());
+ key = UseRegisterOrConstantAtStart(instr->key());
+ } else {
+ if (needs_write_barrier) {
+ object = UseTempRegister(instr->elements());
+ val = UseTempRegister(instr->value());
+ key = UseTempRegister(instr->key());
+ } else {
+ object = UseRegisterAtStart(instr->elements());
+ val = UseRegisterAtStart(instr->value());
+ key = UseRegisterOrConstantAtStart(instr->key());
+ }
+ }
+
+ return new (zone()) LStoreKeyed(object, key, val);
+ }
+
+ DCHECK((instr->value()->representation().IsInteger32() &&
+ !IsDoubleOrFloatElementsKind(instr->elements_kind())) ||
+ (instr->value()->representation().IsDouble() &&
+ IsDoubleOrFloatElementsKind(instr->elements_kind())));
+ DCHECK((instr->is_fixed_typed_array() &&
+ instr->elements()->representation().IsTagged()) ||
+ (instr->is_external() &&
+ instr->elements()->representation().IsExternal()));
+ LOperand* val = UseRegister(instr->value());
+ LOperand* key = UseRegisterOrConstantAtStart(instr->key());
+ LOperand* backing_store = UseRegister(instr->elements());
+ return new (zone()) LStoreKeyed(backing_store, key, val);
+}
+
+
+LInstruction* LChunkBuilder::DoStoreKeyedGeneric(HStoreKeyedGeneric* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* obj =
+ UseFixed(instr->object(), StoreDescriptor::ReceiverRegister());
+ LOperand* key = UseFixed(instr->key(), StoreDescriptor::NameRegister());
+ LOperand* val = UseFixed(instr->value(), StoreDescriptor::ValueRegister());
+
+ DCHECK(instr->object()->representation().IsTagged());
+ DCHECK(instr->key()->representation().IsTagged());
+ DCHECK(instr->value()->representation().IsTagged());
+
+ LOperand* slot = NULL;
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ slot = FixedTemp(VectorStoreICDescriptor::SlotRegister());
+ vector = FixedTemp(VectorStoreICDescriptor::VectorRegister());
+ }
+
+ LStoreKeyedGeneric* result =
+ new (zone()) LStoreKeyedGeneric(context, obj, key, val, slot, vector);
+ return MarkAsCall(result, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoTransitionElementsKind(
+ HTransitionElementsKind* instr) {
+ if (IsSimpleMapChangeTransition(instr->from_kind(), instr->to_kind())) {
+ LOperand* object = UseRegister(instr->object());
+ LOperand* new_map_reg = TempRegister();
+ LTransitionElementsKind* result =
+ new (zone()) LTransitionElementsKind(object, NULL, new_map_reg);
+ return result;
+ } else {
+ LOperand* object = UseFixed(instr->object(), r2);
+ LOperand* context = UseFixed(instr->context(), cp);
+ LTransitionElementsKind* result =
+ new (zone()) LTransitionElementsKind(object, context, NULL);
+ return MarkAsCall(result, instr);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoTrapAllocationMemento(
+ HTrapAllocationMemento* instr) {
+ LOperand* object = UseRegister(instr->object());
+ LOperand* temp = TempRegister();
+ LTrapAllocationMemento* result =
+ new (zone()) LTrapAllocationMemento(object, temp);
+ return AssignEnvironment(result);
+}
+
+
+LInstruction* LChunkBuilder::DoMaybeGrowElements(HMaybeGrowElements* instr) {
+ info()->MarkAsDeferredCalling();
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* object = Use(instr->object());
+ LOperand* elements = Use(instr->elements());
+ LOperand* key = UseRegisterOrConstant(instr->key());
+ LOperand* current_capacity = UseRegisterOrConstant(instr->current_capacity());
+
+ LMaybeGrowElements* result = new (zone())
+ LMaybeGrowElements(context, object, elements, key, current_capacity);
+ DefineFixed(result, r2);
+ return AssignPointerMap(AssignEnvironment(result));
+}
+
+
+LInstruction* LChunkBuilder::DoStoreNamedField(HStoreNamedField* instr) {
+ bool is_in_object = instr->access().IsInobject();
+ bool needs_write_barrier = instr->NeedsWriteBarrier();
+ bool needs_write_barrier_for_map =
+ instr->has_transition() && instr->NeedsWriteBarrierForMap();
+
+ LOperand* obj;
+ if (needs_write_barrier) {
+ obj = is_in_object ? UseRegister(instr->object())
+ : UseTempRegister(instr->object());
+ } else {
+ obj = needs_write_barrier_for_map ? UseRegister(instr->object())
+ : UseRegisterAtStart(instr->object());
+ }
+
+ LOperand* val;
+ if (needs_write_barrier) {
+ val = UseTempRegister(instr->value());
+ } else if (instr->field_representation().IsDouble()) {
+ val = UseRegisterAtStart(instr->value());
+ } else {
+ val = UseRegister(instr->value());
+ }
+
+ // We need a temporary register for write barrier of the map field.
+ LOperand* temp = needs_write_barrier_for_map ? TempRegister() : NULL;
+
+ return new (zone()) LStoreNamedField(obj, val, temp);
+}
+
+
+LInstruction* LChunkBuilder::DoStoreNamedGeneric(HStoreNamedGeneric* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* obj =
+ UseFixed(instr->object(), StoreDescriptor::ReceiverRegister());
+ LOperand* val = UseFixed(instr->value(), StoreDescriptor::ValueRegister());
+ LOperand* slot = NULL;
+ LOperand* vector = NULL;
+ if (instr->HasVectorAndSlot()) {
+ slot = FixedTemp(VectorStoreICDescriptor::SlotRegister());
+ vector = FixedTemp(VectorStoreICDescriptor::VectorRegister());
+ }
+
+ LStoreNamedGeneric* result =
+ new (zone()) LStoreNamedGeneric(context, obj, val, slot, vector);
+ return MarkAsCall(result, instr);
+}
+
+
+LInstruction* LChunkBuilder::DoStringAdd(HStringAdd* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* left = UseFixed(instr->left(), r3);
+ LOperand* right = UseFixed(instr->right(), r2);
+ return MarkAsCall(
+ DefineFixed(new (zone()) LStringAdd(context, left, right), r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoStringCharCodeAt(HStringCharCodeAt* instr) {
+ LOperand* string = UseTempRegister(instr->string());
+ LOperand* index = UseTempRegister(instr->index());
+ LOperand* context = UseAny(instr->context());
+ LStringCharCodeAt* result =
+ new (zone()) LStringCharCodeAt(context, string, index);
+ return AssignPointerMap(DefineAsRegister(result));
+}
+
+
+LInstruction* LChunkBuilder::DoStringCharFromCode(HStringCharFromCode* instr) {
+ LOperand* char_code = UseRegister(instr->value());
+ LOperand* context = UseAny(instr->context());
+ LStringCharFromCode* result =
+ new (zone()) LStringCharFromCode(context, char_code);
+ return AssignPointerMap(DefineAsRegister(result));
+}
+
+
+LInstruction* LChunkBuilder::DoAllocate(HAllocate* instr) {
+ info()->MarkAsDeferredCalling();
+ LOperand* context = UseAny(instr->context());
+ LOperand* size = UseRegisterOrConstant(instr->size());
+ LOperand* temp1 = TempRegister();
+ LOperand* temp2 = TempRegister();
+ LAllocate* result = new (zone()) LAllocate(context, size, temp1, temp2);
+ return AssignPointerMap(DefineAsRegister(result));
+}
+
+
+LInstruction* LChunkBuilder::DoRegExpLiteral(HRegExpLiteral* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(DefineFixed(new (zone()) LRegExpLiteral(context), r2),
+ instr);
+}
+
+
+LInstruction* LChunkBuilder::DoFunctionLiteral(HFunctionLiteral* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(DefineFixed(new (zone()) LFunctionLiteral(context), r2),
+ instr);
+}
+
+
+LInstruction* LChunkBuilder::DoOsrEntry(HOsrEntry* instr) {
+ DCHECK(argument_count_ == 0);
+ allocator_->MarkAsOsrEntry();
+ current_block_->last_environment()->set_ast_id(instr->ast_id());
+ return AssignEnvironment(new (zone()) LOsrEntry);
+}
+
+
+LInstruction* LChunkBuilder::DoParameter(HParameter* instr) {
+ LParameter* result = new (zone()) LParameter;
+ if (instr->kind() == HParameter::STACK_PARAMETER) {
+ int spill_index = chunk()->GetParameterStackSlot(instr->index());
+ return DefineAsSpilled(result, spill_index);
+ } else {
+ DCHECK(info()->IsStub());
+ CallInterfaceDescriptor descriptor =
+ info()->code_stub()->GetCallInterfaceDescriptor();
+ int index = static_cast<int>(instr->index());
+ Register reg = descriptor.GetRegisterParameter(index);
+ return DefineFixed(result, reg);
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoUnknownOSRValue(HUnknownOSRValue* instr) {
+ // Use an index that corresponds to the location in the unoptimized frame,
+ // which the optimized frame will subsume.
+ int env_index = instr->index();
+ int spill_index = 0;
+ if (instr->environment()->is_parameter_index(env_index)) {
+ spill_index = chunk()->GetParameterStackSlot(env_index);
+ } else {
+ spill_index = env_index - instr->environment()->first_local_index();
+ if (spill_index > LUnallocated::kMaxFixedSlotIndex) {
+ Retry(kTooManySpillSlotsNeededForOSR);
+ spill_index = 0;
+ }
+ }
+ return DefineAsSpilled(new (zone()) LUnknownOSRValue, spill_index);
+}
+
+
+LInstruction* LChunkBuilder::DoCallStub(HCallStub* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(DefineFixed(new (zone()) LCallStub(context), r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoArgumentsObject(HArgumentsObject* instr) {
+ // There are no real uses of the arguments object.
+ // arguments.length and element access are supported directly on
+ // stack arguments, and any real arguments object use causes a bailout.
+ // So this value is never used.
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoCapturedObject(HCapturedObject* instr) {
+ instr->ReplayEnvironment(current_block_->last_environment());
+
+ // There are no real uses of a captured object.
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoAccessArgumentsAt(HAccessArgumentsAt* instr) {
+ info()->MarkAsRequiresFrame();
+ LOperand* args = UseRegister(instr->arguments());
+ LOperand* length = UseRegisterOrConstantAtStart(instr->length());
+ LOperand* index = UseRegisterOrConstantAtStart(instr->index());
+ return DefineAsRegister(new (zone()) LAccessArgumentsAt(args, length, index));
+}
+
+
+LInstruction* LChunkBuilder::DoToFastProperties(HToFastProperties* instr) {
+ LOperand* object = UseFixed(instr->value(), r2);
+ LToFastProperties* result = new (zone()) LToFastProperties(object);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoTypeof(HTypeof* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* value = UseFixed(instr->value(), r5);
+ LTypeof* result = new (zone()) LTypeof(context, value);
+ return MarkAsCall(DefineFixed(result, r2), instr);
+}
+
+
+LInstruction* LChunkBuilder::DoTypeofIsAndBranch(HTypeofIsAndBranch* instr) {
+ return new (zone()) LTypeofIsAndBranch(UseRegister(instr->value()));
+}
+
+
+LInstruction* LChunkBuilder::DoIsConstructCallAndBranch(
+ HIsConstructCallAndBranch* instr) {
+ return new (zone()) LIsConstructCallAndBranch(TempRegister());
+}
+
+
+LInstruction* LChunkBuilder::DoSimulate(HSimulate* instr) {
+ instr->ReplayEnvironment(current_block_->last_environment());
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoStackCheck(HStackCheck* instr) {
+ if (instr->is_function_entry()) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ return MarkAsCall(new (zone()) LStackCheck(context), instr);
+ } else {
+ DCHECK(instr->is_backwards_branch());
+ LOperand* context = UseAny(instr->context());
+ return AssignEnvironment(
+ AssignPointerMap(new (zone()) LStackCheck(context)));
+ }
+}
+
+
+LInstruction* LChunkBuilder::DoEnterInlined(HEnterInlined* instr) {
+ HEnvironment* outer = current_block_->last_environment();
+ outer->set_ast_id(instr->ReturnId());
+ HConstant* undefined = graph()->GetConstantUndefined();
+ HEnvironment* inner = outer->CopyForInlining(
+ instr->closure(), instr->arguments_count(), instr->function(), undefined,
+ instr->inlining_kind());
+ // Only replay binding of arguments object if it wasn't removed from graph.
+ if (instr->arguments_var() != NULL && instr->arguments_object()->IsLinked()) {
+ inner->Bind(instr->arguments_var(), instr->arguments_object());
+ }
+ inner->BindContext(instr->closure_context());
+ inner->set_entry(instr);
+ current_block_->UpdateEnvironment(inner);
+ chunk_->AddInlinedFunction(instr->shared());
+ return NULL;
+}
+
+
+LInstruction* LChunkBuilder::DoLeaveInlined(HLeaveInlined* instr) {
+ LInstruction* pop = NULL;
+
+ HEnvironment* env = current_block_->last_environment();
+
+ if (env->entry()->arguments_pushed()) {
+ int argument_count = env->arguments_environment()->parameter_count();
+ pop = new (zone()) LDrop(argument_count);
+ DCHECK(instr->argument_delta() == -argument_count);
+ }
+
+ HEnvironment* outer =
+ current_block_->last_environment()->DiscardInlined(false);
+ current_block_->UpdateEnvironment(outer);
+
+ return pop;
+}
+
+
+LInstruction* LChunkBuilder::DoForInPrepareMap(HForInPrepareMap* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* object = UseFixed(instr->enumerable(), r2);
+ LForInPrepareMap* result = new (zone()) LForInPrepareMap(context, object);
+ return MarkAsCall(DefineFixed(result, r2), instr, CAN_DEOPTIMIZE_EAGERLY);
+}
+
+
+LInstruction* LChunkBuilder::DoForInCacheArray(HForInCacheArray* instr) {
+ LOperand* map = UseRegister(instr->map());
+ return AssignEnvironment(
+ DefineAsRegister(new (zone()) LForInCacheArray(map)));
+}
+
+
+LInstruction* LChunkBuilder::DoCheckMapValue(HCheckMapValue* instr) {
+ LOperand* value = UseRegisterAtStart(instr->value());
+ LOperand* map = UseRegisterAtStart(instr->map());
+ return AssignEnvironment(new (zone()) LCheckMapValue(value, map));
+}
+
+
+LInstruction* LChunkBuilder::DoLoadFieldByIndex(HLoadFieldByIndex* instr) {
+ LOperand* object = UseRegister(instr->object());
+ LOperand* index = UseTempRegister(instr->index());
+ LLoadFieldByIndex* load = new (zone()) LLoadFieldByIndex(object, index);
+ LInstruction* result = DefineSameAsFirst(load);
+ return AssignPointerMap(result);
+}
+
+
+LInstruction* LChunkBuilder::DoStoreFrameContext(HStoreFrameContext* instr) {
+ LOperand* context = UseRegisterAtStart(instr->context());
+ return new (zone()) LStoreFrameContext(context);
+}
+
+
+LInstruction* LChunkBuilder::DoAllocateBlockContext(
+ HAllocateBlockContext* instr) {
+ LOperand* context = UseFixed(instr->context(), cp);
+ LOperand* function = UseRegisterAtStart(instr->function());
+ LAllocateBlockContext* result =
+ new (zone()) LAllocateBlockContext(context, function);
+ return MarkAsCall(DefineFixed(result, cp), instr);
+}
+} // namespace internal
+} // namespace v8
--- /dev/null
+++ b/deps/v8/src/s390/lithium-s390.h
@@ -0,0 +1,2773 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_LITHIUM_S390_H_
+#define V8_S390_LITHIUM_S390_H_
+
+#include "src/hydrogen.h"
+#include "src/lithium.h"
+#include "src/lithium-allocator.h"
+#include "src/safepoint-table.h"
+#include "src/utils.h"
+
+namespace v8 {
+namespace internal {
+
+// Forward declarations.
+class LCodeGen;
+
+#define LITHIUM_CONCRETE_INSTRUCTION_LIST(V) \
+ V(AccessArgumentsAt) \
+ V(AddI) \
+ V(Allocate) \
+ V(AllocateBlockContext) \
+ V(ApplyArguments) \
+ V(ArgumentsElements) \
+ V(ArgumentsLength) \
+ V(ArithmeticD) \
+ V(ArithmeticT) \
+ V(BitI) \
+ V(BoundsCheck) \
+ V(Branch) \
+ V(CallJSFunction) \
+ V(CallWithDescriptor) \
+ V(CallFunction) \
+ V(CallNew) \
+ V(CallNewArray) \
+ V(CallRuntime) \
+ V(CallStub) \
+ V(CheckArrayBufferNotNeutered) \
+ V(CheckInstanceType) \
+ V(CheckNonSmi) \
+ V(CheckMaps) \
+ V(CheckMapValue) \
+ V(CheckSmi) \
+ V(CheckValue) \
+ V(ClampDToUint8) \
+ V(ClampIToUint8) \
+ V(ClampTToUint8) \
+ V(ClassOfTestAndBranch) \
+ V(CompareMinusZeroAndBranch) \
+ V(CompareNumericAndBranch) \
+ V(CmpObjectEqAndBranch) \
+ V(CmpHoleAndBranch) \
+ V(CmpMapAndBranch) \
+ V(CmpT) \
+ V(ConstantD) \
+ V(ConstantE) \
+ V(ConstantI) \
+ V(ConstantS) \
+ V(ConstantT) \
+ V(ConstructDouble) \
+ V(Context) \
+ V(DateField) \
+ V(DebugBreak) \
+ V(DeclareGlobals) \
+ V(Deoptimize) \
+ V(DivByConstI) \
+ V(DivByPowerOf2I) \
+ V(DivI) \
+ V(DoubleBits) \
+ V(DoubleToI) \
+ V(DoubleToSmi) \
+ V(Drop) \
+ V(Dummy) \
+ V(DummyUse) \
+ V(FlooringDivByConstI) \
+ V(FlooringDivByPowerOf2I) \
+ V(FlooringDivI) \
+ V(ForInCacheArray) \
+ V(ForInPrepareMap) \
+ V(FunctionLiteral) \
+ V(GetCachedArrayIndex) \
+ V(Goto) \
+ V(HasCachedArrayIndexAndBranch) \
+ V(HasInstanceTypeAndBranch) \
+ V(InnerAllocatedObject) \
+ V(InstanceOf) \
+ V(InstanceOfKnownGlobal) \
+ V(InstructionGap) \
+ V(Integer32ToDouble) \
+ V(InvokeFunction) \
+ V(IsConstructCallAndBranch) \
+ V(IsObjectAndBranch) \
+ V(IsStringAndBranch) \
+ V(IsSmiAndBranch) \
+ V(IsUndetectableAndBranch) \
+ V(Label) \
+ V(LazyBailout) \
+ V(LoadContextSlot) \
+ V(LoadRoot) \
+ V(LoadFieldByIndex) \
+ V(LoadFunctionPrototype) \
+ V(LoadGlobalGeneric) \
+ V(LoadKeyed) \
+ V(LoadKeyedGeneric) \
+ V(LoadNamedField) \
+ V(LoadNamedGeneric) \
+ V(MapEnumLength) \
+ V(MathAbs) \
+ V(MathClz32) \
+ V(MathExp) \
+ V(MathFloor) \
+ V(MathFround) \
+ V(MathLog) \
+ V(MathMinMax) \
+ V(MathPowHalf) \
+ V(MathRound) \
+ V(MathSqrt) \
+ V(MaybeGrowElements) \
+ V(ModByConstI) \
+ V(ModByPowerOf2I) \
+ V(ModI) \
+ V(MulI) \
+ V(MultiplyAddD) \
+ V(MultiplySubD) \
+ V(NumberTagD) \
+ V(NumberTagI) \
+ V(NumberTagU) \
+ V(NumberUntagD) \
+ V(OsrEntry) \
+ V(Parameter) \
+ V(Power) \
+ V(PushArgument) \
+ V(RegExpLiteral) \
+ V(Return) \
+ V(SeqStringGetChar) \
+ V(SeqStringSetChar) \
+ V(ShiftI) \
+ V(SmiTag) \
+ V(SmiUntag) \
+ V(StackCheck) \
+ V(StoreCodeEntry) \
+ V(StoreContextSlot) \
+ V(StoreFrameContext) \
+ V(StoreKeyed) \
+ V(StoreKeyedGeneric) \
+ V(StoreNamedField) \
+ V(StoreNamedGeneric) \
+ V(StringAdd) \
+ V(StringCharCodeAt) \
+ V(StringCharFromCode) \
+ V(StringCompareAndBranch) \
+ V(SubI) \
+ V(RSubI) \
+ V(TaggedToI) \
+ V(ThisFunction) \
+ V(ToFastProperties) \
+ V(TransitionElementsKind) \
+ V(TrapAllocationMemento) \
+ V(Typeof) \
+ V(TypeofIsAndBranch) \
+ V(Uint32ToDouble) \
+ V(UnknownOSRValue) \
+ V(WrapReceiver)
+
+
+#define DECLARE_CONCRETE_INSTRUCTION(type, mnemonic) \
+ Opcode opcode() const final { return LInstruction::k##type; } \
+ void CompileToNative(LCodeGen* generator) final; \
+ const char* Mnemonic() const final { return mnemonic; } \
+ static L##type* cast(LInstruction* instr) { \
+ DCHECK(instr->Is##type()); \
+ return reinterpret_cast<L##type*>(instr); \
+ }
+
+
+#define DECLARE_HYDROGEN_ACCESSOR(type) \
+ H##type* hydrogen() const { return H##type::cast(hydrogen_value()); }
+
+
+class LInstruction : public ZoneObject {
+ public:
+ LInstruction()
+ : environment_(NULL),
+ hydrogen_value_(NULL),
+ bit_field_(IsCallBits::encode(false)) {}
+
+ virtual ~LInstruction() {}
+
+ virtual void CompileToNative(LCodeGen* generator) = 0;
+ virtual const char* Mnemonic() const = 0;
+ virtual void PrintTo(StringStream* stream);
+ virtual void PrintDataTo(StringStream* stream);
+ virtual void PrintOutputOperandTo(StringStream* stream);
+
+ enum Opcode {
+// Declare a unique enum value for each instruction.
+#define DECLARE_OPCODE(type) k##type,
+ LITHIUM_CONCRETE_INSTRUCTION_LIST(DECLARE_OPCODE) kNumberOfInstructions
+#undef DECLARE_OPCODE
+ };
+
+ virtual Opcode opcode() const = 0;
+
+// Declare non-virtual type testers for all leaf IR classes.
+#define DECLARE_PREDICATE(type) \
+ bool Is##type() const { return opcode() == k##type; }
+ LITHIUM_CONCRETE_INSTRUCTION_LIST(DECLARE_PREDICATE)
+#undef DECLARE_PREDICATE
+
+ // Declare virtual predicates for instructions that don't have
+ // an opcode.
+ virtual bool IsGap() const { return false; }
+
+ virtual bool IsControl() const { return false; }
+
+ // Try deleting this instruction if possible.
+ virtual bool TryDelete() { return false; }
+
+ void set_environment(LEnvironment* env) { environment_ = env; }
+ LEnvironment* environment() const { return environment_; }
+ bool HasEnvironment() const { return environment_ != NULL; }
+
+ void set_pointer_map(LPointerMap* p) { pointer_map_.set(p); }
+ LPointerMap* pointer_map() const { return pointer_map_.get(); }
+ bool HasPointerMap() const { return pointer_map_.is_set(); }
+
+ void set_hydrogen_value(HValue* value) { hydrogen_value_ = value; }
+ HValue* hydrogen_value() const { return hydrogen_value_; }
+
+ virtual void SetDeferredLazyDeoptimizationEnvironment(LEnvironment* env) {}
+
+ void MarkAsCall() { bit_field_ = IsCallBits::update(bit_field_, true); }
+ bool IsCall() const { return IsCallBits::decode(bit_field_); }
+
+ // Interface to the register allocator and iterators.
+ bool ClobbersTemps() const { return IsCall(); }
+ bool ClobbersRegisters() const { return IsCall(); }
+ virtual bool ClobbersDoubleRegisters(Isolate* isolate) const {
+ return IsCall();
+ }
+
+ // Interface to the register allocator and iterators.
+ bool IsMarkedAsCall() const { return IsCall(); }
+
+ virtual bool HasResult() const = 0;
+ virtual LOperand* result() const = 0;
+
+ LOperand* FirstInput() { return InputAt(0); }
+ LOperand* Output() { return HasResult() ? result() : NULL; }
+
+ virtual bool HasInterestingComment(LCodeGen* gen) const { return true; }
+
+#ifdef DEBUG
+ void VerifyCall();
+#endif
+
+ virtual int InputCount() = 0;
+ virtual LOperand* InputAt(int i) = 0;
+
+ private:
+ // Iterator support.
+ friend class InputIterator;
+
+ friend class TempIterator;
+ virtual int TempCount() = 0;
+ virtual LOperand* TempAt(int i) = 0;
+
+ class IsCallBits : public BitField<bool, 0, 1> {};
+
+ LEnvironment* environment_;
+ SetOncePointer<LPointerMap> pointer_map_;
+ HValue* hydrogen_value_;
+ int bit_field_;
+};
+
+
+// R = number of result operands (0 or 1).
+template <int R>
+class LTemplateResultInstruction : public LInstruction {
+ public:
+ // Allow 0 or 1 output operands.
+ STATIC_ASSERT(R == 0 || R == 1);
+ bool HasResult() const final { return R != 0 && result() != NULL; }
+ void set_result(LOperand* operand) { results_[0] = operand; }
+ LOperand* result() const override { return results_[0]; }
+
+ protected:
+ EmbeddedContainer<LOperand*, R> results_;
+};
+
+
+// R = number of result operands (0 or 1).
+// I = number of input operands.
+// T = number of temporary operands.
+template <int R, int I, int T>
+class LTemplateInstruction : public LTemplateResultInstruction<R> {
+ protected:
+ EmbeddedContainer<LOperand*, I> inputs_;
+ EmbeddedContainer<LOperand*, T> temps_;
+
+ private:
+ // Iterator support.
+ int InputCount() final { return I; }
+ LOperand* InputAt(int i) final { return inputs_[i]; }
+
+ int TempCount() final { return T; }
+ LOperand* TempAt(int i) final { return temps_[i]; }
+};
+
+
+class LGap : public LTemplateInstruction<0, 0, 0> {
+ public:
+ explicit LGap(HBasicBlock* block) : block_(block) {
+ parallel_moves_[BEFORE] = NULL;
+ parallel_moves_[START] = NULL;
+ parallel_moves_[END] = NULL;
+ parallel_moves_[AFTER] = NULL;
+ }
+
+ // Can't use the DECLARE-macro here because of sub-classes.
+ bool IsGap() const override { return true; }
+ void PrintDataTo(StringStream* stream) override;
+ static LGap* cast(LInstruction* instr) {
+ DCHECK(instr->IsGap());
+ return reinterpret_cast<LGap*>(instr);
+ }
+
+ bool IsRedundant() const;
+
+ HBasicBlock* block() const { return block_; }
+
+ enum InnerPosition {
+ BEFORE,
+ START,
+ END,
+ AFTER,
+ FIRST_INNER_POSITION = BEFORE,
+ LAST_INNER_POSITION = AFTER
+ };
+
+ LParallelMove* GetOrCreateParallelMove(InnerPosition pos, Zone* zone) {
+ if (parallel_moves_[pos] == NULL) {
+ parallel_moves_[pos] = new (zone) LParallelMove(zone);
+ }
+ return parallel_moves_[pos];
+ }
+
+ LParallelMove* GetParallelMove(InnerPosition pos) {
+ return parallel_moves_[pos];
+ }
+
+ private:
+ LParallelMove* parallel_moves_[LAST_INNER_POSITION + 1];
+ HBasicBlock* block_;
+};
+
+
+class LInstructionGap final : public LGap {
+ public:
+ explicit LInstructionGap(HBasicBlock* block) : LGap(block) {}
+
+ bool HasInterestingComment(LCodeGen* gen) const override {
+ return !IsRedundant();
+ }
+
+ DECLARE_CONCRETE_INSTRUCTION(InstructionGap, "gap")
+};
+
+
+class LGoto final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ explicit LGoto(HBasicBlock* block) : block_(block) {}
+
+ bool HasInterestingComment(LCodeGen* gen) const override;
+ DECLARE_CONCRETE_INSTRUCTION(Goto, "goto")
+ void PrintDataTo(StringStream* stream) override;
+ bool IsControl() const override { return true; }
+
+ int block_id() const { return block_->block_id(); }
+
+ private:
+ HBasicBlock* block_;
+};
+
+
+class LLazyBailout final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ LLazyBailout() : gap_instructions_size_(0) {}
+
+ DECLARE_CONCRETE_INSTRUCTION(LazyBailout, "lazy-bailout")
+
+ void set_gap_instructions_size(int gap_instructions_size) {
+ gap_instructions_size_ = gap_instructions_size;
+ }
+ int gap_instructions_size() { return gap_instructions_size_; }
+
+ private:
+ int gap_instructions_size_;
+};
+
+
+class LDummy final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ LDummy() {}
+ DECLARE_CONCRETE_INSTRUCTION(Dummy, "dummy")
+};
+
+
+class LDummyUse final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LDummyUse(LOperand* value) { inputs_[0] = value; }
+ DECLARE_CONCRETE_INSTRUCTION(DummyUse, "dummy-use")
+};
+
+
+class LDeoptimize final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ bool IsControl() const override { return true; }
+ DECLARE_CONCRETE_INSTRUCTION(Deoptimize, "deoptimize")
+ DECLARE_HYDROGEN_ACCESSOR(Deoptimize)
+};
+
+
+class LLabel final : public LGap {
+ public:
+ explicit LLabel(HBasicBlock* block) : LGap(block), replacement_(NULL) {}
+
+ bool HasInterestingComment(LCodeGen* gen) const override { return false; }
+ DECLARE_CONCRETE_INSTRUCTION(Label, "label")
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int block_id() const { return block()->block_id(); }
+ bool is_loop_header() const { return block()->IsLoopHeader(); }
+ bool is_osr_entry() const { return block()->is_osr_entry(); }
+ Label* label() { return &label_; }
+ LLabel* replacement() const { return replacement_; }
+ void set_replacement(LLabel* label) { replacement_ = label; }
+ bool HasReplacement() const { return replacement_ != NULL; }
+
+ private:
+ Label label_;
+ LLabel* replacement_;
+};
+
+
+class LParameter final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ virtual bool HasInterestingComment(LCodeGen* gen) const { return false; }
+ DECLARE_CONCRETE_INSTRUCTION(Parameter, "parameter")
+};
+
+
+class LCallStub final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LCallStub(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallStub, "call-stub")
+ DECLARE_HYDROGEN_ACCESSOR(CallStub)
+};
+
+
+class LUnknownOSRValue final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ bool HasInterestingComment(LCodeGen* gen) const override { return false; }
+ DECLARE_CONCRETE_INSTRUCTION(UnknownOSRValue, "unknown-osr-value")
+};
+
+
+template <int I, int T>
+class LControlInstruction : public LTemplateInstruction<0, I, T> {
+ public:
+ LControlInstruction() : false_label_(NULL), true_label_(NULL) {}
+
+ bool IsControl() const final { return true; }
+
+ int SuccessorCount() { return hydrogen()->SuccessorCount(); }
+ HBasicBlock* SuccessorAt(int i) { return hydrogen()->SuccessorAt(i); }
+
+ int TrueDestination(LChunk* chunk) {
+ return chunk->LookupDestination(true_block_id());
+ }
+ int FalseDestination(LChunk* chunk) {
+ return chunk->LookupDestination(false_block_id());
+ }
+
+ Label* TrueLabel(LChunk* chunk) {
+ if (true_label_ == NULL) {
+ true_label_ = chunk->GetAssemblyLabel(TrueDestination(chunk));
+ }
+ return true_label_;
+ }
+ Label* FalseLabel(LChunk* chunk) {
+ if (false_label_ == NULL) {
+ false_label_ = chunk->GetAssemblyLabel(FalseDestination(chunk));
+ }
+ return false_label_;
+ }
+
+ protected:
+ int true_block_id() { return SuccessorAt(0)->block_id(); }
+ int false_block_id() { return SuccessorAt(1)->block_id(); }
+
+ private:
+ HControlInstruction* hydrogen() {
+ return HControlInstruction::cast(this->hydrogen_value());
+ }
+
+ Label* false_label_;
+ Label* true_label_;
+};
+
+
+class LWrapReceiver final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LWrapReceiver(LOperand* receiver, LOperand* function) {
+ inputs_[0] = receiver;
+ inputs_[1] = function;
+ }
+
+ DECLARE_CONCRETE_INSTRUCTION(WrapReceiver, "wrap-receiver")
+ DECLARE_HYDROGEN_ACCESSOR(WrapReceiver)
+
+ LOperand* receiver() { return inputs_[0]; }
+ LOperand* function() { return inputs_[1]; }
+};
+
+
+class LApplyArguments final : public LTemplateInstruction<1, 4, 0> {
+ public:
+ LApplyArguments(LOperand* function, LOperand* receiver, LOperand* length,
+ LOperand* elements) {
+ inputs_[0] = function;
+ inputs_[1] = receiver;
+ inputs_[2] = length;
+ inputs_[3] = elements;
+ }
+
+ DECLARE_CONCRETE_INSTRUCTION(ApplyArguments, "apply-arguments")
+
+ LOperand* function() { return inputs_[0]; }
+ LOperand* receiver() { return inputs_[1]; }
+ LOperand* length() { return inputs_[2]; }
+ LOperand* elements() { return inputs_[3]; }
+};
+
+
+class LAccessArgumentsAt final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LAccessArgumentsAt(LOperand* arguments, LOperand* length, LOperand* index) {
+ inputs_[0] = arguments;
+ inputs_[1] = length;
+ inputs_[2] = index;
+ }
+
+ DECLARE_CONCRETE_INSTRUCTION(AccessArgumentsAt, "access-arguments-at")
+
+ LOperand* arguments() { return inputs_[0]; }
+ LOperand* length() { return inputs_[1]; }
+ LOperand* index() { return inputs_[2]; }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LArgumentsLength final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LArgumentsLength(LOperand* elements) { inputs_[0] = elements; }
+
+ LOperand* elements() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ArgumentsLength, "arguments-length")
+};
+
+
+class LArgumentsElements final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ArgumentsElements, "arguments-elements")
+ DECLARE_HYDROGEN_ACCESSOR(ArgumentsElements)
+};
+
+
+class LModByPowerOf2I final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LModByPowerOf2I(LOperand* dividend, int32_t divisor) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() const { return divisor_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ModByPowerOf2I, "mod-by-power-of-2-i")
+ DECLARE_HYDROGEN_ACCESSOR(Mod)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LModByConstI final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LModByConstI(LOperand* dividend, int32_t divisor) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() const { return divisor_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ModByConstI, "mod-by-const-i")
+ DECLARE_HYDROGEN_ACCESSOR(Mod)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LModI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LModI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ModI, "mod-i")
+ DECLARE_HYDROGEN_ACCESSOR(Mod)
+};
+
+
+class LDivByPowerOf2I final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LDivByPowerOf2I(LOperand* dividend, int32_t divisor) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() const { return divisor_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DivByPowerOf2I, "div-by-power-of-2-i")
+ DECLARE_HYDROGEN_ACCESSOR(Div)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LDivByConstI final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LDivByConstI(LOperand* dividend, int32_t divisor) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() const { return divisor_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DivByConstI, "div-by-const-i")
+ DECLARE_HYDROGEN_ACCESSOR(Div)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LDivI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LDivI(LOperand* dividend, LOperand* divisor) {
+ inputs_[0] = dividend;
+ inputs_[1] = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ LOperand* divisor() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DivI, "div-i")
+ DECLARE_HYDROGEN_ACCESSOR(BinaryOperation)
+};
+
+
+class LFlooringDivByPowerOf2I final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LFlooringDivByPowerOf2I(LOperand* dividend, int32_t divisor) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() { return divisor_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(FlooringDivByPowerOf2I,
+ "flooring-div-by-power-of-2-i")
+ DECLARE_HYDROGEN_ACCESSOR(MathFloorOfDiv)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LFlooringDivByConstI final : public LTemplateInstruction<1, 1, 1> {
+ public:
+ LFlooringDivByConstI(LOperand* dividend, int32_t divisor, LOperand* temp) {
+ inputs_[0] = dividend;
+ divisor_ = divisor;
+ temps_[0] = temp;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ int32_t divisor() const { return divisor_; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(FlooringDivByConstI, "flooring-div-by-const-i")
+ DECLARE_HYDROGEN_ACCESSOR(MathFloorOfDiv)
+
+ private:
+ int32_t divisor_;
+};
+
+
+class LFlooringDivI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LFlooringDivI(LOperand* dividend, LOperand* divisor) {
+ inputs_[0] = dividend;
+ inputs_[1] = divisor;
+ }
+
+ LOperand* dividend() { return inputs_[0]; }
+ LOperand* divisor() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(FlooringDivI, "flooring-div-i")
+ DECLARE_HYDROGEN_ACCESSOR(MathFloorOfDiv)
+};
+
+
+class LMulI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LMulI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MulI, "mul-i")
+ DECLARE_HYDROGEN_ACCESSOR(Mul)
+};
+
+
+// Instruction for computing multiplier * multiplicand + addend.
+class LMultiplyAddD final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LMultiplyAddD(LOperand* addend, LOperand* multiplier,
+ LOperand* multiplicand) {
+ inputs_[0] = addend;
+ inputs_[1] = multiplier;
+ inputs_[2] = multiplicand;
+ }
+
+ LOperand* addend() { return inputs_[0]; }
+ LOperand* multiplier() { return inputs_[1]; }
+ LOperand* multiplicand() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MultiplyAddD, "multiply-add-d")
+};
+
+
+// Instruction for computing minuend - multiplier * multiplicand.
+class LMultiplySubD final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LMultiplySubD(LOperand* minuend, LOperand* multiplier,
+ LOperand* multiplicand) {
+ inputs_[0] = minuend;
+ inputs_[1] = multiplier;
+ inputs_[2] = multiplicand;
+ }
+
+ LOperand* minuend() { return inputs_[0]; }
+ LOperand* multiplier() { return inputs_[1]; }
+ LOperand* multiplicand() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MultiplySubD, "multiply-sub-d")
+};
+
+
+class LDebugBreak final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(DebugBreak, "break")
+};
+
+
+class LCompareNumericAndBranch final : public LControlInstruction<2, 0> {
+ public:
+ LCompareNumericAndBranch(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CompareNumericAndBranch,
+ "compare-numeric-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(CompareNumericAndBranch)
+
+ Token::Value op() const { return hydrogen()->token(); }
+ bool is_double() const { return hydrogen()->representation().IsDouble(); }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LMathFloor final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathFloor(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathFloor, "math-floor")
+ DECLARE_HYDROGEN_ACCESSOR(UnaryMathOperation)
+};
+
+
+class LMathRound final : public LTemplateInstruction<1, 1, 1> {
+ public:
+ LMathRound(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathRound, "math-round")
+ DECLARE_HYDROGEN_ACCESSOR(UnaryMathOperation)
+};
+
+
+class LMathFround final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathFround(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathFround, "math-fround")
+};
+
+
+class LMathAbs final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LMathAbs(LOperand* context, LOperand* value) {
+ inputs_[1] = context;
+ inputs_[0] = value;
+ }
+
+ LOperand* context() { return inputs_[1]; }
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathAbs, "math-abs")
+ DECLARE_HYDROGEN_ACCESSOR(UnaryMathOperation)
+};
+
+
+class LMathLog final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathLog(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathLog, "math-log")
+};
+
+
+class LMathClz32 final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathClz32(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathClz32, "math-clz32")
+};
+
+
+class LMathExp final : public LTemplateInstruction<1, 1, 3> {
+ public:
+ LMathExp(LOperand* value, LOperand* double_temp, LOperand* temp1,
+ LOperand* temp2) {
+ inputs_[0] = value;
+ temps_[0] = temp1;
+ temps_[1] = temp2;
+ temps_[2] = double_temp;
+ ExternalReference::InitializeMathExpData();
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp1() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+ LOperand* double_temp() { return temps_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathExp, "math-exp")
+};
+
+
+class LMathSqrt final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathSqrt(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathSqrt, "math-sqrt")
+};
+
+
+class LMathPowHalf final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMathPowHalf(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathPowHalf, "math-pow-half")
+};
+
+
+class LCmpObjectEqAndBranch final : public LControlInstruction<2, 0> {
+ public:
+ LCmpObjectEqAndBranch(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CmpObjectEqAndBranch, "cmp-object-eq-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(CompareObjectEqAndBranch)
+};
+
+
+class LCmpHoleAndBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LCmpHoleAndBranch(LOperand* object) { inputs_[0] = object; }
+
+ LOperand* object() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CmpHoleAndBranch, "cmp-hole-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(CompareHoleAndBranch)
+};
+
+
+class LCompareMinusZeroAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ LCompareMinusZeroAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CompareMinusZeroAndBranch,
+ "cmp-minus-zero-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(CompareMinusZeroAndBranch)
+};
+
+
+class LIsObjectAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ LIsObjectAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(IsObjectAndBranch, "is-object-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(IsObjectAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LIsStringAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ LIsStringAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(IsStringAndBranch, "is-string-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(IsStringAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LIsSmiAndBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LIsSmiAndBranch(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(IsSmiAndBranch, "is-smi-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(IsSmiAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LIsUndetectableAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ explicit LIsUndetectableAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(IsUndetectableAndBranch,
+ "is-undetectable-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(IsUndetectableAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LStringCompareAndBranch final : public LControlInstruction<3, 0> {
+ public:
+ LStringCompareAndBranch(LOperand* context, LOperand* left, LOperand* right) {
+ inputs_[0] = context;
+ inputs_[1] = left;
+ inputs_[2] = right;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* left() { return inputs_[1]; }
+ LOperand* right() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StringCompareAndBranch,
+ "string-compare-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(StringCompareAndBranch)
+
+ Token::Value op() const { return hydrogen()->token(); }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LHasInstanceTypeAndBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LHasInstanceTypeAndBranch(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(HasInstanceTypeAndBranch,
+ "has-instance-type-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(HasInstanceTypeAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LGetCachedArrayIndex final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LGetCachedArrayIndex(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(GetCachedArrayIndex, "get-cached-array-index")
+ DECLARE_HYDROGEN_ACCESSOR(GetCachedArrayIndex)
+};
+
+
+class LHasCachedArrayIndexAndBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LHasCachedArrayIndexAndBranch(LOperand* value) {
+ inputs_[0] = value;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(HasCachedArrayIndexAndBranch,
+ "has-cached-array-index-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(HasCachedArrayIndexAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LClassOfTestAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ LClassOfTestAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ClassOfTestAndBranch, "class-of-test-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(ClassOfTestAndBranch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LCmpT final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LCmpT(LOperand* context, LOperand* left, LOperand* right) {
+ inputs_[0] = context;
+ inputs_[1] = left;
+ inputs_[2] = right;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* left() { return inputs_[1]; }
+ LOperand* right() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CmpT, "cmp-t")
+ DECLARE_HYDROGEN_ACCESSOR(CompareGeneric)
+
+ Strength strength() { return hydrogen()->strength(); }
+
+ Token::Value op() const { return hydrogen()->token(); }
+};
+
+
+class LInstanceOf final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LInstanceOf(LOperand* context, LOperand* left, LOperand* right) {
+ inputs_[0] = context;
+ inputs_[1] = left;
+ inputs_[2] = right;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* left() { return inputs_[1]; }
+ LOperand* right() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(InstanceOf, "instance-of")
+};
+
+
+class LInstanceOfKnownGlobal final : public LTemplateInstruction<1, 2, 1> {
+ public:
+ LInstanceOfKnownGlobal(LOperand* context, LOperand* value, LOperand* temp) {
+ inputs_[0] = context;
+ inputs_[1] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* value() { return inputs_[1]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(InstanceOfKnownGlobal,
+ "instance-of-known-global")
+ DECLARE_HYDROGEN_ACCESSOR(InstanceOfKnownGlobal)
+
+ Handle<JSFunction> function() const { return hydrogen()->function(); }
+ LEnvironment* GetDeferredLazyDeoptimizationEnvironment() {
+ return lazy_deopt_env_;
+ }
+ virtual void SetDeferredLazyDeoptimizationEnvironment(
+ LEnvironment* env) override {
+ lazy_deopt_env_ = env;
+ }
+
+ private:
+ LEnvironment* lazy_deopt_env_;
+};
+
+
+class LBoundsCheck final : public LTemplateInstruction<0, 2, 0> {
+ public:
+ LBoundsCheck(LOperand* index, LOperand* length) {
+ inputs_[0] = index;
+ inputs_[1] = length;
+ }
+
+ LOperand* index() { return inputs_[0]; }
+ LOperand* length() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(BoundsCheck, "bounds-check")
+ DECLARE_HYDROGEN_ACCESSOR(BoundsCheck)
+};
+
+
+class LBitI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LBitI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ Token::Value op() const { return hydrogen()->op(); }
+
+ DECLARE_CONCRETE_INSTRUCTION(BitI, "bit-i")
+ DECLARE_HYDROGEN_ACCESSOR(Bitwise)
+};
+
+
+class LShiftI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LShiftI(Token::Value op, LOperand* left, LOperand* right, bool can_deopt)
+ : op_(op), can_deopt_(can_deopt) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ Token::Value op() const { return op_; }
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+ bool can_deopt() const { return can_deopt_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ShiftI, "shift-i")
+
+ private:
+ Token::Value op_;
+ bool can_deopt_;
+};
+
+
+class LSubI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LSubI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(SubI, "sub-i")
+ DECLARE_HYDROGEN_ACCESSOR(Sub)
+};
+
+
+class LRSubI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LRSubI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(RSubI, "rsub-i")
+ DECLARE_HYDROGEN_ACCESSOR(Sub)
+};
+
+
+class LConstantI final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ConstantI, "constant-i")
+ DECLARE_HYDROGEN_ACCESSOR(Constant)
+
+ int32_t value() const { return hydrogen()->Integer32Value(); }
+};
+
+
+class LConstantS final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ConstantS, "constant-s")
+ DECLARE_HYDROGEN_ACCESSOR(Constant)
+
+ Smi* value() const { return Smi::FromInt(hydrogen()->Integer32Value()); }
+};
+
+
+class LConstantD final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ConstantD, "constant-d")
+ DECLARE_HYDROGEN_ACCESSOR(Constant)
+
+ double value() const { return hydrogen()->DoubleValue(); }
+
+ uint64_t bits() const { return hydrogen()->DoubleValueAsBits(); }
+};
+
+
+class LConstantE final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ConstantE, "constant-e")
+ DECLARE_HYDROGEN_ACCESSOR(Constant)
+
+ ExternalReference value() const {
+ return hydrogen()->ExternalReferenceValue();
+ }
+};
+
+
+class LConstantT final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ConstantT, "constant-t")
+ DECLARE_HYDROGEN_ACCESSOR(Constant)
+
+ Handle<Object> value(Isolate* isolate) const {
+ return hydrogen()->handle(isolate);
+ }
+};
+
+
+class LBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LBranch(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Branch, "branch")
+ DECLARE_HYDROGEN_ACCESSOR(Branch)
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LCmpMapAndBranch final : public LControlInstruction<1, 1> {
+ public:
+ LCmpMapAndBranch(LOperand* value, LOperand* temp) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CmpMapAndBranch, "cmp-map-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(CompareMap)
+
+ Handle<Map> map() const { return hydrogen()->map().handle(); }
+};
+
+
+class LMapEnumLength final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LMapEnumLength(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MapEnumLength, "map-enum-length")
+};
+
+
+class LDateField final : public LTemplateInstruction<1, 1, 1> {
+ public:
+ LDateField(LOperand* date, LOperand* temp, Smi* index) : index_(index) {
+ inputs_[0] = date;
+ temps_[0] = temp;
+ }
+
+ LOperand* date() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+ Smi* index() const { return index_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DateField, "date-field")
+ DECLARE_HYDROGEN_ACCESSOR(DateField)
+
+ private:
+ Smi* index_;
+};
+
+
+class LSeqStringGetChar final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LSeqStringGetChar(LOperand* string, LOperand* index) {
+ inputs_[0] = string;
+ inputs_[1] = index;
+ }
+
+ LOperand* string() const { return inputs_[0]; }
+ LOperand* index() const { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(SeqStringGetChar, "seq-string-get-char")
+ DECLARE_HYDROGEN_ACCESSOR(SeqStringGetChar)
+};
+
+
+class LSeqStringSetChar final : public LTemplateInstruction<1, 4, 0> {
+ public:
+ LSeqStringSetChar(LOperand* context, LOperand* string, LOperand* index,
+ LOperand* value) {
+ inputs_[0] = context;
+ inputs_[1] = string;
+ inputs_[2] = index;
+ inputs_[3] = value;
+ }
+
+ LOperand* string() { return inputs_[1]; }
+ LOperand* index() { return inputs_[2]; }
+ LOperand* value() { return inputs_[3]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(SeqStringSetChar, "seq-string-set-char")
+ DECLARE_HYDROGEN_ACCESSOR(SeqStringSetChar)
+};
+
+
+class LAddI final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LAddI(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(AddI, "add-i")
+ DECLARE_HYDROGEN_ACCESSOR(Add)
+};
+
+
+class LMathMinMax final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LMathMinMax(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(MathMinMax, "math-min-max")
+ DECLARE_HYDROGEN_ACCESSOR(MathMinMax)
+};
+
+
+class LPower final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LPower(LOperand* left, LOperand* right) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Power, "power")
+ DECLARE_HYDROGEN_ACCESSOR(Power)
+};
+
+
+class LArithmeticD final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LArithmeticD(Token::Value op, LOperand* left, LOperand* right) : op_(op) {
+ inputs_[0] = left;
+ inputs_[1] = right;
+ }
+
+ Token::Value op() const { return op_; }
+ LOperand* left() { return inputs_[0]; }
+ LOperand* right() { return inputs_[1]; }
+
+ Opcode opcode() const override { return LInstruction::kArithmeticD; }
+ void CompileToNative(LCodeGen* generator) override;
+ const char* Mnemonic() const override;
+
+ private:
+ Token::Value op_;
+};
+
+
+class LArithmeticT final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LArithmeticT(Token::Value op, LOperand* context, LOperand* left,
+ LOperand* right)
+ : op_(op) {
+ inputs_[0] = context;
+ inputs_[1] = left;
+ inputs_[2] = right;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* left() { return inputs_[1]; }
+ LOperand* right() { return inputs_[2]; }
+ Token::Value op() const { return op_; }
+
+ Opcode opcode() const override { return LInstruction::kArithmeticT; }
+ void CompileToNative(LCodeGen* generator) override;
+ const char* Mnemonic() const override;
+
+ DECLARE_HYDROGEN_ACCESSOR(BinaryOperation)
+
+ Strength strength() { return hydrogen()->strength(); }
+
+ private:
+ Token::Value op_;
+};
+
+
+class LReturn final : public LTemplateInstruction<0, 3, 0> {
+ public:
+ LReturn(LOperand* value, LOperand* context, LOperand* parameter_count) {
+ inputs_[0] = value;
+ inputs_[1] = context;
+ inputs_[2] = parameter_count;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+
+ bool has_constant_parameter_count() {
+ return parameter_count()->IsConstantOperand();
+ }
+ LConstantOperand* constant_parameter_count() {
+ DCHECK(has_constant_parameter_count());
+ return LConstantOperand::cast(parameter_count());
+ }
+ LOperand* parameter_count() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Return, "return")
+};
+
+
+class LLoadNamedField final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LLoadNamedField(LOperand* object) { inputs_[0] = object; }
+
+ LOperand* object() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadNamedField, "load-named-field")
+ DECLARE_HYDROGEN_ACCESSOR(LoadNamedField)
+};
+
+
+class LLoadNamedGeneric final : public LTemplateInstruction<1, 2, 1> {
+ public:
+ LLoadNamedGeneric(LOperand* context, LOperand* object, LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ temps_[0] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+ LOperand* temp_vector() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadNamedGeneric, "load-named-generic")
+ DECLARE_HYDROGEN_ACCESSOR(LoadNamedGeneric)
+
+ Handle<Object> name() const { return hydrogen()->name(); }
+};
+
+
+class LLoadFunctionPrototype final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LLoadFunctionPrototype(LOperand* function) { inputs_[0] = function; }
+
+ LOperand* function() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadFunctionPrototype, "load-function-prototype")
+ DECLARE_HYDROGEN_ACCESSOR(LoadFunctionPrototype)
+};
+
+
+class LLoadRoot final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(LoadRoot, "load-root")
+ DECLARE_HYDROGEN_ACCESSOR(LoadRoot)
+
+ Heap::RootListIndex index() const { return hydrogen()->index(); }
+};
+
+
+class LLoadKeyed final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LLoadKeyed(LOperand* elements, LOperand* key) {
+ inputs_[0] = elements;
+ inputs_[1] = key;
+ }
+
+ LOperand* elements() { return inputs_[0]; }
+ LOperand* key() { return inputs_[1]; }
+ ElementsKind elements_kind() const { return hydrogen()->elements_kind(); }
+ bool is_external() const { return hydrogen()->is_external(); }
+ bool is_fixed_typed_array() const {
+ return hydrogen()->is_fixed_typed_array();
+ }
+ bool is_typed_elements() const {
+ return is_external() || is_fixed_typed_array();
+ }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadKeyed, "load-keyed")
+ DECLARE_HYDROGEN_ACCESSOR(LoadKeyed)
+
+ void PrintDataTo(StringStream* stream) override;
+ uint32_t base_offset() const { return hydrogen()->base_offset(); }
+};
+
+
+class LLoadKeyedGeneric final : public LTemplateInstruction<1, 3, 1> {
+ public:
+ LLoadKeyedGeneric(LOperand* context, LOperand* object, LOperand* key,
+ LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ inputs_[2] = key;
+ temps_[0] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+ LOperand* key() { return inputs_[2]; }
+ LOperand* temp_vector() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadKeyedGeneric, "load-keyed-generic")
+ DECLARE_HYDROGEN_ACCESSOR(LoadKeyedGeneric)
+};
+
+
+class LLoadGlobalGeneric final : public LTemplateInstruction<1, 2, 1> {
+ public:
+ LLoadGlobalGeneric(LOperand* context, LOperand* global_object,
+ LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = global_object;
+ temps_[0] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* global_object() { return inputs_[1]; }
+ LOperand* temp_vector() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadGlobalGeneric, "load-global-generic")
+ DECLARE_HYDROGEN_ACCESSOR(LoadGlobalGeneric)
+
+ Handle<Object> name() const { return hydrogen()->name(); }
+ bool for_typeof() const { return hydrogen()->for_typeof(); }
+};
+
+
+class LLoadContextSlot final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LLoadContextSlot(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadContextSlot, "load-context-slot")
+ DECLARE_HYDROGEN_ACCESSOR(LoadContextSlot)
+
+ int slot_index() { return hydrogen()->slot_index(); }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LStoreContextSlot final : public LTemplateInstruction<0, 2, 0> {
+ public:
+ LStoreContextSlot(LOperand* context, LOperand* value) {
+ inputs_[0] = context;
+ inputs_[1] = value;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* value() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreContextSlot, "store-context-slot")
+ DECLARE_HYDROGEN_ACCESSOR(StoreContextSlot)
+
+ int slot_index() { return hydrogen()->slot_index(); }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LPushArgument final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LPushArgument(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(PushArgument, "push-argument")
+};
+
+
+class LDrop final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ explicit LDrop(int count) : count_(count) {}
+
+ int count() const { return count_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Drop, "drop")
+
+ private:
+ int count_;
+};
+
+
+class LStoreCodeEntry final : public LTemplateInstruction<0, 2, 0> {
+ public:
+ LStoreCodeEntry(LOperand* function, LOperand* code_object) {
+ inputs_[0] = function;
+ inputs_[1] = code_object;
+ }
+
+ LOperand* function() { return inputs_[0]; }
+ LOperand* code_object() { return inputs_[1]; }
+
+ void PrintDataTo(StringStream* stream) override;
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreCodeEntry, "store-code-entry")
+ DECLARE_HYDROGEN_ACCESSOR(StoreCodeEntry)
+};
+
+
+class LInnerAllocatedObject final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LInnerAllocatedObject(LOperand* base_object, LOperand* offset) {
+ inputs_[0] = base_object;
+ inputs_[1] = offset;
+ }
+
+ LOperand* base_object() const { return inputs_[0]; }
+ LOperand* offset() const { return inputs_[1]; }
+
+ void PrintDataTo(StringStream* stream) override;
+
+ DECLARE_CONCRETE_INSTRUCTION(InnerAllocatedObject, "inner-allocated-object")
+};
+
+
+class LThisFunction final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(ThisFunction, "this-function")
+ DECLARE_HYDROGEN_ACCESSOR(ThisFunction)
+};
+
+
+class LContext final : public LTemplateInstruction<1, 0, 0> {
+ public:
+ DECLARE_CONCRETE_INSTRUCTION(Context, "context")
+ DECLARE_HYDROGEN_ACCESSOR(Context)
+};
+
+
+class LDeclareGlobals final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LDeclareGlobals(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DeclareGlobals, "declare-globals")
+ DECLARE_HYDROGEN_ACCESSOR(DeclareGlobals)
+};
+
+
+class LCallJSFunction final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LCallJSFunction(LOperand* function) { inputs_[0] = function; }
+
+ LOperand* function() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallJSFunction, "call-js-function")
+ DECLARE_HYDROGEN_ACCESSOR(CallJSFunction)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+};
+
+
+class LCallWithDescriptor final : public LTemplateResultInstruction<1> {
+ public:
+ LCallWithDescriptor(CallInterfaceDescriptor descriptor,
+ const ZoneList<LOperand*>& operands, Zone* zone)
+ : descriptor_(descriptor),
+ inputs_(descriptor.GetRegisterParameterCount() +
+ kImplicitRegisterParameterCount,
+ zone) {
+ DCHECK(descriptor.GetRegisterParameterCount() +
+ kImplicitRegisterParameterCount ==
+ operands.length());
+ inputs_.AddAll(operands, zone);
+ }
+
+ LOperand* target() const { return inputs_[0]; }
+
+ const CallInterfaceDescriptor descriptor() { return descriptor_; }
+
+ DECLARE_HYDROGEN_ACCESSOR(CallWithDescriptor)
+
+ // The target and context are passed as implicit parameters that are not
+ // explicitly listed in the descriptor.
+ static const int kImplicitRegisterParameterCount = 2;
+
+ private:
+ DECLARE_CONCRETE_INSTRUCTION(CallWithDescriptor, "call-with-descriptor")
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+
+ CallInterfaceDescriptor descriptor_;
+ ZoneList<LOperand*> inputs_;
+
+ // Iterator support.
+ int InputCount() final { return inputs_.length(); }
+ LOperand* InputAt(int i) final { return inputs_[i]; }
+
+ int TempCount() final { return 0; }
+ LOperand* TempAt(int i) final { return NULL; }
+};
+
+
+class LInvokeFunction final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LInvokeFunction(LOperand* context, LOperand* function) {
+ inputs_[0] = context;
+ inputs_[1] = function;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* function() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(InvokeFunction, "invoke-function")
+ DECLARE_HYDROGEN_ACCESSOR(InvokeFunction)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+};
+
+
+class LCallFunction final : public LTemplateInstruction<1, 2, 2> {
+ public:
+ LCallFunction(LOperand* context, LOperand* function, LOperand* slot,
+ LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = function;
+ temps_[0] = slot;
+ temps_[1] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* function() { return inputs_[1]; }
+ LOperand* temp_slot() { return temps_[0]; }
+ LOperand* temp_vector() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallFunction, "call-function")
+ DECLARE_HYDROGEN_ACCESSOR(CallFunction)
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LCallNew final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LCallNew(LOperand* context, LOperand* constructor) {
+ inputs_[0] = context;
+ inputs_[1] = constructor;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* constructor() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallNew, "call-new")
+ DECLARE_HYDROGEN_ACCESSOR(CallNew)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+};
+
+
+class LCallNewArray final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LCallNewArray(LOperand* context, LOperand* constructor) {
+ inputs_[0] = context;
+ inputs_[1] = constructor;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* constructor() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallNewArray, "call-new-array")
+ DECLARE_HYDROGEN_ACCESSOR(CallNewArray)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ int arity() const { return hydrogen()->argument_count() - 1; }
+};
+
+
+class LCallRuntime final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LCallRuntime(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CallRuntime, "call-runtime")
+ DECLARE_HYDROGEN_ACCESSOR(CallRuntime)
+
+ bool ClobbersDoubleRegisters(Isolate* isolate) const override {
+ return save_doubles() == kDontSaveFPRegs;
+ }
+
+ const Runtime::Function* function() const { return hydrogen()->function(); }
+ int arity() const { return hydrogen()->argument_count(); }
+ SaveFPRegsMode save_doubles() const { return hydrogen()->save_doubles(); }
+};
+
+
+class LInteger32ToDouble final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LInteger32ToDouble(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Integer32ToDouble, "int32-to-double")
+};
+
+
+class LUint32ToDouble final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LUint32ToDouble(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Uint32ToDouble, "uint32-to-double")
+};
+
+
+class LNumberTagI final : public LTemplateInstruction<1, 1, 2> {
+ public:
+ LNumberTagI(LOperand* value, LOperand* temp1, LOperand* temp2) {
+ inputs_[0] = value;
+ temps_[0] = temp1;
+ temps_[1] = temp2;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp1() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(NumberTagI, "number-tag-i")
+};
+
+
+class LNumberTagU final : public LTemplateInstruction<1, 1, 2> {
+ public:
+ LNumberTagU(LOperand* value, LOperand* temp1, LOperand* temp2) {
+ inputs_[0] = value;
+ temps_[0] = temp1;
+ temps_[1] = temp2;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp1() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(NumberTagU, "number-tag-u")
+};
+
+
+class LNumberTagD final : public LTemplateInstruction<1, 1, 2> {
+ public:
+ LNumberTagD(LOperand* value, LOperand* temp, LOperand* temp2) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ temps_[1] = temp2;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(NumberTagD, "number-tag-d")
+ DECLARE_HYDROGEN_ACCESSOR(Change)
+};
+
+
+class LDoubleToSmi final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LDoubleToSmi(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DoubleToSmi, "double-to-smi")
+ DECLARE_HYDROGEN_ACCESSOR(UnaryOperation)
+
+ bool truncating() { return hydrogen()->CanTruncateToInt32(); }
+};
+
+
+// Sometimes truncating conversion from a tagged value to an int32.
+class LDoubleToI final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LDoubleToI(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DoubleToI, "double-to-i")
+ DECLARE_HYDROGEN_ACCESSOR(UnaryOperation)
+
+ bool truncating() { return hydrogen()->CanTruncateToInt32(); }
+};
+
+
+// Truncating conversion from a tagged value to an int32.
+class LTaggedToI final : public LTemplateInstruction<1, 1, 2> {
+ public:
+ LTaggedToI(LOperand* value, LOperand* temp, LOperand* temp2) {
+ inputs_[0] = value;
+ temps_[0] = temp;
+ temps_[1] = temp2;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(TaggedToI, "tagged-to-i")
+ DECLARE_HYDROGEN_ACCESSOR(Change)
+
+ bool truncating() { return hydrogen()->CanTruncateToInt32(); }
+};
+
+
+class LSmiTag final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LSmiTag(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(SmiTag, "smi-tag")
+ DECLARE_HYDROGEN_ACCESSOR(Change)
+};
+
+
+class LNumberUntagD final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LNumberUntagD(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(NumberUntagD, "double-untag")
+ DECLARE_HYDROGEN_ACCESSOR(Change)
+};
+
+
+class LSmiUntag final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ LSmiUntag(LOperand* value, bool needs_check) : needs_check_(needs_check) {
+ inputs_[0] = value;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ bool needs_check() const { return needs_check_; }
+
+ DECLARE_CONCRETE_INSTRUCTION(SmiUntag, "smi-untag")
+
+ private:
+ bool needs_check_;
+};
+
+
+class LStoreNamedField final : public LTemplateInstruction<0, 2, 1> {
+ public:
+ LStoreNamedField(LOperand* object, LOperand* value, LOperand* temp) {
+ inputs_[0] = object;
+ inputs_[1] = value;
+ temps_[0] = temp;
+ }
+
+ LOperand* object() { return inputs_[0]; }
+ LOperand* value() { return inputs_[1]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreNamedField, "store-named-field")
+ DECLARE_HYDROGEN_ACCESSOR(StoreNamedField)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ Representation representation() const {
+ return hydrogen()->field_representation();
+ }
+};
+
+
+class LStoreNamedGeneric final : public LTemplateInstruction<0, 3, 2> {
+ public:
+ LStoreNamedGeneric(LOperand* context, LOperand* object, LOperand* value,
+ LOperand* slot, LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ inputs_[2] = value;
+ temps_[0] = slot;
+ temps_[1] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+ LOperand* value() { return inputs_[2]; }
+ LOperand* temp_slot() { return temps_[0]; }
+ LOperand* temp_vector() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreNamedGeneric, "store-named-generic")
+ DECLARE_HYDROGEN_ACCESSOR(StoreNamedGeneric)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ Handle<Object> name() const { return hydrogen()->name(); }
+ LanguageMode language_mode() { return hydrogen()->language_mode(); }
+};
+
+
+class LStoreKeyed final : public LTemplateInstruction<0, 3, 0> {
+ public:
+ LStoreKeyed(LOperand* object, LOperand* key, LOperand* value) {
+ inputs_[0] = object;
+ inputs_[1] = key;
+ inputs_[2] = value;
+ }
+
+ bool is_external() const { return hydrogen()->is_external(); }
+ bool is_fixed_typed_array() const {
+ return hydrogen()->is_fixed_typed_array();
+ }
+ bool is_typed_elements() const {
+ return is_external() || is_fixed_typed_array();
+ }
+ LOperand* elements() { return inputs_[0]; }
+ LOperand* key() { return inputs_[1]; }
+ LOperand* value() { return inputs_[2]; }
+ ElementsKind elements_kind() const { return hydrogen()->elements_kind(); }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreKeyed, "store-keyed")
+ DECLARE_HYDROGEN_ACCESSOR(StoreKeyed)
+
+ void PrintDataTo(StringStream* stream) override;
+ bool NeedsCanonicalization() {
+ if (hydrogen()->value()->IsAdd() || hydrogen()->value()->IsSub() ||
+ hydrogen()->value()->IsMul() || hydrogen()->value()->IsDiv()) {
+ return false;
+ }
+ return hydrogen()->NeedsCanonicalization();
+ }
+ uint32_t base_offset() const { return hydrogen()->base_offset(); }
+};
+
+
+class LStoreKeyedGeneric final : public LTemplateInstruction<0, 4, 2> {
+ public:
+ LStoreKeyedGeneric(LOperand* context, LOperand* object, LOperand* key,
+ LOperand* value, LOperand* slot, LOperand* vector) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ inputs_[2] = key;
+ inputs_[3] = value;
+ temps_[0] = slot;
+ temps_[1] = vector;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+ LOperand* key() { return inputs_[2]; }
+ LOperand* value() { return inputs_[3]; }
+ LOperand* temp_slot() { return temps_[0]; }
+ LOperand* temp_vector() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreKeyedGeneric, "store-keyed-generic")
+ DECLARE_HYDROGEN_ACCESSOR(StoreKeyedGeneric)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ LanguageMode language_mode() { return hydrogen()->language_mode(); }
+};
+
+
+class LTransitionElementsKind final : public LTemplateInstruction<0, 2, 1> {
+ public:
+ LTransitionElementsKind(LOperand* object, LOperand* context,
+ LOperand* new_map_temp) {
+ inputs_[0] = object;
+ inputs_[1] = context;
+ temps_[0] = new_map_temp;
+ }
+
+ LOperand* context() { return inputs_[1]; }
+ LOperand* object() { return inputs_[0]; }
+ LOperand* new_map_temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(TransitionElementsKind,
+ "transition-elements-kind")
+ DECLARE_HYDROGEN_ACCESSOR(TransitionElementsKind)
+
+ void PrintDataTo(StringStream* stream) override;
+
+ Handle<Map> original_map() { return hydrogen()->original_map().handle(); }
+ Handle<Map> transitioned_map() {
+ return hydrogen()->transitioned_map().handle();
+ }
+ ElementsKind from_kind() { return hydrogen()->from_kind(); }
+ ElementsKind to_kind() { return hydrogen()->to_kind(); }
+};
+
+
+class LTrapAllocationMemento final : public LTemplateInstruction<0, 1, 1> {
+ public:
+ LTrapAllocationMemento(LOperand* object, LOperand* temp) {
+ inputs_[0] = object;
+ temps_[0] = temp;
+ }
+
+ LOperand* object() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(TrapAllocationMemento, "trap-allocation-memento")
+};
+
+
+class LMaybeGrowElements final : public LTemplateInstruction<1, 5, 0> {
+ public:
+ LMaybeGrowElements(LOperand* context, LOperand* object, LOperand* elements,
+ LOperand* key, LOperand* current_capacity) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ inputs_[2] = elements;
+ inputs_[3] = key;
+ inputs_[4] = current_capacity;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+ LOperand* elements() { return inputs_[2]; }
+ LOperand* key() { return inputs_[3]; }
+ LOperand* current_capacity() { return inputs_[4]; }
+
+ DECLARE_HYDROGEN_ACCESSOR(MaybeGrowElements)
+ DECLARE_CONCRETE_INSTRUCTION(MaybeGrowElements, "maybe-grow-elements")
+};
+
+
+class LStringAdd final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LStringAdd(LOperand* context, LOperand* left, LOperand* right) {
+ inputs_[0] = context;
+ inputs_[1] = left;
+ inputs_[2] = right;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* left() { return inputs_[1]; }
+ LOperand* right() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StringAdd, "string-add")
+ DECLARE_HYDROGEN_ACCESSOR(StringAdd)
+};
+
+
+class LStringCharCodeAt final : public LTemplateInstruction<1, 3, 0> {
+ public:
+ LStringCharCodeAt(LOperand* context, LOperand* string, LOperand* index) {
+ inputs_[0] = context;
+ inputs_[1] = string;
+ inputs_[2] = index;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* string() { return inputs_[1]; }
+ LOperand* index() { return inputs_[2]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StringCharCodeAt, "string-char-code-at")
+ DECLARE_HYDROGEN_ACCESSOR(StringCharCodeAt)
+};
+
+
+class LStringCharFromCode final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ explicit LStringCharFromCode(LOperand* context, LOperand* char_code) {
+ inputs_[0] = context;
+ inputs_[1] = char_code;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* char_code() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StringCharFromCode, "string-char-from-code")
+ DECLARE_HYDROGEN_ACCESSOR(StringCharFromCode)
+};
+
+
+class LCheckValue final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LCheckValue(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckValue, "check-value")
+ DECLARE_HYDROGEN_ACCESSOR(CheckValue)
+};
+
+
+class LCheckArrayBufferNotNeutered final
+ : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LCheckArrayBufferNotNeutered(LOperand* view) { inputs_[0] = view; }
+
+ LOperand* view() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckArrayBufferNotNeutered,
+ "check-array-buffer-not-neutered")
+ DECLARE_HYDROGEN_ACCESSOR(CheckArrayBufferNotNeutered)
+};
+
+
+class LCheckInstanceType final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LCheckInstanceType(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckInstanceType, "check-instance-type")
+ DECLARE_HYDROGEN_ACCESSOR(CheckInstanceType)
+};
+
+
+class LCheckMaps final : public LTemplateInstruction<0, 1, 1> {
+ public:
+ explicit LCheckMaps(LOperand* value = NULL) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckMaps, "check-maps")
+ DECLARE_HYDROGEN_ACCESSOR(CheckMaps)
+};
+
+
+class LCheckSmi final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LCheckSmi(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckSmi, "check-smi")
+};
+
+
+class LCheckNonSmi final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LCheckNonSmi(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckNonSmi, "check-non-smi")
+ DECLARE_HYDROGEN_ACCESSOR(CheckHeapObject)
+};
+
+
+class LClampDToUint8 final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LClampDToUint8(LOperand* unclamped) { inputs_[0] = unclamped; }
+
+ LOperand* unclamped() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ClampDToUint8, "clamp-d-to-uint8")
+};
+
+
+class LClampIToUint8 final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LClampIToUint8(LOperand* unclamped) { inputs_[0] = unclamped; }
+
+ LOperand* unclamped() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ClampIToUint8, "clamp-i-to-uint8")
+};
+
+
+class LClampTToUint8 final : public LTemplateInstruction<1, 1, 1> {
+ public:
+ LClampTToUint8(LOperand* unclamped, LOperand* temp) {
+ inputs_[0] = unclamped;
+ temps_[0] = temp;
+ }
+
+ LOperand* unclamped() { return inputs_[0]; }
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ClampTToUint8, "clamp-t-to-uint8")
+};
+
+
+class LDoubleBits final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LDoubleBits(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(DoubleBits, "double-bits")
+ DECLARE_HYDROGEN_ACCESSOR(DoubleBits)
+};
+
+
+class LConstructDouble final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LConstructDouble(LOperand* hi, LOperand* lo) {
+ inputs_[0] = hi;
+ inputs_[1] = lo;
+ }
+
+ LOperand* hi() { return inputs_[0]; }
+ LOperand* lo() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ConstructDouble, "construct-double")
+};
+
+
+class LAllocate final : public LTemplateInstruction<1, 2, 2> {
+ public:
+ LAllocate(LOperand* context, LOperand* size, LOperand* temp1,
+ LOperand* temp2) {
+ inputs_[0] = context;
+ inputs_[1] = size;
+ temps_[0] = temp1;
+ temps_[1] = temp2;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* size() { return inputs_[1]; }
+ LOperand* temp1() { return temps_[0]; }
+ LOperand* temp2() { return temps_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Allocate, "allocate")
+ DECLARE_HYDROGEN_ACCESSOR(Allocate)
+};
+
+
+class LRegExpLiteral final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LRegExpLiteral(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(RegExpLiteral, "regexp-literal")
+ DECLARE_HYDROGEN_ACCESSOR(RegExpLiteral)
+};
+
+
+class LFunctionLiteral final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LFunctionLiteral(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(FunctionLiteral, "function-literal")
+ DECLARE_HYDROGEN_ACCESSOR(FunctionLiteral)
+};
+
+
+class LToFastProperties final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LToFastProperties(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ToFastProperties, "to-fast-properties")
+ DECLARE_HYDROGEN_ACCESSOR(ToFastProperties)
+};
+
+
+class LTypeof final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LTypeof(LOperand* context, LOperand* value) {
+ inputs_[0] = context;
+ inputs_[1] = value;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* value() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(Typeof, "typeof")
+};
+
+
+class LTypeofIsAndBranch final : public LControlInstruction<1, 0> {
+ public:
+ explicit LTypeofIsAndBranch(LOperand* value) { inputs_[0] = value; }
+
+ LOperand* value() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(TypeofIsAndBranch, "typeof-is-and-branch")
+ DECLARE_HYDROGEN_ACCESSOR(TypeofIsAndBranch)
+
+ Handle<String> type_literal() { return hydrogen()->type_literal(); }
+
+ void PrintDataTo(StringStream* stream) override;
+};
+
+
+class LIsConstructCallAndBranch final : public LControlInstruction<0, 1> {
+ public:
+ explicit LIsConstructCallAndBranch(LOperand* temp) { temps_[0] = temp; }
+
+ LOperand* temp() { return temps_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(IsConstructCallAndBranch,
+ "is-construct-call-and-branch")
+};
+
+
+class LOsrEntry final : public LTemplateInstruction<0, 0, 0> {
+ public:
+ LOsrEntry() {}
+
+ bool HasInterestingComment(LCodeGen* gen) const override { return false; }
+ DECLARE_CONCRETE_INSTRUCTION(OsrEntry, "osr-entry")
+};
+
+
+class LStackCheck final : public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LStackCheck(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StackCheck, "stack-check")
+ DECLARE_HYDROGEN_ACCESSOR(StackCheck)
+
+ Label* done_label() { return &done_label_; }
+
+ private:
+ Label done_label_;
+};
+
+
+class LForInPrepareMap final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LForInPrepareMap(LOperand* context, LOperand* object) {
+ inputs_[0] = context;
+ inputs_[1] = object;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* object() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ForInPrepareMap, "for-in-prepare-map")
+};
+
+
+class LForInCacheArray final : public LTemplateInstruction<1, 1, 0> {
+ public:
+ explicit LForInCacheArray(LOperand* map) { inputs_[0] = map; }
+
+ LOperand* map() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(ForInCacheArray, "for-in-cache-array")
+
+ int idx() { return HForInCacheArray::cast(this->hydrogen_value())->idx(); }
+};
+
+
+class LCheckMapValue final : public LTemplateInstruction<0, 2, 0> {
+ public:
+ LCheckMapValue(LOperand* value, LOperand* map) {
+ inputs_[0] = value;
+ inputs_[1] = map;
+ }
+
+ LOperand* value() { return inputs_[0]; }
+ LOperand* map() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(CheckMapValue, "check-map-value")
+};
+
+
+class LLoadFieldByIndex final : public LTemplateInstruction<1, 2, 0> {
+ public:
+ LLoadFieldByIndex(LOperand* object, LOperand* index) {
+ inputs_[0] = object;
+ inputs_[1] = index;
+ }
+
+ LOperand* object() { return inputs_[0]; }
+ LOperand* index() { return inputs_[1]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(LoadFieldByIndex, "load-field-by-index")
+};
+
+
+class LStoreFrameContext: public LTemplateInstruction<0, 1, 0> {
+ public:
+ explicit LStoreFrameContext(LOperand* context) { inputs_[0] = context; }
+
+ LOperand* context() { return inputs_[0]; }
+
+ DECLARE_CONCRETE_INSTRUCTION(StoreFrameContext, "store-frame-context")
+};
+
+
+class LAllocateBlockContext: public LTemplateInstruction<1, 2, 0> {
+ public:
+ LAllocateBlockContext(LOperand* context, LOperand* function) {
+ inputs_[0] = context;
+ inputs_[1] = function;
+ }
+
+ LOperand* context() { return inputs_[0]; }
+ LOperand* function() { return inputs_[1]; }
+
+ Handle<ScopeInfo> scope_info() { return hydrogen()->scope_info(); }
+
+ DECLARE_CONCRETE_INSTRUCTION(AllocateBlockContext, "allocate-block-context")
+ DECLARE_HYDROGEN_ACCESSOR(AllocateBlockContext)
+};
+
+
+class LChunkBuilder;
+class LPlatformChunk final : public LChunk {
+ public:
+ LPlatformChunk(CompilationInfo* info, HGraph* graph) : LChunk(info, graph) {}
+
+ int GetNextSpillIndex(RegisterKind kind);
+ LOperand* GetNextSpillSlot(RegisterKind kind);
+};
+
+
+class LChunkBuilder final : public LChunkBuilderBase {
+ public:
+ LChunkBuilder(CompilationInfo* info, HGraph* graph, LAllocator* allocator)
+ : LChunkBuilderBase(info, graph),
+ current_instruction_(NULL),
+ current_block_(NULL),
+ next_block_(NULL),
+ allocator_(allocator) {}
+
+ // Build the sequence for the graph.
+ LPlatformChunk* Build();
+
+// Declare methods that deal with the individual node types.
+#define DECLARE_DO(type) LInstruction* Do##type(H##type* node);
+ HYDROGEN_CONCRETE_INSTRUCTION_LIST(DECLARE_DO)
+#undef DECLARE_DO
+
+ LInstruction* DoMultiplyAdd(HMul* mul, HValue* addend);
+ LInstruction* DoMultiplySub(HValue* minuend, HMul* mul);
+ LInstruction* DoRSub(HSub* instr);
+
+ static bool HasMagicNumberForDivisor(int32_t divisor);
+
+ LInstruction* DoMathFloor(HUnaryMathOperation* instr);
+ LInstruction* DoMathRound(HUnaryMathOperation* instr);
+ LInstruction* DoMathFround(HUnaryMathOperation* instr);
+ LInstruction* DoMathAbs(HUnaryMathOperation* instr);
+ LInstruction* DoMathLog(HUnaryMathOperation* instr);
+ LInstruction* DoMathExp(HUnaryMathOperation* instr);
+ LInstruction* DoMathSqrt(HUnaryMathOperation* instr);
+ LInstruction* DoMathPowHalf(HUnaryMathOperation* instr);
+ LInstruction* DoMathClz32(HUnaryMathOperation* instr);
+ LInstruction* DoDivByPowerOf2I(HDiv* instr);
+ LInstruction* DoDivByConstI(HDiv* instr);
+ LInstruction* DoDivI(HDiv* instr);
+ LInstruction* DoModByPowerOf2I(HMod* instr);
+ LInstruction* DoModByConstI(HMod* instr);
+ LInstruction* DoModI(HMod* instr);
+ LInstruction* DoFlooringDivByPowerOf2I(HMathFloorOfDiv* instr);
+ LInstruction* DoFlooringDivByConstI(HMathFloorOfDiv* instr);
+ LInstruction* DoFlooringDivI(HMathFloorOfDiv* instr);
+
+ private:
+ // Methods for getting operands for Use / Define / Temp.
+ LUnallocated* ToUnallocated(Register reg);
+ LUnallocated* ToUnallocated(DoubleRegister reg);
+
+ // Methods for setting up define-use relationships.
+ MUST_USE_RESULT LOperand* Use(HValue* value, LUnallocated* operand);
+ MUST_USE_RESULT LOperand* UseFixed(HValue* value, Register fixed_register);
+ MUST_USE_RESULT LOperand* UseFixedDouble(HValue* value,
+ DoubleRegister fixed_register);
+
+ // A value that is guaranteed to be allocated to a register.
+ // Operand created by UseRegister is guaranteed to be live until the end of
+ // instruction. This means that register allocator will not reuse it's
+ // register for any other operand inside instruction.
+ // Operand created by UseRegisterAtStart is guaranteed to be live only at
+ // instruction start. Register allocator is free to assign the same register
+ // to some other operand used inside instruction (i.e. temporary or
+ // output).
+ MUST_USE_RESULT LOperand* UseRegister(HValue* value);
+ MUST_USE_RESULT LOperand* UseRegisterAtStart(HValue* value);
+
+ // An input operand in a register that may be trashed.
+ MUST_USE_RESULT LOperand* UseTempRegister(HValue* value);
+
+ // An input operand in a register or stack slot.
+ MUST_USE_RESULT LOperand* Use(HValue* value);
+ MUST_USE_RESULT LOperand* UseAtStart(HValue* value);
+
+ // An input operand in a register, stack slot or a constant operand.
+ MUST_USE_RESULT LOperand* UseOrConstant(HValue* value);
+ MUST_USE_RESULT LOperand* UseOrConstantAtStart(HValue* value);
+
+ // An input operand in a register or a constant operand.
+ MUST_USE_RESULT LOperand* UseRegisterOrConstant(HValue* value);
+ MUST_USE_RESULT LOperand* UseRegisterOrConstantAtStart(HValue* value);
+
+ // An input operand in a constant operand.
+ MUST_USE_RESULT LOperand* UseConstant(HValue* value);
+
+ // An input operand in register, stack slot or a constant operand.
+ // Will not be moved to a register even if one is freely available.
+ MUST_USE_RESULT LOperand* UseAny(HValue* value) override;
+
+ // Temporary operand that must be in a register.
+ MUST_USE_RESULT LUnallocated* TempRegister();
+ MUST_USE_RESULT LUnallocated* TempDoubleRegister();
+ MUST_USE_RESULT LOperand* FixedTemp(Register reg);
+ MUST_USE_RESULT LOperand* FixedTemp(DoubleRegister reg);
+
+ // Methods for setting up define-use relationships.
+ // Return the same instruction that they are passed.
+ LInstruction* Define(LTemplateResultInstruction<1>* instr,
+ LUnallocated* result);
+ LInstruction* DefineAsRegister(LTemplateResultInstruction<1>* instr);
+ LInstruction* DefineAsSpilled(LTemplateResultInstruction<1>* instr,
+ int index);
+ LInstruction* DefineSameAsFirst(LTemplateResultInstruction<1>* instr);
+ LInstruction* DefineFixed(LTemplateResultInstruction<1>* instr, Register reg);
+ LInstruction* DefineFixedDouble(LTemplateResultInstruction<1>* instr,
+ DoubleRegister reg);
+ LInstruction* AssignEnvironment(LInstruction* instr);
+ LInstruction* AssignPointerMap(LInstruction* instr);
+
+ enum CanDeoptimize { CAN_DEOPTIMIZE_EAGERLY, CANNOT_DEOPTIMIZE_EAGERLY };
+
+ // By default we assume that instruction sequences generated for calls
+ // cannot deoptimize eagerly and we do not attach environment to this
+ // instruction.
+ LInstruction* MarkAsCall(
+ LInstruction* instr, HInstruction* hinstr,
+ CanDeoptimize can_deoptimize = CANNOT_DEOPTIMIZE_EAGERLY);
+
+ void VisitInstruction(HInstruction* current);
+ void AddInstruction(LInstruction* instr, HInstruction* current);
+
+ void DoBasicBlock(HBasicBlock* block, HBasicBlock* next_block);
+ LInstruction* DoShift(Token::Value op, HBitwiseBinaryOperation* instr);
+ LInstruction* DoArithmeticD(Token::Value op,
+ HArithmeticBinaryOperation* instr);
+ LInstruction* DoArithmeticT(Token::Value op, HBinaryOperation* instr);
+
+ HInstruction* current_instruction_;
+ HBasicBlock* current_block_;
+ HBasicBlock* next_block_;
+ LAllocator* allocator_;
+
+ DISALLOW_COPY_AND_ASSIGN(LChunkBuilder);
+};
+
+#undef DECLARE_HYDROGEN_ACCESSOR
+#undef DECLARE_CONCRETE_INSTRUCTION
+}
+} // namespace v8::internal
+
+#endif // V8_S390_LITHIUM_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/macro-assembler-s390.cc
@@ -0,0 +1,5669 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include <assert.h> // For assert
+#include <limits.h> // For LONG_MIN, LONG_MAX.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/base/bits.h"
+#include "src/base/division-by-constant.h"
+#include "src/bootstrapper.h"
+#include "src/codegen.h"
+#include "src/cpu-profiler.h"
+#include "src/debug.h"
+#include "src/runtime/runtime.h"
+
+namespace v8 {
+namespace internal {
+
+MacroAssembler::MacroAssembler(Isolate* arg_isolate, void* buffer, int size)
+ : Assembler(arg_isolate, buffer, size),
+ generating_stub_(false),
+ has_frame_(false) {
+ if (isolate() != NULL) {
+ code_object_ =
+ Handle<Object>(isolate()->heap()->undefined_value(), isolate());
+ }
+}
+
+
+void MacroAssembler::Jump(Register target) {
+ b(target);
+}
+
+
+void MacroAssembler::JumpToJSEntry(Register target) {
+ Move(ip, target);
+ Jump(ip);
+}
+
+
+void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
+ Condition cond, CRegister) {
+ Label skip;
+
+ if (cond != al) b(NegateCondition(cond), &skip);
+
+ DCHECK(rmode == RelocInfo::CODE_TARGET || rmode == RelocInfo::RUNTIME_ENTRY);
+
+ mov(ip, Operand(target, rmode));
+ b(ip);
+
+ bind(&skip);
+}
+
+
+void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode, Condition cond,
+ CRegister cr) {
+ DCHECK(!RelocInfo::IsCodeTarget(rmode));
+ Jump(reinterpret_cast<intptr_t>(target), rmode, cond, cr);
+}
+
+
+void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
+ Condition cond) {
+ DCHECK(RelocInfo::IsCodeTarget(rmode));
+ jump(code, rmode, cond);
+}
+
+
+int MacroAssembler::CallSize(Register target) { return 2; } // BASR
+
+
+void MacroAssembler::Call(Register target) {
+ BlockTrampolinePoolScope block_trampoline_pool(this);
+ Label start;
+ bind(&start);
+
+ // Statement positions are expected to be recorded when the target
+ // address is loaded.
+ positions_recorder()->WriteRecordedPositions();
+
+ // Branch to target via indirect branch
+ basr(r14, target);
+
+ DCHECK_EQ(CallSize(target), SizeOfCodeGeneratedSince(&start));
+}
+
+
+void MacroAssembler::CallJSEntry(Register target) {
+ DCHECK(target.is(ip));
+ Call(target);
+}
+
+
+int MacroAssembler::CallSize(Address target, RelocInfo::Mode rmode,
+ Condition cond) {
+ // S390 Assembler::move sequence is IILF / IIHF
+ int size;
+#if V8_TARGET_ARCH_S390X
+ size = 14; // IILF + IIHF + BASR
+#else
+ size = 8; // IILF + BASR
+#endif
+ return size;
+}
+
+
+int MacroAssembler::CallSizeNotPredictableCodeSize(Address target,
+ RelocInfo::Mode rmode,
+ Condition cond) {
+ // S390 Assembler::move sequence is IILF / IIHF
+ int size;
+#if V8_TARGET_ARCH_S390X
+ size = 14; // IILF + IIHF + BASR
+#else
+ size = 8; // IILF + BASR
+#endif
+ return size;
+}
+
+
+void MacroAssembler::Call(Address target, RelocInfo::Mode rmode,
+ Condition cond) {
+ BlockTrampolinePoolScope block_trampoline_pool(this);
+ DCHECK(cond == al);
+
+#ifdef DEBUG
+ // Check the expected size before generating code to ensure we assume the same
+ // constant pool availability (e.g., whether constant pool is full or not).
+ int expected_size = CallSize(target, rmode, cond);
+ Label start;
+ bind(&start);
+#endif
+
+ // Statement positions are expected to be recorded when the target
+ // address is loaded.
+ positions_recorder()->WriteRecordedPositions();
+
+ mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode));
+ basr(r14, ip);
+
+ DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
+}
+
+
+int MacroAssembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id, Condition cond) {
+ return 6; // BRASL
+}
+
+
+void MacroAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
+ TypeFeedbackId ast_id, Condition cond) {
+ BlockTrampolinePoolScope block_trampoline_pool(this);
+ DCHECK(RelocInfo::IsCodeTarget(rmode) && cond == al);
+
+#ifdef DEBUG
+ // Check the expected size before generating code to ensure we assume the same
+ // constant pool availability (e.g., whether constant pool is full or not).
+ int expected_size = CallSize(code, rmode, ast_id, cond);
+ Label start;
+ bind(&start);
+#endif
+ call(code, rmode, ast_id);
+ DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
+}
+
+
+void MacroAssembler::Ret() {
+ b(r14);
+}
+
+
+void MacroAssembler::Drop(int count) {
+ if (count > 0) {
+ la(sp, MemOperand(sp, count * kPointerSize));
+ }
+}
+
+
+void MacroAssembler::Ret(int drop) {
+ Drop(drop);
+ Ret();
+}
+
+
+void MacroAssembler::Call(Label* target) { b(r14, target); }
+
+
+void MacroAssembler::Push(Handle<Object> handle) {
+ mov(r0, Operand(handle));
+ push(r0);
+}
+
+
+void MacroAssembler::Move(Register dst, Handle<Object> value) {
+ AllowDeferredHandleDereference smi_check;
+ if (value->IsSmi()) {
+ LoadSmiLiteral(dst, reinterpret_cast<Smi*>(*value));
+ } else {
+ DCHECK(value->IsHeapObject());
+ if (isolate()->heap()->InNewSpace(*value)) {
+ Handle<Cell> cell = isolate()->factory()->NewCell(value);
+ mov(dst, Operand(cell));
+ LoadP(dst, FieldMemOperand(dst, Cell::kValueOffset));
+ } else {
+ mov(dst, Operand(value));
+ }
+ }
+}
+
+
+void MacroAssembler::Move(Register dst, Register src, Condition cond) {
+ if (!dst.is(src)) {
+ LoadRR(dst, src);
+ }
+}
+
+
+void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) {
+ if (!dst.is(src)) {
+ ldr(dst, src);
+ }
+}
+
+
+void MacroAssembler::InsertDoubleLow(DoubleRegister dst, Register src) {
+ StoreF(dst, MemOperand(sp, -kDoubleSize));
+#if V8_TARGET_LITTLE_ENDIAN
+ StoreW(src, MemOperand(sp, -kDoubleSize));
+#else
+ StoreW(src, MemOperand(sp, -kDoubleSize / 2));
+#endif
+ ldy(dst, MemOperand(sp, -kDoubleSize));
+}
+
+
+void MacroAssembler::InsertDoubleHigh(DoubleRegister dst, Register src) {
+ StoreF(dst, MemOperand(sp, -kDoubleSize));
+#if V8_TARGET_LITTLE_ENDIAN
+ StoreW(src, MemOperand(sp, -kDoubleSize / 2));
+#else
+ StoreW(src, MemOperand(sp, -kDoubleSize));
+#endif
+ ldy(dst, MemOperand(sp, -kDoubleSize));
+}
+
+
+void MacroAssembler::MultiPush(RegList regs) {
+ int16_t num_to_push = NumberOfBitsSet(regs);
+ int16_t stack_offset = num_to_push * kPointerSize;
+
+ lay(sp, MemOperand(sp, -stack_offset));
+ for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
+ if ((regs & (1 << i)) != 0) {
+ stack_offset -= kPointerSize;
+ StoreP(ToRegister(i), MemOperand(sp, stack_offset));
+ }
+ }
+}
+
+
+void MacroAssembler::MultiPop(RegList regs) {
+ int16_t stack_offset = 0;
+
+ for (int16_t i = 0; i < kNumRegisters; i++) {
+ if ((regs & (1 << i)) != 0) {
+ LoadP(ToRegister(i), MemOperand(sp, stack_offset));
+ stack_offset += kPointerSize;
+ }
+ }
+ la(sp, MemOperand(sp, stack_offset));
+}
+
+
+void MacroAssembler::LoadRoot(Register destination, Heap::RootListIndex index,
+ Condition) {
+ LoadP(destination, MemOperand(kRootRegister, index << kPointerSizeLog2), r0);
+}
+
+
+void MacroAssembler::StoreRoot(Register source, Heap::RootListIndex index,
+ Condition) {
+ DCHECK(Heap::RootCanBeWrittenAfterInitialization(index));
+ StoreP(source, MemOperand(kRootRegister, index << kPointerSizeLog2));
+}
+
+
+void MacroAssembler::InNewSpace(Register object, Register scratch,
+ Condition cond, Label* branch) {
+ // N.B. scratch may be same register as object
+ DCHECK(cond == eq || cond == ne);
+ // TODO(joransiu): check if we can merge mov Operand into AndP.
+ mov(r0, Operand(ExternalReference::new_space_mask(isolate())));
+
+ AndP(scratch, object, r0);
+ CmpP(scratch, Operand(ExternalReference::new_space_start(isolate())));
+ b(cond, branch);
+}
+
+
+void MacroAssembler::RecordWriteField(
+ Register object, int offset, Register value, Register dst,
+ LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
+ RememberedSetAction remembered_set_action, SmiCheck smi_check,
+ PointersToHereCheck pointers_to_here_check_for_value) {
+ // First, check if a write barrier is even needed. The tests below
+ // catch stores of Smis.
+ Label done;
+
+ // Skip barrier if writing a smi.
+ if (smi_check == INLINE_SMI_CHECK) {
+ JumpIfSmi(value, &done);
+ }
+
+ // Although the object register is tagged, the offset is relative to the start
+ // of the object, so so offset must be a multiple of kPointerSize.
+ DCHECK(IsAligned(offset, kPointerSize));
+
+ lay(dst, MemOperand(object, offset - kHeapObjectTag));
+ if (emit_debug_code()) {
+ Label ok;
+ AndP(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
+ beq(&ok, Label::kNear);
+ stop("Unaligned cell in write barrier");
+ bind(&ok);
+ }
+
+ RecordWrite(object, dst, value, lr_status, save_fp, remembered_set_action,
+ OMIT_SMI_CHECK, pointers_to_here_check_for_value);
+
+ bind(&done);
+
+ // Clobber clobbered input registers when running with the debug-code flag
+ // turned on to provoke errors.
+ if (emit_debug_code()) {
+ mov(value, Operand(bit_cast<intptr_t>(kZapValue + 4)));
+ mov(dst, Operand(bit_cast<intptr_t>(kZapValue + 8)));
+ }
+}
+
+
+// Will clobber 4 registers: object, map, dst, ip. The
+// register 'object' contains a heap object pointer.
+void MacroAssembler::RecordWriteForMap(Register object, Register map,
+ Register dst,
+ LinkRegisterStatus lr_status,
+ SaveFPRegsMode fp_mode) {
+ if (emit_debug_code()) {
+ LoadP(dst, FieldMemOperand(map, HeapObject::kMapOffset));
+ CmpP(dst, Operand(isolate()->factory()->meta_map()));
+ Check(eq, kWrongAddressOrValuePassedToRecordWrite);
+ }
+
+ if (!FLAG_incremental_marking) {
+ return;
+ }
+
+ if (emit_debug_code()) {
+ CmpP(map, FieldMemOperand(object, HeapObject::kMapOffset));
+ Check(eq, kWrongAddressOrValuePassedToRecordWrite);
+ }
+
+ Label done;
+
+ // A single check of the map's pages interesting flag suffices, since it is
+ // only set during incremental collection, and then it's also guaranteed that
+ // the from object's page's interesting flag is also set. This optimization
+ // relies on the fact that maps can never be in new space.
+ CheckPageFlag(map,
+ map, // Used as scratch.
+ MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
+
+ lay(dst, MemOperand(object, HeapObject::kMapOffset - kHeapObjectTag));
+ if (emit_debug_code()) {
+ Label ok;
+ AndP(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
+ beq(&ok, Label::kNear);
+ stop("Unaligned cell in write barrier");
+ bind(&ok);
+ }
+
+ // Record the actual write.
+ if (lr_status == kLRHasNotBeenSaved) {
+ push(r14);
+ }
+ RecordWriteStub stub(isolate(), object, map, dst, OMIT_REMEMBERED_SET,
+ fp_mode);
+ CallStub(&stub);
+ if (lr_status == kLRHasNotBeenSaved) {
+ pop(r14);
+ }
+
+ bind(&done);
+
+ // Count number of write barriers in generated code.
+ isolate()->counters()->write_barriers_static()->Increment();
+ IncrementCounter(isolate()->counters()->write_barriers_dynamic(), 1, ip, dst);
+
+ // Clobber clobbered registers when running with the debug-code flag
+ // turned on to provoke errors.
+ if (emit_debug_code()) {
+ mov(dst, Operand(bit_cast<intptr_t>(kZapValue + 12)));
+ mov(map, Operand(bit_cast<intptr_t>(kZapValue + 16)));
+ }
+}
+
+
+// Will clobber 4 registers: object, address, scratch, ip. The
+// register 'object' contains a heap object pointer. The heap object
+// tag is shifted away.
+void MacroAssembler::RecordWrite(
+ Register object, Register address, Register value,
+ LinkRegisterStatus lr_status, SaveFPRegsMode fp_mode,
+ RememberedSetAction remembered_set_action, SmiCheck smi_check,
+ PointersToHereCheck pointers_to_here_check_for_value) {
+ DCHECK(!object.is(value));
+ if (emit_debug_code()) {
+ CmpP(value, MemOperand(address));
+ Check(eq, kWrongAddressOrValuePassedToRecordWrite);
+ }
+
+ if (remembered_set_action == OMIT_REMEMBERED_SET &&
+ !FLAG_incremental_marking) {
+ return;
+ }
+ // First, check if a write barrier is even needed. The tests below
+ // catch stores of smis and stores into the young generation.
+ Label done;
+
+ if (smi_check == INLINE_SMI_CHECK) {
+ JumpIfSmi(value, &done);
+ }
+
+ if (pointers_to_here_check_for_value != kPointersToHereAreAlwaysInteresting) {
+ CheckPageFlag(value,
+ value, // Used as scratch.
+ MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
+ }
+ CheckPageFlag(object,
+ value, // Used as scratch.
+ MemoryChunk::kPointersFromHereAreInterestingMask, eq, &done);
+
+ // Record the actual write.
+ if (lr_status == kLRHasNotBeenSaved) {
+ push(r14);
+ }
+ RecordWriteStub stub(isolate(), object, value, address, remembered_set_action,
+ fp_mode);
+ CallStub(&stub);
+ if (lr_status == kLRHasNotBeenSaved) {
+ pop(r14);
+ }
+
+ bind(&done);
+
+ // Count number of write barriers in generated code.
+ isolate()->counters()->write_barriers_static()->Increment();
+ IncrementCounter(isolate()->counters()->write_barriers_dynamic(), 1, ip,
+ value);
+
+ // Clobber clobbered registers when running with the debug-code flag
+ // turned on to provoke errors.
+ if (emit_debug_code()) {
+ mov(address, Operand(bit_cast<intptr_t>(kZapValue + 12)));
+ mov(value, Operand(bit_cast<intptr_t>(kZapValue + 16)));
+ }
+}
+
+
+void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.
+ Register address, Register scratch,
+ SaveFPRegsMode fp_mode,
+ RememberedSetFinalAction and_then) {
+ Label done;
+ if (emit_debug_code()) {
+ Label ok;
+ JumpIfNotInNewSpace(object, scratch, &ok);
+ stop("Remembered set pointer is in new space");
+ bind(&ok);
+ }
+ // Load store buffer top.
+ ExternalReference store_buffer =
+ ExternalReference::store_buffer_top(isolate());
+ mov(ip, Operand(store_buffer));
+ LoadP(scratch, MemOperand(ip));
+ // Store pointer to buffer and increment buffer top.
+ StoreP(address, MemOperand(scratch));
+ AddP(scratch, Operand(kPointerSize));
+ // Write back new top of buffer.
+ StoreP(scratch, MemOperand(ip));
+ // Call stub on end of buffer.
+ // Check for end of buffer.
+ AndP(scratch, Operand(StoreBuffer::kStoreBufferOverflowBit));
+
+ if (and_then == kFallThroughAtEnd) {
+ beq(&done, Label::kNear);
+ } else {
+ DCHECK(and_then == kReturnAtEnd);
+ beq(&done, Label::kNear);
+ }
+ push(r14);
+ StoreBufferOverflowStub store_buffer_overflow(isolate(), fp_mode);
+ CallStub(&store_buffer_overflow);
+ pop(r14);
+ bind(&done);
+ if (and_then == kReturnAtEnd) {
+ Ret();
+ }
+}
+
+
+void MacroAssembler::PushFixedFrame(Register marker_reg) {
+ CleanseP(r14);
+ if (marker_reg.is_valid()) {
+ Push(r14, fp, cp, marker_reg);
+ } else {
+ Push(r14, fp, cp);
+ }
+}
+
+
+void MacroAssembler::PopFixedFrame(Register marker_reg) {
+ if (marker_reg.is_valid()) {
+ Pop(r14, fp, cp, marker_reg);
+ } else {
+ Pop(r14, fp, cp);
+ }
+}
+
+
+// Push and pop all registers that can hold pointers.
+void MacroAssembler::PushSafepointRegisters() {
+ // Safepoints expect a block of kNumSafepointRegisters values on the
+ // stack, so adjust the stack for unsaved registers.
+ const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
+ DCHECK(num_unsaved >= 0);
+ if (num_unsaved > 0) {
+ lay(sp, MemOperand(sp, -(num_unsaved * kPointerSize)));
+ }
+ MultiPush(kSafepointSavedRegisters);
+}
+
+
+void MacroAssembler::PopSafepointRegisters() {
+ const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
+ MultiPop(kSafepointSavedRegisters);
+ if (num_unsaved > 0) {
+ la(sp, MemOperand(sp, num_unsaved * kPointerSize));
+ }
+}
+
+
+
+
+void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
+ StoreP(src, SafepointRegisterSlot(dst));
+}
+
+
+void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
+ LoadP(dst, SafepointRegisterSlot(src));
+}
+
+
+int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
+ // The registers are pushed starting with the highest encoding,
+ // which means that lowest encodings are closest to the stack pointer.
+ RegList regs = kSafepointSavedRegisters;
+ int index = 0;
+
+ DCHECK(reg_code >= 0 && reg_code < kNumRegisters);
+
+ for (int16_t i = 0; i < reg_code; i++) {
+ if ((regs & (1 << i)) != 0) {
+ index++;
+ }
+ }
+
+ return index;
+}
+
+
+MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
+ return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
+}
+
+
+MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
+ // General purpose registers are pushed last on the stack.
+ int doubles_size = DoubleRegister::NumAllocatableRegisters() * kDoubleSize;
+ int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;
+ return MemOperand(sp, doubles_size + register_offset);
+}
+
+void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst,
+ const DoubleRegister src) {
+ // Turn potential sNaN into qNaN
+ if (!dst.is(src))
+ ldr(dst, src);
+ lzdr(kDoubleRegZero);
+ sdbr(dst, kDoubleRegZero);
+}
+
+
+void MacroAssembler::ConvertIntToDouble(Register src,
+ DoubleRegister double_dst) {
+ cdfbr(double_dst, src);
+}
+
+
+void MacroAssembler::ConvertUnsignedIntToDouble(Register src,
+ DoubleRegister double_dst) {
+ if (CpuFeatures::IsSupported(FLOATING_POINT_EXT)) {
+ cdlfbr(Condition(5), Condition(5), double_dst, src);
+ } else {
+ // zero-extend src
+ llgfr(src, src);
+ // convert to double
+ cdgbr(double_dst, src);
+ }
+}
+
+
+void MacroAssembler::ConvertIntToFloat(const DoubleRegister dst,
+ const Register src,
+ const Register int_scratch) {
+ cefbr(dst, src);
+}
+
+
+void MacroAssembler::ConvertDoubleToInt64(const DoubleRegister double_input,
+#if !V8_TARGET_ARCH_S390X
+ const Register dst_hi,
+#endif
+ const Register dst,
+ const DoubleRegister double_dst,
+ FPRoundingMode rounding_mode) {
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ cgdbr(m, dst, double_input);
+ ldgr(double_dst, dst);
+#if !V8_TARGET_ARCH_S390X
+ srlg(dst_hi, dst, Operand(32));
+#endif
+}
+
+
+void MacroAssembler::StubPrologue(int prologue_offset) {
+ PushFixedFrame();
+ Push(Smi::FromInt(StackFrame::STUB));
+ // Adjust FP to point to saved FP.
+ la(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+}
+
+
+void MacroAssembler::Prologue(bool code_pre_aging, int prologue_offset) {
+ {
+ PredictableCodeSizeScope predictible_code_size_scope(
+ this, kNoCodeAgeSequenceLength);
+ Assembler::BlockTrampolinePoolScope block_trampoline_pool(this);
+ // The following instructions must remain together and unmodified
+ // for code aging to work properly.
+ if (code_pre_aging) {
+ // Pre-age the code.
+ // This matches the code found in PatchPlatformCodeAge()
+ Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
+ intptr_t target = reinterpret_cast<intptr_t>(stub->instruction_start());
+ nop();
+ CleanseP(r14);
+ Push(r14);
+ mov(r2, Operand(target));
+ Call(r2);
+ for (int i = 0;
+ i < kNoCodeAgeSequenceLength - kCodeAgingSequenceLength; i += 2) {
+ // TODO(joransiu): Create nop function to pad
+ // (kNoCodeAgeSequenceLength - kCodeAgingSequenceLength) bytes.
+ nop(); // 2-byte nops().
+ }
+ } else {
+ // This matches the code found in GetNoCodeAgeSequence()
+ PushFixedFrame(r3);
+ // Adjust fp to point to saved fp.
+ la(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
+ }
+ }
+}
+
+
+// Used by FrameScope constructor to enter frame.
+void MacroAssembler::EnterFrame(StackFrame::Type type,
+ bool load_constant_pool_pointer_reg) {
+ // We create a stack frame with:
+ // Return Addr <-- old sp
+ // Old FP <-- new fp
+ // CP
+ // type
+ // CodeObject <-- new sp
+
+ LoadSmiLiteral(ip, Smi::FromInt(type));
+ PushFixedFrame(ip);
+
+
+ mov(r0, Operand(CodeObject()));
+ push(r0);
+ // Adjust FP to point to saved FP
+ la(fp, MemOperand(sp,
+ StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
+}
+
+
+int MacroAssembler::LeaveFrame(StackFrame::Type type, int stack_adjustment) {
+ // Drop the execution stack down to the frame pointer and restore
+ // the caller frame pointer, return address and constant pool pointer.
+ LoadP(r14, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
+ lay(r1, MemOperand(fp,
+ StandardFrameConstants::kCallerSPOffset + stack_adjustment));
+ LoadP(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ LoadRR(sp, r1);
+ int frame_ends = pc_offset();
+ return frame_ends;
+}
+
+
+// ExitFrame layout (probably wrongish.. needs updating)
+//
+// SP -> previousSP
+// LK reserved
+// code
+// sp_on_exit (for debug?)
+// oldSP->prev SP
+// LK
+// <parameters on stack>
+
+// Prior to calling EnterExitFrame, we've got a bunch of parameters
+// on the stack that we need to wrap a real frame around.. so first
+// we reserve a slot for LK and push the previous SP which is captured
+// in the fp register (r11)
+// Then - we buy a new frame
+
+void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
+ // Set up the frame structure on the stack.
+ DCHECK_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);
+ DCHECK_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);
+ DCHECK_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);
+ DCHECK(stack_space > 0);
+
+ // This is an opportunity to build a frame to wrap
+ // all of the pushes that have happened inside of V8
+ // since we were called from C code
+
+ // replicate ARM frame - TODO make this more closely follow S390 ABI
+
+
+ CleanseP(r14);
+ Push(r14, fp);
+ LoadRR(fp, sp);
+ // Reserve room for saved entry sp and code object.
+ lay(sp, MemOperand(sp, - ExitFrameConstants::kFrameSize));
+
+ if (emit_debug_code()) {
+ StoreP(MemOperand(fp, ExitFrameConstants::kSPOffset),
+ Operand::Zero(), r1);
+ }
+ mov(r1, Operand(CodeObject()));
+ StoreP(r1, MemOperand(fp, ExitFrameConstants::kCodeOffset));
+
+ // Save the frame pointer and the context in top.
+ mov(r1, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ StoreP(fp, MemOperand(r1));
+ mov(r1, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+ StoreP(cp, MemOperand(r1));
+
+ // Optionally save all volatile double registers.
+ if (save_doubles) {
+ const int kNumRegs = DoubleRegister::kNumVolatileRegisters;
+ lay(sp, MemOperand(sp, -kNumRegs * kDoubleSize));
+#define StoreFloatingPointRegisterToStack(reg, offset) \
+ StoreF(DoubleRegister::from_code(reg), \
+ MemOperand(sp, (offset) * kDoubleSize));
+#ifdef V8_TARGET_ARCH_S390X
+ for (int i = 0; i < 7; i++) {
+ StoreFloatingPointRegisterToStack(i, i);
+ }
+#else
+ StoreFloatingPointRegisterToStack(0, 0);
+ StoreFloatingPointRegisterToStack(1, 1);
+ StoreFloatingPointRegisterToStack(2, 2);
+ StoreFloatingPointRegisterToStack(3, 3);
+ StoreFloatingPointRegisterToStack(5, 4);
+ int offset = 5;
+ for (int i = 7; i < DoubleRegister::kNumRegisters; i++, offset++) {
+ StoreFloatingPointRegisterToStack(i, offset);
+ }
+#endif
+#undef StoreFloatingPointRegisterToStack
+ }
+
+ lay(sp, MemOperand(sp, -stack_space * kPointerSize));
+
+
+ // Allocate and align the frame preparing for calling the runtime
+ // function.
+ const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
+ if (frame_alignment > 0) {
+ DCHECK(frame_alignment == 8);
+ ClearRightImm(sp, sp, Operand(3)); // equivalent to &= -8
+ }
+
+ StoreP(MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize),
+ Operand::Zero(), r0);
+ lay(sp, MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize));
+ // Set the exit frame sp value to point just before the return address
+ // location.
+ lay(r1, MemOperand(sp, kStackFrameSPSlot * kPointerSize));
+ StoreP(r1, MemOperand(fp, ExitFrameConstants::kSPOffset));
+}
+
+
+void MacroAssembler::InitializeNewString(Register string, Register length,
+ Heap::RootListIndex map_index,
+ Register scratch1, Register scratch2) {
+ SmiTag(scratch1, length);
+ LoadRoot(scratch2, map_index);
+ StoreP(scratch1, FieldMemOperand(string, String::kLengthOffset));
+ StoreP(FieldMemOperand(string, String::kHashFieldSlot),
+ Operand(String::kEmptyHashField), scratch1);
+ StoreP(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
+}
+
+
+int MacroAssembler::ActivationFrameAlignment() {
+#if !defined(USE_SIMULATOR)
+ // Running on the real platform. Use the alignment as mandated by the local
+ // environment.
+ // Note: This will break if we ever start generating snapshots on one S390
+ // platform for another S390 platform with a different alignment.
+ return base::OS::ActivationFrameAlignment();
+#else // Simulated
+ // If we are using the simulator then we should always align to the expected
+ // alignment. As the simulator is used to generate snapshots we do not know
+ // if the target platform will need alignment, so this is controlled from a
+ // flag.
+ return FLAG_sim_stack_alignment;
+#endif
+}
+
+
+void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
+ bool restore_context,
+ bool argument_count_is_length) {
+ // Optionally restore all double registers.
+ if (save_doubles) {
+ // Calculate the stack location of the saved doubles and restore them.
+ const int kNumRegs = DoubleRegister::kNumVolatileRegisters;
+ lay(sp, MemOperand(fp, -(2 * kPointerSize + kNumRegs * kDoubleSize)));
+#define LoadFloatingPointRegisterToStack(reg, offset) \
+ LoadF(DoubleRegister::from_code(reg), \
+ MemOperand(sp, (offset) * kDoubleSize));
+#ifdef V8_TARGET_ARCH_S390X
+ for (int i = 0; i < 7; i++) {
+ LoadFloatingPointRegisterToStack(i, i);
+ }
+#else
+ LoadFloatingPointRegisterToStack(0, 0);
+ LoadFloatingPointRegisterToStack(1, 1);
+ LoadFloatingPointRegisterToStack(2, 2);
+ LoadFloatingPointRegisterToStack(3, 3);
+ LoadFloatingPointRegisterToStack(5, 4);
+ int offset = 5;
+ for (int i = 7; i < DoubleRegister::kNumRegisters; i++, offset++) {
+ LoadFloatingPointRegisterToStack(i, offset);
+ }
+#endif
+#undef LoadFloatingPointRegisterToStack
+ }
+
+ // Clear top frame.
+ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ StoreP(MemOperand(ip), Operand(0, kRelocInfo_NONEPTR), r0);
+
+ // Restore current context from top and clear it in debug mode.
+ if (restore_context) {
+ mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+ LoadP(cp, MemOperand(ip));
+ }
+#ifdef DEBUG
+ mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+ StoreP(MemOperand(ip), Operand(0, kRelocInfo_NONEPTR), r0);
+#endif
+
+ // Tear down the exit frame, pop the arguments, and return.
+ LeaveFrame(StackFrame::EXIT);
+
+ if (argument_count.is_valid()) {
+ if (!argument_count_is_length) {
+ ShiftLeftP(argument_count, argument_count, Operand(kPointerSizeLog2));
+ }
+ la(sp, MemOperand(sp, argument_count));
+ }
+}
+
+
+void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) {
+ Move(dst, d0);
+}
+
+
+void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) {
+ Move(dst, d0);
+}
+
+
+void MacroAssembler::InvokePrologue(const ParameterCount& expected,
+ const ParameterCount& actual,
+ Handle<Code> code_constant,
+ Register code_reg, Label* done,
+ bool* definitely_mismatches,
+ InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ bool definitely_matches = false;
+ *definitely_mismatches = false;
+ Label regular_invoke;
+
+ // Check whether the expected and actual arguments count match. If not,
+ // setup registers according to contract with ArgumentsAdaptorTrampoline:
+ // r2: actual arguments count
+ // r3: function (passed through to callee)
+ // r4: expected arguments count
+
+ // The code below is made a lot easier because the calling code already sets
+ // up actual and expected registers according to the contract if values are
+ // passed in registers.
+
+ // ARM has some sanity checks as per below, considering add them for S390
+ // DCHECK(actual.is_immediate() || actual.reg().is(r2));
+ // DCHECK(expected.is_immediate() || expected.reg().is(r4));
+ // DCHECK((!code_constant.is_null() && code_reg.is(no_reg))
+ // || code_reg.is(r5));
+
+ if (expected.is_immediate()) {
+ DCHECK(actual.is_immediate());
+ if (expected.immediate() == actual.immediate()) {
+ definitely_matches = true;
+ } else {
+ mov(r2, Operand(actual.immediate()));
+ const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel;
+ if (expected.immediate() == sentinel) {
+ // Don't worry about adapting arguments for builtins that
+ // don't want that done. Skip adaption code by making it look
+ // like we have a match between expected and actual number of
+ // arguments.
+ definitely_matches = true;
+ } else {
+ *definitely_mismatches = true;
+ mov(r4, Operand(expected.immediate()));
+ }
+ }
+ } else {
+ if (actual.is_immediate()) {
+ CmpPH(expected.reg(), Operand(actual.immediate()));
+ beq(®ular_invoke);
+ mov(r2, Operand(actual.immediate()));
+ } else {
+ CmpP(expected.reg(), actual.reg());
+ beq(®ular_invoke);
+ }
+ }
+
+ if (!definitely_matches) {
+ if (!code_constant.is_null()) {
+ mov(r5, Operand(code_constant));
+ AddP(r5, Operand(Code::kHeaderSize - kHeapObjectTag));
+ }
+
+ Handle<Code> adaptor = isolate()->builtins()->ArgumentsAdaptorTrampoline();
+ if (flag == CALL_FUNCTION) {
+ call_wrapper.BeforeCall(CallSize(adaptor));
+ Call(adaptor);
+ call_wrapper.AfterCall();
+ if (!*definitely_mismatches) {
+ b(done);
+ }
+ } else {
+ Jump(adaptor, RelocInfo::CODE_TARGET);
+ }
+ bind(®ular_invoke);
+ }
+}
+
+
+void MacroAssembler::InvokeCode(Register code, const ParameterCount& expected,
+ const ParameterCount& actual, InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ // You can't call a function without a valid frame.
+ DCHECK(flag == JUMP_FUNCTION || has_frame());
+
+ Label done;
+ bool definitely_mismatches = false;
+ InvokePrologue(expected, actual, Handle<Code>::null(), code, &done,
+ &definitely_mismatches, flag, call_wrapper);
+ if (!definitely_mismatches) {
+ if (flag == CALL_FUNCTION) {
+ call_wrapper.BeforeCall(CallSize(code));
+ CallJSEntry(code);
+ call_wrapper.AfterCall();
+ } else {
+ DCHECK(flag == JUMP_FUNCTION);
+ JumpToJSEntry(code);
+ }
+
+ // Continue here if InvokePrologue does handle the invocation due to
+ // mismatched parameter counts.
+ bind(&done);
+ }
+}
+
+
+void MacroAssembler::InvokeFunction(Register fun, const ParameterCount& actual,
+ InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ // You can't call a function without a valid frame.
+ DCHECK(flag == JUMP_FUNCTION || has_frame());
+
+ // Contract with called JS functions requires that function is passed in r3.
+ DCHECK(fun.is(r3));
+
+ Register expected_reg = r4;
+ Register code_reg = ip;
+ LoadP(code_reg, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+ LoadW(expected_reg, FieldMemOperand(code_reg,
+ SharedFunctionInfo::kFormalParameterCountOffset));
+#if !defined(V8_TARGET_ARCH_S390X)
+ SmiUntag(expected_reg);
+#endif
+ LoadP(code_reg, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+
+ ParameterCount expected(expected_reg);
+ InvokeCode(code_reg, expected, actual, flag, call_wrapper);
+}
+
+
+void MacroAssembler::InvokeFunction(Register function,
+ const ParameterCount& expected,
+ const ParameterCount& actual,
+ InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ // You can't call a function without a valid frame.
+ DCHECK(flag == JUMP_FUNCTION || has_frame());
+
+ // Contract with called JS functions requires that function is passed in r3.
+ DCHECK(function.is(r3));
+
+ // Get the function and setup the context.
+ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+
+ // We call indirectly through the code field in the function to
+ // allow recompilation to take effect without changing any of the
+ // call sites.
+ LoadP(ip, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+ InvokeCode(ip, expected, actual, flag, call_wrapper);
+}
+
+void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
+ const ParameterCount& expected,
+ const ParameterCount& actual,
+ InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ Move(r3, function);
+ InvokeFunction(r3, expected, actual, flag, call_wrapper);
+}
+
+void MacroAssembler::IsObjectJSObjectType(Register heap_object, Register map,
+ Register scratch, Label* fail) {
+ LoadP(map, FieldMemOperand(heap_object, HeapObject::kMapOffset));
+ IsInstanceJSObjectType(map, scratch, fail);
+}
+
+
+void MacroAssembler::IsInstanceJSObjectType(Register map, Register scratch,
+ Label* fail) {
+ LoadlB(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ CmpP(scratch, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ blt(fail);
+ CmpP(scratch, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE));
+ bgt(fail);
+}
+
+
+void MacroAssembler::IsObjectJSStringType(Register object, Register scratch,
+ Label* fail) {
+ DCHECK(kNotStringTag != 0);
+
+ LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+ mov(r0, Operand(kIsNotStringMask));
+ AndP(r0, scratch);
+ bne(fail);
+}
+
+
+void MacroAssembler::IsObjectNameType(Register object, Register scratch,
+ Label* fail) {
+ LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+ CmpP(scratch, Operand(LAST_NAME_TYPE));
+ bgt(fail);
+}
+
+
+void MacroAssembler::DebugBreak() {
+ LoadImmP(r2, Operand::Zero());
+ mov(r3, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));
+ CEntryStub ces(isolate(), 1);
+ DCHECK(AllowThisStubCall(&ces));
+ Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);
+}
+
+
+void MacroAssembler::PushStackHandler() {
+ // Adjust this code if not the case.
+ STATIC_ASSERT(StackHandlerConstants::kSize == 1 * kPointerSize);
+ STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
+
+
+ // Link the current handler as the next handler.
+ mov(r7, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
+
+ // Buy the full stack frame for 5 slots.
+ lay(sp, MemOperand(sp, -StackHandlerConstants::kSize));
+
+ // Copy the old handler into the next handler slot.
+ mvc(MemOperand(sp, StackHandlerConstants::kNextOffset),
+ MemOperand(r7), kPointerSize);
+ // Set this new handler as the current one.
+ StoreP(sp, MemOperand(r7));
+}
+
+
+void MacroAssembler::PopStackHandler() {
+ STATIC_ASSERT(StackHandlerConstants::kSize == 1 * kPointerSize);
+ STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
+
+ // Pop the Next Handler into r3 and store it into Handler Address reference.
+ Pop(r3);
+ mov(ip, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
+
+ StoreP(r3, MemOperand(ip));
+}
+
+
+void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
+ Register scratch, Label* miss) {
+ Label same_contexts;
+
+ DCHECK(!holder_reg.is(scratch));
+ DCHECK(!holder_reg.is(ip));
+ DCHECK(!scratch.is(ip));
+
+ // Load current lexical context from the stack frame.
+ LoadP(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
+ // In debug mode, make sure the lexical context is set.
+#ifdef DEBUG
+ CmpP(scratch, Operand::Zero());
+ Check(ne, kWeShouldNotHaveAnEmptyLexicalContext);
+#endif
+
+ // Load the native context of the current context.
+ int offset =
+ Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
+ LoadP(scratch, FieldMemOperand(scratch, offset));
+ LoadP(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+
+ // Check the context is a native context.
+ if (emit_debug_code()) {
+ // Cannot use ip as a temporary in this verification code. Due to the fact
+ // that ip is clobbered as part of cmp with an object Operand.
+ push(holder_reg); // Temporarily save holder on the stack.
+ // Read the first word and compare to the native_context_map.
+ LoadP(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
+ CompareRoot(holder_reg, Heap::kNativeContextMapRootIndex);
+ Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
+ pop(holder_reg); // Restore holder.
+ }
+
+ // Check if both contexts are the same.
+ LoadP(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
+ CmpP(scratch, ip);
+ beq(&same_contexts, Label::kNear);
+
+ // Check the context is a native context.
+ if (emit_debug_code()) {
+ // TODO(119): avoid push(holder_reg)/pop(holder_reg)
+ // Cannot use ip as a temporary in this verification code. Due to the fact
+ // that ip is clobbered as part of cmp with an object Operand.
+ push(holder_reg); // Temporarily save holder on the stack.
+ LoadRR(holder_reg, ip); // Move ip to its holding place.
+ CompareRoot(holder_reg, Heap::kNullValueRootIndex);
+ Check(ne, kJSGlobalProxyContextShouldNotBeNull);
+
+ LoadP(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
+ CompareRoot(holder_reg, Heap::kNativeContextMapRootIndex);
+ Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
+ // Restore ip is not needed. ip is reloaded below.
+ pop(holder_reg); // Restore holder.
+ // Restore ip to holder's context.
+ LoadP(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
+ }
+
+ // Check that the security token in the calling global object is
+ // compatible with the security token in the receiving global
+ // object.
+ int token_offset =
+ Context::kHeaderSize + Context::SECURITY_TOKEN_INDEX * kPointerSize;
+
+ LoadP(scratch, FieldMemOperand(scratch, token_offset));
+ LoadP(ip, FieldMemOperand(ip, token_offset));
+ CmpP(scratch, ip);
+ bne(miss);
+
+ bind(&same_contexts);
+}
+
+
+// Compute the hash code from the untagged key. This must be kept in sync with
+// ComputeIntegerHash in utils.h and KeyedLoadGenericStub in
+// code-stub-hydrogen.cc
+void MacroAssembler::GetNumberHash(Register t0, Register scratch) {
+ // First of all we assign the hash seed to scratch.
+ LoadRoot(scratch, Heap::kHashSeedRootIndex);
+ SmiUntag(scratch);
+
+ // Xor original key with a seed.
+ XorP(t0, scratch);
+
+ // Compute the hash code from the untagged key. This must be kept in sync
+ // with ComputeIntegerHash in utils.h.
+ //
+ // hash = ~hash + (hash << 15);
+ LoadRR(scratch, t0);
+ NotP(scratch);
+ sll(t0, Operand(15));
+ AddP(t0, scratch, t0);
+ // hash = hash ^ (hash >> 12);
+ ShiftRight(scratch, t0, Operand(12));
+ XorP(t0, scratch);
+ // hash = hash + (hash << 2);
+ ShiftLeft(scratch, t0, Operand(2));
+ AddP(t0, t0, scratch);
+ // hash = hash ^ (hash >> 4);
+ ShiftRight(scratch, t0, Operand(4));
+ XorP(t0, scratch);
+ // hash = hash * 2057;
+ LoadRR(r0, t0);
+ ShiftLeft(scratch, t0, Operand(3));
+ AddP(t0, t0, scratch);
+ ShiftLeft(scratch, r0, Operand(11));
+ AddP(t0, t0, scratch);
+ // hash = hash ^ (hash >> 16);
+ ShiftRight(scratch, t0, Operand(16));
+ XorP(t0, scratch);
+ // hash & 0x3fffffff
+ ExtractBitRange(t0, t0, 29, 0);
+}
+
+
+void MacroAssembler::LoadFromNumberDictionary(Label* miss, Register elements,
+ Register key, Register result,
+ Register t0, Register t1,
+ Register t2) {
+ // Register use:
+ //
+ // elements - holds the slow-case elements of the receiver on entry.
+ // Unchanged unless 'result' is the same register.
+ //
+ // key - holds the smi key on entry.
+ // Unchanged unless 'result' is the same register.
+ //
+ // result - holds the result on exit if the load succeeded.
+ // Allowed to be the same as 'key' or 'result'.
+ // Unchanged on bailout so 'key' or 'result' can be used
+ // in further computation.
+ //
+ // Scratch registers:
+ //
+ // t0 - holds the untagged key on entry and holds the hash once computed.
+ //
+ // t1 - used to hold the capacity mask of the dictionary
+ //
+ // t2 - used for the index into the dictionary.
+ Label done;
+
+ GetNumberHash(t0, t1);
+
+ // Compute the capacity mask.
+ LoadP(t1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
+ SmiUntag(t1);
+ SubP(t1, Operand(1));
+
+ // Generate an unrolled loop that performs a few probes before giving up.
+ for (int i = 0; i < kNumberDictionaryProbes; i++) {
+ // Use t2 for index calculations and keep the hash intact in t0.
+ LoadRR(t2, t0);
+ // Compute the masked index: (hash + i + i * i) & mask.
+ if (i > 0) {
+ AddP(t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
+ }
+ AndP(t2, t1);
+
+ // Scale the index by multiplying by the element size.
+ DCHECK(SeededNumberDictionary::kEntrySize == 3);
+ LoadRR(ip, t2);
+ sll(ip, Operand(1));
+ AddP(t2, ip); // t2 = t2 * 3
+
+ // Check if the key is identical to the name.
+ sll(t2, Operand(kPointerSizeLog2));
+ AddP(t2, elements);
+ LoadP(ip,
+ FieldMemOperand(t2, SeededNumberDictionary::kElementsStartOffset));
+ CmpP(key, ip);
+ if (i != kNumberDictionaryProbes - 1) {
+ beq(&done, Label::kNear);
+ } else {
+ bne(miss);
+ }
+ }
+
+ bind(&done);
+ // Check that the value is a field property.
+ // t2: elements + (index * kPointerSize)
+ const int kDetailsOffset =
+ SeededNumberDictionary::kElementsStartOffset + 2 * kPointerSize;
+ LoadP(t1, FieldMemOperand(t2, kDetailsOffset));
+ LoadSmiLiteral(ip, Smi::FromInt(PropertyDetails::TypeField::kMask));
+ DCHECK_EQ(DATA, 0);
+ AndP(r0, ip, t1);
+ bne(miss);
+
+ // Get the value at the masked, scaled index and return.
+ const int kValueOffset =
+ SeededNumberDictionary::kElementsStartOffset + kPointerSize;
+ LoadP(result, FieldMemOperand(t2, kValueOffset));
+}
+
+
+void MacroAssembler::Allocate(int object_size, Register result,
+ Register scratch1, Register scratch2,
+ Label* gc_required, AllocationFlags flags) {
+ DCHECK(object_size <= Page::kMaxRegularHeapObjectSize);
+ if (!FLAG_inline_new) {
+ if (emit_debug_code()) {
+ // Trash the registers to simulate an allocation failure.
+ LoadImmP(result, Operand(0x7091));
+ LoadImmP(scratch1, Operand(0x7191));
+ LoadImmP(scratch2, Operand(0x7291));
+ }
+ b(gc_required);
+ return;
+ }
+
+ DCHECK(!result.is(scratch1));
+ DCHECK(!result.is(scratch2));
+ DCHECK(!scratch1.is(scratch2));
+ DCHECK(!scratch1.is(ip));
+ DCHECK(!scratch2.is(ip));
+
+ // Make object size into bytes.
+ if ((flags & SIZE_IN_WORDS) != 0) {
+ object_size *= kPointerSize;
+ }
+ DCHECK_EQ(0, static_cast<int>(object_size & kObjectAlignmentMask));
+
+ // Check relative positions of allocation top and limit addresses.
+ ExternalReference allocation_top =
+ AllocationUtils::GetAllocationTopReference(isolate(), flags);
+ ExternalReference allocation_limit =
+ AllocationUtils::GetAllocationLimitReference(isolate(), flags);
+ intptr_t top = reinterpret_cast<intptr_t>(allocation_top.address());
+ intptr_t limit = reinterpret_cast<intptr_t>(allocation_limit.address());
+ DCHECK((limit - top) == kPointerSize);
+
+ // Set up allocation top address and object size registers.
+ Register topaddr = scratch1;
+ mov(topaddr, Operand(allocation_top));
+
+ intptr_t limitOffset = 0;
+ if ((flags & RESULT_CONTAINS_TOP) == 0) {
+ // Load allocation top into result
+ LoadP(result, MemOperand(topaddr));
+ limitOffset = kPointerSize;
+ } else {
+ if (emit_debug_code()) {
+ // Assert that result actually contains top on entry.
+ CmpP(result, MemOperand(topaddr));
+ Check(eq, kUnexpectedAllocationTop);
+ }
+ // Result already contains allocation top.
+ limitOffset = limit - top;
+ }
+ MemOperand limitMemOperand = MemOperand(topaddr, limitOffset);
+
+ if ((flags & DOUBLE_ALIGNMENT) != 0) {
+ // Align the next allocation. Storing the filler map without checking top is
+ // safe in new-space because the limit of the heap is aligned there.
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
+#else
+ STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
+ AndP(scratch2, result, Operand(kDoubleAlignmentMask));
+ Label aligned;
+ beq(&aligned, Label::kNear);
+ if ((flags & PRETENURE) != 0) {
+ CmpLogicalP(result, limitMemOperand);
+ bge(gc_required);
+ }
+ mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
+ StoreW(scratch2, MemOperand(result));
+ la(result, MemOperand(result, kDoubleSize / 2));
+ bind(&aligned);
+#endif
+ }
+
+ // Calculate new top and bail out if new space is exhausted. Use result
+ // to calculate the new top.
+ AddP(scratch2, result, Operand(object_size));
+ b(Condition(CC_OF), gc_required); // Detect overflow
+ CmpLogicalP(scratch2, limitMemOperand);
+ bgt(gc_required);
+ StoreP(scratch2, MemOperand(topaddr));
+
+ // Tag object if requested.
+ if ((flags & TAG_OBJECT) != 0) {
+ la(result, MemOperand(result, kHeapObjectTag));
+ }
+}
+
+
+void MacroAssembler::Allocate(Register object_size, Register result,
+ Register scratch1, Register scratch2,
+ Label* gc_required, AllocationFlags flags) {
+ if (!FLAG_inline_new) {
+ if (emit_debug_code()) {
+ // Trash the registers to simulate an allocation failure.
+ LoadImmP(result, Operand(0x7091));
+ LoadImmP(scratch1, Operand(0x7191));
+ LoadImmP(scratch2, Operand(0x7291));
+ }
+ b(gc_required);
+ return;
+ }
+
+ // Assert that the register arguments are different and that none of
+ // them are ip. ip is used explicitly in the code generated below.
+ DCHECK(!result.is(scratch1));
+ DCHECK(!result.is(scratch2));
+ DCHECK(!scratch1.is(scratch2));
+ DCHECK(!object_size.is(ip));
+ DCHECK(!result.is(ip));
+ DCHECK(!scratch1.is(ip));
+ DCHECK(!scratch2.is(ip));
+
+ // Check relative positions of allocation top and limit addresses.
+ ExternalReference allocation_top =
+ AllocationUtils::GetAllocationTopReference(isolate(), flags);
+ ExternalReference allocation_limit =
+ AllocationUtils::GetAllocationLimitReference(isolate(), flags);
+ intptr_t top = reinterpret_cast<intptr_t>(allocation_top.address());
+ intptr_t limit = reinterpret_cast<intptr_t>(allocation_limit.address());
+ DCHECK((limit - top) == kPointerSize);
+
+ // Set up allocation top address.
+ Register topaddr = scratch1;
+ mov(topaddr, Operand(allocation_top));
+
+ intptr_t limitOffset = 0;
+ if ((flags & RESULT_CONTAINS_TOP) == 0) {
+ // Load allocation top into result and allocation limit into ip.
+ LoadP(result, MemOperand(topaddr));
+ limitOffset = kPointerSize;
+ } else {
+ if (emit_debug_code()) {
+ // Assert that result actually contains top on entry.
+ CmpP(result, MemOperand(topaddr));
+ Check(eq, kUnexpectedAllocationTop);
+ }
+ // Result already contains allocation top.
+ limitOffset = limit - top;
+ }
+ MemOperand limitMemOperand = MemOperand(topaddr, limitOffset);
+
+ if ((flags & DOUBLE_ALIGNMENT) != 0) {
+ // Align the next allocation. Storing the filler map without checking top is
+ // safe in new-space because the limit of the heap is aligned there.
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
+#else
+ STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
+ AndP(scratch2, result, Operand(kDoubleAlignmentMask));
+ Label aligned;
+ beq(&aligned, Label::kNear);
+ if ((flags & PRETENURE) != 0) {
+ CmpLogicalP(result, limitMemOperand);
+ bge(gc_required);
+ }
+ mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
+ StoreW(scratch2, MemOperand(result));
+ la(result, MemOperand(result, kDoubleSize / 2));
+ bind(&aligned);
+#endif
+ }
+
+ // Calculate new top and bail out if new space is exhausted. Use result
+ // to calculate the new top. Object size may be in words so a shift is
+ // required to get the number of bytes.
+ if ((flags & SIZE_IN_WORDS) != 0) {
+ ShiftLeftP(scratch2, object_size, Operand(kPointerSizeLog2));
+ AddP(scratch2, result);
+ } else {
+ AddP(scratch2, result, object_size);
+ }
+ b(Condition(CC_OF), gc_required);
+ CmpLogicalP(scratch2, limitMemOperand);
+ bgt(gc_required);
+
+ // Update allocation top. result temporarily holds the new top.
+ if (emit_debug_code()) {
+ AndP(r0, scratch2, Operand(kObjectAlignmentMask));
+ Check(eq, kUnalignedAllocationInNewSpace);
+ }
+ StoreP(scratch2, MemOperand(topaddr));
+
+ // Tag object if requested.
+ if ((flags & TAG_OBJECT) != 0) {
+ la(result, MemOperand(result, kHeapObjectTag));
+ }
+}
+
+
+void MacroAssembler::UndoAllocationInNewSpace(Register object,
+ Register scratch) {
+ ExternalReference new_space_allocation_top =
+ ExternalReference::new_space_allocation_top_address(isolate());
+
+ // Make sure the object has no tag before resetting top.
+ ClearRightImm(object, object, Operand(kHeapObjectTagSize));
+#ifdef DEBUG
+ // Check that the object un-allocated is below the current top.
+ mov(scratch, Operand(new_space_allocation_top));
+ LoadP(scratch, MemOperand(scratch));
+ CmpP(object, scratch);
+ Check(lt, kUndoAllocationOfNonAllocatedMemory);
+#endif
+ // Write the address of the object to un-allocate as the current top.
+ mov(scratch, Operand(new_space_allocation_top));
+ StoreP(object, MemOperand(scratch));
+}
+
+
+void MacroAssembler::AllocateTwoByteString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Register scratch3,
+ Label* gc_required) {
+ // Calculate the number of bytes needed for the characters in the string while
+ // observing object alignment.
+ DCHECK((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
+
+ ShiftLeft(scratch1, length, Operand(1)); // Length in bytes, not chars.
+ AddP(scratch1,
+ Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
+
+ AndP(scratch1, Operand(~kObjectAlignmentMask));
+
+ // Allocate two-byte string in new space.
+ Allocate(scratch1, result, scratch2, scratch3, gc_required, TAG_OBJECT);
+
+ // Set the map, length and hash field.
+ InitializeNewString(result, length, Heap::kStringMapRootIndex, scratch1,
+ scratch2);
+}
+
+
+void MacroAssembler::AllocateOneByteString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Register scratch3,
+ Label* gc_required) {
+ // Calculate the number of bytes needed for the characters in the string while
+ // observing object alignment.
+ DCHECK((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);
+ DCHECK(kCharSize == 1);
+ AddP(scratch1, length,
+ Operand(kObjectAlignmentMask + SeqOneByteString::kHeaderSize));
+ AndP(scratch1, Operand(~kObjectAlignmentMask));
+
+ // Allocate one-byte string in new space.
+ Allocate(scratch1, result, scratch2, scratch3, gc_required, TAG_OBJECT);
+
+ // Set the map, length and hash field.
+ InitializeNewString(result, length, Heap::kOneByteStringMapRootIndex,
+ scratch1, scratch2);
+}
+
+
+void MacroAssembler::AllocateTwoByteConsString(Register result, Register length,
+ Register scratch1,
+ Register scratch2,
+ Label* gc_required) {
+ Allocate(ConsString::kSize, result, scratch1, scratch2, gc_required,
+ TAG_OBJECT);
+
+ InitializeNewString(result, length, Heap::kConsStringMapRootIndex, scratch1,
+ scratch2);
+}
+
+
+void MacroAssembler::AllocateOneByteConsString(Register result, Register length,
+ Register scratch1,
+ Register scratch2,
+ Label* gc_required) {
+ Allocate(ConsString::kSize, result, scratch1, scratch2, gc_required,
+ TAG_OBJECT);
+
+ InitializeNewString(result, length, Heap::kConsOneByteStringMapRootIndex,
+ scratch1, scratch2);
+}
+
+
+void MacroAssembler::AllocateTwoByteSlicedString(Register result,
+ Register length,
+ Register scratch1,
+ Register scratch2,
+ Label* gc_required) {
+ Allocate(SlicedString::kSize, result, scratch1, scratch2, gc_required,
+ TAG_OBJECT);
+
+ InitializeNewString(result, length, Heap::kSlicedStringMapRootIndex, scratch1,
+ scratch2);
+}
+
+
+void MacroAssembler::AllocateOneByteSlicedString(Register result,
+ Register length,
+ Register scratch1,
+ Register scratch2,
+ Label* gc_required) {
+ Allocate(SlicedString::kSize, result, scratch1, scratch2, gc_required,
+ TAG_OBJECT);
+
+ InitializeNewString(result, length, Heap::kSlicedOneByteStringMapRootIndex,
+ scratch1, scratch2);
+}
+
+
+void MacroAssembler::CompareObjectType(Register object, Register map,
+ Register type_reg, InstanceType type) {
+ const Register temp = type_reg.is(no_reg) ? r0 : type_reg;
+
+ LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
+ CompareInstanceType(map, temp, type);
+}
+
+
+void MacroAssembler::CheckObjectTypeRange(Register object, Register map,
+ InstanceType min_type,
+ InstanceType max_type,
+ Label* false_label) {
+ STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
+ STATIC_ASSERT(LAST_TYPE < 256);
+ LoadP(map, FieldMemOperand(object, HeapObject::kMapOffset));
+ LoadlB(ip, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ SubP(ip, Operand(min_type));
+ CmpLogicalP(ip, Operand(max_type - min_type));
+ bgt(false_label);
+}
+
+
+void MacroAssembler::CompareInstanceType(Register map, Register type_reg,
+ InstanceType type) {
+ STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
+ STATIC_ASSERT(LAST_TYPE < 256);
+ LoadlB(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ CmpP(type_reg, Operand(type));
+}
+
+
+void MacroAssembler::CompareRoot(Register obj, Heap::RootListIndex index) {
+ CmpP(obj, MemOperand(kRootRegister, index << kPointerSizeLog2));
+}
+
+
+void MacroAssembler::CheckFastElements(Register map, Register scratch,
+ Label* fail) {
+ STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
+ STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
+ STATIC_ASSERT(FAST_ELEMENTS == 2);
+ STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
+ STATIC_ASSERT(Map::kMaximumBitField2FastHoleyElementValue < 0x8000);
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleyElementValue));
+ bgt(fail);
+}
+
+
+void MacroAssembler::CheckFastObjectElements(Register map, Register scratch,
+ Label* fail) {
+ STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
+ STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
+ STATIC_ASSERT(FAST_ELEMENTS == 2);
+ STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+ ble(fail);
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleyElementValue));
+ bgt(fail);
+}
+
+
+void MacroAssembler::CheckFastSmiElements(Register map, Register scratch,
+ Label* fail) {
+ STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
+ STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+ bgt(fail);
+}
+
+
+void MacroAssembler::SmiToDouble(DoubleRegister value, Register smi) {
+ SmiUntag(ip, smi);
+ ConvertIntToDouble(ip, value);
+}
+void MacroAssembler::StoreNumberToDoubleElements(
+ Register value_reg, Register key_reg, Register elements_reg,
+ Register scratch1, DoubleRegister double_scratch, Label* fail,
+ int elements_offset) {
+ Label smi_value, store;
+
+ // Handle smi values specially.
+ JumpIfSmi(value_reg, &smi_value);
+
+ // Ensure that the object is a heap number
+ CheckMap(value_reg, scratch1, isolate()->factory()->heap_number_map(), fail,
+ DONT_DO_SMI_CHECK);
+
+ LoadF(double_scratch, FieldMemOperand(value_reg, HeapNumber::kValueOffset));
+ // Force a canonical NaN.
+ CanonicalizeNaN(double_scratch);
+ b(&store);
+
+ bind(&smi_value);
+ SmiToDouble(double_scratch, value_reg);
+
+ bind(&store);
+ SmiToDoubleArrayOffset(scratch1, key_reg);
+ StoreF(double_scratch, FieldMemOperand(elements_reg, scratch1,
+ FixedDoubleArray::kHeaderSize - elements_offset));
+}
+
+void MacroAssembler::AddAndCheckForOverflow(Register dst, Register left,
+ Register right,
+ Register overflow_dst,
+ Register scratch) {
+ DCHECK(!dst.is(overflow_dst));
+ DCHECK(!dst.is(scratch));
+ DCHECK(!overflow_dst.is(scratch));
+ DCHECK(!overflow_dst.is(left));
+ DCHECK(!overflow_dst.is(right));
+
+ // TODO(joransiu): Optimize paths for left == right.
+ bool left_is_right = left.is(right);
+
+ // C = A+B; C overflows if A/B have same sign and C has diff sign than A
+ if (dst.is(left)) {
+ LoadRR(scratch, left); // Preserve left.
+ AddP(dst, left, right); // Left is overwritten.
+ XorP(overflow_dst, scratch, dst); // Original left.
+ if (!left_is_right)
+ XorP(scratch, dst, right);
+ } else if (dst.is(right)) {
+ LoadRR(scratch, right); // Preserve right.
+ AddP(dst, left, right); // Right is overwritten.
+ XorP(overflow_dst, dst, left);
+ if (!left_is_right)
+ XorP(scratch, dst, scratch);
+ } else {
+ AddP(dst, left, right);
+ XorP(overflow_dst, dst, left);
+ if (!left_is_right)
+ XorP(scratch, dst, right);
+ }
+ if (!left_is_right)
+ AndP(overflow_dst, scratch, overflow_dst);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+}
+
+
+void MacroAssembler::AddAndCheckForOverflow(Register dst, Register left,
+ intptr_t right,
+ Register overflow_dst,
+ Register scratch) {
+ DCHECK(!dst.is(overflow_dst));
+ DCHECK(!dst.is(scratch));
+ DCHECK(!overflow_dst.is(scratch));
+ DCHECK(!overflow_dst.is(left));
+
+ mov(r1, Operand(right));
+ AddAndCheckForOverflow(dst, left, r1, overflow_dst, scratch);
+}
+
+
+void MacroAssembler::SubAndCheckForOverflow(Register dst, Register left,
+ Register right,
+ Register overflow_dst,
+ Register scratch) {
+ DCHECK(!dst.is(overflow_dst));
+ DCHECK(!dst.is(scratch));
+ DCHECK(!overflow_dst.is(scratch));
+ DCHECK(!overflow_dst.is(left));
+ DCHECK(!overflow_dst.is(right));
+
+ // C = A-B; C overflows if A/B have diff signs and C has diff sign than A
+ if (dst.is(left)) {
+ LoadRR(scratch, left); // Preserve left.
+ SubP(dst, left, right); // Left is overwritten.
+ XorP(overflow_dst, dst, scratch);
+ XorP(scratch, right);
+ AndP(overflow_dst, scratch/*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
+ } else if (dst.is(right)) {
+ LoadRR(scratch, right); // Preserve right.
+ SubP(dst, left, right); // Right is overwritten.
+ XorP(overflow_dst, dst, left);
+ XorP(scratch, left);
+ AndP(overflow_dst, scratch/*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
+ } else {
+ SubP(dst, left, right);
+ XorP(overflow_dst, dst, left);
+ XorP(scratch, left, right);
+ AndP(overflow_dst, scratch/*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
+ }
+}
+
+
+void MacroAssembler::CompareMap(Register obj, Register scratch, Handle<Map> map,
+ Label* early_success) {
+ LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+ CompareMap(obj, map, early_success);
+}
+
+
+void MacroAssembler::CompareMap(Register obj_map, Handle<Map> map,
+ Label* early_success) {
+ mov(r0, Operand(map));
+ CmpP(r0, FieldMemOperand(obj_map, HeapObject::kMapOffset));
+}
+
+
+void MacroAssembler::CheckMap(Register obj, Register scratch, Handle<Map> map,
+ Label* fail, SmiCheckType smi_check_type) {
+ if (smi_check_type == DO_SMI_CHECK) {
+ JumpIfSmi(obj, fail);
+ }
+
+ Label success;
+ CompareMap(obj, scratch, map, &success);
+ bne(fail);
+ bind(&success);
+}
+
+
+void MacroAssembler::CheckMap(Register obj, Register scratch,
+ Heap::RootListIndex index, Label* fail,
+ SmiCheckType smi_check_type) {
+ if (smi_check_type == DO_SMI_CHECK) {
+ JumpIfSmi(obj, fail);
+ }
+ LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
+ CompareRoot(scratch, index);
+ bne(fail);
+}
+
+
+void MacroAssembler::DispatchWeakMap(Register obj, Register scratch1,
+ Register scratch2, Handle<WeakCell> cell,
+ Handle<Code> success,
+ SmiCheckType smi_check_type) {
+ Label fail;
+ if (smi_check_type == DO_SMI_CHECK) {
+ JumpIfSmi(obj, &fail);
+ }
+ LoadP(scratch1, FieldMemOperand(obj, HeapObject::kMapOffset));
+ CmpWeakValue(scratch1, cell, scratch2);
+ Jump(success, RelocInfo::CODE_TARGET, eq);
+ bind(&fail);
+}
+
+
+void MacroAssembler::CmpWeakValue(Register value, Handle<WeakCell> cell,
+ Register scratch, CRegister) {
+ mov(scratch, Operand(cell));
+ CmpP(value, FieldMemOperand(scratch, WeakCell::kValueOffset));
+}
+
+
+void MacroAssembler::GetWeakValue(Register value, Handle<WeakCell> cell) {
+ mov(value, Operand(cell));
+ LoadP(value, FieldMemOperand(value, WeakCell::kValueOffset));
+}
+
+
+void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell,
+ Label* miss) {
+ GetWeakValue(value, cell);
+ JumpIfSmi(value, miss);
+}
+
+
+void MacroAssembler::GetMapConstructor(Register result, Register map,
+ Register temp, Register temp2) {
+ Label done, loop;
+ LoadP(result, FieldMemOperand(map, Map::kConstructorOrBackPointerOffset));
+ bind(&loop);
+ JumpIfSmi(result, &done);
+ CompareObjectType(result, temp, temp2, MAP_TYPE);
+ bne(&done);
+ LoadP(result, FieldMemOperand(result, Map::kConstructorOrBackPointerOffset));
+ b(&loop);
+ bind(&done);
+}
+
+
+void MacroAssembler::TryGetFunctionPrototype(Register function, Register result,
+ Register scratch, Label* miss,
+ bool miss_on_bound_function) {
+ Label non_instance;
+ if (miss_on_bound_function) {
+ // Check that the receiver isn't a smi.
+ JumpIfSmi(function, miss);
+
+ // Check that the function really is a function. Load map into result reg.
+ CompareObjectType(function, result, scratch, JS_FUNCTION_TYPE);
+ bne(miss);
+
+ LoadP(scratch,
+ FieldMemOperand(function, JSFunction::kSharedFunctionInfoOffset));
+ LoadlW(scratch,
+ FieldMemOperand(scratch, SharedFunctionInfo::kCompilerHintsOffset));
+ TestBit(scratch,
+#if V8_TARGET_ARCH_S390X
+ SharedFunctionInfo::kBoundFunction,
+#else
+ SharedFunctionInfo::kBoundFunction + kSmiTagSize,
+#endif
+ r0);
+ bne(miss /*, cr0*/);
+
+ // Make sure that the function has an instance prototype.
+ LoadlB(scratch, FieldMemOperand(result, Map::kBitFieldOffset));
+ AndP(r0, scratch, Operand(1 << Map::kHasNonInstancePrototype));
+ bne(&non_instance, Label::kNear);
+ }
+
+ // Get the prototype or initial map from the function.
+ LoadP(result,
+ FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
+
+ // If the prototype or initial map is the hole, don't return it and
+ // simply miss the cache instead. This will allow us to allocate a
+ // prototype object on-demand in the runtime system.
+ CompareRoot(result, Heap::kTheHoleValueRootIndex);
+ beq(miss);
+
+ // If the function does not have an initial map, we're done.
+ Label done;
+ CompareObjectType(result, scratch, scratch, MAP_TYPE);
+ bne(&done, Label::kNear);
+
+ // Get the prototype from the initial map.
+ LoadP(result, FieldMemOperand(result, Map::kPrototypeOffset));
+
+ if (miss_on_bound_function) {
+ b(&done, Label::kNear);
+
+ // Non-instance prototype: Fetch prototype from constructor field
+ // in initial map.
+ bind(&non_instance);
+ GetMapConstructor(result, result, scratch, ip);
+ }
+
+ // All done.
+ bind(&done);
+}
+
+
+void MacroAssembler::CallStub(CodeStub* stub, TypeFeedbackId ast_id,
+ Condition cond) {
+ DCHECK(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs.
+ Call(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond);
+}
+
+
+void MacroAssembler::TailCallStub(CodeStub* stub, Condition cond) {
+ Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond);
+}
+
+
+bool MacroAssembler::AllowThisStubCall(CodeStub* stub) {
+ return has_frame_ || !stub->SometimesSetsUpAFrame();
+}
+
+
+void MacroAssembler::IndexFromHash(Register hash, Register index) {
+ // If the hash field contains an array index pick it out. The assert checks
+ // that the constants for the maximum number of digits for an array index
+ // cached in the hash field and the number of bits reserved for it does not
+ // conflict.
+ DCHECK(TenToThe(String::kMaxCachedArrayIndexLength) <
+ (1 << String::kArrayIndexValueBits));
+ DecodeFieldToSmi<String::ArrayIndexValueBits>(index, hash);
+}
+
+
+
+void MacroAssembler::TestDoubleIsInt32(DoubleRegister double_input,
+ Register scratch1, Register scratch2,
+ DoubleRegister double_scratch) {
+ TryDoubleToInt32Exact(scratch1, double_input, scratch2, double_scratch);
+}
+
+
+void MacroAssembler::TryDoubleToInt32Exact(Register result,
+ DoubleRegister double_input,
+ Register scratch,
+ DoubleRegister double_scratch) {
+ Label done;
+ DCHECK(!double_input.is(double_scratch));
+
+ ConvertDoubleToInt64(double_input,
+#if !V8_TARGET_ARCH_S390X
+ scratch,
+#endif
+ result, double_scratch);
+
+#if V8_TARGET_ARCH_S390X
+ TestIfInt32(result, r0);
+#else
+ TestIfInt32(scratch, result, r0);
+#endif
+ bne(&done);
+
+ // convert back and compare
+ lgdr(scratch, double_scratch);
+ cdfbr(double_scratch, scratch);
+ cdbr(double_scratch, double_input);
+ bind(&done);
+}
+
+void MacroAssembler::TryInt32Floor(Register result, DoubleRegister double_input,
+ Register input_high, Register scratch,
+ DoubleRegister double_scratch, Label* done,
+ Label* exact) {
+ DCHECK(!result.is(input_high));
+ DCHECK(!double_input.is(double_scratch));
+ Label exception;
+
+ // Move high word into input_high
+ StoreF(double_input, MemOperand(sp, -kDoubleSize));
+ lay(sp, MemOperand(sp, -kDoubleSize));
+ LoadlW(input_high, MemOperand(sp, Register::kExponentOffset));
+ la(sp, MemOperand(sp, kDoubleSize));
+
+ // Test for NaN/Inf
+ ExtractBitMask(result, input_high, HeapNumber::kExponentMask);
+ CmpLogicalP(result, Operand(0x7ff));
+ beq(&exception);
+
+ // Convert (rounding to -Inf)
+ ConvertDoubleToInt64(double_input,
+#if !V8_TARGET_ARCH_S390X
+ scratch,
+#endif
+ result, double_scratch, kRoundToMinusInf);
+
+// Test for overflow
+#if V8_TARGET_ARCH_S390X
+ TestIfInt32(result, r0);
+#else
+ TestIfInt32(scratch, result, r0);
+#endif
+ bne(&exception);
+
+ // Test for exactness
+ lgdr(scratch, double_scratch);
+ cdfbr(double_scratch, scratch);
+ cdbr(double_scratch, double_input);
+ beq(exact);
+ b(done);
+
+ bind(&exception);
+}
+
+
+void MacroAssembler::FloatCeiling64(DoubleRegister double_output,
+ DoubleRegister double_input, Register scratch) {
+ Label not_zero, no_nan_inf, done, do_ceil;
+ Register scratch2 = r0;
+
+ // Move high word into scratch
+ StoreF(double_input, MemOperand(sp, -kDoubleSize));
+ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ ExtractBitMask(scratch2, scratch, HeapNumber::kExponentMask);
+ CmpLogicalP(scratch2, Operand(0x7ff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input in (-1, -0) which results in -0
+ LoadDoubleLiteral(d0, -1.0, scratch2);
+ cdbr(double_input, d0);
+ ble(&do_ceil, Label::kNear);
+ Cmp32(scratch, Operand::Zero());
+ bgt(&do_ceil, Label::kNear);
+ bne(¬_zero, Label::kNear);
+
+ // double_input = +/- 0 which results in +/- 0 respectively
+ Move(double_output, double_input);
+ b(&done);
+ bind(¬_zero);
+
+ // double_output = -0
+ llihf(scratch2, Operand(0x80000000));
+ ldgr(double_output, scratch2);
+ b(&done);
+ bind(&do_ceil);
+
+ // Regular case
+ // cgdbr(Condition(6), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fidbra(double_output, double_input, FIDBRA_ROUND_TOWARD_POS_INF);
+ bind(&done);
+}
+
+
+void MacroAssembler::FloatFloor64(DoubleRegister double_output,
+ DoubleRegister double_input, Register scratch) {
+ Label not_zero, no_nan_inf, done, do_floor;
+ Register scratch2 = r0;
+
+ // Move high word into scratch
+ StoreF(double_input, MemOperand(sp, -kDoubleSize));
+ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ ExtractBitMask(scratch2, scratch, HeapNumber::kExponentMask);
+ CmpLogicalP(scratch2, Operand(0x7ff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input=+/- 0 which results in +/- 0 respectively
+ LoadDoubleLiteral(d0, 0.0, scratch2);
+ cdbr(double_input, d0);
+ bne(&do_floor, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&do_floor);
+
+ // Regular case
+ // cgdbr(Condition(7), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fidbra(double_output, double_input, FIDBRA_ROUND_TOWARD_NEG_INF);
+ bind(&done);
+}
+
+
+void MacroAssembler::TryInlineTruncateDoubleToI(Register result,
+ DoubleRegister double_input,
+ Label* done) {
+ DoubleRegister double_scratch = kScratchDoubleReg;
+#if !V8_TARGET_ARCH_S390X
+ Register scratch = ip;
+#endif
+
+ ConvertDoubleToInt64(double_input,
+#if !V8_TARGET_ARCH_S390X
+ scratch,
+#endif
+ result, double_scratch);
+
+// Test for overflow
+#if V8_TARGET_ARCH_S390X
+ TestIfInt32(result, r0);
+#else
+ TestIfInt32(scratch, result, r0);
+#endif
+ beq(done);
+}
+
+void MacroAssembler::TruncateDoubleToI(Register result,
+ DoubleRegister double_input) {
+ Label done;
+
+ TryInlineTruncateDoubleToI(result, double_input, &done);
+
+ // If we fell through then inline version didn't succeed - call stub instead.
+ push(r14);
+ // Put input on stack.
+ StoreF(double_input, MemOperand(sp, -kDoubleSize));
+ lay(sp, MemOperand(sp, -kDoubleSize));
+
+ DoubleToIStub stub(isolate(), sp, result, 0, true, true);
+ CallStub(&stub);
+
+ la(sp, MemOperand(sp, kDoubleSize));
+ pop(r14);
+
+ bind(&done);
+}
+
+
+void MacroAssembler::TruncateHeapNumberToI(Register result, Register object) {
+ Label done;
+ DoubleRegister double_scratch = kScratchDoubleReg;
+ DCHECK(!result.is(object));
+
+ LoadF(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
+ TryInlineTruncateDoubleToI(result, double_scratch, &done);
+
+ // If we fell through then inline version didn't succeed - call stub instead.
+ push(r14);
+ DoubleToIStub stub(isolate(), object, result,
+ HeapNumber::kValueOffset - kHeapObjectTag, true, true);
+ CallStub(&stub);
+ pop(r14);
+
+ bind(&done);
+}
+
+
+void MacroAssembler::TruncateNumberToI(Register object, Register result,
+ Register heap_number_map,
+ Register scratch1, Label* not_number) {
+ Label done;
+ DCHECK(!result.is(object));
+
+ UntagAndJumpIfSmi(result, object, &done);
+ JumpIfNotHeapNumber(object, heap_number_map, scratch1, not_number);
+ TruncateHeapNumberToI(result, object);
+
+ bind(&done);
+}
+
+
+void MacroAssembler::GetLeastBitsFromSmi(Register dst, Register src,
+ int num_least_bits) {
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ // We rotate by kSmiShift amount, and extract the num_least_bits
+ risbg(dst, src, Operand(64 - num_least_bits), Operand(63),
+ Operand(64 - kSmiShift), true);
+ } else {
+ SmiUntag(dst, src);
+ AndP(dst, Operand((1 << num_least_bits) - 1));
+ }
+}
+
+
+void MacroAssembler::GetLeastBitsFromInt32(Register dst, Register src,
+ int num_least_bits) {
+ AndP(dst, src, Operand((1 << num_least_bits) - 1));
+}
+
+
+void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
+ SaveFPRegsMode save_doubles) {
+ // All parameters are on the stack. r2 has the return value after call.
+
+ // If the expected number of arguments of the runtime function is
+ // constant, we check that the actual number of arguments match the
+ // expectation.
+ CHECK(f->nargs < 0 || f->nargs == num_arguments);
+
+ // TODO(1236192): Most runtime routines don't need the number of
+ // arguments passed in because it is constant. At some point we
+ // should remove this need and make the runtime routine entry code
+ // smarter.
+ mov(r2, Operand(num_arguments));
+ mov(r3, Operand(ExternalReference(f, isolate())));
+ CEntryStub stub(isolate(),
+#if V8_TARGET_ARCH_S390X
+ f->result_size,
+#else
+ 1,
+#endif
+ save_doubles);
+ CallStub(&stub);
+}
+
+
+void MacroAssembler::CallExternalReference(const ExternalReference& ext,
+ int num_arguments) {
+ mov(r2, Operand(num_arguments));
+ mov(r3, Operand(ext));
+
+ CEntryStub stub(isolate(), 1);
+ CallStub(&stub);
+}
+
+
+void MacroAssembler::TailCallExternalReference(const ExternalReference& ext,
+ int num_arguments,
+ int result_size) {
+ // TODO(1236192): Most runtime routines don't need the number of
+ // arguments passed in because it is constant. At some point we
+ // should remove this need and make the runtime routine entry code
+ // smarter.
+ mov(r2, Operand(num_arguments));
+ JumpToExternalReference(ext);
+}
+
+
+void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid, int num_arguments,
+ int result_size) {
+ TailCallExternalReference(ExternalReference(fid, isolate()), num_arguments,
+ result_size);
+}
+
+
+void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin) {
+ mov(r3, Operand(builtin));
+ CEntryStub stub(isolate(), 1);
+ Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
+}
+
+
+void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id, InvokeFlag flag,
+ const CallWrapper& call_wrapper) {
+ // You can't call a builtin without a valid frame.
+ DCHECK(flag == JUMP_FUNCTION || has_frame());
+
+ GetBuiltinEntry(ip, id);
+ if (flag == CALL_FUNCTION) {
+ call_wrapper.BeforeCall(CallSize(ip));
+ CallJSEntry(ip);
+ call_wrapper.AfterCall();
+ } else {
+ DCHECK(flag == JUMP_FUNCTION);
+ Jump(ip);
+ }
+}
+
+
+void MacroAssembler::GetBuiltinFunction(Register target,
+ Builtins::JavaScript id) {
+ // Load the builtins object into target register.
+ LoadP(target,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ LoadP(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
+ // Load the JavaScript builtin function from the builtins object.
+ LoadP(target,
+ FieldMemOperand(target, JSBuiltinsObject::OffsetOfFunctionWithId(id)),
+ r0);
+}
+
+
+void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {
+ DCHECK(!target.is(r3));
+ GetBuiltinFunction(r3, id);
+ // Load the code entry point from the builtins object.
+ LoadP(target, FieldMemOperand(r3, JSFunction::kCodeEntryOffset));
+}
+
+
+void MacroAssembler::SetCounter(StatsCounter* counter, int value,
+ Register scratch1, Register scratch2) {
+ if (FLAG_native_code_counters && counter->Enabled()) {
+ mov(scratch1, Operand(value));
+ mov(scratch2, Operand(ExternalReference(counter)));
+ StoreW(scratch1, MemOperand(scratch2));
+ }
+}
+
+
+void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
+ Register scratch1, Register scratch2) {
+ DCHECK(value > 0 && is_int8(value));
+ if (FLAG_native_code_counters && counter->Enabled()) {
+ mov(scratch1, Operand(ExternalReference(counter)));
+ // @TODO(JOHN): can be optimized by asi()
+ LoadW(scratch2, MemOperand(scratch1));
+ AddP(scratch2, Operand(value));
+ StoreW(scratch2, MemOperand(scratch1));
+ }
+}
+
+
+void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
+ Register scratch1, Register scratch2) {
+ DCHECK(value > 0 && is_int8(value));
+ if (FLAG_native_code_counters && counter->Enabled()) {
+ mov(scratch1, Operand(ExternalReference(counter)));
+ // @TODO(JOHN): can be optimized by asi()
+ LoadW(scratch2, MemOperand(scratch1));
+ AddP(scratch2, Operand(-value));
+ StoreW(scratch2, MemOperand(scratch1));
+ }
+}
+
+void MacroAssembler::Assert(Condition cond, BailoutReason reason,
+ CRegister cr) {
+ if (emit_debug_code()) Check(cond, reason, cr);
+}
+
+
+void MacroAssembler::AssertFastElements(Register elements) {
+ if (emit_debug_code()) {
+ DCHECK(!elements.is(r0));
+ Label ok;
+ push(elements);
+ LoadP(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
+ CompareRoot(elements, Heap::kFixedArrayMapRootIndex);
+ beq(&ok, Label::kNear);
+ CompareRoot(elements, Heap::kFixedDoubleArrayMapRootIndex);
+ beq(&ok, Label::kNear);
+ CompareRoot(elements, Heap::kFixedCOWArrayMapRootIndex);
+ beq(&ok, Label::kNear);
+ Abort(kJSObjectWithFastElementsMapHasSlowElements);
+ bind(&ok);
+ pop(elements);
+ }
+}
+
+
+void MacroAssembler::Check(Condition cond, BailoutReason reason, CRegister cr) {
+ Label L;
+ b(cond, &L);
+ Abort(reason);
+ // will not return here
+ bind(&L);
+}
+
+
+void MacroAssembler::Abort(BailoutReason reason) {
+ Label abort_start;
+ bind(&abort_start);
+#ifdef DEBUG
+ const char* msg = GetBailoutReason(reason);
+ if (msg != NULL) {
+ RecordComment("Abort message: ");
+ RecordComment(msg);
+ }
+
+ if (FLAG_trap_on_abort) {
+ stop(msg);
+ return;
+ }
+#endif
+
+ LoadSmiLiteral(r0, Smi::FromInt(reason));
+ push(r0);
+ // Disable stub call restrictions to always allow calls to abort.
+ if (!has_frame_) {
+ // We don't actually want to generate a pile of code for this, so just
+ // claim there is a stack frame, without generating one.
+ FrameScope scope(this, StackFrame::NONE);
+ CallRuntime(Runtime::kAbort, 1);
+ } else {
+ CallRuntime(Runtime::kAbort, 1);
+ }
+ // will not return here
+}
+
+
+void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
+ if (context_chain_length > 0) {
+ // Move up the chain of contexts to the context containing the slot.
+ LoadP(dst, MemOperand(cp, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+ for (int i = 1; i < context_chain_length; i++) {
+ LoadP(dst, MemOperand(dst, Context::SlotOffset(Context::PREVIOUS_INDEX)));
+ }
+ } else {
+ // Slot is in the current function context. Move it into the
+ // destination register in case we store into it (the write barrier
+ // cannot be allowed to destroy the context in esi).
+ LoadRR(dst, cp);
+ }
+}
+
+
+void MacroAssembler::LoadTransitionedArrayMapConditional(
+ ElementsKind expected_kind, ElementsKind transitioned_kind,
+ Register map_in_out, Register scratch, Label* no_map_match) {
+ // Load the global or builtins object from the current context.
+ LoadP(scratch,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ LoadP(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+
+ // Check that the function's map is the same as the expected cached map.
+ LoadP(scratch,
+ MemOperand(scratch, Context::SlotOffset(Context::JS_ARRAY_MAPS_INDEX)));
+ size_t offset = expected_kind * kPointerSize + FixedArrayBase::kHeaderSize;
+ CmpP(map_in_out, FieldMemOperand(scratch, offset));
+ bne(no_map_match);
+
+ // Use the transitioned cached map.
+ offset = transitioned_kind * kPointerSize + FixedArrayBase::kHeaderSize;
+ LoadP(map_in_out, FieldMemOperand(scratch, offset));
+}
+
+
+void MacroAssembler::LoadGlobalFunction(int index, Register function) {
+ // Load the global or builtins object from the current context.
+ LoadP(function,
+ MemOperand(cp, Context::SlotOffset(Context::GLOBAL_OBJECT_INDEX)));
+ // Load the native context from the global or builtins object.
+ LoadP(function,
+ FieldMemOperand(function, GlobalObject::kNativeContextOffset));
+ // Load the function from the native context.
+ LoadP(function, MemOperand(function, Context::SlotOffset(index)), r0);
+}
+
+
+void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
+ Register map,
+ Register scratch) {
+ // Load the initial map. The global functions all have initial maps.
+ LoadP(map,
+ FieldMemOperand(function, JSFunction::kPrototypeOrInitialMapOffset));
+ if (emit_debug_code()) {
+ Label ok, fail;
+ CheckMap(map, scratch, Heap::kMetaMapRootIndex, &fail, DO_SMI_CHECK);
+ b(&ok);
+ bind(&fail);
+ Abort(kGlobalFunctionsMustHaveInitialMap);
+ bind(&ok);
+ }
+}
+
+
+void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
+ Register reg, Register scratch, Label* not_power_of_two_or_zero) {
+ SubP(scratch, reg, Operand(1));
+ CmpP(scratch, Operand::Zero());
+ blt(not_power_of_two_or_zero);
+ AndP(r0, reg, scratch/*, SetRC*/); // Should be okay to remove rc
+ bne(not_power_of_two_or_zero /*, cr0*/);
+}
+
+
+void MacroAssembler::JumpIfNotPowerOfTwoOrZeroAndNeg(Register reg,
+ Register scratch,
+ Label* zero_and_neg,
+ Label* not_power_of_two) {
+ SubP(scratch, reg, Operand(1));
+ CmpP(scratch, Operand::Zero());
+ blt(zero_and_neg);
+ AndP(r0, reg, scratch/*, SetRC*/); // Should be okay to remove rc
+ bne(not_power_of_two /*, cr0*/);
+}
+
+#if !V8_TARGET_ARCH_S390X
+void MacroAssembler::SmiTagCheckOverflow(Register reg, Register overflow) {
+ DCHECK(!reg.is(overflow));
+ LoadRR(overflow, reg); // Save original value.
+ SmiTag(reg);
+ XorP(overflow, overflow, reg); // Overflow if (value ^ 2 * value) < 0.
+ LoadAndTestRR(overflow, overflow);
+}
+
+
+void MacroAssembler::SmiTagCheckOverflow(Register dst, Register src,
+ Register overflow) {
+ if (dst.is(src)) {
+ // Fall back to slower case.
+ SmiTagCheckOverflow(dst, overflow);
+ } else {
+ DCHECK(!dst.is(src));
+ DCHECK(!dst.is(overflow));
+ DCHECK(!src.is(overflow));
+ SmiTag(dst, src);
+ XorP(overflow, dst, src); // Overflow if (value ^ 2 * value) < 0.
+ LoadAndTestRR(overflow, overflow);
+ }
+}
+#endif
+
+void MacroAssembler::JumpIfNotBothSmi(Register reg1, Register reg2,
+ Label* on_not_both_smi) {
+ STATIC_ASSERT(kSmiTag == 0);
+ OrP(r0, reg1, reg2/*, LeaveRC*/); // should be okay to remove LeaveRC
+ JumpIfNotSmi(r0, on_not_both_smi);
+}
+
+
+void MacroAssembler::UntagAndJumpIfSmi(Register dst, Register src,
+ Label* smi_case) {
+ STATIC_ASSERT(kSmiTag == 0);
+ STATIC_ASSERT(kSmiTagSize == 1);
+ // this won't work if src == dst
+ DCHECK(src.code() != dst.code());
+ SmiUntag(dst, src);
+ TestIfSmi(src);
+ beq(smi_case);
+}
+
+
+void MacroAssembler::UntagAndJumpIfNotSmi(Register dst, Register src,
+ Label* non_smi_case) {
+ STATIC_ASSERT(kSmiTag == 0);
+ STATIC_ASSERT(kSmiTagSize == 1);
+
+ // We can more optimally use TestIfSmi if dst != src
+ // otherwise, the UnTag operation will kill the CC and we cannot
+ // test the Tag bit.
+ if (src.code() != dst.code()) {
+ SmiUntag(dst, src);
+ TestIfSmi(src);
+ } else {
+ TestBit(src, 0, r0);
+ SmiUntag(dst, src);
+ LoadAndTestRR(r0, r0);
+ }
+ bne(non_smi_case);
+}
+
+
+void MacroAssembler::JumpIfEitherSmi(Register reg1, Register reg2,
+ Label* on_either_smi) {
+ STATIC_ASSERT(kSmiTag == 0);
+ JumpIfSmi(reg1, on_either_smi);
+ JumpIfSmi(reg2, on_either_smi);
+}
+
+
+void MacroAssembler::AssertNotSmi(Register object) {
+ if (emit_debug_code()) {
+ STATIC_ASSERT(kSmiTag == 0);
+ TestIfSmi(object);
+ Check(ne, kOperandIsASmi, cr0);
+ }
+}
+
+
+void MacroAssembler::AssertSmi(Register object) {
+ if (emit_debug_code()) {
+ STATIC_ASSERT(kSmiTag == 0);
+ TestIfSmi(object);
+ Check(eq, kOperandIsNotSmi, cr0);
+ }
+}
+
+
+void MacroAssembler::AssertString(Register object) {
+ if (emit_debug_code()) {
+ STATIC_ASSERT(kSmiTag == 0);
+ TestIfSmi(object);
+ Check(ne, kOperandIsASmiAndNotAString, cr0);
+ push(object);
+ LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
+ CompareInstanceType(object, object, FIRST_NONSTRING_TYPE);
+ pop(object);
+ Check(lt, kOperandIsNotAString);
+ }
+}
+
+
+void MacroAssembler::AssertName(Register object) {
+ if (emit_debug_code()) {
+ STATIC_ASSERT(kSmiTag == 0);
+ TestIfSmi(object);
+ Check(ne, kOperandIsASmiAndNotAName, cr0);
+ push(object);
+ LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
+ CompareInstanceType(object, object, LAST_NAME_TYPE);
+ pop(object);
+ Check(le, kOperandIsNotAName);
+ }
+}
+
+
+void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
+ Register scratch) {
+ if (emit_debug_code()) {
+ Label done_checking;
+ AssertNotSmi(object);
+ CompareRoot(object, Heap::kUndefinedValueRootIndex);
+ beq(&done_checking, Label::kNear);
+ LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+ CompareRoot(scratch, Heap::kAllocationSiteMapRootIndex);
+ Assert(eq, kExpectedUndefinedOrCell);
+ bind(&done_checking);
+ }
+}
+
+
+void MacroAssembler::AssertIsRoot(Register reg, Heap::RootListIndex index) {
+ if (emit_debug_code()) {
+ CompareRoot(reg, index);
+ Check(eq, kHeapNumberMapRegisterClobbered);
+ }
+}
+
+
+void MacroAssembler::JumpIfNotHeapNumber(Register object,
+ Register heap_number_map,
+ Register scratch,
+ Label* on_not_heap_number) {
+ LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
+ AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
+ CmpP(scratch, heap_number_map);
+ bne(on_not_heap_number);
+}
+
+void MacroAssembler::LookupNumberStringCache(Register object, Register result,
+ Register scratch1,
+ Register scratch2,
+ Register scratch3,
+ Label* not_found) {
+ // Use of registers. Register result is used as a temporary.
+ Register number_string_cache = result;
+ Register mask = scratch3;
+
+ // Load the number string cache.
+ LoadRoot(number_string_cache, Heap::kNumberStringCacheRootIndex);
+
+ // Make the hash mask from the length of the number string cache. It
+ // contains two elements (number and string) for each cache entry.
+ LoadP(mask, FieldMemOperand(number_string_cache, FixedArray::kLengthOffset));
+ // Divide length by two (length is a smi).
+ ShiftRightArithP(mask, mask, Operand(kSmiTagSize + kSmiShiftSize + 1));
+ SubP(mask, Operand(1)); // Make mask.
+
+ // Calculate the entry in the number string cache. The hash value in the
+ // number string cache for smis is just the smi value, and the hash for
+ // doubles is the xor of the upper and lower words. See
+ // Heap::GetNumberStringCache.
+ Label is_smi;
+ Label load_result_from_cache;
+ JumpIfSmi(object, &is_smi);
+ CheckMap(object, scratch1, Heap::kHeapNumberMapRootIndex, not_found,
+ DONT_DO_SMI_CHECK);
+
+ STATIC_ASSERT(8 == kDoubleSize);
+ LoadlW(scratch1, FieldMemOperand(object, HeapNumber::kExponentOffset));
+ LoadlW(scratch2, FieldMemOperand(object, HeapNumber::kMantissaOffset));
+ XorP(scratch1, scratch2);
+ AndP(scratch1, mask);
+
+ // Calculate address of entry in string cache: each entry consists
+ // of two pointer sized fields.
+ ShiftLeftP(scratch1, scratch1, Operand(kPointerSizeLog2 + 1));
+ AddP(scratch1, number_string_cache);
+
+ Register probe = mask;
+ LoadP(probe, FieldMemOperand(scratch1, FixedArray::kHeaderSize));
+ JumpIfSmi(probe, not_found);
+ LoadF(d0, FieldMemOperand(object, HeapNumber::kValueOffset));
+ LoadF(d1, FieldMemOperand(probe, HeapNumber::kValueOffset));
+ cdbr(d0, d1);
+ bne(not_found); // The cache did not contain this value.
+ b(&load_result_from_cache);
+
+ bind(&is_smi);
+ Register scratch = scratch1;
+ SmiUntag(scratch, object);
+ AndP(scratch, mask);
+ // Calculate address of entry in string cache: each entry consists
+ // of two pointer sized fields.
+ ShiftLeftP(scratch, scratch, Operand(kPointerSizeLog2 + 1));
+ AddP(scratch, number_string_cache, scratch);
+
+ // Check if the entry is the smi we are looking for.
+ LoadP(probe, FieldMemOperand(scratch, FixedArray::kHeaderSize));
+ CmpP(object, probe);
+ bne(not_found);
+
+ // Get the result from the cache.
+ bind(&load_result_from_cache);
+ LoadP(result,
+ FieldMemOperand(scratch, FixedArray::kHeaderSize + kPointerSize));
+ IncrementCounter(isolate()->counters()->number_to_string_native(), 1,
+ scratch1, scratch2);
+}
+
+
+void MacroAssembler::JumpIfNonSmisNotBothSequentialOneByteStrings(
+ Register first, Register second, Register scratch1, Register scratch2,
+ Label* failure) {
+ // Test that both first and second are sequential one-byte strings.
+ // Assume that they are non-smis.
+ LoadP(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
+ LoadP(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
+ LoadlB(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
+ LoadlB(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
+
+ JumpIfBothInstanceTypesAreNotSequentialOneByte(scratch1, scratch2, scratch1,
+ scratch2, failure);
+}
+
+
+void MacroAssembler::JumpIfNotBothSequentialOneByteStrings(Register first,
+ Register second,
+ Register scratch1,
+ Register scratch2,
+ Label* failure) {
+ // Check that neither is a smi.
+ AndP(scratch1, first, second);
+ JumpIfSmi(scratch1, failure);
+ JumpIfNonSmisNotBothSequentialOneByteStrings(first, second, scratch1,
+ scratch2, failure);
+}
+
+
+void MacroAssembler::JumpIfNotUniqueNameInstanceType(Register reg,
+ Label* not_unique_name) {
+ STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
+ Label succeed;
+ AndP(r0, reg, Operand(kIsNotStringMask | kIsNotInternalizedMask));
+ beq(&succeed, Label::kNear);
+ CmpP(reg, Operand(SYMBOL_TYPE));
+ bne(not_unique_name);
+
+ bind(&succeed);
+}
+
+
+// Allocates a heap number or jumps to the need_gc label if the young space
+// is full and a scavenge is needed.
+void MacroAssembler::AllocateHeapNumber(Register result, Register scratch1,
+ Register scratch2,
+ Register heap_number_map,
+ Label* gc_required,
+ TaggingMode tagging_mode,
+ MutableMode mode) {
+ // Allocate an object in the heap for the heap number and tag it as a heap
+ // object.
+ Allocate(HeapNumber::kSize, result, scratch1, scratch2, gc_required,
+ tagging_mode == TAG_RESULT ? TAG_OBJECT : NO_ALLOCATION_FLAGS);
+
+ Heap::RootListIndex map_index = mode == MUTABLE
+ ? Heap::kMutableHeapNumberMapRootIndex
+ : Heap::kHeapNumberMapRootIndex;
+ AssertIsRoot(heap_number_map, map_index);
+
+ // Store heap number map in the allocated object.
+ if (tagging_mode == TAG_RESULT) {
+ StoreP(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
+ } else {
+ StoreP(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
+ }
+}
+
+
+void MacroAssembler::AllocateHeapNumberWithValue(
+ Register result, DoubleRegister value, Register scratch1, Register scratch2,
+ Register heap_number_map, Label* gc_required) {
+ AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required);
+ StoreF(value, FieldMemOperand(result, HeapNumber::kValueOffset));
+}
+
+
+// Copies a fixed number of fields of heap objects from src to dst.
+void MacroAssembler::CopyFields(Register dst, Register src, RegList temps,
+ int field_count) {
+ // At least one bit set in the first 15 registers.
+ DCHECK((temps & ((1 << 15) - 1)) != 0);
+ DCHECK((temps & dst.bit()) == 0);
+ DCHECK((temps & src.bit()) == 0);
+ // Primitive implementation using only one temporary register.
+
+ Register tmp = no_reg;
+ // Find a temp register in temps list.
+ for (int i = 0; i < 15; i++) {
+ if ((temps & (1 << i)) != 0) {
+ tmp.set_code(i);
+ break;
+ }
+ }
+ DCHECK(!tmp.is(no_reg));
+
+ for (int i = 0; i < field_count; i++) {
+ LoadP(tmp, FieldMemOperand(src, i * kPointerSize), r0);
+ StoreP(tmp, FieldMemOperand(dst, i * kPointerSize));
+ }
+}
+
+
+void MacroAssembler::CopyBytes(Register src, Register dst, Register length,
+ Register scratch) {
+ Label big_loop, left_bytes, done, fake_call;
+
+ DCHECK(!scratch.is(r0));
+
+ // big loop moves 256 bytes at a time
+ bind(&big_loop);
+ CmpP(length, Operand(static_cast<intptr_t>(0x100)));
+ blt(&left_bytes);
+
+ mvc(MemOperand(dst), MemOperand(src), 0x100);
+
+ AddP(src, Operand(static_cast<intptr_t>(0x100)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x100)));
+ SubP(length, Operand(static_cast<intptr_t>(0x100)));
+ b(&big_loop);
+
+ bind(&left_bytes);
+ CmpP(length, Operand::Zero());
+ beq(&done);
+
+ // TODO(JOHN): The full optimized version with unknown problem.
+ /*
+ b(scratch, &fake_call); // use brasl to Save mvc addr to scratch
+ mvc(MemOperand(dst), MemOperand(src), 1);
+ bind(&fake_call);
+ SubP(length, Operand(static_cast<intptr_t>(-1)));
+ ex(length, MemOperand(scratch)); // execute mvc instr above
+ AddP(src, length);
+ AddP(dst, length);
+ AddP(src, Operand(static_cast<intptr_t>(0x1)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x1)));
+ */
+
+ mvc(MemOperand(dst), MemOperand(src), 1);
+ AddP(src, Operand(static_cast<intptr_t>(0x1)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x1)));
+ SubP(length, Operand(static_cast<intptr_t>(0x1)));
+
+ b(&left_bytes);
+ bind(&done);
+}
+
+
+void MacroAssembler::InitializeNFieldsWithFiller(Register start_offset,
+ Register count,
+ Register filler) {
+ Label loop;
+ bind(&loop);
+ StoreP(filler, MemOperand(start_offset));
+ AddP(start_offset, Operand(kPointerSize));
+ SubP(count, Operand(1));
+ CmpP(count, Operand::Zero());
+ bne(&loop);
+}
+
+
+
+void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
+ Register end_offset,
+ Register filler) {
+ Label done;
+ SubP(r0, end_offset, start_offset /*, LeaveOE, SetRC*/);
+ beq(&done, Label::kNear);
+ ShiftRightP(r0, r0, Operand(kPointerSizeLog2));
+ InitializeNFieldsWithFiller(start_offset, r0, filler);
+ bind(&done);
+}
+
+
+void MacroAssembler::SaveFPRegs(Register location, int first, int count) {
+ DCHECK(count > 0);
+ int cur = first;
+ SubP(location, Operand(count * kDoubleSize));
+ for (int i = 0; i < count; i++) {
+ DoubleRegister reg = DoubleRegister::from_code(cur++);
+ StoreF(reg, MemOperand(location, i * kDoubleSize));
+ }
+}
+
+
+void MacroAssembler::RestoreFPRegs(Register location, int first, int count) {
+ DCHECK(count > 0);
+ int cur = first + count - 1;
+ for (int i = count - 1; i >= 0; i--) {
+ DoubleRegister reg = DoubleRegister::from_code(cur--);
+ LoadF(reg, MemOperand(location, i * kDoubleSize));
+ }
+ AddP(location, Operand(count * kDoubleSize));
+}
+
+
+void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialOneByte(
+ Register first, Register second, Register scratch1, Register scratch2,
+ Label* failure) {
+ const int kFlatOneByteStringMask =
+ kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
+ const int kFlatOneByteStringTag =
+ kStringTag | kOneByteStringTag | kSeqStringTag;
+ if (!scratch1.is(first)) LoadRR(scratch1, first);
+ if (!scratch2.is(second)) LoadRR(scratch2, second);
+ nilf(scratch1, Operand(kFlatOneByteStringMask));
+ CmpP(scratch1, Operand(kFlatOneByteStringTag));
+ bne(failure);
+ nilf(scratch2, Operand(kFlatOneByteStringMask));
+ CmpP(scratch2, Operand(kFlatOneByteStringTag));
+ bne(failure);
+}
+
+
+void MacroAssembler::JumpIfInstanceTypeIsNotSequentialOneByte(Register type,
+ Register scratch,
+ Label* failure) {
+ const int kFlatOneByteStringMask =
+ kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
+ const int kFlatOneByteStringTag =
+ kStringTag | kOneByteStringTag | kSeqStringTag;
+
+ if (!scratch.is(type)) LoadRR(scratch, type);
+ nilf(scratch, Operand(kFlatOneByteStringMask));
+ CmpP(scratch, Operand(kFlatOneByteStringTag));
+ bne(failure);
+}
+
+
+static const int kRegisterPassedArguments = 5;
+
+
+int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
+ int num_double_arguments) {
+ int stack_passed_words = 0;
+ if (num_double_arguments > DoubleRegister::kNumRegisters) {
+ stack_passed_words +=
+ 2 * (num_double_arguments - DoubleRegister::kNumRegisters);
+ }
+ // Up to five simple arguments are passed in registers r2..r6
+ if (num_reg_arguments > kRegisterPassedArguments) {
+ stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
+ }
+ return stack_passed_words;
+}
+
+
+void MacroAssembler::EmitSeqStringSetCharCheck(Register string, Register index,
+ Register value,
+ uint32_t encoding_mask) {
+ Label is_object;
+ TestIfSmi(string);
+ Check(ne, kNonObject, cr0);
+
+ LoadP(ip, FieldMemOperand(string, HeapObject::kMapOffset));
+ LoadlB(ip, FieldMemOperand(ip, Map::kInstanceTypeOffset));
+
+ AndP(ip, Operand(kStringRepresentationMask | kStringEncodingMask));
+ CmpP(ip, Operand(encoding_mask));
+ Check(eq, kUnexpectedStringType);
+
+// The index is assumed to be untagged coming in, tag it to compare with the
+// string length without using a temp register, it is restored at the end of
+// this function.
+#if !V8_TARGET_ARCH_S390X
+ Label index_tag_ok, index_tag_bad;
+ JumpIfNotSmiCandidate(index, r0, &index_tag_bad);
+#endif
+ SmiTag(index, index);
+#if !V8_TARGET_ARCH_S390X
+ b(&index_tag_ok);
+ bind(&index_tag_bad);
+ Abort(kIndexIsTooLarge);
+ bind(&index_tag_ok);
+#endif
+
+ LoadP(ip, FieldMemOperand(string, String::kLengthOffset));
+ CmpP(index, ip);
+ Check(lt, kIndexIsTooLarge);
+
+ DCHECK(Smi::FromInt(0) == 0);
+ CmpP(index, Operand::Zero());
+ Check(ge, kIndexIsNegative);
+
+ SmiUntag(index, index);
+}
+
+void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
+ int num_double_arguments,
+ Register scratch) {
+ int frame_alignment = ActivationFrameAlignment();
+ int stack_passed_arguments =
+ CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
+ int stack_space = kNumRequiredStackFrameSlots;
+ if (frame_alignment > kPointerSize) {
+ // Make stack end at alignment and make room for stack arguments
+ // -- preserving original value of sp.
+ LoadRR(scratch, sp);
+ lay(sp, MemOperand(sp, -(stack_passed_arguments + 1) * kPointerSize));
+ DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
+ ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
+ StoreP(scratch, MemOperand(sp, (stack_passed_arguments) * kPointerSize));
+ } else {
+ stack_space += stack_passed_arguments;
+ }
+ lay(sp, MemOperand(sp, -(stack_space) * kPointerSize));
+}
+
+
+void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
+ Register scratch) {
+ PrepareCallCFunction(num_reg_arguments, 0, scratch);
+}
+
+
+void MacroAssembler::MovToFloatParameter(DoubleRegister src) { Move(d0, src); }
+
+
+
+void MacroAssembler::MovToFloatResult(DoubleRegister src) { Move(d0, src); }
+
+
+
+void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
+ DoubleRegister src2) {
+ if (src2.is(d0)) {
+ DCHECK(!src1.is(d2));
+ Move(d2, src2);
+ Move(d0, src1);
+ } else {
+ Move(d0, src1);
+ Move(d2, src2);
+ }
+}
+
+
+void MacroAssembler::CallCFunction(ExternalReference function,
+ int num_reg_arguments,
+ int num_double_arguments) {
+ mov(ip, Operand(function));
+ CallCFunctionHelper(ip, num_reg_arguments, num_double_arguments);
+}
+
+
+void MacroAssembler::CallCFunction(Register function, int num_reg_arguments,
+ int num_double_arguments) {
+ CallCFunctionHelper(function, num_reg_arguments, num_double_arguments);
+}
+
+
+void MacroAssembler::CallCFunction(ExternalReference function,
+ int num_arguments) {
+ CallCFunction(function, num_arguments, 0);
+}
+
+
+void MacroAssembler::CallCFunction(Register function, int num_arguments) {
+ CallCFunction(function, num_arguments, 0);
+}
+
+
+void MacroAssembler::CallCFunctionHelper(Register function,
+ int num_reg_arguments,
+ int num_double_arguments) {
+ DCHECK(has_frame());
+// Just call directly. The function called cannot cause a GC, or
+// allow preemption, so the return address in the link register
+// stays correct.
+#if ABI_USES_FUNCTION_DESCRIPTORS && !defined(USE_SIMULATOR)
+ // AIX uses a function descriptor. When calling C code be aware
+ // of this descriptor and pick up values from it
+ LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(function, kPointerSize));
+ LoadP(ip, MemOperand(function, 0));
+ Register dest = ip;
+#elif ABI_TOC_ADDRESSABILITY_VIA_IP
+ Move(ip, function);
+ Register dest = ip;
+#else
+ Register dest = function;
+#endif
+
+ Call(dest);
+
+ int stack_passed_arguments =
+ CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
+ int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments;
+ if (ActivationFrameAlignment() > kPointerSize) {
+ // Load the original stack pointer (pre-alignment) from the stack
+ LoadP(sp, MemOperand(sp, stack_space * kPointerSize));
+ } else {
+ la(sp, MemOperand(sp, stack_space * kPointerSize));
+ }
+}
+
+
+void MacroAssembler::FlushICache(Register address, size_t size,
+ Register scratch) {
+ // S390 memory model does not require us to flush icache
+ return;
+}
+
+
+// This code assumes a FIXED_SEQUENCE for iilf on 31-bit
+// and iihf/iilf on 64-bit
+void MacroAssembler::SetRelocatedValue(Register location, Register scratch,
+ Register new_value) {
+ int32_t offset = 0;
+
+#if V8_TARGET_ARCH_S390X
+ // On 64-bit, we expect a IIHF instruction here.
+ if (emit_debug_code()) {
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrvh(scratch, MemOperand(location));
+#else
+ llh(scratch, MemOperand(location));
+#endif
+ nilf(scratch, Operand(0xFF0F));
+ // IIHF Opcode with extra zero in 3rd nibble
+ cfi(scratch, Operand(0xC008));
+ // TODO(Zen): Fix this check to work
+ // Check(eq, kTheInstructionToPatchShouldBeAnOri);
+ }
+
+ srlg(scratch, new_value, Operand(32));
+ // insert new high word into iihf instruction
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ strv(scratch, MemOperand(location, 2));
+#else
+ st(scratch, MemOperand(location, 2));
+#endif
+ offset += 6;
+#endif // V8_TARGET_ARCH_S390X
+
+
+ // At this point scratch is a iilf instruction.
+ if (emit_debug_code()) {
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrvh(scratch, MemOperand(location, offset));
+#else
+ llh(scratch, MemOperand(location, offset));
+#endif
+ nilf(scratch, Operand(0xFF0F));
+ // IILF Opcode with extra zero in 3rd nibble
+ cfi(scratch, Operand(0xC009));
+ // TODO(Zen): Fix this check to work
+ // Check(eq, kTheInstructionToPatchShouldBeAnIilf);
+ }
+
+ // insert low word into iilf instruction
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ strv(new_value, MemOperand(location, 2 + offset));
+#else
+ st(new_value, MemOperand(location, 2 + offset));
+#endif
+
+ // Update the I-cache so the new lis and addic can be executed.
+#if V8_TARGET_ARCH_S390X
+ FlushICache(location, 12, scratch);
+#else
+ FlushICache(location, 6, scratch);
+#endif
+}
+
+
+// This code assumes a FIXED_SEQUENCE for iilf on 31-bit
+// and iihf/iilf on 64-bit
+void MacroAssembler::GetRelocatedValue(Register location, Register result,
+ Register scratch) {
+ int32_t offset = 0;
+
+#if V8_TARGET_ARCH_S390X
+ // On 64-bit, we expect a IIHF instruction here.
+ if (emit_debug_code()) {
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrvh(scratch, MemOperand(location));
+#else
+ llh(scratch, MemOperand(location));
+#endif
+ nilf(scratch, Operand(0xFF0F));
+ // IIHF Opcode with extra zero in 3rd nibble
+ cfi(scratch, Operand(0xC008));
+ // TODO(Zen): Fix this check to work
+ // Check(eq, "The instruction to patch should be a iihf.");
+ }
+
+ // load high word from iihf instruction
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrv(result, MemOperand(location, 2));
+#else
+ l(result, MemOperand(location, 2));
+#endif
+ sllg(result, result, Operand(32));
+
+ offset += 6;
+#endif // V8_TARGET_ARCH_S390X
+
+
+ // At this point scratch is a iilf instruction.
+ if (emit_debug_code()) {
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrvh(scratch, MemOperand(location, offset));
+#else
+ llh(scratch, MemOperand(location, offset));
+#endif
+ nilf(scratch, Operand(0xFF0F));
+ // IILF Opcode with extra zero in 3rd nibble
+ cfi(scratch, Operand(0xC009));
+ // TODO(Zen): Fix this check to work
+ // Check(eq, "The instruction to patch should be a iilf.");
+ }
+
+ // load low word from iilf instruction
+#if V8_TARGET_LITTLE_ENDIAN
+ // Instructions are stored in Big Endian format
+ lrv(result, MemOperand(location, 2 + offset));
+#else
+ l(result, MemOperand(location, 2 + offset));
+#endif
+}
+
+
+void MacroAssembler::CheckPageFlag(
+ Register object,
+ Register scratch, // scratch may be same register as object
+ int mask, Condition cc, Label* condition_met) {
+ DCHECK(cc == ne || cc == eq);
+ ClearRightImm(scratch, object, Operand(kPageSizeBits));
+
+ if (base::bits::IsPowerOfTwo32(mask)) {
+ // If it's a power of two, we can use Test-Under-Mask Memory-Imm form
+ // which allows testing of a single byte in memory.
+ int32_t byte_offset = 4;
+ uint32_t shifted_mask = mask;
+ // Determine the byte offset to be tested
+ if (mask <= 0x80) {
+ byte_offset = kPointerSize - 1;
+ } else if (mask < 0x8000) {
+ byte_offset = kPointerSize - 2;
+ shifted_mask = mask >> 8;
+ } else if (mask < 0x800000) {
+ byte_offset = kPointerSize - 3;
+ shifted_mask = mask >> 16;
+ } else {
+ byte_offset = kPointerSize - 4;
+ shifted_mask = mask >> 24;
+ }
+#if V8_TARGET_LITTLE_ENDIAN
+ // Reverse the byte_offset if emulating on little endian platform
+ byte_offset = kPointerSize - byte_offset - 1;
+#endif
+ tm(MemOperand(scratch, MemoryChunk::kFlagsOffset + byte_offset),
+ Operand(shifted_mask));
+ } else {
+ LoadP(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
+ AndP(r0, scratch, Operand(mask));
+ }
+ // Should be okay to remove rc
+
+ if (cc == ne) {
+ bne(condition_met, Label::kNear);
+ }
+ if (cc == eq) {
+ beq(condition_met, Label::kNear);
+ }
+}
+
+
+void MacroAssembler::JumpIfBlack(Register object, Register scratch0,
+ Register scratch1, Label* on_black) {
+ HasColor(object, scratch0, scratch1, on_black, 1, 0); // kBlackBitPattern.
+ DCHECK(strcmp(Marking::kBlackBitPattern, "10") == 0);
+}
+
+
+void MacroAssembler::HasColor(Register object, Register bitmap_scratch,
+ Register mask_scratch, Label* has_color,
+ int first_bit, int second_bit) {
+ DCHECK(!AreAliased(object, bitmap_scratch, mask_scratch, no_reg));
+
+ GetMarkBits(object, bitmap_scratch, mask_scratch);
+
+ Label other_color, word_boundary;
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+ // Test the first bit
+ AndP(r0, ip, mask_scratch/*, SetRC*/); // Should be okay to remove rc
+ b(first_bit == 1 ? eq : ne, &other_color, Label::kNear);
+ // Shift left 1
+ // May need to load the next cell
+ sll(mask_scratch, Operand(1)/*, SetRC*/);
+ beq(&word_boundary, Label::kNear);
+ // Test the second bit
+ AndP(r0, ip, mask_scratch/*, SetRC*/); // Should be okay to remove rc
+ b(second_bit == 1 ? ne : eq, has_color);
+ b(&other_color, Label::kNear);
+
+ bind(&word_boundary);
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kIntSize));
+ AndP(r0, ip, Operand(1));
+ b(second_bit == 1 ? ne : eq, has_color);
+ bind(&other_color);
+}
+
+
+// Detect some, but not all, common pointer-free objects. This is used by the
+// incremental write barrier which doesn't care about oddballs (they are always
+// marked black immediately so this code is not hit).
+void MacroAssembler::JumpIfDataObject(Register value, Register scratch,
+ Label* not_data_object) {
+ Label is_data_object;
+ LoadP(scratch, FieldMemOperand(value, HeapObject::kMapOffset));
+ CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);
+ beq(&is_data_object, Label::kNear);
+ DCHECK(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
+ DCHECK(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
+ // If it's a string and it's not a cons string then it's an object containing
+ // no GC pointers.
+ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+ STATIC_ASSERT((kIsIndirectStringMask | kIsNotStringMask) == 0x81);
+ nilf(scratch, Operand(kIsIndirectStringMask | kIsNotStringMask));
+ bne(not_data_object /*, cr0*/);
+ bind(&is_data_object);
+}
+
+
+void MacroAssembler::GetMarkBits(Register addr_reg, Register bitmap_reg,
+ Register mask_reg) {
+ DCHECK(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));
+ LoadRR(bitmap_reg, addr_reg);
+ nilf(bitmap_reg, Operand(~Page::kPageAlignmentMask));
+ const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
+ ExtractBitRange(mask_reg, addr_reg, kLowBits - 1, kPointerSizeLog2);
+ ExtractBitRange(ip, addr_reg, kPageSizeBits - 1, kLowBits);
+ ShiftLeftP(ip, ip, Operand(Bitmap::kBytesPerCellLog2));
+ AddP(bitmap_reg, ip);
+ LoadRR(ip, mask_reg); // Have to do some funky reg shuffling as
+ // 31-bit shift left clobbers on s390.
+ LoadImmP(mask_reg, Operand(1));
+ ShiftLeftP(mask_reg, mask_reg, ip);
+}
+
+
+void MacroAssembler::EnsureNotWhite(Register value, Register bitmap_scratch,
+ Register mask_scratch,
+ Register load_scratch,
+ Label* value_is_white_and_not_data) {
+ DCHECK(!AreAliased(value, bitmap_scratch, mask_scratch, ip));
+ GetMarkBits(value, bitmap_scratch, mask_scratch);
+
+ // If the value is black or grey we don't need to do anything.
+ DCHECK(strcmp(Marking::kWhiteBitPattern, "00") == 0);
+ DCHECK(strcmp(Marking::kBlackBitPattern, "10") == 0);
+ DCHECK(strcmp(Marking::kGreyBitPattern, "11") == 0);
+ DCHECK(strcmp(Marking::kImpossibleBitPattern, "01") == 0);
+
+ Label done;
+
+ // Since both black and grey have a 1 in the first position and white does
+ // not have a 1 there we only need to check one bit.
+ LoadlW(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+ LoadRR(r0, load_scratch);
+ AndP(r0, mask_scratch/*, SetRC*/);
+ // Should be okay to remove rc
+ bne(&done /*, cr0*/);
+
+ if (emit_debug_code()) {
+ // Check for impossible bit pattern.
+ Label ok;
+ // LSL may overflow, making the check conservative.
+ LoadRR(r0, mask_scratch);
+ sll(r0, Operand(1));
+ AndP(r0, load_scratch/*, SetRC*/); // Should be okay to remove rc
+ beq(&ok /*, cr0*/);
+ stop("Impossible marking bit pattern");
+ bind(&ok);
+ }
+
+ // Value is white. We check whether it is data that doesn't need scanning.
+ // Currently only checks for HeapNumber and non-cons strings.
+ Register map = load_scratch; // Holds map while checking type.
+ Register length = load_scratch; // Holds length of object after testing type.
+ Label is_data_object, maybe_string_object, is_string_object, is_encoded;
+#if V8_TARGET_ARCH_S390X
+ Label length_computed;
+#endif
+
+
+ // Check for heap-number
+ LoadP(map, FieldMemOperand(value, HeapObject::kMapOffset));
+ CompareRoot(map, Heap::kHeapNumberMapRootIndex);
+ bne(&maybe_string_object, Label::kNear);
+ LoadImmP(length, Operand(HeapNumber::kSize));
+ b(&is_data_object);
+ bind(&maybe_string_object);
+
+ // Check for strings.
+ DCHECK(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);
+ DCHECK(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);
+ // If it's a string and it's not a cons string then it's an object containing
+ // no GC pointers.
+ Register instance_type = load_scratch;
+ LoadlB(instance_type, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ mov(r0, Operand(kIsIndirectStringMask | kIsNotStringMask));
+ AndP(r0, instance_type);
+ bne(value_is_white_and_not_data /*, cr0*/);
+ // It's a non-indirect (non-cons and non-slice) string.
+ // If it's external, the length is just ExternalString::kSize.
+ // Otherwise it's String::kHeaderSize + string->length() * (1 or 2).
+ // External strings are the only ones with the kExternalStringTag bit
+ // set.
+ DCHECK_EQ(0, kSeqStringTag & kExternalStringTag);
+ DCHECK_EQ(0, kConsStringTag & kExternalStringTag);
+ mov(r0, Operand(kExternalStringTag));
+ AndP(r0, instance_type);
+ beq(&is_string_object, Label::kNear/*, cr0*/);
+ LoadImmP(length, Operand(ExternalString::kSize));
+ b(&is_data_object, Label::kNear);
+ bind(&is_string_object);
+
+ // Sequential string, either Latin1 or UC16.
+ // For Latin1 (char-size of 1) we untag the smi to get the length.
+ // For UC16 (char-size of 2):
+ // - (32-bit) we just leave the smi tag in place, thereby getting
+ // the length multiplied by 2.
+ // - (64-bit) we compute the offset in the 2-byte array
+ DCHECK(kOneByteStringTag == 4 && kStringEncodingMask == 4);
+ LoadP(ip, FieldMemOperand(value, String::kLengthOffset));
+ mov(r0, Operand(kStringEncodingMask));
+ AndP(r0, instance_type);
+ beq(&is_encoded, Label::kNear);
+ SmiUntag(ip);
+#if V8_TARGET_ARCH_S390X
+ b(&length_computed, Label::kNear);
+#endif
+ bind(&is_encoded);
+#if V8_TARGET_ARCH_S390X
+ SmiToShortArrayOffset(ip, ip);
+ bind(&length_computed);
+#else
+ DCHECK(kSmiShift == 1);
+#endif
+ AddP(length, ip, Operand(SeqString::kHeaderSize + kObjectAlignmentMask));
+ LoadImmP(r0, Operand(~kObjectAlignmentMask));
+ AndP(length, r0);
+
+ bind(&is_data_object);
+ // Value is a data object, and it is white. Mark it black. Since we know
+ // that the object is white we can make it black by flipping one bit.
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+ OrP(ip, mask_scratch);
+ StoreW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+
+ mov(ip, Operand(~Page::kPageAlignmentMask));
+ AndP(bitmap_scratch, ip);
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
+ AddP(ip, length);
+ StoreW(ip, MemOperand(bitmap_scratch, MemoryChunk::kLiveBytesOffset));
+
+ bind(&done);
+}
+
+
+// Saturate a value into 8-bit unsigned integer
+// if input_value < 0, output_value is 0
+// if input_value > 255, output_value is 255
+// otherwise output_value is the input_value
+void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
+ Label done, negative_label, overflow_label;
+ int satval = (1 << 8) - 1;
+
+ CmpP(input_reg, Operand::Zero());
+ blt(&negative_label, Label::kNear);
+
+ CmpP(input_reg, Operand(satval));
+ bgt(&overflow_label, Label::kNear);
+ if (!output_reg.is(input_reg)) {
+ LoadRR(output_reg, input_reg);
+ }
+ b(&done, Label::kNear);
+
+ bind(&negative_label);
+ LoadImmP(output_reg, Operand::Zero()); // set to 0 if negative
+ b(&done, Label::kNear);
+
+
+ bind(&overflow_label); // set to satval if > satval
+ LoadImmP(output_reg, Operand(satval));
+
+ bind(&done);
+}
+
+
+void MacroAssembler::ClampDoubleToUint8(Register result_reg,
+ DoubleRegister input_reg,
+ DoubleRegister double_scratch) {
+ Label above_zero;
+ Label done;
+ Label in_bounds;
+
+ LoadDoubleLiteral(double_scratch, 0.0, result_reg);
+ cdbr(input_reg, double_scratch);
+ bgt(&above_zero, Label::kNear);
+
+ // Double value is less than zero, NaN or Inf, return 0.
+ LoadIntLiteral(result_reg, 0);
+ b(&done, Label::kNear);
+
+ // Double value is >= 255, return 255.
+ bind(&above_zero);
+ LoadDoubleLiteral(double_scratch, 255.0, result_reg);
+ cdbr(input_reg, double_scratch);
+ ble(&in_bounds, Label::kNear);
+ LoadIntLiteral(result_reg, 255);
+ b(&done, Label::kNear);
+
+ // In 0-255 range, round and truncate.
+ bind(&in_bounds);
+
+ // round to nearest (default rounding mode)
+ cfdbr(ROUND_TO_NEAREST_WITH_TIES_TO_EVEN, result_reg, input_reg);
+ bind(&done);
+}
+
+
+void MacroAssembler::LoadInstanceDescriptors(Register map,
+ Register descriptors) {
+ LoadP(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
+}
+
+
+void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
+ LoadlW(dst, FieldMemOperand(map, Map::kBitField3Offset));
+ DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
+}
+
+
+void MacroAssembler::EnumLength(Register dst, Register map) {
+ STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
+ LoadW(dst, FieldMemOperand(map, Map::kBitField3Offset));
+ And(dst, Operand(Map::EnumLengthBits::kMask));
+ SmiTag(dst);
+}
+
+
+void MacroAssembler::LoadAccessor(Register dst, Register holder,
+ int accessor_index,
+ AccessorComponent accessor) {
+ LoadP(dst, FieldMemOperand(holder, HeapObject::kMapOffset));
+ LoadInstanceDescriptors(dst, dst);
+ LoadP(dst,
+ FieldMemOperand(dst, DescriptorArray::GetValueOffset(accessor_index)));
+ const int getterOffset = AccessorPair::kGetterOffset;
+ const int setterOffset = AccessorPair::kSetterOffset;
+ int offset = ((accessor == ACCESSOR_GETTER) ? getterOffset : setterOffset);
+ LoadP(dst, FieldMemOperand(dst, offset));
+}
+
+
+void MacroAssembler::CheckEnumCache(Register null_value, Label* call_runtime) {
+ Register empty_fixed_array_value = r8;
+ LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
+ Label next, start;
+ LoadRR(r4, r2);
+
+ // Check if the enum length field is properly initialized, indicating that
+ // there is an enum cache.
+ LoadP(r3, FieldMemOperand(r4, HeapObject::kMapOffset));
+
+ EnumLength(r5, r3);
+ CmpSmiLiteral(r5, Smi::FromInt(kInvalidEnumCacheSentinel), r0);
+ beq(call_runtime);
+
+ b(&start, Label::kNear);
+
+ bind(&next);
+ LoadP(r3, FieldMemOperand(r4, HeapObject::kMapOffset));
+
+ // For all objects but the receiver, check that the cache is empty.
+ EnumLength(r5, r3);
+ CmpSmiLiteral(r5, Smi::FromInt(0), r0);
+ bne(call_runtime);
+
+ bind(&start);
+
+ // Check that there are no elements. Register r4 contains the current JS
+ // object we've reached through the prototype chain.
+ Label no_elements;
+ LoadP(r4, FieldMemOperand(r4, JSObject::kElementsOffset));
+ CmpP(r4, empty_fixed_array_value);
+ beq(&no_elements, Label::kNear);
+
+ // Second chance, the object may be using the empty slow element dictionary.
+ CompareRoot(r5, Heap::kEmptySlowElementDictionaryRootIndex);
+ bne(call_runtime);
+
+ bind(&no_elements);
+ LoadP(r4, FieldMemOperand(r3, Map::kPrototypeOffset));
+ CmpP(r4, null_value);
+ bne(&next);
+}
+
+
+////////////////////////////////////////////////////////////////////////////////
+//
+// New MacroAssembler Interfaces added for S390
+//
+////////////////////////////////////////////////////////////////////////////////
+// Primarily used for loading constants
+// This should really move to be in macro-assembler as it
+// is really a pseudo instruction
+// Some usages of this intend for a FIXED_SEQUENCE to be used
+// @TODO - break this dependency so we can optimize mov() in general
+// and only use the generic version when we require a fixed sequence
+
+// New MacroAssembler Interfaces from Power
+// TODO(Zen): Not sure if we need this
+
+void MacroAssembler::LoadRepresentation(Register dst, const MemOperand& mem,
+ Representation r, Register scratch) {
+ DCHECK(!r.IsDouble());
+ if (r.IsInteger8()) {
+ LoadB(dst, mem);
+ lgbr(dst, dst);
+ } else if (r.IsUInteger8()) {
+ LoadlB(dst, mem);
+ } else if (r.IsInteger16()) {
+ LoadHalfWordP(dst, mem, scratch);
+ lghr(dst, dst);
+ } else if (r.IsUInteger16()) {
+ LoadHalfWordP(dst, mem, scratch);
+#if V8_TARGET_ARCH_S390X
+ } else if (r.IsInteger32()) {
+ LoadW(dst, mem, scratch);
+#endif
+ } else {
+ LoadP(dst, mem, scratch);
+ }
+}
+
+
+void MacroAssembler::StoreRepresentation(Register src, const MemOperand& mem,
+ Representation r, Register scratch) {
+ DCHECK(!r.IsDouble());
+ if (r.IsInteger8() || r.IsUInteger8()) {
+ StoreByte(src, mem, scratch);
+ } else if (r.IsInteger16() || r.IsUInteger16()) {
+ StoreHalfWord(src, mem, scratch);
+#if V8_TARGET_ARCH_S390X
+ } else if (r.IsInteger32()) {
+ StoreW(src, mem, scratch);
+#endif
+ } else {
+ if (r.IsHeapObject()) {
+ AssertNotSmi(src);
+ } else if (r.IsSmi()) {
+ AssertSmi(src);
+ }
+ StoreP(src, mem, scratch);
+ }
+}
+
+
+void MacroAssembler::TestJSArrayForAllocationMemento(Register receiver_reg,
+ Register scratch_reg,
+ Label* no_memento_found) {
+ ExternalReference new_space_start =
+ ExternalReference::new_space_start(isolate());
+ ExternalReference new_space_allocation_top =
+ ExternalReference::new_space_allocation_top_address(isolate());
+ AddP(scratch_reg, receiver_reg,
+ Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
+ CmpP(scratch_reg, Operand(new_space_start));
+ blt(no_memento_found);
+ mov(ip, Operand(new_space_allocation_top));
+ LoadP(ip, MemOperand(ip));
+ CmpP(scratch_reg, ip);
+ bgt(no_memento_found);
+ LoadP(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
+ CmpP(scratch_reg,
+ Operand(isolate()->factory()->allocation_memento_map()));
+}
+
+
+Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
+ Register reg4, Register reg5,
+ Register reg6) {
+ RegList regs = 0;
+ if (reg1.is_valid()) regs |= reg1.bit();
+ if (reg2.is_valid()) regs |= reg2.bit();
+ if (reg3.is_valid()) regs |= reg3.bit();
+ if (reg4.is_valid()) regs |= reg4.bit();
+ if (reg5.is_valid()) regs |= reg5.bit();
+ if (reg6.is_valid()) regs |= reg6.bit();
+
+ for (int i = 0; i < Register::NumAllocatableRegisters(); i++) {
+ Register candidate = Register::FromAllocationIndex(i);
+ if (regs & candidate.bit()) continue;
+ return candidate;
+ }
+ UNREACHABLE();
+ return no_reg;
+}
+
+
+void MacroAssembler::JumpIfDictionaryInPrototypeChain(Register object,
+ Register scratch0,
+ Register scratch1,
+ Label* found) {
+ DCHECK(!scratch1.is(scratch0));
+ Factory* factory = isolate()->factory();
+ Register current = scratch0;
+ Label loop_again;
+
+ // scratch contained elements pointer.
+ LoadRR(current, object);
+
+ // Loop based on the map going up the prototype chain.
+ bind(&loop_again);
+ LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
+ LoadlB(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
+ DecodeField<Map::ElementsKindBits>(scratch1);
+ CmpP(scratch1, Operand(DICTIONARY_ELEMENTS));
+ beq(found);
+ LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
+ CmpP(current, Operand(factory->null_value()));
+ bne(&loop_again);
+}
+
+
+void MacroAssembler::mov(Register dst, const Operand& src) {
+ BlockTrampolinePoolScope block_trampoline_pool(this);
+ if (src.rmode_ != kRelocInfo_NONEPTR) {
+ // some form of relocation needed
+ RecordRelocInfo(src.rmode_, src.imm_);
+ }
+
+#if V8_TARGET_ARCH_S390X
+ int64_t value = src.immediate();
+ int32_t hi_32 = static_cast<int64_t>(value) >> 32;
+ int32_t lo_32 = static_cast<int32_t>(value);
+
+ iihf(dst, Operand(hi_32));
+ iilf(dst, Operand(lo_32));
+#else
+ int value = src.immediate();
+ iilf(dst, Operand(value));
+#endif
+}
+
+
+void MacroAssembler::Mul(Register dst, Register src1, Register src2) {
+ if (dst.is(src2)) {
+ MulP(dst, src1);
+ } else if (dst.is(src1)) {
+ MulP(dst, src2);
+ } else {
+ Move(dst, src1);
+ MulP(dst, src2);
+ }
+}
+
+
+void MacroAssembler::DivP(Register dividend, Register divider) {
+ // have to make sure the src and dst are reg pairs
+ DCHECK(dividend.code() % 2 == 0);
+#if V8_TARGET_ARCH_S390X
+ dsgr(dividend, divider);
+#else
+ dr(dividend, divider);
+#endif
+}
+
+
+void MacroAssembler::MulP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ msgfi(dst, opnd);
+#else
+ msfi(dst, opnd);
+#endif
+}
+
+
+void MacroAssembler::MulP(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ msgr(dst, src);
+#else
+ msr(dst, src);
+#endif
+}
+
+
+void MacroAssembler::MulP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (is_uint16(opnd.offset())) {
+ ms(dst, opnd);
+ } else if (is_int20(opnd.offset())) {
+ msy(dst, opnd);
+ } else {
+ UNIMPLEMENTED();
+ }
+#else
+ if (is_int20(opnd.offset())) {
+ msg(dst, opnd);
+ } else {
+ UNIMPLEMENTED();
+ }
+#endif
+}
+
+
+//----------------------------------------------------------------------------
+// Add Instructions
+//----------------------------------------------------------------------------
+
+// Add 32-bit (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::Add32(Register dst, const Operand& opnd) {
+ if (is_int16(opnd.immediate()))
+ ahi(dst, opnd);
+ else
+ afi(dst, opnd);
+}
+
+
+// Add Pointer Size (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (is_int16(opnd.immediate()))
+ aghi(dst, opnd);
+ else
+ agfi(dst, opnd);
+#else
+ Add32(dst, opnd);
+#endif
+}
+
+
+// Add 32-bit (Register dst = Register src + Immediate opnd)
+void MacroAssembler::Add32(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) {
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
+ ahik(dst, src, opnd);
+ return;
+ }
+ lr(dst, src);
+ }
+ Add32(dst, opnd);
+}
+
+
+// Add Pointer Size (Register dst = Register src + Immediate opnd)
+void MacroAssembler::AddP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) {
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
+ AddPImm_RRI(dst, src, opnd);
+ return;
+ }
+ LoadRR(dst, src);
+ }
+ AddP(dst, opnd);
+}
+
+
+// Add 32-bit (Register dst = Register dst + Register src)
+void MacroAssembler::Add32(Register dst, Register src) {
+ ar(dst, src);
+}
+
+
+// Add Pointer Size (Register dst = Register dst + Register src)
+void MacroAssembler::AddP(Register dst, Register src) {
+ AddRR(dst, src);
+}
+
+
+// Add Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) + Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ agfr(dst, src);
+#else
+ ar(dst, src);
+#endif
+}
+
+
+// Add 32-bit (Register dst = Register src1 + Register src2)
+void MacroAssembler::Add32(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate AR/AGR, over the non clobbering ARK/AGRK
+ // as AR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ ark(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ ar(dst, src2);
+}
+
+
+// Add Pointer Size (Register dst = Register src1 + Register src2)
+void MacroAssembler::AddP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate AR/AGR, over the non clobbering ARK/AGRK
+ // as AR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ AddP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ AddRR(dst, src2);
+}
+
+
+// Add Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) + Register src1 (ptr) +
+// Register src2 (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, Register src1,
+ Register src2) {
+#if V8_TARGET_ARCH_S390X
+ if (dst.is(src2)) {
+ // The source we need to sign extend is the same as result.
+ lgfr(dst, src2);
+ agr(dst, src1);
+ } else {
+ if (!dst.is(src1))
+ LoadRR(dst, src1);
+ agfr(dst, src2);
+ }
+#else
+ AddP(dst, src1, src2);
+#endif
+}
+
+
+// Add 32-bit (Register-Memory)
+void MacroAssembler::Add32(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ a(dst, opnd);
+ else
+ ay(dst, opnd);
+}
+
+
+// Add Pointer Size (Register-Memory)
+void MacroAssembler::AddP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ ag(dst, opnd);
+#else
+ Add32(dst, opnd);
+#endif
+}
+
+
+// Add Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) + Mem opnd (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ agf(dst, opnd);
+#else
+ Add32(dst, opnd);
+#endif
+}
+
+
+// Add 32-bit (Memory - Immediate)
+void MacroAssembler::Add32(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.immediate()));
+ DCHECK(is_int20(opnd.offset()));
+ DCHECK(CpuFeatures::IsSupported(GENERAL_INSTR_EXT));
+ asi(opnd, imm);
+}
+
+
+// Add Pointer-sized (Memory - Immediate)
+void MacroAssembler::AddP(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.immediate()));
+ DCHECK(is_int20(opnd.offset()));
+ DCHECK(CpuFeatures::IsSupported(GENERAL_INSTR_EXT));
+#if V8_TARGET_ARCH_S390X
+ agsi(opnd, imm);
+#else
+ asi(opnd, imm);
+#endif
+}
+
+
+
+
+//----------------------------------------------------------------------------
+// Add Logical Instructions
+//----------------------------------------------------------------------------
+
+// Add Logical 32-bit (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddLogical(Register dst, const Operand& imm) {
+ alfi(dst, imm);
+}
+
+
+// Add Logical Pointer Size (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddLogicalP(Register dst, const Operand& imm) {
+#ifdef V8_TARGET_ARCH_S390X
+ algfi(dst, imm);
+#else
+ AddLogical(dst, imm);
+#endif
+}
+
+
+// Add Logical 32-bit (Register-Memory)
+void MacroAssembler::AddLogical(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ al_z(dst, opnd);
+ else
+ aly(dst, opnd);
+}
+
+
+// Add Logical Pointer Size (Register-Memory)
+void MacroAssembler::AddLogicalP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ alg(dst, opnd);
+#else
+ AddLogical(dst, opnd);
+#endif
+}
+
+
+//----------------------------------------------------------------------------
+// Subtract Instructions
+//----------------------------------------------------------------------------
+
+// Subtract 32-bit (Register dst = Register dst - Immediate opnd)
+void MacroAssembler::Sub32(Register dst, const Operand& imm) {
+ Add32(dst, Operand(-(imm.imm_)));
+}
+
+
+// Subtract Pointer Size (Register dst = Register dst - Immediate opnd)
+void MacroAssembler::SubP(Register dst, const Operand& imm) {
+ AddP(dst, Operand(-(imm.imm_)));
+}
+
+
+// Subtract 32-bit (Register dst = Register src - Immediate opnd)
+void MacroAssembler::Sub32(Register dst, Register src, const Operand& imm) {
+ Add32(dst, src, Operand(-(imm.imm_)));
+}
+
+
+// Subtract Pointer Sized (Register dst = Register src - Immediate opnd)
+void MacroAssembler::SubP(Register dst, Register src, const Operand& imm) {
+ AddP(dst, src, Operand(-(imm.imm_)));
+}
+
+
+// Subtract 32-bit (Register dst = Register dst - Register src)
+void MacroAssembler::Sub32(Register dst, Register src) {
+ sr(dst, src);
+}
+
+
+// Subtract Pointer Size (Register dst = Register dst - Register src)
+void MacroAssembler::SubP(Register dst, Register src) {
+ SubRR(dst, src);
+}
+
+
+// Subtract Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ sgfr(dst, src);
+#else
+ sr(dst, src);
+#endif
+}
+
+
+// Subtract 32-bit (Register = Register - Register)
+void MacroAssembler::Sub32(Register dst, Register src1, Register src2) {
+ // Use non-clobbering version if possible
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && !dst.is(src1)) {
+ srk(dst, src1, src2);
+ return;
+ }
+ if (!dst.is(src1) && !dst.is(src2))
+ lr(dst, src1);
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ sr(dst, src1); // dst = (dst - src)
+ lcr(dst, dst); // dst = -dst
+ } else {
+ sr(dst, src2);
+ }
+}
+
+
+// Subtract Pointer Sized (Register = Register - Register)
+void MacroAssembler::SubP(Register dst, Register src1, Register src2) {
+ // Use non-clobbering version if possible
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && !dst.is(src1)) {
+ SubP_RRR(dst, src1, src2);
+ return;
+ }
+ if (!dst.is(src1) && !dst.is(src2))
+ LoadRR(dst, src1);
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ SubP(dst, src1); // dst = (dst - src)
+ LoadComplementRR(dst, dst); // dst = -dst
+ } else {
+ SubP(dst, src2);
+ }
+}
+
+
+// Subtract Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubP_ExtendSrc(Register dst, Register src1,
+ Register src2) {
+#if V8_TARGET_ARCH_S390X
+ if (!dst.is(src1) && !dst.is(src2))
+ LoadRR(dst, src1);
+
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ lgfr(dst, dst); // Sign extend this operand first.
+ SubP(dst, src1); // dst = (dst - src)
+ LoadComplementRR(dst, dst); // dst = -dst
+ } else {
+ sgfr(dst, src2);
+ }
+#else
+ SubP(dst, src1, src2);
+#endif
+}
+
+
+// Subtract 32-bit (Register-Memory)
+void MacroAssembler::Sub32(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ s(dst, opnd);
+ else
+ sy(dst, opnd);
+}
+
+
+// Subtract Pointer Sized (Register - Memory)
+void MacroAssembler::SubP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ sg(dst, opnd);
+#else
+ Sub32(dst, opnd);
+#endif
+}
+
+
+// Subtract Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) - Mem opnd (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubP_ExtendSrc(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ sgf(dst, opnd);
+#else
+ Sub32(dst, opnd);
+#endif
+}
+
+
+//----------------------------------------------------------------------------
+// Subtract Logical Instructions
+//----------------------------------------------------------------------------
+
+// Subtract Logical 32-bit (Register - Memory)
+void MacroAssembler::SubLogical(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ sl(dst, opnd);
+ else
+ sly(dst, opnd);
+}
+
+
+// Subtract Logical Pointer Sized (Register - Memory)
+void MacroAssembler::SubLogicalP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ slgf(dst, opnd);
+#else
+ SubLogical(dst, opnd);
+#endif
+}
+
+
+// Subtract Logical Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) - Mem opnd (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubLogicalP_ExtendSrc(Register dst,
+ const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ slgf(dst, opnd);
+#else
+ SubLogical(dst, opnd);
+#endif
+}
+
+
+//----------------------------------------------------------------------------
+// Bitwise Operations
+//----------------------------------------------------------------------------
+
+// AND 32-bit - dst = dst & src
+void MacroAssembler::And(Register dst, Register src) {
+ nr(dst, src);
+}
+
+
+// AND Pointer Size - dst = dst & src
+void MacroAssembler::AndP(Register dst, Register src) {
+ AndRR(dst, src);
+}
+
+
+// Non-clobbering AND 32-bit - dst = src1 & src1
+void MacroAssembler::And(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ nrk(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ And(dst, src2);
+}
+
+
+// Non-clobbering AND pointer size - dst = src1 & src1
+void MacroAssembler::AndP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ AndP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ AndP(dst, src2);
+}
+
+
+// AND 32-bit (Reg - Mem)
+void MacroAssembler::And(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ n(dst, opnd);
+ else
+ ny(dst, opnd);
+}
+
+
+// AND Pointer Size (Reg - Mem)
+void MacroAssembler::AndP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ ng(dst, opnd);
+#else
+ And(dst, opnd);
+#endif
+}
+
+
+// AND 32-bit - dst = dst & imm
+void MacroAssembler::And(Register dst, const Operand& opnd) {
+ nilf(dst, opnd);
+}
+
+
+// AND Pointer Size - dst = dst & imm
+void MacroAssembler::AndP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ if (value >> 32 != -1) {
+ // this may not work b/c condition code won't be set correctly
+ nihf(dst, Operand(value >> 32));
+ }
+ nilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ And(dst, opnd);
+#endif
+}
+
+
+// AND 32-bit - dst = src & imm
+void MacroAssembler::And(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src))
+ lr(dst, src);
+ nilf(dst, opnd);
+}
+
+
+// AND Pointer Size - dst = src & imm
+void MacroAssembler::AndP(Register dst, Register src, const Operand& opnd) {
+ // Try to exploit RISBG first
+ intptr_t value = opnd.imm_;
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ intptr_t shifted_value = value;
+ int trailing_zeros = 0;
+
+ // We start checking how many trailing zeros are left at the end.
+ while ((0 != shifted_value) && (0 == (shifted_value & 1))) {
+ trailing_zeros++;
+ shifted_value >>= 1;
+ }
+
+ // If temp (value with right-most set of zeros shifted out) is 1 less
+ // than power of 2, we have consecutive bits of 1.
+ // Special case: If shift_value is zero, we cannot use RISBG, as it requires
+ // selection of at least 1 bit.
+ if ((0 != shifted_value) && base::bits::IsPowerOfTwo64(shifted_value + 1)) {
+ int startBit = base::bits::CountLeadingZeros64(shifted_value) -
+ trailing_zeros;
+ int endBit = 63 - trailing_zeros;
+ // Start: startBit, End: endBit, Shift = 0, true = zero unselected bits.
+ risbg(dst, src, Operand(startBit), Operand(endBit), Operand::Zero(),
+ true);
+ return;
+ } else if (-1 == shifted_value) {
+ // A Special case in which all top bits up to MSB are 1's. In this case,
+ // we can set startBit to be 0.
+ int endBit = 63 - trailing_zeros;
+ risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
+ return;
+ }
+ }
+
+ // If we are &'ing zero, we can just whack the dst register and skip copy
+ if (!dst.is(src) && (0 != value))
+ LoadRR(dst, src);
+ AndP(dst, opnd);
+}
+
+
+// OR 32-bit - dst = dst & src
+void MacroAssembler::Or(Register dst, Register src) {
+ or_z(dst, src);
+}
+
+
+// OR Pointer Size - dst = dst & src
+void MacroAssembler::OrP(Register dst, Register src) {
+ OrRR(dst, src);
+}
+
+
+// Non-clobbering OR 32-bit - dst = src1 & src1
+void MacroAssembler::Or(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ ork(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ Or(dst, src2);
+}
+
+
+// Non-clobbering OR pointer size - dst = src1 & src1
+void MacroAssembler::OrP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ OrP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ OrP(dst, src2);
+}
+
+
+// OR 32-bit (Reg - Mem)
+void MacroAssembler::Or(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ o(dst, opnd);
+ else
+ oy(dst, opnd);
+}
+
+
+// OR Pointer Size (Reg - Mem)
+void MacroAssembler::OrP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ og(dst, opnd);
+#else
+ Or(dst, opnd);
+#endif
+}
+
+
+// OR 32-bit - dst = dst & imm
+void MacroAssembler::Or(Register dst, const Operand& opnd) {
+ oilf(dst, opnd);
+}
+
+
+// OR Pointer Size - dst = dst & imm
+void MacroAssembler::OrP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ if (value >> 32 != 0) {
+ // this may not work b/c condition code won't be set correctly
+ oihf(dst, Operand(value >> 32));
+ }
+ oilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ Or(dst, opnd);
+#endif
+}
+
+
+// OR 32-bit - dst = src & imm
+void MacroAssembler::Or(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src))
+ lr(dst, src);
+ oilf(dst, opnd);
+}
+
+
+// OR Pointer Size - dst = src & imm
+void MacroAssembler::OrP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src))
+ LoadRR(dst, src);
+ OrP(dst, opnd);
+}
+
+
+// XOR 32-bit - dst = dst & src
+void MacroAssembler::Xor(Register dst, Register src) {
+ xr(dst, src);
+}
+
+
+// XOR Pointer Size - dst = dst & src
+void MacroAssembler::XorP(Register dst, Register src) {
+ XorRR(dst, src);
+}
+
+
+// Non-clobbering XOR 32-bit - dst = src1 & src1
+void MacroAssembler::Xor(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ xrk(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ Xor(dst, src2);
+}
+
+
+// Non-clobbering XOR pointer size - dst = src1 & src1
+void MacroAssembler::XorP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ XorP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ XorP(dst, src2);
+}
+
+
+// XOR 32-bit (Reg - Mem)
+void MacroAssembler::Xor(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ x(dst, opnd);
+ else
+ xy(dst, opnd);
+}
+
+
+// XOR Pointer Size (Reg - Mem)
+void MacroAssembler::XorP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ xg(dst, opnd);
+#else
+ Xor(dst, opnd);
+#endif
+}
+
+
+// XOR 32-bit - dst = dst & imm
+void MacroAssembler::Xor(Register dst, const Operand& opnd) {
+ xilf(dst, opnd);
+}
+
+
+// XOR Pointer Size - dst = dst & imm
+void MacroAssembler::XorP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ xihf(dst, Operand(value >> 32));
+ xilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ Xor(dst, opnd);
+#endif
+}
+
+
+// XOR 32-bit - dst = src & imm
+void MacroAssembler::Xor(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src))
+ lr(dst, src);
+ xilf(dst, opnd);
+}
+
+
+// XOR Pointer Size - dst = src & imm
+void MacroAssembler::XorP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src))
+ LoadRR(dst, src);
+ XorP(dst, opnd);
+}
+
+
+void MacroAssembler::NotP(Register dst) {
+#if V8_TARGET_ARCH_S390X
+ xihf(dst, Operand(0xFFFFFFFF));
+ xilf(dst, Operand(0xFFFFFFFF));
+#else
+ XorP(dst, Operand(0xFFFFFFFF));
+#endif
+}
+
+
+// works the same as mov
+void MacroAssembler::Load(Register dst, const Operand& opnd) {
+ intptr_t value = opnd.immediate();
+ if (is_int16(value)) {
+#if V8_TARGET_ARCH_S390X
+ lghi(dst, opnd);
+#else
+ lhi(dst, opnd);
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ llilf(dst, opnd);
+#else
+ iilf(dst, opnd);
+#endif
+ }
+}
+
+
+void MacroAssembler::Load(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, opnd); // 64<-32
+#else
+ if (is_uint12(opnd.offset())) {
+ l(dst, opnd);
+ } else {
+ ly(dst, opnd);
+ }
+#endif
+}
+
+
+//-----------------------------------------------------------------------------
+// Compare Helpers
+//-----------------------------------------------------------------------------
+
+// Compare 32-bit Register vs Register
+void MacroAssembler::Cmp32(Register src1, Register src2) {
+ cr_z(src1, src2);
+}
+
+
+// Compare Pointer Sized Register vs Register
+void MacroAssembler::CmpP(Register src1, Register src2) {
+#if V8_TARGET_ARCH_S390X
+ cgr(src1, src2);
+#else
+ Cmp32(src1, src2);
+#endif
+}
+
+
+// Compare 32-bit Register vs Immediate
+// This helper will set up proper relocation entries if required.
+void MacroAssembler::Cmp32(Register dst, const Operand& opnd) {
+ if (opnd.rmode_ == kRelocInfo_NONEPTR) {
+ intptr_t value = opnd.immediate();
+ if (is_int16(value))
+ chi(dst, opnd);
+ else
+ cfi(dst, opnd);
+ } else {
+ // Need to generate relocation record here
+ RecordRelocInfo(opnd.rmode_, opnd.imm_);
+ cfi(dst, opnd);
+ }
+}
+
+
+// Compare Pointer Sized Register vs Immediate
+// This helper will set up proper relocation entries if required.
+void MacroAssembler::CmpP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (opnd.rmode_ == kRelocInfo_NONEPTR) {
+ cgfi(dst, opnd);
+ } else {
+ mov(r0, opnd); // Need to generate 64-bit relocation
+ cgr(dst, r0);
+ }
+#else
+ Cmp32(dst, opnd);
+#endif
+}
+
+
+// Compare 32-bit Register vs Memory
+void MacroAssembler::Cmp32(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ c(dst, opnd);
+ else
+ cy(dst, opnd);
+}
+
+
+// Compare Pointer Size Register vs Memory
+void MacroAssembler::CmpP(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ cg(dst, opnd);
+#else
+ Cmp32(dst, opnd);
+#endif
+}
+
+
+//-----------------------------------------------------------------------------
+// Compare Logical Helpers
+//-----------------------------------------------------------------------------
+
+// Compare Logical 32-bit Register vs Register
+void MacroAssembler::CmpLogical32(Register dst, Register src) {
+ clr(dst, src);
+}
+
+
+// Compare Logical Pointer Sized Register vs Register
+void MacroAssembler::CmpLogicalP(Register dst, Register src) {
+#ifdef V8_TARGET_ARCH_S390X
+ clgr(dst, src);
+#else
+ CmpLogical32(dst, src);
+#endif
+}
+
+
+// Compare Logical 32-bit Register vs Immediate
+void MacroAssembler::CmpLogical32(Register dst, const Operand& opnd) {
+ clfi(dst, opnd);
+}
+
+
+// Compare Logical Pointer Sized Register vs Immediate
+void MacroAssembler::CmpLogicalP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(static_cast<uint32_t>(opnd.immediate() >> 32) == 0);
+ clgfi(dst, opnd);
+#else
+ CmpLogical32(dst, opnd);
+#endif
+}
+
+
+// Compare Logical 32-bit Register vs Memory
+void MacroAssembler::CmpLogical32(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ cl(dst, opnd);
+ else
+ cly(dst, opnd);
+}
+
+
+// Compare Logical Pointer Sized Register vs Memory
+void MacroAssembler::CmpLogicalP(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ clg(dst, opnd);
+#else
+ CmpLogical32(dst, opnd);
+#endif
+}
+
+
+// Compare Logical Byte (Mem - Imm)
+void MacroAssembler::CmpLogicalByte(const MemOperand& mem, const Operand& imm) {
+ DCHECK(is_uint8(imm.immediate()));
+ if (is_uint12(mem.offset()))
+ cli(mem, imm);
+ else
+ cliy(mem, imm);
+}
+
+
+
+void MacroAssembler::Branch(Condition c, const Operand& opnd) {
+ intptr_t value = opnd.immediate();
+ if (is_int16(value))
+ brc(c, opnd);
+ else
+ brcl(c, opnd);
+}
+
+
+// Branch On Count. Decrement R1, and branch if R1 != 0.
+void MacroAssembler::BranchOnCount(Register r1, Label *l) {
+ int32_t offset = branch_offset(l, false);
+ positions_recorder()->WriteRecordedPositions();
+ if (is_int16(offset)) {
+#if V8_TARGET_ARCH_S390X
+ brctg(r1, Operand(offset));
+#else
+ brct(r1, Operand(offset));
+#endif
+ } else {
+ AddP(r1, Operand(-1));
+ Branch(ne, Operand(offset));
+ }
+}
+
+
+void MacroAssembler::LoadIntLiteral(Register dst, int value) {
+ Load(dst, Operand(value));
+}
+
+
+void MacroAssembler::LoadSmiLiteral(Register dst, Smi *smi) {
+ intptr_t value = reinterpret_cast<intptr_t>(smi);
+#if V8_TARGET_ARCH_S390X
+ DCHECK((value & 0xffffffff) == 0);
+ // The smi value is loaded in upper 32-bits. Lower 32-bit are zeros.
+ llihf(dst, Operand(value >> 32));
+#else
+ llilf(dst, Operand(value));
+#endif
+}
+
+
+void MacroAssembler::LoadDoubleLiteral(DoubleRegister result,
+ uint64_t value,
+ Register scratch) {
+ uint32_t hi_32 = value >> 32;
+ uint32_t lo_32 = static_cast<uint32_t>(value);
+
+ // Load the 64-bit value into a GPR, then transfer it to FPR via LDGR
+ iihf(scratch, Operand(hi_32));
+ iilf(scratch, Operand(lo_32));
+ ldgr(result, scratch);
+}
+
+void MacroAssembler::LoadDoubleLiteral(DoubleRegister result,
+ double value,
+ Register scratch) {
+ uint64_t int_val = bit_cast<uint64_t, double>(value);
+ LoadDoubleLiteral(result, int_val, scratch);
+}
+
+
+void MacroAssembler::CmpSmiLiteral(Register src1, Smi *smi, Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ cgr(src1, scratch);
+#else
+ // CFI takes 32-bit immediate.
+ cfi(src1, Operand(smi));
+#endif
+}
+
+
+void MacroAssembler::CmpLogicalSmiLiteral(Register src1, Smi *smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ clgr(src1, scratch);
+#else
+ // CLFI takes 32-bit immediate
+ clfi(src1, Operand(smi));
+#endif
+}
+
+
+void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi *smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ AddP(dst, src, scratch);
+#else
+ AddP(dst, src, Operand(reinterpret_cast<intptr_t>(smi)));
+#endif
+}
+
+
+void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi *smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ SubP(dst, src, scratch);
+#else
+ AddP(dst, src, Operand(-(reinterpret_cast<intptr_t>(smi))));
+#endif
+}
+
+
+void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi *smi) {
+ if (!dst.is(src))
+ LoadRR(dst, src);
+#if V8_TARGET_ARCH_S390X
+ DCHECK((reinterpret_cast<intptr_t>(smi) & 0xffffffff) == 0);
+ int value = static_cast<int>(reinterpret_cast<intptr_t>(smi) >> 32);
+ nihf(dst, Operand(value));
+#else
+ nilf(dst, Operand(reinterpret_cast<int>(smi)));
+#endif
+}
+
+
+// Load a "pointer" sized value from the memory location
+void MacroAssembler::LoadP(Register dst, const MemOperand& mem,
+ Register scratch) {
+ int offset = mem.offset();
+
+ if (!scratch.is(no_reg) && !is_int20(offset)) {
+ /* cannot use d-form */
+ LoadIntLiteral(scratch, offset);
+#if V8_TARGET_ARCH_S390X
+ lg(dst, MemOperand(mem.rb(), scratch));
+#else
+ l(dst, MemOperand(mem.rb(), scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ lg(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ l(dst, mem);
+ } else {
+ ly(dst, mem);
+ }
+#endif
+ }
+}
+
+
+// Store a "pointer" sized value to the memory location
+void MacroAssembler::StoreP(Register src, const MemOperand& mem,
+ Register scratch) {
+ if (!is_int20(mem.offset())) {
+ DCHECK(!scratch.is(no_reg));
+ DCHECK(!scratch.is(r0));
+ LoadIntLiteral(scratch, mem.offset());
+#if V8_TARGET_ARCH_S390X
+ stg(src, MemOperand(mem.rb(), scratch));
+#else
+ st(src, MemOperand(mem.rb(), scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ stg(src, mem);
+#else
+ // StoreW will try to generate ST if offset fits, otherwise
+ // it'll generate STY.
+ StoreW(src, mem);
+#endif
+ }
+}
+
+
+// Store a "pointer" sized constant to the memory location
+void MacroAssembler::StoreP(const MemOperand& mem, const Operand& opnd,
+ Register scratch) {
+ // Relocations not supported
+ DCHECK(opnd.rmode_ == kRelocInfo_NONEPTR);
+
+ // Try to use MVGHI/MVHI
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) &&
+ is_uint12(mem.offset()) &&
+ mem.getIndexRegister().is(r0) &&
+ is_int16(opnd.imm_)) {
+#if V8_TARGET_ARCH_S390X
+ mvghi(mem, opnd);
+#else
+ mvhi(mem, opnd);
+#endif
+ } else {
+ LoadImmP(scratch, opnd);
+ StoreP(scratch, mem);
+ }
+}
+
+void MacroAssembler::LoadMultipleP(Register dst1, Register dst2,
+ const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(mem.offset()));
+ lmg(dst1, dst2, mem);
+#else
+ if (is_uint12(mem.offset())) {
+ lm(dst1, dst2, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ lmy(dst1, dst2, mem);
+ }
+#endif
+}
+
+
+void MacroAssembler::StoreMultipleP(Register src1, Register src2,
+ const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(mem.offset()));
+ stmg(src1, src2, mem);
+#else
+ if (is_uint12(mem.offset())) {
+ stm(src1, src2, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ stmy(src1, src2, mem);
+ }
+#endif
+}
+
+
+void MacroAssembler::LoadMultipleW(Register dst1, Register dst2,
+ const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ lm(dst1, dst2, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ lmy(dst1, dst2, mem);
+ }
+}
+
+
+void MacroAssembler::StoreMultipleW(Register src1, Register src2,
+ const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ stm(src1, src2, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ stmy(src1, src2, mem);
+ }
+}
+
+
+// Load 32-bits and sign extend if necessary.
+void MacroAssembler::LoadW(Register dst, const MemOperand& mem,
+ Register scratch) {
+ int offset = mem.offset();
+
+ if (!is_int20(offset)) {
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, MemOperand(mem.rb(), scratch));
+#else
+ l(dst, MemOperand(mem.rb(), scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ l(dst, mem);
+ } else {
+ ly(dst, mem);
+ }
+#endif
+ }
+}
+
+
+// Variable length depending on whether offset fits into immediate field
+// MemOperand of RX or RXY format
+void MacroAssembler::LoadlW(Register dst, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
+
+#if V8_TARGET_ARCH_S390X
+ if (is_int20(offset)) {
+ llgf(dst, mem);
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
+ LoadIntLiteral(scratch, offset);
+ llgf(dst, MemOperand(base, scratch));
+ } else {
+ DCHECK(false);
+ }
+#else
+ bool use_RXform = false;
+ bool use_RXYform = false;
+ if (is_uint12(offset)) {
+ // RX-format supports unsigned 12-bits offset.
+ use_RXform = true;
+ } else if (is_int20(offset)) {
+ // RXY-format supports signed 20-bits offset.
+ use_RXYform = true;
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
+ LoadIntLiteral(scratch, offset);
+ } else {
+ DCHECK(false);
+ }
+
+ if (use_RXform) {
+ l(dst, mem);
+ } else if (use_RXYform) {
+ ly(dst, mem);
+ } else {
+ ly(dst, MemOperand(base, scratch));
+ }
+#endif
+}
+
+
+void MacroAssembler::LoadB(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ lgb(dst, mem);
+#else
+ lb(dst, mem);
+#endif
+}
+
+
+void MacroAssembler::LoadlB(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ llgc(dst, mem);
+#else
+ llc(dst, mem);
+#endif
+}
+
+
+// Load And Test (Reg <- Reg)
+void MacroAssembler::LoadAndTest32(Register dst, Register src) {
+ ltr(dst, src);
+}
+
+
+// Load And Test
+// (Register dst(ptr) = Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::LoadAndTestP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ ltgfr(dst, src);
+#else
+ ltr(dst, src);
+#endif
+}
+
+
+// Load And Test Pointer Sized (Reg <- Reg)
+void MacroAssembler::LoadAndTestP(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ ltgr(dst, src);
+#else
+ ltr(dst, src);
+#endif
+}
+
+
+// Load And Test 32-bit (Reg <- Mem)
+void MacroAssembler::LoadAndTest32(Register dst, const MemOperand& mem) {
+ lt_z(dst, mem);
+}
+
+
+// Load And Test Pointer Sized (Reg <- Mem)
+void MacroAssembler::LoadAndTestP(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ ltg(dst, mem);
+#else
+ lt_z(dst, mem);
+#endif
+}
+
+
+void MacroAssembler::LoadF(DoubleRegister dst, const MemOperand& mem) {
+ // for 32bit and 64bit we all use 64bit floating point regs
+ if (is_uint12(mem.offset())) {
+ ld(dst, mem);
+ } else {
+ ldy(dst, mem);
+ }
+}
+
+
+void MacroAssembler::LoadShortF(DoubleRegister dst, const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ le_z(dst, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ ley(dst, mem);
+ }
+}
+
+
+void MacroAssembler::LoadShortConvertToDoubleF(DoubleRegister dst,
+ const MemOperand& mem) {
+ LoadShortF(dst, mem);
+ ldebr(dst, dst);
+}
+
+
+void MacroAssembler::StoreF(DoubleRegister dst, const MemOperand& mem) {
+ // for 32bit and 64bit we all use 64bit floating point regs
+ if (is_uint12(mem.offset())) {
+ std(dst, mem);
+ } else {
+ stdy(dst, mem);
+ }
+}
+
+
+void MacroAssembler::StoreShortF(DoubleRegister src, const MemOperand& mem) {
+ // for 32bit and 64bit we all use 64bit floating point regs
+ if (is_uint12(mem.offset())) {
+ ste(src, mem);
+ } else {
+ stey(src, mem);
+ }
+}
+
+
+void MacroAssembler::StoreDoubleAsFloat32(DoubleRegister src,
+ const MemOperand& mem,
+ DoubleRegister scratch) {
+ ledbr(scratch, src);
+ StoreShortF(scratch, mem);
+}
+
+
+// Variable length depending on whether offset fits into immediate field
+// MemOperand of RX or RXY format
+void MacroAssembler::StoreW(Register src, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
+
+ bool use_RXform = false;
+ bool use_RXYform = false;
+
+ if (is_uint12(offset)) {
+ // RX-format supports unsigned 12-bits offset.
+ use_RXform = true;
+ } else if (is_int20(offset)) {
+ // RXY-format supports signed 20-bits offset.
+ use_RXYform = true;
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
+ LoadIntLiteral(scratch, offset);
+ } else {
+ // scratch is no_reg
+ DCHECK(false);
+ }
+
+ if (use_RXform) {
+ st(src, mem);
+ } else if (use_RXYform) {
+ sty(src, mem);
+ } else {
+ StoreW(src, MemOperand(base, scratch));
+ }
+}
+
+
+// Loads 16-bits half-word value from memory and sign extends to pointer
+// sized register
+void MacroAssembler::LoadHalfWordP(Register dst, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
+
+ if (!is_int20(offset)) {
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+#if V8_TARGET_ARCH_S390X
+ lgh(dst, MemOperand(base, scratch));
+#else
+ lh(dst, MemOperand(base, scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ lgh(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ lh(dst, mem);
+ } else {
+ lhy(dst, mem);
+ }
+#endif
+ }
+}
+
+
+// Variable length depending on whether offset fits into immediate field
+// MemOperand current only supports d-form
+void MacroAssembler::StoreHalfWord(Register src, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
+
+ if (is_uint12(offset)) {
+ sth(src, mem);
+ } else if (is_int20(offset)) {
+ sthy(src, mem);
+ } else {
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+ sth(src, MemOperand(base, scratch));
+ }
+}
+
+
+// Variable length depending on whether offset fits into immediate field
+// MemOperand current only supports d-form
+void MacroAssembler::StoreByte(Register src, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
+
+ if (is_uint12(offset)) {
+ stc(src, mem);
+ } else if (is_int20(offset)) {
+ stcy(src, mem);
+ } else {
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+ stc(src, MemOperand(base, scratch));
+ }
+}
+
+
+// Shift left logical for 32-bit integer types.
+void MacroAssembler::ShiftLeft(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ sll(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ sllk(dst, src, val);
+ } else {
+ lr(dst, src);
+ sll(dst, val);
+ }
+}
+
+
+// Shift left logical for 32-bit integer types.
+void MacroAssembler::ShiftLeft(Register dst, Register src,
+ Register val) {
+ if (dst.is(src)) {
+ sll(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ sllk(dst, src, val);
+ } else {
+ DCHECK(!dst.is(val)); // The lr/sll path clobbers val.
+ lr(dst, src);
+ sll(dst, val);
+ }
+}
+
+
+// Shift right logical for 32-bit integer types.
+void MacroAssembler::ShiftRight(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ srl(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srlk(dst, src, val);
+ } else {
+ lr(dst, src);
+ srl(dst, val);
+ }
+}
+
+
+// Shift right logical for 32-bit integer types.
+void MacroAssembler::ShiftRight(Register dst, Register src,
+ Register val) {
+ DCHECK(!dst.is(val)); // The lr/srl path clobbers val.
+ if (dst.is(src)) {
+ srl(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srlk(dst, src, val);
+ } else {
+ lr(dst, src);
+ srl(dst, val);
+ }
+}
+
+
+// Shift left arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftLeftArith(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ sla(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ slak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sla(dst, val);
+ }
+}
+
+
+// Shift left arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftLeftArith(Register dst, Register src,
+ Register val) {
+ DCHECK(!dst.is(val)); // The lr/sla path clobbers val.
+ if (dst.is(src)) {
+ sla(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ slak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sla(dst, val);
+ }
+}
+
+
+// Shift right arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftRightArith(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ sra(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sra(dst, val);
+ }
+}
+
+
+// Shift right arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftRightArith(Register dst, Register src,
+ Register val) {
+ DCHECK(!dst.is(val)); // The lr/sra path clobbers val.
+ if (dst.is(src)) {
+ sra(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sra(dst, val);
+ }
+}
+
+
+// Clear right most # of bits
+void MacroAssembler::ClearRightImm(Register dst, Register src,
+ const Operand& val) {
+ int numBitsToClear = val.imm_ % (kPointerSize * 8);
+
+ // Try to use RISBG if possible
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ int endBit = 63 - numBitsToClear;
+ risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
+ return;
+ }
+
+ uint64_t hexMask = ~((1L << numBitsToClear) - 1);
+
+ // S390 AND instr clobbers source. Make a copy if necessary
+ if (!dst.is(src))
+ LoadRR(dst, src);
+
+ if (numBitsToClear <= 16) {
+ nill(dst, Operand(static_cast<uint16_t>(hexMask)));
+ } else if (numBitsToClear <= 32) {
+ nilf(dst, Operand(static_cast<uint32_t>(hexMask)));
+ } else if (numBitsToClear <= 64) {
+ nilf(dst, Operand(static_cast<intptr_t>(0)));
+ nihf(dst, Operand(hexMask >> 32));
+ }
+}
+
+
+#ifdef DEBUG
+bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4,
+ Register reg5, Register reg6, Register reg7, Register reg8) {
+ int n_of_valid_regs = reg1.is_valid() + reg2.is_valid() + reg3.is_valid() +
+ reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
+ reg7.is_valid() + reg8.is_valid();
+
+ RegList regs = 0;
+ if (reg1.is_valid()) regs |= reg1.bit();
+ if (reg2.is_valid()) regs |= reg2.bit();
+ if (reg3.is_valid()) regs |= reg3.bit();
+ if (reg4.is_valid()) regs |= reg4.bit();
+ if (reg5.is_valid()) regs |= reg5.bit();
+ if (reg6.is_valid()) regs |= reg6.bit();
+ if (reg7.is_valid()) regs |= reg7.bit();
+ if (reg8.is_valid()) regs |= reg8.bit();
+ int n_of_non_aliasing_regs = NumRegs(regs);
+
+ return n_of_valid_regs != n_of_non_aliasing_regs;
+}
+#endif
+
+
+CodePatcher::CodePatcher(byte* address, int instructions,
+ FlushICache flush_cache)
+ : address_(address),
+ size_(instructions),
+ masm_(NULL, address, size_ + Assembler::kGap),
+ flush_cache_(flush_cache) {
+ // Create a new macro assembler pointing to the address of the code to patch.
+ // The size is adjusted with kGap on order for the assembler to generate size
+ // bytes of instructions without failing with buffer size constraints.
+ DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
+}
+
+
+CodePatcher::~CodePatcher() {
+ // Indicate that code has changed.
+ if (flush_cache_ == FLUSH) {
+ CpuFeatures::FlushICache(address_, size_);
+ }
+
+ // Check that the code was patched as expected.
+ DCHECK(masm_.pc_ == address_ + size_);
+ DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
+}
+
+void MacroAssembler::TruncatingDiv(Register result, Register dividend,
+ int32_t divisor) {
+ DCHECK(!dividend.is(result));
+ DCHECK(!dividend.is(r0));
+ DCHECK(!result.is(r0));
+ base::MagicNumbersForDivision<uint32_t> mag =
+ base::SignedDivisionByConstant(static_cast<uint32_t>(divisor));
+#ifdef V8_TARGET_ARCH_S390X
+ LoadRR(result, dividend);
+ MulP(result, Operand(mag.multiplier));
+ ShiftRightArithP(result, result, Operand(32));
+
+#else
+ // TODO(JOHN): Not sure if we need to save r1 value here
+ lay(sp, MemOperand(sp, -kPointerSize));
+ StoreP(r1, MemOperand(sp));
+
+ mov(r1, Operand(mag.multiplier));
+ mr_z(r0, dividend); // r0:r1 = r1 * dividend
+
+ LoadRR(result, r0);
+ LoadP(r1, MemOperand(sp));
+ la(sp, MemOperand(sp, kPointerSize));
+#endif
+ bool neg = (mag.multiplier & (static_cast<uint32_t>(1) << 31)) != 0;
+ if (divisor > 0 && neg) {
+ AddP(result, dividend);
+ }
+ if (divisor < 0 && !neg && mag.multiplier > 0) {
+ SubP(result, dividend);
+ }
+ if (mag.shift > 0)
+ ShiftRightArith(result, result, Operand(mag.shift));
+ ExtractBit(r0, dividend, 31);
+ AddP(result, r0);
+}
+
+} // namespace internal
+} // namespace v8
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/macro-assembler-s390.h
@@ -0,0 +1,1833 @@
+// Copyright 2014 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_MACRO_ASSEMBLER_S390_H_
+#define V8_S390_MACRO_ASSEMBLER_S390_H_
+
+#include "src/assembler.h"
+#include "src/bailout-reason.h"
+#include "src/frames.h"
+#include "src/globals.h"
+
+namespace v8 {
+namespace internal {
+
+// ----------------------------------------------------------------------------
+// Static helper functions
+
+// Generate a MemOperand for loading a field from an object.
+inline MemOperand FieldMemOperand(Register object, int offset) {
+ return MemOperand(object, offset - kHeapObjectTag);
+}
+
+// Generate a MemOperand for loading a field from an object.
+inline MemOperand FieldMemOperand(Register object, Register index, int offset) {
+ return MemOperand(object, index, offset - kHeapObjectTag);
+}
+
+// Generate a MemOperand for loading a field from Root register
+inline MemOperand RootMemOperand(Heap::RootListIndex index) {
+ return MemOperand(kRootRegister, index << kPointerSizeLog2);
+}
+
+// Flags used for AllocateHeapNumber
+enum TaggingMode {
+ // Tag the result.
+ TAG_RESULT,
+ // Don't tag
+ DONT_TAG_RESULT
+};
+
+
+enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
+enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
+enum PointersToHereCheck {
+ kPointersToHereMaybeInteresting,
+ kPointersToHereAreAlwaysInteresting
+};
+enum LinkRegisterStatus { kLRHasNotBeenSaved, kLRHasBeenSaved };
+
+
+Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
+ Register reg3 = no_reg,
+ Register reg4 = no_reg,
+ Register reg5 = no_reg,
+ Register reg6 = no_reg);
+
+
+#ifdef DEBUG
+bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
+ Register reg4 = no_reg, Register reg5 = no_reg,
+ Register reg6 = no_reg, Register reg7 = no_reg,
+ Register reg8 = no_reg);
+#endif
+
+// These exist to provide portability between 32 and 64bit
+#if V8_TARGET_ARCH_S390X
+#define Div divd
+
+// The length of the arithmetic operation is the length
+// of the register.
+
+// Length:
+// H = halfword
+// W = word
+
+// arithmetics and bitwise
+#define AddMI agsi
+#define AddRR agr
+#define SubRR sgr
+#define AndRR ngr
+#define OrRR ogr
+#define XorRR xgr
+#define LoadComplementRR lcgr
+#define LoadNegativeRR lngr
+
+// Distinct Operands
+#define AddP_RRR agrk
+#define AddPImm_RRI aghik
+#define AddLogicalP_RRR algrk
+#define SubP_RRR sgrk
+#define SubLogicalP_RRR slgrk
+#define AndP_RRR ngrk
+#define OrP_RRR ogrk
+#define XorP_RRR xgrk
+
+// Load / Store
+#define LoadRR lgr
+#define LoadAndTestRR ltgr
+#define LoadImmP lghi
+#define LoadLogicalHalfWordP llgh
+
+// Compare
+#define CmpPH cghi
+#define CmpLogicalPW clgfi
+
+// Shifts
+#define ShiftLeftP sllg
+#define ShiftRightP srlg
+#define ShiftLeftArithP slag
+#define ShiftRightArithP srag
+#else
+
+// arithmetics and bitwise
+// Reg2Reg
+#define AddMI asi
+#define AddRR ar
+#define SubRR sr
+#define AndRR nr
+#define OrRR or_z
+#define XorRR xr
+#define LoadComplementRR lcr
+#define LoadNegativeRR lnr
+
+// Distinct Operands
+#define AddP_RRR ark
+#define AddPImm_RRI ahik
+#define AddLogicalP_RRR alrk
+#define SubP_RRR srk
+#define SubLogicalP_RRR slrk
+#define AndP_RRR nrk
+#define OrP_RRR ork
+#define XorP_RRR xrk
+
+// Load / Store
+#define LoadRR lr
+#define LoadAndTestRR ltr
+#define LoadImmP lhi
+#define LoadLogicalHalfWordP llh
+
+// Compare
+#define CmpPH chi
+#define CmpLogicalPW clfi
+
+// Shifts
+#define ShiftLeftP ShiftLeft
+#define ShiftRightP ShiftRight
+#define ShiftLeftArithP ShiftLeftArith
+#define ShiftRightArithP ShiftRightArith
+
+#endif
+
+
+// MacroAssembler implements a collection of frequently used macros.
+class MacroAssembler : public Assembler {
+ public:
+ // The isolate parameter can be NULL if the macro assembler should
+ // not use isolate-dependent functionality. In this case, it's the
+ // responsibility of the caller to never invoke such function on the
+ // macro assembler.
+ MacroAssembler(Isolate* isolate, void* buffer, int size);
+
+
+ // Returns the size of a call in instructions.
+ static int CallSize(Register target);
+ int CallSize(Address target, RelocInfo::Mode rmode, Condition cond = al);
+ static int CallSizeNotPredictableCodeSize(Address target,
+ RelocInfo::Mode rmode,
+ Condition cond = al);
+
+ // Jump, Call, and Ret pseudo instructions implementing inter-working.
+ void Jump(Register target);
+ void JumpToJSEntry(Register target);
+ void Jump(Address target, RelocInfo::Mode rmode, Condition cond = al,
+ CRegister cr = cr7);
+ void Jump(Handle<Code> code, RelocInfo::Mode rmode, Condition cond = al);
+ void Call(Register target);
+ void CallJSEntry(Register target);
+ void Call(Address target, RelocInfo::Mode rmode, Condition cond = al);
+ int CallSize(Handle<Code> code,
+ RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
+ TypeFeedbackId ast_id = TypeFeedbackId::None(),
+ Condition cond = al);
+ void Call(Handle<Code> code, RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
+ TypeFeedbackId ast_id = TypeFeedbackId::None(),
+ Condition cond = al);
+ void Ret();
+
+ // Emit code to discard a non-negative number of pointer-sized elements
+ // from the stack, clobbering only the sp register.
+ void Drop(int count);
+
+ void Ret(int drop);
+
+ void Call(Label* target);
+
+ // Emit call to the code we are currently generating.
+ void CallSelf() {
+ Handle<Code> self(reinterpret_cast<Code**>(CodeObject().location()));
+ Call(self, RelocInfo::CODE_TARGET);
+ }
+
+ // Register move. May do nothing if the registers are identical.
+ void Move(Register dst, Handle<Object> value);
+ void Move(Register dst, Register src, Condition cond = al);
+ void Move(DoubleRegister dst, DoubleRegister src);
+
+ void InsertDoubleLow(DoubleRegister dst, Register src);
+ void InsertDoubleHigh(DoubleRegister dst, Register src);
+
+ void MultiPush(RegList regs);
+ void MultiPop(RegList regs);
+
+ // Load an object from the root table.
+ void LoadRoot(Register destination,
+ Heap::RootListIndex index,
+ Condition cond = al);
+ // Store an object to the root table.
+ void StoreRoot(Register source, Heap::RootListIndex index,
+ Condition cond = al);
+
+ //--------------------------------------------------------------------------
+ // S390 Macro Assemblers for Instructions
+ //--------------------------------------------------------------------------
+
+ // Arithmetic Operations
+
+ // Add (Register - Immediate)
+ void Add32(Register dst, const Operand& imm);
+ void AddP(Register dst, const Operand& imm);
+ void Add32(Register dst, Register src, const Operand& imm);
+ void AddP(Register dst, Register src, const Operand& imm);
+
+ // Add (Register - Register)
+ void Add32(Register dst, Register src);
+ void AddP(Register dst, Register src);
+ void AddP_ExtendSrc(Register dst, Register src);
+ void Add32(Register dst, Register src1, Register src2);
+ void AddP(Register dst, Register src1, Register src2);
+ void AddP_ExtendSrc(Register dst, Register src1, Register src2);
+
+ // Add (Register - Mem)
+ void Add32(Register dst, const MemOperand& opnd);
+ void AddP(Register dst, const MemOperand& opnd);
+ void AddP_ExtendSrc(Register dst, const MemOperand& opnd);
+
+ // Add (Mem - Immediate)
+ void Add32(const MemOperand& opnd, const Operand& imm);
+ void AddP(const MemOperand& opnd, const Operand& imm);
+
+ // Add Logical (Register - Immediate)
+ void AddLogical(Register dst, const Operand& imm);
+ void AddLogicalP(Register dst, const Operand& imm);
+
+ // Add Logical (Register - Mem)
+ void AddLogical(Register dst, const MemOperand& opnd);
+ void AddLogicalP(Register dst, const MemOperand& opnd);
+
+ // Subtract (Register - Immediate)
+ void Sub32(Register dst, const Operand& imm);
+ void SubP(Register dst, const Operand& imm);
+ void Sub32(Register dst, Register src, const Operand& imm);
+ void SubP(Register dst, Register src, const Operand& imm);
+
+ // Subtract (Register - Register)
+ void Sub32(Register dst, Register src);
+ void SubP(Register dst, Register src);
+ void SubP_ExtendSrc(Register dst, Register src);
+ void Sub32(Register dst, Register src1, Register src2);
+ void SubP(Register dst, Register src1, Register src2);
+ void SubP_ExtendSrc(Register dst, Register src1, Register src2);
+
+ // Subtract (Register - Mem)
+ void Sub32(Register dst, const MemOperand& opnd);
+ void SubP(Register dst, const MemOperand& opnd);
+ void SubP_ExtendSrc(Register dst, const MemOperand& opnd);
+
+ // Subtract Logical (Register - Mem)
+ void SubLogical(Register dst, const MemOperand& opnd);
+ void SubLogicalP(Register dst, const MemOperand& opnd);
+ void SubLogicalP_ExtendSrc(Register dst, const MemOperand& opnd);
+
+ // Multiply
+ void MulP(Register dst, const Operand& opnd);
+ void MulP(Register dst, Register src);
+ void MulP(Register dst, const MemOperand& opnd);
+ void Mul(Register dst, Register src1, Register src2);
+
+ // Divide
+ void DivP(Register dividend, Register divider);
+
+ // Compare
+ void Cmp32(Register src1, Register src2);
+ void CmpP(Register src1, Register src2);
+ void Cmp32(Register dst, const Operand& opnd);
+ void CmpP(Register dst, const Operand& opnd);
+ void Cmp32(Register dst, const MemOperand& opnd);
+ void CmpP(Register dst, const MemOperand& opnd);
+
+ // Compare Logical
+ void CmpLogical32(Register src1, Register src2);
+ void CmpLogicalP(Register src1, Register src2);
+ void CmpLogical32(Register src1, const Operand& opnd);
+ void CmpLogicalP(Register src1, const Operand& opnd);
+ void CmpLogical32(Register dst, const MemOperand& opnd);
+ void CmpLogicalP(Register dst, const MemOperand& opnd);
+
+ // Compare Logical Byte (CLI/CLIY)
+ void CmpLogicalByte(const MemOperand& mem, const Operand& imm);
+
+ // and 32bit
+ // Load 32bit
+ void Load(Register dst, const MemOperand& opnd);
+ void Load(Register dst, const Operand& opnd);
+ void LoadW(Register dst, const MemOperand& opnd,
+ Register scratch = no_reg);
+ void LoadlW(Register dst, const MemOperand& opnd,
+ Register scratch = no_reg);
+ void LoadB(Register dst, const MemOperand& opnd);
+ void LoadlB(Register dst, const MemOperand& opnd);
+
+ void LoadF(DoubleRegister dst, const MemOperand& opnd);
+ void LoadShortF(DoubleRegister dst, const MemOperand& opnd);
+ void LoadShortConvertToDoubleF(DoubleRegister dst, const MemOperand& mem);
+
+ // Load And Test
+ void LoadAndTest32(Register dst, Register src);
+ void LoadAndTestP_ExtendSrc(Register dst, Register src);
+ void LoadAndTestP(Register dst, Register src);
+
+ void LoadAndTest32(Register dst, const MemOperand& opnd);
+ void LoadAndTestP(Register dst, const MemOperand& opnd);
+
+ // Store
+ void StoreF(DoubleRegister dst, const MemOperand& opnd);
+ void StoreShortF(DoubleRegister dst, const MemOperand& opnd);
+ void StoreDoubleAsFloat32(DoubleRegister src, const MemOperand& mem,
+ DoubleRegister scratch);
+
+ // void XorP(Register dst, Register src, const Operand& opnd);
+ void Branch(Condition c, const Operand& opnd);
+ void BranchOnCount(Register r1, Label *l);
+
+ // Shifts
+ void ShiftLeft(Register dst, Register src, Register val);
+ void ShiftLeft(Register dst, Register src, const Operand& val);
+ void ShiftRight(Register dst, Register src, Register val);
+ void ShiftRight(Register dst, Register src, const Operand& val);
+ void ShiftLeftArith(Register dst, Register src, Register shift);
+ void ShiftLeftArith(Register dst, Register src, const Operand& val);
+ void ShiftRightArith(Register dst, Register src, Register shift);
+ void ShiftRightArith(Register dst, Register src, const Operand& val);
+
+ void ClearRightImm(Register dst, Register src, const Operand& val);
+
+ // Bitwise operations
+ void And(Register dst, Register src);
+ void AndP(Register dst, Register src);
+ void And(Register dst, Register src1, Register src2);
+ void AndP(Register dst, Register src1, Register src2);
+ void And(Register dst, const MemOperand& opnd);
+ void AndP(Register dst, const MemOperand& opnd);
+ void And(Register dst, const Operand& opnd);
+ void AndP(Register dst, const Operand& opnd);
+ void And(Register dst, Register src, const Operand& opnd);
+ void AndP(Register dst, Register src, const Operand& opnd);
+ void Or(Register dst, Register src);
+ void OrP(Register dst, Register src);
+ void Or(Register dst, Register src1, Register src2);
+ void OrP(Register dst, Register src1, Register src2);
+ void Or(Register dst, const MemOperand& opnd);
+ void OrP(Register dst, const MemOperand& opnd);
+ void Or(Register dst, const Operand& opnd);
+ void OrP(Register dst, const Operand& opnd);
+ void Or(Register dst, Register src, const Operand& opnd);
+ void OrP(Register dst, Register src, const Operand& opnd);
+ void Xor(Register dst, Register src);
+ void XorP(Register dst, Register src);
+ void Xor(Register dst, Register src1, Register src2);
+ void XorP(Register dst, Register src1, Register src2);
+ void Xor(Register dst, const MemOperand& opnd);
+ void XorP(Register dst, const MemOperand& opnd);
+ void Xor(Register dst, const Operand& opnd);
+ void XorP(Register dst, const Operand& opnd);
+ void Xor(Register dst, Register src, const Operand& opnd);
+ void XorP(Register dst, Register src, const Operand& opnd);
+
+
+ void NotP(Register dst);
+
+ void mov(Register dst, const Operand& src);
+
+ // ---------------------------------------------------------------------------
+ // GC Support
+
+ void IncrementalMarkingRecordWriteHelper(Register object, Register value,
+ Register address);
+
+ enum RememberedSetFinalAction { kReturnAtEnd, kFallThroughAtEnd };
+
+ // Record in the remembered set the fact that we have a pointer to new space
+ // at the address pointed to by the addr register. Only works if addr is not
+ // in new space.
+ void RememberedSetHelper(Register object, // Used for debug code.
+ Register addr, Register scratch,
+ SaveFPRegsMode save_fp,
+ RememberedSetFinalAction and_then);
+
+ void CheckPageFlag(Register object, Register scratch, int mask, Condition cc,
+ Label* condition_met);
+
+ // Check if object is in new space. Jumps if the object is not in new space.
+ // The register scratch can be object itself, but scratch will be clobbered.
+ void JumpIfNotInNewSpace(Register object, Register scratch, Label* branch) {
+ InNewSpace(object, scratch, ne, branch);
+ }
+
+ // Check if object is in new space. Jumps if the object is in new space.
+ // The register scratch can be object itself, but it will be clobbered.
+ void JumpIfInNewSpace(Register object, Register scratch, Label* branch) {
+ InNewSpace(object, scratch, eq, branch);
+ }
+
+ // Check if an object has a given incremental marking color.
+ void HasColor(Register object, Register scratch0, Register scratch1,
+ Label* has_color, int first_bit, int second_bit);
+
+ void JumpIfBlack(Register object, Register scratch0, Register scratch1,
+ Label* on_black);
+
+ // Checks the color of an object. If the object is already grey or black
+ // then we just fall through, since it is already live. If it is white and
+ // we can determine that it doesn't need to be scanned, then we just mark it
+ // black and fall through. For the rest we jump to the label so the
+ // incremental marker can fix its assumptions.
+ void EnsureNotWhite(Register object, Register scratch1, Register scratch2,
+ Register scratch3, Label* object_is_white_and_not_data);
+
+ // Detects conservatively whether an object is data-only, i.e. it does need to
+ // be scanned by the garbage collector.
+ void JumpIfDataObject(Register value, Register scratch,
+ Label* not_data_object);
+
+ // Notify the garbage collector that we wrote a pointer into an object.
+ // |object| is the object being stored into, |value| is the object being
+ // stored. value and scratch registers are clobbered by the operation.
+ // The offset is the offset from the start of the object, not the offset from
+ // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
+ void RecordWriteField(
+ Register object, int offset, Register value, Register scratch,
+ LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
+ RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
+ SmiCheck smi_check = INLINE_SMI_CHECK,
+ PointersToHereCheck pointers_to_here_check_for_value =
+ kPointersToHereMaybeInteresting);
+
+ // As above, but the offset has the tag presubtracted. For use with
+ // MemOperand(reg, off).
+ inline void RecordWriteContextSlot(
+ Register context, int offset, Register value, Register scratch,
+ LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
+ RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
+ SmiCheck smi_check = INLINE_SMI_CHECK,
+ PointersToHereCheck pointers_to_here_check_for_value =
+ kPointersToHereMaybeInteresting) {
+ RecordWriteField(context, offset + kHeapObjectTag, value, scratch,
+ lr_status, save_fp, remembered_set_action, smi_check,
+ pointers_to_here_check_for_value);
+ }
+
+ void RecordWriteForMap(Register object, Register map, Register dst,
+ LinkRegisterStatus lr_status, SaveFPRegsMode save_fp);
+
+ // For a given |object| notify the garbage collector that the slot |address|
+ // has been written. |value| is the object being stored. The value and
+ // address registers are clobbered by the operation.
+ void RecordWrite(
+ Register object, Register address, Register value,
+ LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
+ RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
+ SmiCheck smi_check = INLINE_SMI_CHECK,
+ PointersToHereCheck pointers_to_here_check_for_value =
+ kPointersToHereMaybeInteresting);
+
+ void push(Register src) {
+ lay(sp, MemOperand(sp, -kPointerSize));
+ StoreP(src, MemOperand(sp));
+ }
+
+ void pop(Register dst) {
+ LoadP(dst, MemOperand(sp));
+ la(sp, MemOperand(sp, kPointerSize));
+ }
+
+ void pop() {
+ la(sp, MemOperand(sp, kPointerSize));
+ }
+
+ void Push(Register src) { push(src); }
+
+ // Push a handle.
+ void Push(Handle<Object> handle);
+ void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
+
+ // Push two registers. Pushes leftmost register first (to highest address).
+ void Push(Register src1, Register src2) {
+ lay(sp, MemOperand(sp, -kPointerSize * 2));
+ StoreP(src1, MemOperand(sp, kPointerSize));
+ StoreP(src2, MemOperand(sp, 0));
+ }
+
+ // Push three registers. Pushes leftmost register first (to highest address).
+ void Push(Register src1, Register src2, Register src3) {
+ lay(sp, MemOperand(sp, -kPointerSize * 3));
+ StoreP(src1, MemOperand(sp, kPointerSize * 2));
+ StoreP(src2, MemOperand(sp, kPointerSize));
+ StoreP(src3, MemOperand(sp, 0));
+ }
+
+ // Push four registers. Pushes leftmost register first (to highest address).
+ void Push(Register src1, Register src2, Register src3, Register src4) {
+ lay(sp, MemOperand(sp, -kPointerSize * 4));
+ StoreP(src1, MemOperand(sp, kPointerSize * 3));
+ StoreP(src2, MemOperand(sp, kPointerSize * 2));
+ StoreP(src3, MemOperand(sp, kPointerSize));
+ StoreP(src4, MemOperand(sp, 0));
+ }
+
+ // Push five registers. Pushes leftmost register first (to highest address).
+ void Push(Register src1, Register src2, Register src3, Register src4,
+ Register src5) {
+ DCHECK(!src1.is(src2));
+ DCHECK(!src1.is(src3));
+ DCHECK(!src2.is(src3));
+ DCHECK(!src1.is(src4));
+ DCHECK(!src2.is(src4));
+ DCHECK(!src3.is(src4));
+ DCHECK(!src1.is(src5));
+ DCHECK(!src2.is(src5));
+ DCHECK(!src3.is(src5));
+ DCHECK(!src4.is(src5));
+
+ lay(sp, MemOperand(sp, -kPointerSize * 5));
+ StoreP(src1, MemOperand(sp, kPointerSize * 4));
+ StoreP(src2, MemOperand(sp, kPointerSize * 3));
+ StoreP(src3, MemOperand(sp, kPointerSize * 2));
+ StoreP(src4, MemOperand(sp, kPointerSize));
+ StoreP(src5, MemOperand(sp, 0));
+ }
+
+ void Pop(Register dst) { pop(dst); }
+
+ // Pop two registers. Pops rightmost register first (from lower address).
+ void Pop(Register src1, Register src2) {
+ LoadP(src2, MemOperand(sp, 0));
+ LoadP(src1, MemOperand(sp, kPointerSize));
+ la(sp, MemOperand(sp, 2 * kPointerSize));
+ }
+
+ // Pop three registers. Pops rightmost register first (from lower address).
+ void Pop(Register src1, Register src2, Register src3) {
+ LoadP(src3, MemOperand(sp, 0));
+ LoadP(src2, MemOperand(sp, kPointerSize));
+ LoadP(src1, MemOperand(sp, 2 * kPointerSize));
+ la(sp, MemOperand(sp, 3 * kPointerSize));
+ }
+
+ // Pop four registers. Pops rightmost register first (from lower address).
+ void Pop(Register src1, Register src2, Register src3, Register src4) {
+ LoadP(src4, MemOperand(sp, 0));
+ LoadP(src3, MemOperand(sp, kPointerSize));
+ LoadP(src2, MemOperand(sp, 2 * kPointerSize));
+ LoadP(src1, MemOperand(sp, 3 * kPointerSize));
+ la(sp, MemOperand(sp, 4 * kPointerSize));
+ }
+
+ // Pop five registers. Pops rightmost register first (from lower address).
+ void Pop(Register src1,
+ Register src2,
+ Register src3,
+ Register src4,
+ Register src5) {
+ LoadP(src5, MemOperand(sp, 0));
+ LoadP(src4, MemOperand(sp, kPointerSize));
+ LoadP(src3, MemOperand(sp, 2 * kPointerSize));
+ LoadP(src2, MemOperand(sp, 3 * kPointerSize));
+ LoadP(src1, MemOperand(sp, 4 * kPointerSize));
+ la(sp, MemOperand(sp, 5 * kPointerSize));
+ }
+
+ // Push a fixed frame, consisting of lr, fp, context and
+ // JS function / marker id if marker_reg is a valid register.
+ void PushFixedFrame(Register marker_reg = no_reg);
+ void PopFixedFrame(Register marker_reg = no_reg);
+
+ // Push and pop the registers that can hold pointers, as defined by the
+ // RegList constant kSafepointSavedRegisters.
+ void PushSafepointRegisters();
+ void PopSafepointRegisters();
+ // Store value in register src in the safepoint stack slot for
+ // register dst.
+ void StoreToSafepointRegisterSlot(Register src, Register dst);
+ // Load the value of the src register from its safepoint stack slot
+ // into register dst.
+ void LoadFromSafepointRegisterSlot(Register dst, Register src);
+
+ // Flush the I-cache from asm code. You should use CpuFeatures::FlushICache
+ // from C.
+ // Does not handle errors.
+ void FlushICache(Register address, size_t size, Register scratch);
+
+ // If the value is a NaN, canonicalize the value else, do nothing.
+ void CanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src);
+ void CanonicalizeNaN(const DoubleRegister value) {
+ CanonicalizeNaN(value, value);
+ }
+
+ // Converts the integer (untagged smi) in |src| to a double, storing
+ // the result to |double_dst|
+ void ConvertIntToDouble(Register src, DoubleRegister double_dst);
+
+ // Converts the unsigned integer (untagged smi) in |src| to
+ // a double, storing the result to |double_dst|
+ void ConvertUnsignedIntToDouble(Register src, DoubleRegister double_dst);
+
+ // Converts the integer (untagged smi) in |src| to
+ // a float, storing the result in |dst|
+ // Warning: The value in |int_scrach| will be changed in the process!
+ void ConvertIntToFloat(const DoubleRegister dst, const Register src,
+ const Register int_scratch);
+
+ // Converts the double_input to an integer. Note that, upon return,
+ // the contents of double_dst will also hold the fixed point representation.
+ void ConvertDoubleToInt64(const DoubleRegister double_input,
+#if !V8_TARGET_ARCH_S390X
+ const Register dst_hi,
+#endif
+ const Register dst, const DoubleRegister double_dst,
+ FPRoundingMode rounding_mode = kRoundToZero);
+
+ // Generates function and stub prologue code.
+ void StubPrologue(int prologue_offset = 0);
+ void Prologue(bool code_pre_aging, int prologue_offset = 0);
+
+ // Enter exit frame.
+ // stack_space - extra stack space, used for parameters before call to C.
+ // At least one slot (for the return address) should be provided.
+ void EnterExitFrame(bool save_doubles, int stack_space = 1);
+
+ // Leave the current exit frame. Expects the return value in r0.
+ // Expect the number of values, pushed prior to the exit frame, to
+ // remove in a register (or no_reg, if there is nothing to remove).
+ void LeaveExitFrame(bool save_doubles, Register argument_count,
+ bool restore_context,
+ bool argument_count_is_length = false);
+
+ // Get the actual activation frame alignment for target environment.
+ static int ActivationFrameAlignment();
+
+ void LoadContext(Register dst, int context_chain_length);
+
+ // Conditionally load the cached Array transitioned map of type
+ // transitioned_kind from the native context if the map in register
+ // map_in_out is the cached Array map in the native context of
+ // expected_kind.
+ void LoadTransitionedArrayMapConditional(ElementsKind expected_kind,
+ ElementsKind transitioned_kind,
+ Register map_in_out,
+ Register scratch,
+ Label* no_map_match);
+
+ void LoadGlobalFunction(int index, Register function);
+
+ // Load the initial map from the global function. The registers
+ // function and map can be the same, function is then overwritten.
+ void LoadGlobalFunctionInitialMap(Register function,
+ Register map,
+ Register scratch);
+
+ void InitializeRootRegister() {
+ ExternalReference roots_array_start =
+ ExternalReference::roots_array_start(isolate());
+ mov(kRootRegister, Operand(roots_array_start)); }
+
+ // ----------------------------------------------------------------
+ // new S390 macro-assembler interfaces that are slightly higher level
+ // than assembler-s390 and may generate variable length sequences
+
+ // load a literal signed int value <value> to GPR <dst>
+ void LoadIntLiteral(Register dst, int value);
+
+ // load an SMI value <value> to GPR <dst>
+ void LoadSmiLiteral(Register dst, Smi* smi);
+
+ // load a literal double value <value> to FPR <result>
+ void LoadDoubleLiteral(DoubleRegister result, double value, Register scratch);
+ void LoadDoubleLiteral(DoubleRegister result,
+ uint64_t value, Register scratch);
+
+ void StoreW(Register src, const MemOperand& mem,
+ Register scratch = no_reg);
+
+ void LoadHalfWordP(Register dst, const MemOperand& mem,
+ Register scratch = no_reg);
+
+ void StoreHalfWord(Register src, const MemOperand& mem,
+ Register scratch = r0);
+ void StoreByte(Register src, const MemOperand& mem, Register scratch = r0);
+
+ void LoadRepresentation(Register dst, const MemOperand& mem, Representation r,
+ Register scratch = no_reg);
+ void StoreRepresentation(Register src, const MemOperand& mem,
+ Representation r, Register scratch = no_reg);
+
+ void AddSmiLiteral(Register dst, Register src, Smi* smi, Register scratch);
+ void SubSmiLiteral(Register dst, Register src, Smi* smi, Register scratch);
+ void CmpSmiLiteral(Register src1, Smi* smi, Register scratch);
+ void CmpLogicalSmiLiteral(Register src1, Smi* smi, Register scratch);
+ void AndSmiLiteral(Register dst, Register src, Smi* smi);
+
+ // Set new rounding mode RN to FPSCR
+ void SetRoundingMode(FPRoundingMode RN);
+
+ // reset rounding mode to default (kRoundToNearest)
+ void ResetRoundingMode();
+
+ // These exist to provide portability between 32 and 64bit
+ void LoadP(Register dst, const MemOperand& mem, Register scratch = no_reg);
+ void StoreP(Register src, const MemOperand& mem, Register scratch = no_reg);
+ void StoreP(const MemOperand& mem, const Operand& opnd,
+ Register scratch = no_reg);
+ void LoadMultipleP(Register dst1, Register dst2, const MemOperand& mem);
+ void StoreMultipleP(Register dst1, Register dst2, const MemOperand& mem);
+ void LoadMultipleW(Register dst1, Register dst2, const MemOperand& mem);
+ void StoreMultipleW(Register dst1, Register dst2, const MemOperand& mem);
+
+ // Cleanse pointer address on 31bit by zero out top bit.
+ // This is a NOP on 64-bit.
+ void CleanseP(Register src) {
+#if (V8_HOST_ARCH_S390 && !(V8_TARGET_ARCH_S390X))
+ nilh(src, Operand(0x7FFF));
+#endif
+ }
+
+ // ---------------------------------------------------------------------------
+ // JavaScript invokes
+
+ // Set up call kind marking in ecx. The method takes ecx as an
+ // explicit first parameter to make the code more readable at the
+ // call sites.
+ // void SetCallKind(Register dst, CallKind kind);
+
+ // Invoke the JavaScript function code by either calling or jumping.
+ void InvokeCode(Register code, const ParameterCount& expected,
+ const ParameterCount& actual, InvokeFlag flag,
+ const CallWrapper& call_wrapper);
+
+ // Invoke the JavaScript function in the given register. Changes the
+ // current context to the context in the function before invoking.
+ void InvokeFunction(Register function, const ParameterCount& actual,
+ InvokeFlag flag, const CallWrapper& call_wrapper);
+
+ void InvokeFunction(Register function, const ParameterCount& expected,
+ const ParameterCount& actual, InvokeFlag flag,
+ const CallWrapper& call_wrapper);
+
+ void InvokeFunction(Handle<JSFunction> function,
+ const ParameterCount& expected,
+ const ParameterCount& actual, InvokeFlag flag,
+ const CallWrapper& call_wrapper);
+
+ void IsObjectJSObjectType(Register heap_object, Register map,
+ Register scratch, Label* fail);
+
+ void IsInstanceJSObjectType(Register map, Register scratch, Label* fail);
+
+ void IsObjectJSStringType(Register object, Register scratch, Label* fail);
+
+ void IsObjectNameType(Register object, Register scratch, Label* fail);
+
+ // ---------------------------------------------------------------------------
+ // Debugger Support
+
+ void DebugBreak();
+
+ // ---------------------------------------------------------------------------
+ // Exception handling
+
+ // Push a new stack handler and link into stack handler chain.
+ void PushStackHandler();
+
+ // Unlink the stack handler on top of the stack from the stack handler chain.
+ // Must preserve the result register.
+ void PopStackHandler();
+
+ // ---------------------------------------------------------------------------
+ // Inline caching support
+
+ // Generate code for checking access rights - used for security checks
+ // on access to global objects across environments. The holder register
+ // is left untouched, whereas both scratch registers are clobbered.
+ void CheckAccessGlobalProxy(Register holder_reg, Register scratch,
+ Label* miss);
+
+ void GetNumberHash(Register t0, Register scratch);
+
+ void LoadFromNumberDictionary(Label* miss, Register elements, Register key,
+ Register result, Register t0, Register t1,
+ Register t2);
+
+
+ inline void MarkCode(NopMarkerTypes type) { nop(type); }
+
+ // Check if the given instruction is a 'type' marker.
+ // i.e. check if is is a mov r<type>, r<type> (referenced as nop(type))
+ // These instructions are generated to mark special location in the code,
+ // like some special IC code.
+ static inline bool IsMarkedCode(Instr instr, int type) {
+ DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
+ return IsNop(instr, type);
+ }
+
+
+ static inline int GetCodeMarker(Instr instr) {
+ int dst_reg_offset = 12;
+ int dst_mask = 0xf << dst_reg_offset;
+ int src_mask = 0xf;
+ int dst_reg = (instr & dst_mask) >> dst_reg_offset;
+ int src_reg = instr & src_mask;
+ uint32_t non_register_mask = ~(dst_mask | src_mask);
+ uint32_t mov_mask = al | 13 << 21;
+
+ // Return <n> if we have a mov rn rn, else return -1.
+ int type = ((instr & non_register_mask) == mov_mask) &&
+ (dst_reg == src_reg) && (FIRST_IC_MARKER <= dst_reg) &&
+ (dst_reg < LAST_CODE_MARKER)
+ ? src_reg
+ : -1;
+ DCHECK((type == -1) ||
+ ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
+ return type;
+ }
+
+
+ // ---------------------------------------------------------------------------
+ // Allocation support
+
+ // Allocate an object in new space or old pointer space. The object_size is
+ // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
+ // is passed. If the space is exhausted control continues at the gc_required
+ // label. The allocated object is returned in result. If the flag
+ // tag_allocated_object is true the result is tagged as as a heap object.
+ // All registers are clobbered also when control continues at the gc_required
+ // label.
+ void Allocate(int object_size, Register result, Register scratch1,
+ Register scratch2, Label* gc_required, AllocationFlags flags);
+
+ void Allocate(Register object_size, Register result, Register scratch1,
+ Register scratch2, Label* gc_required, AllocationFlags flags);
+
+ // Undo allocation in new space. The object passed and objects allocated after
+ // it will no longer be allocated. The caller must make sure that no pointers
+ // are left to the object(s) no longer allocated as they would be invalid when
+ // allocation is undone.
+ void UndoAllocationInNewSpace(Register object, Register scratch);
+
+
+ void AllocateTwoByteString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Register scratch3, Label* gc_required);
+ void AllocateOneByteString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Register scratch3, Label* gc_required);
+ void AllocateTwoByteConsString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Label* gc_required);
+ void AllocateOneByteConsString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Label* gc_required);
+ void AllocateTwoByteSlicedString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Label* gc_required);
+ void AllocateOneByteSlicedString(Register result, Register length,
+ Register scratch1, Register scratch2,
+ Label* gc_required);
+
+ // Allocates a heap number or jumps to the gc_required label if the young
+ // space is full and a scavenge is needed. All registers are clobbered also
+ // when control continues at the gc_required label.
+ void AllocateHeapNumber(Register result, Register scratch1, Register scratch2,
+ Register heap_number_map, Label* gc_required,
+ TaggingMode tagging_mode = TAG_RESULT,
+ MutableMode mode = IMMUTABLE);
+ void AllocateHeapNumberWithValue(Register result, DoubleRegister value,
+ Register scratch1, Register scratch2,
+ Register heap_number_map,
+ Label* gc_required);
+
+ // Copies a fixed number of fields of heap objects from src to dst.
+ void CopyFields(Register dst, Register src, RegList temps, int field_count);
+
+ // Copies a number of bytes from src to dst. All registers are clobbered. On
+ // exit src and dst will point to the place just after where the last byte was
+ // read or written and length will be zero.
+ void CopyBytes(Register src, Register dst, Register length, Register scratch);
+
+ // Initialize fields with filler values. |count| fields starting at
+ // |start_offset| are overwritten with the value in |filler|. At the end the
+ // loop, |start_offset| points at the next uninitialized field. |count| is
+ // assumed to be non-zero.
+ void InitializeNFieldsWithFiller(Register start_offset, Register count,
+ Register filler);
+
+ // Initialize fields with filler values. Fields starting at |start_offset|
+ // not including end_offset are overwritten with the value in |filler|. At
+ // the end the loop, |start_offset| takes the value of |end_offset|.
+ void InitializeFieldsWithFiller(Register start_offset, Register end_offset,
+ Register filler);
+
+ // ---------------------------------------------------------------------------
+ // Support functions.
+
+ // Machine code version of Map::GetConstructor().
+ // |temp| holds |result|'s map when done, and |temp2| its instance type.
+ void GetMapConstructor(Register result, Register map, Register temp,
+ Register temp2);
+
+ // Try to get function prototype of a function and puts the value in
+ // the result register. Checks that the function really is a
+ // function and jumps to the miss label if the fast checks fail. The
+ // function register will be untouched; the other registers may be
+ // clobbered.
+ void TryGetFunctionPrototype(Register function, Register result,
+ Register scratch, Label* miss,
+ bool miss_on_bound_function = false);
+
+ // Compare object type for heap object. heap_object contains a non-Smi
+ // whose object type should be compared with the given type. This both
+ // sets the flags and leaves the object type in the type_reg register.
+ // It leaves the map in the map register (unless the type_reg and map register
+ // are the same register). It leaves the heap object in the heap_object
+ // register unless the heap_object register is the same register as one of the
+ // other registers.
+ // Type_reg can be no_reg. In that case ip is used.
+ void CompareObjectType(Register heap_object, Register map, Register type_reg,
+ InstanceType type);
+
+ // Compare object type for heap object. Branch to false_label if type
+ // is lower than min_type or greater than max_type.
+ // Load map into the register map.
+ void CheckObjectTypeRange(Register heap_object, Register map,
+ InstanceType min_type, InstanceType max_type,
+ Label* false_label);
+
+ // Compare instance type in a map. map contains a valid map object whose
+ // object type should be compared with the given type. This both
+ // sets the flags and leaves the object type in the type_reg register.
+ void CompareInstanceType(Register map, Register type_reg, InstanceType type);
+
+
+ // Check if a map for a JSObject indicates that the object has fast elements.
+ // Jump to the specified label if it does not.
+ void CheckFastElements(Register map, Register scratch, Label* fail);
+
+ // Check if a map for a JSObject indicates that the object can have both smi
+ // and HeapObject elements. Jump to the specified label if it does not.
+ void CheckFastObjectElements(Register map, Register scratch, Label* fail);
+
+ // Check if a map for a JSObject indicates that the object has fast smi only
+ // elements. Jump to the specified label if it does not.
+ void CheckFastSmiElements(Register map, Register scratch, Label* fail);
+
+ // Check to see if maybe_number can be stored as a double in
+ // FastDoubleElements. If it can, store it at the index specified by key in
+ // the FastDoubleElements array elements. Otherwise jump to fail.
+ void StoreNumberToDoubleElements(Register value_reg, Register key_reg,
+ Register elements_reg, Register scratch1,
+ DoubleRegister double_scratch, Label* fail,
+ int elements_offset = 0);
+
+ // Compare an object's map with the specified map and its transitioned
+ // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Condition flags are
+ // set with result of map compare. If multiple map compares are required, the
+ // compare sequences branches to early_success.
+ void CompareMap(Register obj, Register scratch, Handle<Map> map,
+ Label* early_success);
+
+ // As above, but the map of the object is already loaded into the register
+ // which is preserved by the code generated.
+ void CompareMap(Register obj_map, Handle<Map> map, Label* early_success);
+
+ // Check if the map of an object is equal to a specified map and branch to
+ // label if not. Skip the smi check if not required (object is known to be a
+ // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
+ // against maps that are ElementsKind transition maps of the specified map.
+ void CheckMap(Register obj, Register scratch, Handle<Map> map, Label* fail,
+ SmiCheckType smi_check_type);
+
+
+ void CheckMap(Register obj, Register scratch, Heap::RootListIndex index,
+ Label* fail, SmiCheckType smi_check_type);
+
+
+ // Check if the map of an object is equal to a specified weak map and branch
+ // to a specified target if equal. Skip the smi check if not required
+ // (object is known to be a heap object)
+ void DispatchWeakMap(Register obj, Register scratch1, Register scratch2,
+ Handle<WeakCell> cell, Handle<Code> success,
+ SmiCheckType smi_check_type);
+
+ // Compare the given value and the value of weak cell.
+ void CmpWeakValue(Register value, Handle<WeakCell> cell, Register scratch,
+ CRegister cr = cr7);
+
+ void GetWeakValue(Register value, Handle<WeakCell> cell);
+
+ // Load the value of the weak cell in the value register. Branch to the given
+ // miss label if the weak cell was cleared.
+ void LoadWeakValue(Register value, Handle<WeakCell> cell, Label* miss);
+
+ // Compare the object in a register to a value from the root list.
+ // Uses the ip register as scratch.
+ void CompareRoot(Register obj, Heap::RootListIndex index);
+
+
+ // Load and check the instance type of an object for being a string.
+ // Loads the type into the second argument register.
+ // Returns a condition that will be enabled if the object was a string.
+ Condition IsObjectStringType(Register obj, Register type) {
+ LoadP(type, FieldMemOperand(obj, HeapObject::kMapOffset));
+ LoadlB(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
+ mov(r0, Operand(kIsNotStringMask));
+ AndP(r0, type);
+ DCHECK_EQ(0u, kStringTag);
+ return eq;
+ }
+
+
+ // Picks out an array index from the hash field.
+ // Register use:
+ // hash - holds the index's hash. Clobbered.
+ // index - holds the overwritten index on exit.
+ void IndexFromHash(Register hash, Register index);
+
+ // Get the number of least significant bits from a register
+ void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
+ void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
+
+ // Load the value of a smi object into a FP double register. The register
+ // scratch1 can be the same register as smi in which case smi will hold the
+ // untagged value afterwards.
+ void SmiToDouble(DoubleRegister value, Register smi);
+
+
+ // Check if a double can be exactly represented as a signed 32-bit integer.
+ // CR_EQ in cr7 is set if true.
+ void TestDoubleIsInt32(DoubleRegister double_input, Register scratch1,
+ Register scratch2, DoubleRegister double_scratch);
+
+ // Try to convert a double to a signed 32-bit integer.
+ // CR_EQ in cr7 is set and result assigned if the conversion is exact.
+ void TryDoubleToInt32Exact(Register result, DoubleRegister double_input,
+ Register scratch, DoubleRegister double_scratch);
+
+ // Floor a double and writes the value to the result register.
+ // Go to exact if the conversion is exact (to be able to test -0),
+ // fall through calling code if an overflow occurred, else go to done.
+ // In return, input_high is loaded with high bits of input.
+ void TryInt32Floor(Register result, DoubleRegister double_input,
+ Register input_high, Register scratch,
+ DoubleRegister double_scratch, Label* done, Label* exact);
+
+ // Perform ceiling of double in input_register and store in double_output.
+ void FloatCeiling64(DoubleRegister double_output, DoubleRegister double_input,
+ Register scratch);
+
+ // Perform floor of double in input_register and store in double_output.
+ void FloatFloor64(DoubleRegister double_output, DoubleRegister double_input,
+ Register scratch);
+
+ // Performs a truncating conversion of a floating point number as used by
+ // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
+ // succeeds, otherwise falls through if result is saturated. On return
+ // 'result' either holds answer, or is clobbered on fall through.
+ //
+ // Only public for the test code in test-code-stubs-arm.cc.
+ void TryInlineTruncateDoubleToI(Register result, DoubleRegister input,
+ Label* done);
+
+ // Performs a truncating conversion of a floating point number as used by
+ // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
+ // Exits with 'result' holding the answer.
+ void TruncateDoubleToI(Register result, DoubleRegister double_input);
+
+ // Performs a truncating conversion of a heap number as used by
+ // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
+ // must be different registers. Exits with 'result' holding the answer.
+ void TruncateHeapNumberToI(Register result, Register object);
+
+ // Converts the smi or heap number in object to an int32 using the rules
+ // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
+ // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
+ // different registers.
+ void TruncateNumberToI(Register object, Register result,
+ Register heap_number_map, Register scratch1,
+ Label* not_int32);
+
+
+ // Overflow handling functions.
+ // Usage: call the appropriate arithmetic function and then call one of the
+ // flow control functions with the corresponding label.
+
+ // Compute dst = left + right, setting condition codes. dst may be same as
+ // either left or right (or a unique register). left and right must not be
+ // the same register.
+ void AddAndCheckForOverflow(Register dst, Register left, Register right,
+ Register overflow_dst, Register scratch = r0);
+ void AddAndCheckForOverflow(Register dst, Register left, intptr_t right,
+ Register overflow_dst, Register scratch = r0);
+
+ // Compute dst = left - right, setting condition codes. dst may be same as
+ // either left or right (or a unique register). left and right must not be
+ // the same register.
+ void SubAndCheckForOverflow(Register dst, Register left, Register right,
+ Register overflow_dst, Register scratch = r0);
+
+ void BranchOnOverflow(Label* label) {
+ blt(label /*, cr0*/);
+ }
+
+ void BranchOnNoOverflow(Label* label) {
+ bge(label /*, cr0*/);
+ }
+
+ void RetOnOverflow(void) {
+ Label label;
+
+ blt(&label /*, cr0*/);
+ Ret();
+ bind(&label);
+ }
+
+ void RetOnNoOverflow(void) {
+ Label label;
+
+ bge(&label /*, cr0*/);
+ Ret();
+ bind(&label);
+ }
+
+ // Pushes <count> double values to <location>, starting from d<first>.
+ void SaveFPRegs(Register location, int first, int count);
+
+ // Pops <count> double values from <location>, starting from d<first>.
+ void RestoreFPRegs(Register location, int first, int count);
+
+ // ---------------------------------------------------------------------------
+ // Runtime calls
+
+ // Call a code stub.
+ void CallStub(CodeStub* stub, TypeFeedbackId ast_id = TypeFeedbackId::None(),
+ Condition cond = al);
+
+ // Call a code stub.
+ void TailCallStub(CodeStub* stub, Condition cond = al);
+
+ // Call a runtime routine.
+ void CallRuntime(const Runtime::Function* f, int num_arguments,
+ SaveFPRegsMode save_doubles = kDontSaveFPRegs);
+ void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
+ const Runtime::Function* function = Runtime::FunctionForId(id);
+ CallRuntime(function, function->nargs, kSaveFPRegs);
+ }
+
+ // Convenience function: Same as above, but takes the fid instead.
+ void CallRuntime(Runtime::FunctionId id, int num_arguments,
+ SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
+ CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
+ }
+
+ // Convenience function: call an external reference.
+ void CallExternalReference(const ExternalReference& ext, int num_arguments);
+
+ // Tail call of a runtime routine (jump).
+ // Like JumpToExternalReference, but also takes care of passing the number
+ // of parameters.
+ void TailCallExternalReference(const ExternalReference& ext,
+ int num_arguments, int result_size);
+
+ // Convenience function: tail call a runtime routine (jump).
+ void TailCallRuntime(Runtime::FunctionId fid, int num_arguments,
+ int result_size);
+
+ int CalculateStackPassedWords(int num_reg_arguments,
+ int num_double_arguments);
+
+ // Before calling a C-function from generated code, align arguments on stack.
+ // After aligning the frame, non-register arguments must be stored in
+ // sp[0], sp[4], etc., not pushed. The argument count assumes all arguments
+ // are word sized. If double arguments are used, this function assumes that
+ // all double arguments are stored before core registers; otherwise the
+ // correct alignment of the double values is not guaranteed.
+ // Some compilers/platforms require the stack to be aligned when calling
+ // C++ code.
+ // Needs a scratch register to do some arithmetic. This register will be
+ // trashed.
+ void PrepareCallCFunction(int num_reg_arguments, int num_double_registers,
+ Register scratch);
+ void PrepareCallCFunction(int num_reg_arguments, Register scratch);
+
+ // There are two ways of passing double arguments on ARM, depending on
+ // whether soft or hard floating point ABI is used. These functions
+ // abstract parameter passing for the three different ways we call
+ // C functions from generated code.
+ void MovToFloatParameter(DoubleRegister src);
+ void MovToFloatParameters(DoubleRegister src1, DoubleRegister src2);
+ void MovToFloatResult(DoubleRegister src);
+
+ // Calls a C function and cleans up the space for arguments allocated
+ // by PrepareCallCFunction. The called function is not allowed to trigger a
+ // garbage collection, since that might move the code and invalidate the
+ // return address (unless this is somehow accounted for by the called
+ // function).
+ void CallCFunction(ExternalReference function, int num_arguments);
+ void CallCFunction(Register function, int num_arguments);
+ void CallCFunction(ExternalReference function, int num_reg_arguments,
+ int num_double_arguments);
+ void CallCFunction(Register function, int num_reg_arguments,
+ int num_double_arguments);
+
+ void MovFromFloatParameter(DoubleRegister dst);
+ void MovFromFloatResult(DoubleRegister dst);
+
+ // Jump to a runtime routine.
+ void JumpToExternalReference(const ExternalReference& builtin);
+
+ // Invoke specified builtin JavaScript function. Adds an entry to
+ // the unresolved list if the name does not resolve.
+ void InvokeBuiltin(Builtins::JavaScript id, InvokeFlag flag,
+ const CallWrapper& call_wrapper = NullCallWrapper());
+
+ // Store the code object for the given builtin in the target register and
+ // setup the function in r1.
+ void GetBuiltinEntry(Register target, Builtins::JavaScript id);
+
+ // Store the function for the given builtin in the target register.
+ void GetBuiltinFunction(Register target, Builtins::JavaScript id);
+
+ Handle<Object> CodeObject() {
+ DCHECK(!code_object_.is_null());
+ return code_object_;
+ }
+
+
+ // Emit code for a truncating division by a constant. The dividend register is
+ // unchanged and ip gets clobbered. Dividend and result must be different.
+ void TruncatingDiv(Register result, Register dividend, int32_t divisor);
+
+ // ---------------------------------------------------------------------------
+ // StatsCounter support
+
+ void SetCounter(StatsCounter* counter, int value, Register scratch1,
+ Register scratch2);
+ void IncrementCounter(StatsCounter* counter, int value, Register scratch1,
+ Register scratch2);
+ void DecrementCounter(StatsCounter* counter, int value, Register scratch1,
+ Register scratch2);
+
+
+ // ---------------------------------------------------------------------------
+ // Debugging
+
+ // Calls Abort(msg) if the condition cond is not satisfied.
+ // Use --debug_code to enable.
+ void Assert(Condition cond, BailoutReason reason, CRegister cr = cr7);
+ void AssertFastElements(Register elements);
+
+ // Like Assert(), but always enabled.
+ void Check(Condition cond, BailoutReason reason, CRegister cr = cr7);
+
+ // Print a message to stdout and abort execution.
+ void Abort(BailoutReason reason);
+
+ // Verify restrictions about code generated in stubs.
+ void set_generating_stub(bool value) { generating_stub_ = value; }
+ bool generating_stub() { return generating_stub_; }
+ void set_has_frame(bool value) { has_frame_ = value; }
+ bool has_frame() { return has_frame_; }
+ inline bool AllowThisStubCall(CodeStub* stub);
+
+ // ---------------------------------------------------------------------------
+ // Number utilities
+
+ // Check whether the value of reg is a power of two and not zero. If not
+ // control continues at the label not_power_of_two. If reg is a power of two
+ // the register scratch contains the value of (reg - 1) when control falls
+ // through.
+ void JumpIfNotPowerOfTwoOrZero(Register reg,
+ Register scratch,
+ Label* not_power_of_two_or_zero);
+ // Check whether the value of reg is a power of two and not zero.
+ // Control falls through if it is, with scratch containing the mask
+ // value (reg - 1).
+ // Otherwise control jumps to the 'zero_and_neg' label if the value of reg is
+ // zero or negative, or jumps to the 'not_power_of_two' label if the value is
+ // strictly positive but not a power of two.
+ void JumpIfNotPowerOfTwoOrZeroAndNeg(Register reg, Register scratch,
+ Label* zero_and_neg,
+ Label* not_power_of_two);
+
+ // ---------------------------------------------------------------------------
+ // Bit testing/extraction
+ //
+ // Bit numbering is such that the least significant bit is bit 0
+ // (for consistency between 32/64-bit).
+
+ // Extract consecutive bits (defined by rangeStart - rangeEnd) from src
+ // and place them into the least significant bits of dst.
+ inline void ExtractBitRange(Register dst, Register src,
+ int rangeStart, int rangeEnd) {
+ DCHECK(rangeStart >= rangeEnd && rangeStart < kBitsPerPointer);
+
+ // Try to use RISBG if possible.
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ int shiftAmount = (64 - rangeEnd) % 64; // Convert to shift left.
+ int endBit = 63; // End is always LSB after shifting.
+ int startBit = 63 - rangeStart + rangeEnd;
+ risbg(dst, src, Operand(startBit), Operand(endBit), Operand(shiftAmount),
+ true);
+ } else {
+ if (rangeEnd > 0) // Don't need to shift if rangeEnd is zero.
+ ShiftRightP(dst, src, Operand(rangeEnd));
+ else if (!dst.is(src)) // If we didn't shift, we might need to copy
+ LoadRR(dst, src);
+ int width = rangeStart - rangeEnd + 1;
+#if V8_TARGET_ARCH_S390X
+ uint64_t mask = (static_cast<uint64_t>(1) << width) - 1;
+ nihf(dst, Operand(mask >> 32));
+ nilf(dst, Operand(mask & 0xFFFFFFFF));
+ ltgr(dst, dst);
+#else
+ uint32_t mask = (1 << width) - 1;
+ AndP(dst, Operand(mask));
+#endif
+ }
+ }
+
+ inline void ExtractBit(Register dst, Register src, uint32_t bitNumber) {
+ ExtractBitRange(dst, src, bitNumber, bitNumber);
+ }
+
+ // Extract consecutive bits (defined by mask) from src and place them
+ // into the least significant bits of dst.
+ inline void ExtractBitMask(Register dst, Register src, uintptr_t mask,
+ RCBit rc = LeaveRC) {
+ int start = kBitsPerPointer - 1;
+ int end;
+ uintptr_t bit = (1L << start);
+
+ while (bit && (mask & bit) == 0) {
+ start--;
+ bit >>= 1;
+ }
+ end = start;
+ bit >>= 1;
+
+ while (bit && (mask & bit)) {
+ end--;
+ bit >>= 1;
+ }
+
+ // 1-bits in mask must be contiguous
+ DCHECK(bit == 0 || (mask & ((bit << 1) - 1)) == 0);
+
+ ExtractBitRange(dst, src, start, end);
+ }
+
+ // Test single bit in value.
+ inline void TestBit(Register value, int bitNumber, Register scratch = r0) {
+ ExtractBitRange(scratch, value, bitNumber, bitNumber);
+ }
+
+ // Test consecutive bit range in value. Range is defined by
+ // rangeStart - rangeEnd.
+ inline void TestBitRange(Register value, int rangeStart, int rangeEnd,
+ Register scratch = r0) {
+ ExtractBitRange(scratch, value, rangeStart, rangeEnd);
+ }
+
+ // Test consecutive bit range in value. Range is defined by mask.
+ inline void TestBitMask(Register value, uintptr_t mask,
+ Register scratch = r0) {
+ ExtractBitMask(scratch, value, mask, SetRC);
+ }
+
+ // ---------------------------------------------------------------------------
+ // Smi utilities
+
+ // Shift left by kSmiShift
+ void SmiTag(Register reg) {
+ SmiTag(reg, reg);
+ }
+ void SmiTag(Register dst, Register src) {
+ ShiftLeftP(dst, src, Operand(kSmiShift));
+ }
+
+#if !V8_TARGET_ARCH_S390X
+ // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
+ void SmiTagCheckOverflow(Register reg, Register overflow);
+ void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
+
+ inline void JumpIfNotSmiCandidate(Register value, Register scratch,
+ Label* not_smi_label) {
+ // High bits must be identical to fit into an Smi
+ STATIC_ASSERT(kSmiShift == 1);
+ AddP(scratch, value, Operand(0x40000000u));
+ CmpP(scratch, Operand::Zero());
+ blt(not_smi_label);
+ }
+#endif
+ inline void TestUnsignedSmiCandidate(Register value, Register scratch) {
+ // The test is different for unsigned int values. Since we need
+ // the value to be in the range of a positive smi, we can't
+ // handle any of the high bits being set in the value.
+ TestBitRange(value, kBitsPerPointer - 1, kBitsPerPointer - 1 - kSmiShift,
+ scratch);
+ }
+ inline void JumpIfNotUnsignedSmiCandidate(Register value, Register scratch,
+ Label* not_smi_label) {
+ TestUnsignedSmiCandidate(value, scratch);
+ bne(not_smi_label /*, cr0*/);
+ }
+
+ void SmiUntag(Register reg) {
+ SmiUntag(reg, reg);
+ }
+
+ void SmiUntag(Register dst, Register src) {
+ ShiftRightArithP(dst, src, Operand(kSmiShift));
+ }
+
+ void SmiToPtrArrayOffset(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift > kPointerSizeLog2);
+ ShiftRightArithP(dst, src, Operand(kSmiShift - kPointerSizeLog2));
+#else
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift < kPointerSizeLog2);
+ ShiftLeftP(dst, src, Operand(kPointerSizeLog2 - kSmiShift));
+#endif
+ }
+
+ void SmiToByteArrayOffset(Register dst, Register src) {
+ SmiUntag(dst, src);
+ }
+
+ void SmiToShortArrayOffset(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift > 1);
+ ShiftRightArithP(dst, src, Operand(kSmiShift - 1));
+#else
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift == 1);
+ if (!dst.is(src)) {
+ LoadRR(dst, src);
+ }
+#endif
+ }
+
+ void SmiToIntArrayOffset(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift > 2);
+ ShiftRightArithP(dst, src, Operand(kSmiShift - 2));
+#else
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift < 2);
+ ShiftLeftP(dst, src, Operand(2 - kSmiShift));
+#endif
+ }
+
+#define SmiToFloatArrayOffset SmiToIntArrayOffset
+
+ void SmiToDoubleArrayOffset(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift > kDoubleSizeLog2);
+ ShiftRightArithP(dst, src, Operand(kSmiShift - kDoubleSizeLog2));
+#else
+ STATIC_ASSERT(kSmiTag == 0 && kSmiShift < kDoubleSizeLog2);
+ ShiftLeftP(dst, src, Operand(kDoubleSizeLog2 - kSmiShift));
+#endif
+ }
+
+ void SmiToArrayOffset(Register dst, Register src, int elementSizeLog2) {
+ if (kSmiShift < elementSizeLog2) {
+ ShiftLeftP(dst, src, Operand(elementSizeLog2 - kSmiShift));
+ } else if (kSmiShift > elementSizeLog2) {
+ ShiftRightArithP(dst, src, Operand(kSmiShift - elementSizeLog2));
+ } else if (!dst.is(src)) {
+ LoadRR(dst, src);
+ }
+ }
+
+ void IndexToArrayOffset(Register dst, Register src, int elementSizeLog2,
+ bool isSmi, bool keyMaybeNegative) {
+ if (isSmi) {
+ SmiToArrayOffset(dst, src, elementSizeLog2);
+ } else if (keyMaybeNegative ||
+ !CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+#if V8_TARGET_ARCH_S390X
+ // If array access is dehoisted, the key, being an int32, can contain
+ // a negative value, as needs to be sign-extended to 64-bit for
+ // memory access.
+ //
+ // src (key) is a 32-bit integer. Sign extension ensures
+ // upper 32-bit does not contain garbage before being used to
+ // reference memory.
+ lgfr(src, src);
+#endif
+ ShiftLeftP(dst, src, Operand(elementSizeLog2));
+ } else {
+ // Small optimization to reduce pathlength. After Bounds Check,
+ // the key is guaranteed to be non-negative. Leverage RISBG,
+ // which also performs zero-extension.
+ risbg(dst, src, Operand(32 - elementSizeLog2),
+ Operand(63 - elementSizeLog2), Operand(elementSizeLog2),
+ true);
+ }
+ }
+
+ // Untag the source value into destination and jump if source is a smi.
+ // Souce and destination can be the same register.
+ void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
+
+ // Untag the source value into destination and jump if source is not a smi.
+ // Souce and destination can be the same register.
+ void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
+
+ inline void TestIfSmi(Register value) {
+ tmll(value, Operand(1));
+ }
+
+ inline void TestIfPositiveSmi(Register value, Register scratch) {
+ STATIC_ASSERT((kSmiTagMask | kSmiSignMask) ==
+ (intptr_t)(1UL << (kBitsPerPointer - 1) | 1));
+ mov(scratch, Operand(kIntptrSignBit | kSmiTagMask));
+ AndP(scratch, value);
+ }
+
+ // Jump the register contains a smi.
+ inline void JumpIfSmi(Register value, Label* smi_label) {
+ TestIfSmi(value);
+ beq(smi_label /*, cr0*/); // branch if SMI
+ }
+ // Jump if either of the registers contain a non-smi.
+ inline void JumpIfNotSmi(Register value, Label* not_smi_label) {
+ TestIfSmi(value);
+ bne(not_smi_label /*, cr0*/);
+ }
+ // Jump if either of the registers contain a non-smi.
+ void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
+ // Jump if either of the registers contain a smi.
+ void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
+
+ // Abort execution if argument is a smi, enabled via --debug-code.
+ void AssertNotSmi(Register object);
+ void AssertSmi(Register object);
+
+#if V8_TARGET_ARCH_S390X
+ inline void TestIfInt32(Register value, Register scratch) {
+ // High bits must be identical to fit into an 32-bit integer
+ lgfr(scratch, value);
+ CmpP(scratch, value);
+ }
+#else
+ inline void TestIfInt32(Register hi_word, Register lo_word,
+ Register scratch) {
+ // High bits must be identical to fit into an 32-bit integer
+ ShiftRightArith(scratch, lo_word, Operand(31));
+ CmpP(scratch, hi_word);
+ }
+#endif
+
+#if V8_TARGET_ARCH_S390X
+ // Ensure it is permissable to read/write int value directly from
+ // upper half of the smi.
+ STATIC_ASSERT(kSmiTag == 0);
+ STATIC_ASSERT(kSmiTagSize + kSmiShiftSize == 32);
+#endif
+#if V8_TARGET_LITTLE_ENDIAN
+#define SmiWordOffset(offset) (offset + kPointerSize / 2)
+#else
+#define SmiWordOffset(offset) offset
+#endif
+
+ // Abort execution if argument is not a string, enabled via --debug-code.
+ void AssertString(Register object);
+
+ // Abort execution if argument is not a name, enabled via --debug-code.
+ void AssertName(Register object);
+
+ // Abort execution if argument is not undefined or an AllocationSite, enabled
+ // via --debug-code.
+ void AssertUndefinedOrAllocationSite(Register object, Register scratch);
+
+ // Abort execution if reg is not the root value with the given index,
+ // enabled via --debug-code.
+ void AssertIsRoot(Register reg, Heap::RootListIndex index);
+
+
+ // ---------------------------------------------------------------------------
+ // HeapNumber utilities
+
+ void JumpIfNotHeapNumber(Register object, Register heap_number_map,
+ Register scratch, Label* on_not_heap_number);
+
+ // ---------------------------------------------------------------------------
+ // String utilities
+
+ // Generate code to do a lookup in the number string cache. If the number in
+ // the register object is found in the cache the generated code falls through
+ // with the result in the result register. The object and the result register
+ // can be the same. If the number is not found in the cache the code jumps to
+ // the label not_found with only the content of register object unchanged.
+ void LookupNumberStringCache(Register object, Register result,
+ Register scratch1, Register scratch2,
+ Register scratch3, Label* not_found);
+
+
+ // Checks if both objects are sequential one-byte strings and jumps to label
+ // if either is not. Assumes that neither object is a smi.
+ void JumpIfNonSmisNotBothSequentialOneByteStrings(Register object1,
+ Register object2,
+ Register scratch1,
+ Register scratch2,
+ Label* failure);
+
+ // Checks if both objects are sequential one-byte strings and jumps to label
+ // if either is not.
+ void JumpIfNotBothSequentialOneByteStrings(Register first, Register second,
+ Register scratch1,
+ Register scratch2,
+ Label* not_flat_one_byte_strings);
+
+ // Checks if both instance types are sequential one-byte strings and jumps to
+ // label if either is not.
+ void JumpIfBothInstanceTypesAreNotSequentialOneByte(
+ Register first_object_instance_type, Register second_object_instance_type,
+ Register scratch1, Register scratch2, Label* failure);
+
+ // Check if instance type is sequential one-byte string and jump to label if
+ // it is not.
+ void JumpIfInstanceTypeIsNotSequentialOneByte(Register type, Register scratch,
+ Label* failure);
+
+ void JumpIfNotUniqueNameInstanceType(Register reg, Label* not_unique_name);
+
+ void EmitSeqStringSetCharCheck(Register string, Register index,
+ Register value, uint32_t encoding_mask);
+
+ // ---------------------------------------------------------------------------
+ // Patching helpers.
+
+ // Retrieve/patch the relocated value (lis/ori pair).
+ void GetRelocatedValue(Register location, Register result, Register scratch);
+ void SetRelocatedValue(Register location, Register scratch,
+ Register new_value);
+
+ void ClampUint8(Register output_reg, Register input_reg);
+
+ // Saturate a value into 8-bit unsigned integer
+ // if input_value < 0, output_value is 0
+ // if input_value > 255, output_value is 255
+ // otherwise output_value is the (int)input_value (round to nearest)
+ void ClampDoubleToUint8(Register result_reg, DoubleRegister input_reg,
+ DoubleRegister temp_double_reg);
+
+
+ void LoadInstanceDescriptors(Register map, Register descriptors);
+ void EnumLength(Register dst, Register map);
+ void NumberOfOwnDescriptors(Register dst, Register map);
+ void LoadAccessor(Register dst, Register holder, int accessor_index,
+ AccessorComponent accessor);
+
+ template<typename Field>
+ void DecodeField(Register dst, Register src) {
+ ExtractBitRange(dst, src, Field::kShift + Field::kSize - 1, Field::kShift);
+ }
+
+ template<typename Field>
+ void DecodeField(Register reg) {
+ DecodeField<Field>(reg, reg);
+ }
+
+ template<typename Field>
+ void DecodeFieldToSmi(Register dst, Register src) {
+ // TODO(joransiu): Optimize into single instruction
+ DecodeField<Field>(dst, src);
+ SmiTag(dst);
+ }
+
+ template <typename Field>
+ void DecodeFieldToSmi(Register reg) {
+ DecodeFieldToSmi<Field>(reg, reg);
+ }
+
+ // Activation support.
+ void EnterFrame(StackFrame::Type type,
+ bool load_constant_pool_pointer_reg = false);
+ // Returns the pc offset at which the frame ends.
+ int LeaveFrame(StackFrame::Type type, int stack_adjustment = 0);
+
+ // Expects object in r0 and returns map with validated enum cache
+ // in r0. Assumes that any other register can be used as a scratch.
+ void CheckEnumCache(Register null_value, Label* call_runtime);
+
+ // AllocationMemento support. Arrays may have an associated
+ // AllocationMemento object that can be checked for in order to pretransition
+ // to another type.
+ // On entry, receiver_reg should point to the array object.
+ // scratch_reg gets clobbered.
+ // If allocation info is present, condition flags are set to eq.
+ void TestJSArrayForAllocationMemento(Register receiver_reg,
+ Register scratch_reg,
+ Label* no_memento_found);
+
+ void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
+ Register scratch_reg,
+ Label* memento_found) {
+ Label no_memento_found;
+ TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
+ &no_memento_found);
+ beq(memento_found);
+ bind(&no_memento_found);
+ }
+
+ // Jumps to found label if a prototype map has dictionary elements.
+ void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
+ Register scratch1, Label* found);
+
+ private:
+ static const int kSmiShift = kSmiTagSize + kSmiShiftSize;
+
+ void CallCFunctionHelper(Register function, int num_reg_arguments,
+ int num_double_arguments);
+
+ void Jump(intptr_t target, RelocInfo::Mode rmode, Condition cond = al,
+ CRegister cr = cr7);
+
+ // Helper functions for generating invokes.
+ void InvokePrologue(const ParameterCount& expected,
+ const ParameterCount& actual, Handle<Code> code_constant,
+ Register code_reg, Label* done,
+ bool* definitely_mismatches, InvokeFlag flag,
+ const CallWrapper& call_wrapper);
+
+ void InitializeNewString(Register string, Register length,
+ Heap::RootListIndex map_index, Register scratch1,
+ Register scratch2);
+
+ // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
+ void InNewSpace(Register object, Register scratch,
+ Condition cond, // eq for new space, ne otherwise.
+ Label* branch);
+
+ // Helper for finding the mark bits for an address. Afterwards, the
+ // bitmap register points at the word with the mark bits and the mask
+ // the position of the first bit. Leaves addr_reg unchanged.
+ inline void GetMarkBits(Register addr_reg, Register bitmap_reg,
+ Register mask_reg);
+
+ // Compute memory operands for safepoint stack slots.
+ static int SafepointRegisterStackIndex(int reg_code);
+ MemOperand SafepointRegisterSlot(Register reg);
+ MemOperand SafepointRegistersAndDoublesSlot(Register reg);
+
+ bool generating_stub_;
+ bool has_frame_;
+ // This handle will be patched with the code object on installation.
+ Handle<Object> code_object_;
+
+ // Needs access to SafepointRegisterStackIndex for compiled frame
+ // traversal.
+ friend class StandardFrame;
+};
+
+
+// The code patcher is used to patch (typically) small parts of code e.g. for
+// debugging and other types of instrumentation. When using the code patcher
+// the exact number of bytes specified must be emitted. It is not legal to emit
+// relocation information. If any of these constraints are violated it causes
+// an assertion to fail.
+class CodePatcher {
+ public:
+ enum FlushICache { FLUSH, DONT_FLUSH };
+
+ CodePatcher(byte* address, int instructions, FlushICache flush_cache = FLUSH);
+ virtual ~CodePatcher();
+
+ // Macro assembler to emit code.
+ MacroAssembler* masm() { return &masm_; }
+
+ private:
+ byte* address_; // The address of the code being patched.
+ int size_; // Number of bytes of the expected patch size.
+ MacroAssembler masm_; // Macro assembler used to generate the code.
+ FlushICache flush_cache_; // Whether to flush the I cache after patching.
+};
+
+
+// -----------------------------------------------------------------------------
+// Static helper functions.
+
+inline MemOperand ContextOperand(Register context, int index) {
+ return MemOperand(context, Context::SlotOffset(index));
+}
+
+
+inline MemOperand GlobalObjectOperand() {
+ return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
+}
+
+
+#ifdef GENERATED_CODE_COVERAGE
+#define CODE_COVERAGE_STRINGIFY(x) #x
+#define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
+#define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
+#define ACCESS_MASM(masm) \
+ masm->stop(__FILE_LINE__); \
+ masm->
+#else
+#define ACCESS_MASM(masm) masm->
+#endif
+}
+} // namespace v8::internal
+
+#endif // V8_S390_MACRO_ASSEMBLER_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/regexp-macro-assembler-s390.cc
@@ -0,0 +1,1289 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/v8.h"
+
+#if V8_TARGET_ARCH_S390
+
+#include "src/base/bits.h"
+#include "src/code-stubs.h"
+#include "src/cpu-profiler.h"
+#include "src/log.h"
+#include "src/macro-assembler.h"
+#include "src/regexp-macro-assembler.h"
+#include "src/regexp-stack.h"
+#include "src/s390/regexp-macro-assembler-s390.h"
+#include "src/unicode.h"
+
+namespace v8 {
+namespace internal {
+
+#ifndef V8_INTERPRETED_REGEXP
+/*
+ * This assembler uses the following register assignment convention
+ * - r6: Temporarily stores the index of capture start after a matching pass
+ * for a global regexp.
+ * - r7: Pointer to current code object (Code*) including heap object tag.
+ * - r8: Current position in input, as negative offset from end of string.
+ * Please notice that this is the byte offset, not the character offset!
+ * - r9: Currently loaded character. Must be loaded using
+ * LoadCurrentCharacter before using any of the dispatch methods.
+ * - r13: Points to tip of backtrack stack
+ * - r10: End of input (points to byte after last character in input).
+ * - r11: Frame pointer. Used to access arguments, local variables and
+ * RegExp registers.
+ * - r12_p: IP register, used by assembler. Very volatile.
+ * - r15/sp : Points to tip of C stack.
+ *
+ * The remaining registers are free for computations.
+ * Each call to a public method should retain this convention.
+ *
+ * The stack will have the following structure:
+ * - fp[112] Isolate* isolate (address of the current isolate)
+ * - fp[108] secondary link/return address used by native call.
+ * - fp[104] direct_call (if 1, direct call from JavaScript code,
+ * if 0, call through the runtime system).
+ * - fp[100] stack_area_base (high end of the memory area to use as
+ * backtracking stack).
+ * - fp[96] capture array size (may fit multiple sets of matches)
+ * - fp[0..96] zLinux ABI register saving area
+ * --- sp when called ---
+ * --- frame pointer ----
+ * - fp[-4] direct_call (if 1, direct call from JavaScript code,
+ * if 0, call through the runtime system).
+ * - fp[-8] stack_area_base (high end of the memory area to use as
+ * backtracking stack).
+ * - fp[-12] capture array size (may fit multiple sets of matches)
+ * - fp[-16] int* capture_array (int[num_saved_registers_], for output).
+ * - fp[-20] end of input (address of end of string).
+ * - fp[-24] start of input (address of first character in string).
+ * - fp[-28] start index (character index of start).
+ * - fp[-32] void* input_string (location of a handle containing the string).
+ * - fp[-36] success counter (only for global regexps to count matches).
+ * - fp[-40] Offset of location before start of input (effectively character
+ * position -1). Used to initialize capture registers to a
+ * non-position.
+ * - fp[-44] At start (if 1, we are starting at the start of the
+ * string, otherwise 0)
+ * - fp[-48] register 0 (Only positions must be stored in the first
+ * - register 1 num_saved_registers_ registers)
+ * - ...
+ * - register num_registers-1
+ * --- sp ---
+ *
+ * The first num_saved_registers_ registers are initialized to point to
+ * "character -1" in the string (i.e., char_size() bytes before the first
+ * character of the string). The remaining registers start out as garbage.
+ *
+ * The data up to the return address must be placed there by the calling
+ * code and the remaining arguments are passed in registers, e.g. by calling the
+ * code entry as cast to a function with the signature:
+ * int (*match)(String* input_string,
+ * int start_index,
+ * Address start,
+ * Address end,
+ * int* capture_output_array,
+ * byte* stack_area_base,
+ * Address secondary_return_address, // Only used by native call.
+ * bool direct_call = false)
+ * The call is performed by NativeRegExpMacroAssembler::Execute()
+ * (in regexp-macro-assembler.cc) via the CALL_GENERATED_REGEXP_CODE macro
+ * in s390/simulator-s390.h.
+ * When calling as a non-direct call (i.e., from C++ code), the return address
+ * area is overwritten with the LR register by the RegExp code. When doing a
+ * direct call from generated code, the return address is placed there by
+ * the calling code, as in a normal exit frame.
+ */
+
+#define __ ACCESS_MASM(masm_)
+
+RegExpMacroAssemblerS390::RegExpMacroAssemblerS390(Isolate* isolate, Zone* zone,
+ Mode mode,
+ int registers_to_save)
+ : NativeRegExpMacroAssembler(isolate, zone),
+ masm_(new MacroAssembler(isolate, NULL, kRegExpCodeSize)),
+ mode_(mode),
+ num_registers_(registers_to_save),
+ num_saved_registers_(registers_to_save),
+ entry_label_(),
+ start_label_(),
+ success_label_(),
+ backtrack_label_(),
+ exit_label_(),
+ internal_failure_label_() {
+ DCHECK_EQ(0, registers_to_save % 2);
+
+ __ b(&entry_label_); // We'll write the entry code later.
+ // If the code gets too big or corrupted, an internal exception will be
+ // raised, and we will exit right away.
+ __ bind(&internal_failure_label_);
+ __ LoadImmP(r2, Operand(FAILURE));
+ __ Ret();
+ __ bind(&start_label_); // And then continue from here.
+}
+
+
+RegExpMacroAssemblerS390::~RegExpMacroAssemblerS390() {
+ delete masm_;
+ // Unuse labels in case we throw away the assembler without calling GetCode.
+ entry_label_.Unuse();
+ start_label_.Unuse();
+ success_label_.Unuse();
+ backtrack_label_.Unuse();
+ exit_label_.Unuse();
+ check_preempt_label_.Unuse();
+ stack_overflow_label_.Unuse();
+ internal_failure_label_.Unuse();
+}
+
+
+int RegExpMacroAssemblerS390::stack_limit_slack() {
+ return RegExpStack::kStackLimitSlack;
+}
+
+
+void RegExpMacroAssemblerS390::AdvanceCurrentPosition(int by) {
+ if (by != 0) {
+ __ AddP(current_input_offset(), Operand(by * char_size()));
+ }
+}
+
+
+void RegExpMacroAssemblerS390::AdvanceRegister(int reg, int by) {
+ DCHECK(reg >= 0);
+ DCHECK(reg < num_registers_);
+ if (by != 0) {
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) && is_int8(by)) {
+ __ AddMI(register_location(reg), Operand(by));
+ } else {
+ __ LoadP(r2, register_location(reg), r0);
+ __ mov(r0, Operand(by));
+ __ AddRR(r2, r0);
+ __ StoreP(r2, register_location(reg));
+ }
+ }
+}
+
+
+void RegExpMacroAssemblerS390::Backtrack() {
+ CheckPreemption();
+ // Pop Code* offset from backtrack stack, add Code* and jump to location.
+ Pop(r2);
+ __ AddP(r2, code_pointer());
+ __ b(r2);
+}
+
+
+void RegExpMacroAssemblerS390::Bind(Label* label) { __ bind(label); }
+
+
+void RegExpMacroAssemblerS390::CheckCharacter(uint32_t c, Label* on_equal) {
+ __ CmpLogicalP(current_character(), Operand(c));
+ BranchOrBacktrack(eq, on_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckCharacterGT(uc16 limit, Label* on_greater) {
+ __ CmpLogicalP(current_character(), Operand(limit));
+ BranchOrBacktrack(gt, on_greater);
+}
+
+
+void RegExpMacroAssemblerS390::CheckAtStart(Label* on_at_start) {
+ Label not_at_start;
+ // Did we start the match at the start of the string at all?
+ __ LoadP(r2, MemOperand(frame_pointer(), kStartIndex));
+ __ CmpP(r2, Operand::Zero());
+ BranchOrBacktrack(ne, ¬_at_start);
+
+ // If we did, are we still at the start of the input?
+ __ AddP(r2, current_input_offset(), end_of_input_address());
+ __ CmpP(r2, MemOperand(frame_pointer(), kInputStart));
+ BranchOrBacktrack(eq, on_at_start);
+ __ bind(¬_at_start);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotAtStart(Label* on_not_at_start) {
+ // Did we start the match at the start of the string at all?
+ __ LoadP(r2, MemOperand(frame_pointer(), kStartIndex));
+ __ CmpP(r2, Operand::Zero());
+ BranchOrBacktrack(ne, on_not_at_start);
+ // If we did, are we still at the start of the input?
+ __ AddP(r2, current_input_offset(), end_of_input_address());
+ __ CmpP(r2, MemOperand(frame_pointer(), kInputStart));
+ BranchOrBacktrack(ne, on_not_at_start);
+}
+
+
+void RegExpMacroAssemblerS390::CheckCharacterLT(uc16 limit, Label* on_less) {
+ __ CmpLogicalP(current_character(), Operand(limit));
+ BranchOrBacktrack(lt, on_less);
+}
+
+
+void RegExpMacroAssemblerS390::CheckGreedyLoop(Label* on_equal) {
+ Label backtrack_non_equal;
+ __ CmpP(current_input_offset(), MemOperand(backtrack_stackpointer(), 0));
+ __ bne(&backtrack_non_equal);
+ __ AddP(backtrack_stackpointer(), Operand(kPointerSize));
+
+ // __ CmpP(current_input_offset(), r2);
+ BranchOrBacktrack(al, on_equal);
+ __ bind(&backtrack_non_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotBackReferenceIgnoreCase(
+ int start_reg, Label* on_no_match) {
+ Label fallthrough;
+ __ LoadP(r2, register_location(start_reg)); // Index of start of
+ // capture
+ __ LoadP(r3, register_location(start_reg + 1)); // Index of end
+ __ SubP(r3, r3, r2);
+
+ // The length of a capture should not be negative. This can only happen
+ // if the end of the capture is unrecorded, or at a point earlier than
+ // the start of the capture.
+ BranchOrBacktrack(lt, on_no_match);
+
+ // If length is zero, either the capture is empty or it is not participating.
+ // In either case succeed immediately.
+ __ beq(&fallthrough);
+
+ // Check that there are enough characters left in the input.
+ __ AddP(r0, r3, current_input_offset());
+ BranchOrBacktrack(gt, on_no_match);
+
+ if (mode_ == LATIN1) {
+ Label success;
+ Label fail;
+ Label loop_check;
+
+ // r2 - offset of start of capture
+ // r3 - length of capture
+ __ AddP(r2, end_of_input_address());
+ __ AddP(r4, current_input_offset(), end_of_input_address());
+ // __ AddP(r3, r2);
+ __ mov(r1, Operand::Zero());
+
+ // r1 - Loop index
+ // r2 - Address of start of capture.
+ // r4 - Address of current input position.
+
+ Label loop;
+ __ bind(&loop);
+ __ LoadlB(r5, MemOperand(r2, r1));
+ __ LoadlB(r6, MemOperand(r4, r1));
+
+ __ CmpP(r6, r5);
+ __ beq(&loop_check);
+
+ // Mismatch, try case-insensitive match (converting letters to lower-case).
+ __ Or(r5, Operand(0x20)); // Convert capture character to lower-case.
+ __ Or(r6, Operand(0x20)); // Also convert input character.
+ __ CmpP(r6, r5);
+ __ bne(&fail);
+ __ SubP(r5, Operand('a'));
+ __ CmpLogicalP(r5, Operand('z' - 'a')); // Is r5 a lowercase letter?
+ __ ble(&loop_check); // In range 'a'-'z'.
+ // Latin-1: Check for values in range [224,254] but not 247.
+ __ SubP(r5, Operand(224 - 'a'));
+ __ CmpLogicalP(r5, Operand(254 - 224));
+ __ bgt(&fail); // Weren't Latin-1 letters.
+ __ CmpLogicalP(r5, Operand(247 - 224)); // Check for 247.
+ __ beq(&fail);
+
+ __ bind(&loop_check);
+ __ la(r1, MemOperand(r1, char_size()));
+ __ CmpP(r1, r3);
+ __ blt(&loop);
+ __ b(&success);
+
+ __ bind(&fail);
+ BranchOrBacktrack(al, on_no_match);
+
+ __ bind(&success);
+ // Compute new value of character position after the matched part.
+ __ SubP(current_input_offset(), r4, end_of_input_address());
+ __ AddP(current_input_offset(), r1);
+ } else {
+ DCHECK(mode_ == UC16);
+ int argument_count = 4;
+ __ PrepareCallCFunction(argument_count, r4);
+
+ // r2 - offset of start of capture
+ // r3 - length of capture
+
+ // Put arguments into arguments registers.
+ // Parameters are
+ // r2: Address byte_offset1 - Address captured substring's start.
+ // r3: Address byte_offset2 - Address of current character position.
+ // r4: size_t byte_length - length of capture in bytes(!)
+ // r5: Isolate* isolate
+
+ // Address of start of capture.
+ __ AddP(r2, end_of_input_address());
+ // Length of capture.
+ __ LoadRR(r4, r3);
+ // Save length in callee-save register for use on return.
+ __ LoadRR(r6, r3);
+ // Address of current input position.
+ __ AddP(r3, current_input_offset(), end_of_input_address());
+ // Isolate.
+ __ mov(r5, Operand(ExternalReference::isolate_address(isolate())));
+
+ {
+ AllowExternalCallThatCantCauseGC scope(masm_);
+ ExternalReference function =
+ ExternalReference::re_case_insensitive_compare_uc16(isolate());
+ __ CallCFunction(function, argument_count);
+ }
+
+ // Check if function returned non-zero for success or zero for failure.
+ __ CmpP(r2, Operand::Zero());
+ BranchOrBacktrack(eq, on_no_match);
+ // On success, increment position by length of capture.
+ __ AddP(current_input_offset(), r6);
+ }
+
+ __ bind(&fallthrough);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotBackReference(int start_reg,
+ Label* on_no_match) {
+ Label fallthrough;
+ Label success;
+
+ // Find length of back-referenced capture.
+ __ LoadP(r2, register_location(start_reg));
+ __ LoadP(r3, register_location(start_reg + 1));
+ __ SubP(r3, r3, r2); // Length to check.
+
+ // The length of a capture should not be negative. This can only happen
+ // if the end of the capture is unrecorded, or at a point earlier than
+ // the start of the capture.
+ BranchOrBacktrack(lt, on_no_match);
+
+ // Succeed on empty capture (including no capture).
+ __ beq(&fallthrough /*, cr0*/);
+
+ // Check that there are enough characters left in the input.
+ __ AddP(r0, r3, current_input_offset());
+ BranchOrBacktrack(gt, on_no_match, cr0);
+
+ // Compute pointers to match string and capture string
+ __ la(r2, MemOperand(r2, end_of_input_address()));
+ __ la(r4, MemOperand(current_input_offset(), end_of_input_address()));
+ __ mov(r1, Operand::Zero());
+ // __ AddP(r3, r2);
+
+ Label loop;
+ __ bind(&loop);
+ if (mode_ == LATIN1) {
+ __ LoadlB(r5, MemOperand(r2, r1));
+ __ LoadlB(r6, MemOperand(r4, r1));
+ } else {
+ DCHECK(mode_ == UC16);
+ __ LoadLogicalHalfWordP(r5, MemOperand(r2, r1));
+ __ LoadLogicalHalfWordP(r6, MemOperand(r4, r1));
+ }
+ __ la(r1, MemOperand(r1, char_size()));
+ __ CmpP(r5, r6);
+ BranchOrBacktrack(ne, on_no_match);
+ __ CmpP(r1, r3);
+ __ blt(&loop);
+
+ // Move current character position to position after match.
+ __ SubP(current_input_offset(), r4, end_of_input_address());
+ __ AddP(current_input_offset(), r1);
+ __ bind(&fallthrough);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotCharacter(unsigned c,
+ Label* on_not_equal) {
+ __ CmpLogicalP(current_character(), Operand(c));
+ BranchOrBacktrack(ne, on_not_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckCharacterAfterAnd(uint32_t c, uint32_t mask,
+ Label* on_equal) {
+ __ AndP(r2, current_character(), Operand(mask));
+ if (c != 0) {
+ __ CmpLogicalP(r2, Operand(c));
+ }
+ BranchOrBacktrack(eq, on_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotCharacterAfterAnd(unsigned c,
+ unsigned mask,
+ Label* on_not_equal) {
+ __ AndP(r2, current_character(), Operand(mask));
+ if (c != 0) {
+ __ CmpLogicalP(r2, Operand(c));
+ }
+ BranchOrBacktrack(ne, on_not_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckNotCharacterAfterMinusAnd(
+ uc16 c, uc16 minus, uc16 mask, Label* on_not_equal) {
+ DCHECK(minus < String::kMaxUtf16CodeUnit);
+ __ lay(r2, MemOperand(current_character(), -minus));
+ __ And(r2, Operand(mask));
+ if (c != 0) {
+ __ CmpLogicalP(r2, Operand(c));
+ }
+ BranchOrBacktrack(ne, on_not_equal);
+}
+
+
+void RegExpMacroAssemblerS390::CheckCharacterInRange(uc16 from, uc16 to,
+ Label* on_in_range) {
+ __ lay(r2, MemOperand(current_character(), -from));
+ __ CmpLogicalP(r2, Operand(to - from));
+ BranchOrBacktrack(le, on_in_range); // Unsigned lower-or-same condition.
+}
+
+
+void RegExpMacroAssemblerS390::CheckCharacterNotInRange(uc16 from, uc16 to,
+ Label* on_not_in_range) {
+ __ lay(r2, MemOperand(current_character(), -from));
+ __ CmpLogicalP(r2, Operand(to - from));
+ BranchOrBacktrack(gt, on_not_in_range); // Unsigned higher condition.
+}
+
+
+void RegExpMacroAssemblerS390::CheckBitInTable(Handle<ByteArray> table,
+ Label* on_bit_set) {
+ __ mov(r2, Operand(table));
+ Register index = current_character();
+ if (mode_ != LATIN1 || kTableMask != String::kMaxOneByteCharCode) {
+ __ AndP(r3, current_character(), Operand(kTableSize - 1));
+ index = r3;
+ }
+ __ LoadlB(r2, MemOperand(r2, index,
+ (ByteArray::kHeaderSize - kHeapObjectTag)));
+ __ CmpP(r2, Operand::Zero());
+ BranchOrBacktrack(ne, on_bit_set);
+}
+
+
+bool RegExpMacroAssemblerS390::CheckSpecialCharacterClass(uc16 type,
+ Label* on_no_match) {
+ // Range checks (c in min..max) are generally implemented by an unsigned
+ // (c - min) <= (max - min) check
+ switch (type) {
+ case 's':
+ // Match space-characters
+ if (mode_ == LATIN1) {
+ // One byte space characters are '\t'..'\r', ' ' and \u00a0.
+ Label success;
+ __ CmpP(current_character(), Operand(' '));
+ __ beq(&success);
+ // Check range 0x09..0x0d
+ __ SubP(r2, current_character(), Operand('\t'));
+ __ CmpLogicalP(r2, Operand('\r' - '\t'));
+ __ ble(&success);
+ // \u00a0 (NBSP).
+ __ CmpLogicalP(r2, Operand(0x00a0 - '\t'));
+ BranchOrBacktrack(ne, on_no_match);
+ __ bind(&success);
+ return true;
+ }
+ return false;
+ case 'S':
+ // The emitted code for generic character classes is good enough.
+ return false;
+ case 'd':
+ // Match ASCII digits ('0'..'9')
+ __ SubP(r2, current_character(), Operand('0'));
+ __ CmpLogicalP(r2, Operand('9' - '0'));
+ BranchOrBacktrack(gt, on_no_match);
+ return true;
+ case 'D':
+ // Match non ASCII-digits
+ __ SubP(r2, current_character(), Operand('0'));
+ __ CmpLogicalP(r2, Operand('9' - '0'));
+ BranchOrBacktrack(le, on_no_match);
+ return true;
+ case '.': {
+ // Match non-newlines (not 0x0a('\n'), 0x0d('\r'), 0x2028 and 0x2029)
+ __ XorP(r2, current_character(), Operand(0x01));
+ // See if current character is '\n'^1 or '\r'^1, i.e., 0x0b or 0x0c
+ __ SubP(r2, Operand(0x0b));
+ __ CmpLogicalP(r2, Operand(0x0c - 0x0b));
+ BranchOrBacktrack(le, on_no_match);
+ if (mode_ == UC16) {
+ // Compare original value to 0x2028 and 0x2029, using the already
+ // computed (current_char ^ 0x01 - 0x0b). I.e., check for
+ // 0x201d (0x2028 - 0x0b) or 0x201e.
+ __ SubP(r2, Operand(0x2028 - 0x0b));
+ __ CmpLogicalP(r2, Operand(1));
+ BranchOrBacktrack(le, on_no_match);
+ }
+ return true;
+ }
+ case 'n': {
+ // Match newlines (0x0a('\n'), 0x0d('\r'), 0x2028 and 0x2029)
+ __ XorP(r2, current_character(), Operand(0x01));
+ // See if current character is '\n'^1 or '\r'^1, i.e., 0x0b or 0x0c
+ __ SubP(r2, Operand(0x0b));
+ __ CmpLogicalP(r2, Operand(0x0c - 0x0b));
+ if (mode_ == LATIN1) {
+ BranchOrBacktrack(gt, on_no_match);
+ } else {
+ Label done;
+ __ ble(&done);
+ // Compare original value to 0x2028 and 0x2029, using the already
+ // computed (current_char ^ 0x01 - 0x0b). I.e., check for
+ // 0x201d (0x2028 - 0x0b) or 0x201e.
+ __ SubP(r2, Operand(0x2028 - 0x0b));
+ __ CmpLogicalP(r2, Operand(1));
+ BranchOrBacktrack(gt, on_no_match);
+ __ bind(&done);
+ }
+ return true;
+ }
+ case 'w': {
+ if (mode_ != LATIN1) {
+ // Table is 1256 entries, so all LATIN1 characters can be tested.
+ __ CmpP(current_character(), Operand('z'));
+ BranchOrBacktrack(gt, on_no_match);
+ }
+ ExternalReference map = ExternalReference::re_word_character_map();
+ __ mov(r2, Operand(map));
+// __ CmpLogicalByte(MemOperand(r2, current_character()), Operand::Zero());
+ __ LoadlB(r2, MemOperand(r2, current_character()));
+ __ CmpLogicalP(r2, Operand::Zero());
+ BranchOrBacktrack(eq, on_no_match);
+ return true;
+ }
+ case 'W': {
+ Label done;
+ if (mode_ != LATIN1) {
+ // Table is 256 entries, so all LATIN characters can be tested.
+ __ CmpLogicalP(current_character(), Operand('z'));
+ __ bgt(&done);
+ }
+ ExternalReference map = ExternalReference::re_word_character_map();
+ __ mov(r2, Operand(map));
+ __ LoadlB(r2, MemOperand(r2, current_character()));
+ __ CmpLogicalP(r2, Operand::Zero());
+ BranchOrBacktrack(ne, on_no_match);
+ if (mode_ != LATIN1) {
+ __ bind(&done);
+ }
+ return true;
+ }
+ case '*':
+ // Match any character.
+ return true;
+ // No custom implementation (yet): s(UC16), S(UC16).
+ default:
+ return false;
+ }
+}
+
+
+void RegExpMacroAssemblerS390::Fail() {
+ __ LoadImmP(r2, Operand(FAILURE));
+ __ b(&exit_label_);
+}
+
+
+Handle<HeapObject> RegExpMacroAssemblerS390::GetCode(Handle<String> source) {
+ Label return_r2;
+
+ if (masm_->has_exception()) {
+ // If the code gets corrupted due to long regular expressions and lack of
+ // space on trampolines, an internal exception flag is set. If this case
+ // is detected, we will jump into exit sequence right away.
+ __ bind_to(&entry_label_, internal_failure_label_.pos());
+ } else {
+ // Finalize code - write the entry point code now we know how many
+ // registers we need.
+
+ // Entry code:
+ __ bind(&entry_label_);
+
+ // Tell the system that we have a stack frame. Because the type
+ // is MANUAL, no is generated.
+ FrameScope scope(masm_, StackFrame::MANUAL);
+
+ // Ensure register assigments are consistent with callee save mask
+ DCHECK(r6.bit() & kRegExpCalleeSaved);
+ DCHECK(code_pointer().bit() & kRegExpCalleeSaved);
+ DCHECK(current_input_offset().bit() & kRegExpCalleeSaved);
+ DCHECK(current_character().bit() & kRegExpCalleeSaved);
+ DCHECK(backtrack_stackpointer().bit() & kRegExpCalleeSaved);
+ DCHECK(end_of_input_address().bit() & kRegExpCalleeSaved);
+ DCHECK(frame_pointer().bit() & kRegExpCalleeSaved);
+
+ // zLinux ABI
+ // Incoming parameters:
+ // r2: input_string
+ // r3: start_index
+ // r4: start addr
+ // r5: end addr
+ // r6: capture output arrray
+ // Requires us to save the callee-preserved registers r6-r13
+ // General convention is to also save r14 (return addr) and
+ // sp/r15 as well in a single STM/STMG
+ __ StoreMultipleP(r6, sp, MemOperand(sp, 6 * kPointerSize));
+
+ // Load stack parameters from caller stack frame
+ __ LoadMultipleP(r7, r9, MemOperand(sp,
+ kStackFrameExtraParamSlot * kPointerSize));
+ // r7 = capture array size
+ // r8 = stack area base
+ // r9 = direct call
+
+ // Actually emit code to start a new stack frame.
+ // Push arguments
+ // Save callee-save registers.
+ // Start new stack frame.
+ // Store link register in existing stack-cell.
+ // Order here should correspond to order of offset constants in header file.
+ //
+ // Set frame pointer in space for it if this is not a direct call
+ // from generated code.
+ __ LoadRR(frame_pointer(), sp);
+ __ lay(sp, MemOperand(sp, -10 * kPointerSize));
+ __ mov(r1, Operand::Zero()); // success counter
+ __ LoadRR(r0, r1); // offset of location
+ __ StoreMultipleP(r0, r9, MemOperand(sp, 0));
+
+ // Check if we have space on the stack for registers.
+ Label stack_limit_hit;
+ Label stack_ok;
+
+ ExternalReference stack_limit =
+ ExternalReference::address_of_stack_limit(isolate());
+ __ mov(r2, Operand(stack_limit));
+ __ LoadP(r2, MemOperand(r2));
+ __ SubP(r2, sp, r2);
+ // Handle it if the stack pointer is already below the stack limit.
+ __ ble(&stack_limit_hit);
+ // Check if there is room for the variable number of registers above
+ // the stack limit.
+ __ CmpLogicalP(r2, Operand(num_registers_ * kPointerSize));
+ __ bge(&stack_ok);
+ // Exit with OutOfMemory exception. There is not enough space on the stack
+ // for our working registers.
+ __ mov(r2, Operand(EXCEPTION));
+ __ b(&return_r2);
+
+ __ bind(&stack_limit_hit);
+ CallCheckStackGuardState(r2);
+ __ CmpP(r2, Operand::Zero());
+ // If returned value is non-zero, we exit with the returned value as result.
+ __ bne(&return_r2);
+
+ __ bind(&stack_ok);
+
+ // Allocate space on stack for registers.
+ __ lay(sp, MemOperand(sp, (-num_registers_ * kPointerSize)));
+ // Load string end.
+ __ LoadP(end_of_input_address(), MemOperand(frame_pointer(), kInputEnd));
+ // Load input start.
+ __ LoadP(r4, MemOperand(frame_pointer(), kInputStart));
+ // Find negative length (offset of start relative to end).
+ __ SubP(current_input_offset(), r4, end_of_input_address());
+ __ LoadP(r3, MemOperand(frame_pointer(), kStartIndex));
+ // Set r1 to address of char before start of the input string
+ // (effectively string position -1).
+ __ LoadRR(r1, r4);
+ __ SubP(r1, current_input_offset(), Operand(char_size()));
+ if (mode_ == UC16) {
+ __ ShiftLeftP(r0, r3, Operand(1));
+ __ SubP(r1, r1, r0);
+ } else {
+ __ SubP(r1, r1, r3);
+ }
+ // Store this value in a local variable, for use when clearing
+ // position registers.
+ __ StoreP(r1, MemOperand(frame_pointer(), kInputStartMinusOne));
+
+ // Initialize code pointer register
+ __ mov(code_pointer(), Operand(masm_->CodeObject()));
+
+ Label load_char_start_regexp, start_regexp;
+ // Load newline if index is at start, previous character otherwise.
+ __ CmpP(r3, Operand::Zero());
+ __ bne(&load_char_start_regexp);
+ __ mov(current_character(), Operand('\n'));
+ __ b(&start_regexp);
+
+ // Global regexp restarts matching here.
+ __ bind(&load_char_start_regexp);
+ // Load previous char as initial value of current character register.
+ LoadCurrentCharacterUnchecked(-1, 1);
+ __ bind(&start_regexp);
+
+ // Initialize on-stack registers.
+ if (num_saved_registers_ > 0) { // Always is, if generated from a regexp.
+ // Fill saved registers with initial value = start offset - 1
+ if (num_saved_registers_ > 8) {
+ // One slot beyond address of register 0.
+ __ lay(r3, MemOperand(frame_pointer(), kRegisterZero + kPointerSize));
+ __ lay(r4, MemOperand(r3, -num_saved_registers_ * kPointerSize));
+ __ InitializeFieldsWithFiller(r4, r3, r1);
+
+ /*
+ __ AddP(r3, frame_pointer(), Operand(kRegisterZero + kPointerSize));
+ __ LoadImmP(r4, Operand(num_saved_registers_));
+ Label init_loop;
+ __ bind(&init_loop);
+ __ StoreP(r1, MemOperand(r3, -kPointerSize));
+ __ lay(r3, MemOperand(r3, -kPointerSize));
+ __ BranchOnCount(r4, &init_loop);
+ */
+ } else {
+ for (int i = 0; i < num_saved_registers_; i++) {
+ __ StoreP(r1, register_location(i));
+ }
+ }
+ }
+
+ // Initialize backtrack stack pointer.
+ __ LoadP(backtrack_stackpointer(),
+ MemOperand(frame_pointer(), kStackHighEnd));
+
+ __ b(&start_label_);
+
+ // Exit code:
+ if (success_label_.is_linked()) {
+ // Save captures when successful.
+ __ bind(&success_label_);
+ if (num_saved_registers_ > 0) {
+ // copy captures to output
+ __ LoadP(r0, MemOperand(frame_pointer(), kInputStart));
+ __ LoadP(r2, MemOperand(frame_pointer(), kRegisterOutput));
+ __ LoadP(r4, MemOperand(frame_pointer(), kStartIndex));
+ __ SubP(r0, end_of_input_address(), r0);
+ // r0 is length of input in bytes.
+ if (mode_ == UC16) {
+ __ ShiftRightP(r0, r0, Operand(1));
+ }
+ // r0 is length of input in characters.
+ __ AddP(r0, r4);
+ // r0 is length of string in characters.
+
+ DCHECK_EQ(0, num_saved_registers_ % 2);
+ // Always an even number of capture registers. This allows us to
+ // unroll the loop once to add an operation between a load of a register
+ // and the following use of that register.
+ __ lay(r2, MemOperand(r2, num_saved_registers_ * kIntSize));
+ for (int i = 0; i < num_saved_registers_;) {
+ if (false && i < num_saved_registers_ - 4) {
+ // TODO(john): Can be optimized by SIMD instructions
+ __ LoadMultipleP(r3, r6, register_location(i + 3));
+ if (mode_ == UC16) {
+ __ ShiftRightArithP(r3, r3, Operand(1));
+ __ ShiftRightArithP(r4, r4, Operand(1));
+ __ ShiftRightArithP(r5, r5, Operand(1));
+ __ ShiftRightArithP(r6, r6, Operand(1));
+ }
+ __ AddP(r3, r0);
+ __ AddP(r4, r0);
+ __ AddP(r5, r0);
+ __ AddP(r6, r0);
+ __ StoreW(r3, MemOperand(r2,
+ -(num_saved_registers_ - i - 3) * kIntSize));
+ __ StoreW(r4, MemOperand(r2,
+ -(num_saved_registers_ - i - 2) * kIntSize));
+ __ StoreW(r5, MemOperand(r2,
+ -(num_saved_registers_ - i - 1) * kIntSize));
+ __ StoreW(r6, MemOperand(r2,
+ -(num_saved_registers_ - i) * kIntSize));
+ i += 4;
+ } else {
+ __ LoadMultipleP(r3, r4, register_location(i + 1));
+ if (mode_ == UC16) {
+ __ ShiftRightArithP(r3, r3, Operand(1));
+ __ ShiftRightArithP(r4, r4, Operand(1));
+ }
+ __ AddP(r3, r0);
+ __ AddP(r4, r0);
+ __ StoreW(r3, MemOperand(r2,
+ -(num_saved_registers_ - i - 1) * kIntSize));
+ __ StoreW(r4, MemOperand(r2,
+ -(num_saved_registers_ - i) * kIntSize));
+ i += 2;
+ }
+ }
+ if (global_with_zero_length_check()) {
+ // Keep capture start in r6 for the zero-length check later.
+ __ LoadP(r6, register_location(0));
+ }
+ }
+
+ if (global()) {
+ // Restart matching if the regular expression is flagged as global.
+ __ LoadP(r2, MemOperand(frame_pointer(), kSuccessfulCaptures));
+ __ LoadP(r3, MemOperand(frame_pointer(), kNumOutputRegisters));
+ __ LoadP(r4, MemOperand(frame_pointer(), kRegisterOutput));
+ // Increment success counter.
+ __ AddP(r2, Operand(1));
+ __ StoreP(r2, MemOperand(frame_pointer(), kSuccessfulCaptures));
+ // Capture results have been stored, so the number of remaining global
+ // output registers is reduced by the number of stored captures.
+ __ SubP(r3, Operand(num_saved_registers_));
+ // Check whether we have enough room for another set of capture results.
+ __ CmpP(r3, Operand(num_saved_registers_));
+ __ blt(&return_r2);
+
+ __ StoreP(r3, MemOperand(frame_pointer(), kNumOutputRegisters));
+ // Advance the location for output.
+ __ AddP(r4, Operand(num_saved_registers_ * kIntSize));
+ __ StoreP(r4, MemOperand(frame_pointer(), kRegisterOutput));
+
+ // Prepare r2 to initialize registers with its value in the next run.
+ __ LoadP(r2, MemOperand(frame_pointer(), kInputStartMinusOne));
+
+ if (global_with_zero_length_check()) {
+ // Special case for zero-length matches.
+ // r6: capture start index
+ __ CmpP(current_input_offset(), r6);
+ // Not a zero-length match, restart.
+ __ bne(&load_char_start_regexp);
+ // Offset from the end is zero if we already reached the end.
+ __ CmpP(current_input_offset(), Operand::Zero());
+ __ beq(&exit_label_);
+ // Advance current position after a zero-length match.
+ __ AddP(current_input_offset(), Operand((mode_ == UC16) ? 2 : 1));
+ }
+
+ __ b(&load_char_start_regexp);
+ } else {
+ __ LoadImmP(r2, Operand(SUCCESS));
+ }
+ }
+
+ // Exit and return r2
+ __ bind(&exit_label_);
+ if (global()) {
+ __ LoadP(r2, MemOperand(frame_pointer(), kSuccessfulCaptures));
+ }
+
+ __ bind(&return_r2);
+ // Skip sp past regexp registers and local variables..
+ __ LoadRR(sp, frame_pointer());
+ // Restore registers r6..r15.
+ __ LoadMultipleP(r6, sp, MemOperand(sp, 6 * kPointerSize));
+
+ __ b(r14);
+
+ // Backtrack code (branch target for conditional backtracks).
+ if (backtrack_label_.is_linked()) {
+ __ bind(&backtrack_label_);
+ Backtrack();
+ }
+
+ Label exit_with_exception;
+
+ // Preempt-code
+ if (check_preempt_label_.is_linked()) {
+ SafeCallTarget(&check_preempt_label_);
+
+ CallCheckStackGuardState(r2);
+ __ CmpP(r2, Operand::Zero());
+ // If returning non-zero, we should end execution with the given
+ // result as return value.
+ __ bne(&return_r2);
+
+ // String might have moved: Reload end of string from frame.
+ __ LoadP(end_of_input_address(), MemOperand(frame_pointer(), kInputEnd));
+ SafeReturn();
+ }
+
+ // Backtrack stack overflow code.
+ if (stack_overflow_label_.is_linked()) {
+ SafeCallTarget(&stack_overflow_label_);
+ // Reached if the backtrack-stack limit has been hit.
+ Label grow_failed;
+
+ // Call GrowStack(backtrack_stackpointer(), &stack_base)
+ static const int num_arguments = 3;
+ __ PrepareCallCFunction(num_arguments, r2);
+ __ LoadRR(r2, backtrack_stackpointer());
+ __ AddP(r3, frame_pointer(), Operand(kStackHighEnd));
+ __ mov(r4, Operand(ExternalReference::isolate_address(isolate())));
+ ExternalReference grow_stack =
+ ExternalReference::re_grow_stack(isolate());
+ __ CallCFunction(grow_stack, num_arguments);
+ // If return NULL, we have failed to grow the stack, and
+ // must exit with a stack-overflow exception.
+ __ CmpP(r2, Operand::Zero());
+ __ beq(&exit_with_exception);
+ // Otherwise use return value as new stack pointer.
+ __ LoadRR(backtrack_stackpointer(), r2);
+ // Restore saved registers and continue.
+ SafeReturn();
+ }
+
+ if (exit_with_exception.is_linked()) {
+ // If any of the code above needed to exit with an exception.
+ __ bind(&exit_with_exception);
+ // Exit with Result EXCEPTION(-1) to signal thrown exception.
+ __ LoadImmP(r2, Operand(EXCEPTION));
+ __ b(&return_r2);
+ }
+ }
+
+ CodeDesc code_desc;
+ masm_->GetCode(&code_desc);
+ Handle<Code> code = isolate()->factory()->NewCode(
+ code_desc, Code::ComputeFlags(Code::REGEXP), masm_->CodeObject());
+ PROFILE(masm_->isolate(), RegExpCodeCreateEvent(*code, *source));
+ return Handle<HeapObject>::cast(code);
+}
+
+
+void RegExpMacroAssemblerS390::GoTo(Label* to) { BranchOrBacktrack(al, to); }
+
+
+void RegExpMacroAssemblerS390::IfRegisterGE(int reg, int comparand,
+ Label* if_ge) {
+ __ LoadP(r2, register_location(reg), r0);
+ __ CmpP(r2, Operand(comparand));
+ BranchOrBacktrack(ge, if_ge);
+}
+
+
+void RegExpMacroAssemblerS390::IfRegisterLT(int reg, int comparand,
+ Label* if_lt) {
+ __ LoadP(r2, register_location(reg), r0);
+ __ CmpP(r2, Operand(comparand));
+ BranchOrBacktrack(lt, if_lt);
+}
+
+
+void RegExpMacroAssemblerS390::IfRegisterEqPos(int reg, Label* if_eq) {
+ __ LoadP(r2, register_location(reg), r0);
+ __ CmpP(r2, current_input_offset());
+ BranchOrBacktrack(eq, if_eq);
+}
+
+
+RegExpMacroAssembler::IrregexpImplementation
+RegExpMacroAssemblerS390::Implementation() {
+ return kS390Implementation;
+}
+
+
+void RegExpMacroAssemblerS390::LoadCurrentCharacter(int cp_offset,
+ Label* on_end_of_input,
+ bool check_bounds,
+ int characters) {
+ DCHECK(cp_offset >= -1); // ^ and \b can look behind one character.
+ DCHECK(cp_offset < (1 << 30)); // Be sane! (And ensure negation works)
+ if (check_bounds) {
+ CheckPosition(cp_offset + characters - 1, on_end_of_input);
+ }
+ LoadCurrentCharacterUnchecked(cp_offset, characters);
+}
+
+
+void RegExpMacroAssemblerS390::PopCurrentPosition() {
+ Pop(current_input_offset());
+}
+
+
+void RegExpMacroAssemblerS390::PopRegister(int register_index) {
+ Pop(r2);
+ __ StoreP(r2, register_location(register_index));
+}
+
+
+void RegExpMacroAssemblerS390::PushBacktrack(Label* label) {
+ if (label->is_bound()) {
+ int target = label->pos();
+ __ mov(r2, Operand(target + Code::kHeaderSize - kHeapObjectTag));
+ } else {
+ masm_->load_label_offset(r2, label);
+ }
+ Push(r2);
+ CheckStackLimit();
+}
+
+
+void RegExpMacroAssemblerS390::PushCurrentPosition() {
+ Push(current_input_offset());
+}
+
+
+void RegExpMacroAssemblerS390::PushRegister(int register_index,
+ StackCheckFlag check_stack_limit) {
+ __ LoadP(r2, register_location(register_index), r0);
+ Push(r2);
+ if (check_stack_limit) CheckStackLimit();
+}
+
+
+void RegExpMacroAssemblerS390::ReadCurrentPositionFromRegister(int reg) {
+ __ LoadP(current_input_offset(), register_location(reg), r0);
+}
+
+
+void RegExpMacroAssemblerS390::ReadStackPointerFromRegister(int reg) {
+ __ LoadP(backtrack_stackpointer(), register_location(reg), r0);
+ __ LoadP(r2, MemOperand(frame_pointer(), kStackHighEnd));
+ __ AddP(backtrack_stackpointer(), r2);
+}
+
+
+void RegExpMacroAssemblerS390::SetCurrentPositionFromEnd(int by) {
+ Label after_position;
+ __ CmpP(current_input_offset(), Operand(-by * char_size()));
+ __ bge(&after_position);
+ __ mov(current_input_offset(), Operand(-by * char_size()));
+ // On RegExp code entry (where this operation is used), the character before
+ // the current position is expected to be already loaded.
+ // We have advanced the position, so it's safe to read backwards.
+ LoadCurrentCharacterUnchecked(-1, 1);
+ __ bind(&after_position);
+}
+
+
+void RegExpMacroAssemblerS390::SetRegister(int register_index, int to) {
+ DCHECK(register_index >= num_saved_registers_); // Reserved for positions!
+ __ mov(r2, Operand(to));
+ __ StoreP(r2, register_location(register_index));
+}
+
+
+bool RegExpMacroAssemblerS390::Succeed() {
+ __ b(&success_label_);
+ return global();
+}
+
+
+void RegExpMacroAssemblerS390::WriteCurrentPositionToRegister(int reg,
+ int cp_offset) {
+ if (cp_offset == 0) {
+ __ StoreP(current_input_offset(), register_location(reg));
+ } else {
+ __ AddP(r2, current_input_offset(), Operand(cp_offset * char_size()));
+ __ StoreP(r2, register_location(reg));
+ }
+}
+
+
+void RegExpMacroAssemblerS390::ClearRegisters(int reg_from, int reg_to) {
+ DCHECK(reg_from <= reg_to);
+ __ LoadP(r2, MemOperand(frame_pointer(), kInputStartMinusOne));
+ for (int reg = reg_from; reg <= reg_to; reg++) {
+ __ StoreP(r2, register_location(reg));
+ }
+}
+
+
+void RegExpMacroAssemblerS390::WriteStackPointerToRegister(int reg) {
+ __ LoadP(r3, MemOperand(frame_pointer(), kStackHighEnd));
+ __ SubP(r2, backtrack_stackpointer(), r3);
+ __ StoreP(r2, register_location(reg));
+}
+
+
+// Private methods:
+
+void RegExpMacroAssemblerS390::CallCheckStackGuardState(Register scratch) {
+ static const int num_arguments = 3;
+ __ PrepareCallCFunction(num_arguments, scratch);
+ // RegExp code frame pointer.
+ __ LoadRR(r4, frame_pointer());
+ // Code* of self.
+ __ mov(r3, Operand(masm_->CodeObject()));
+ // r2 becomes return address pointer.
+ __ lay(r2, MemOperand(sp, kStackFrameRASlot * kPointerSize));
+ ExternalReference stack_guard_check =
+ ExternalReference::re_check_stack_guard_state(isolate());
+ CallCFunctionUsingStub(stack_guard_check, num_arguments);
+}
+
+
+// Helper function for reading a value out of a stack frame.
+template <typename T>
+static T& frame_entry(Address re_frame, int frame_offset) {
+ DCHECK(sizeof(T) == kPointerSize);
+#ifdef V8_TARGET_ARCH_S390X
+ return reinterpret_cast<T&>(Memory::uint64_at(re_frame + frame_offset));
+#else
+ return reinterpret_cast<T&>(Memory::uint32_at(re_frame + frame_offset));
+#endif
+}
+
+
+template <typename T>
+static T* frame_entry_address(Address re_frame, int frame_offset) {
+ return reinterpret_cast<T*>(re_frame + frame_offset);
+}
+
+
+int RegExpMacroAssemblerS390::CheckStackGuardState(Address* return_address,
+ Code* re_code,
+ Address re_frame) {
+ return NativeRegExpMacroAssembler::CheckStackGuardState(
+ frame_entry<Isolate*>(re_frame, kIsolate),
+ frame_entry<intptr_t>(re_frame, kStartIndex),
+ frame_entry<intptr_t>(re_frame, kDirectCall) == 1, return_address,
+ re_code, frame_entry_address<String*>(re_frame, kInputString),
+ frame_entry_address<const byte*>(re_frame, kInputStart),
+ frame_entry_address<const byte*>(re_frame, kInputEnd));
+}
+
+
+MemOperand RegExpMacroAssemblerS390::register_location(int register_index) {
+ DCHECK(register_index < (1 << 30));
+ if (num_registers_ <= register_index) {
+ num_registers_ = register_index + 1;
+ }
+ return MemOperand(frame_pointer(),
+ kRegisterZero - register_index * kPointerSize);
+}
+
+
+void RegExpMacroAssemblerS390::CheckPosition(int cp_offset,
+ Label* on_outside_input) {
+ __ CmpP(current_input_offset(), Operand(-cp_offset * char_size()));
+ BranchOrBacktrack(ge, on_outside_input);
+}
+
+
+void RegExpMacroAssemblerS390::BranchOrBacktrack(Condition condition, Label* to,
+ CRegister cr) {
+ if (condition == al) { // Unconditional.
+ if (to == NULL) {
+ Backtrack();
+ return;
+ }
+ __ b(to);
+ return;
+ }
+ if (to == NULL) {
+ __ b(condition, &backtrack_label_ /*, cr*/);
+ return;
+ }
+ __ b(condition, to /*, cr*/);
+}
+
+
+void RegExpMacroAssemblerS390::SafeCall(Label* to, Condition cond,
+ CRegister cr) {
+ Label skip;
+ __ b(NegateCondition(cond), &skip);
+ __ b(r14, to /*, cr*/ /*, SetLK*/);
+ __ bind(&skip);
+}
+
+
+void RegExpMacroAssemblerS390::SafeReturn() {
+ __ pop(r14);
+ __ mov(ip, Operand(masm_->CodeObject()));
+ __ AddP(r14, ip);
+ __ Ret();
+}
+
+
+void RegExpMacroAssemblerS390::SafeCallTarget(Label* name) {
+ __ bind(name);
+ __ CleanseP(r14);
+ __ LoadRR(r0, r14);
+ __ mov(ip, Operand(masm_->CodeObject()));
+ __ SubP(r0, r0, ip);
+ __ push(r0);
+}
+
+
+void RegExpMacroAssemblerS390::Push(Register source) {
+ DCHECK(!source.is(backtrack_stackpointer()));
+ __ lay(backtrack_stackpointer(),
+ MemOperand(backtrack_stackpointer(), -kPointerSize));
+ __ StoreP(source, MemOperand(backtrack_stackpointer()));
+}
+
+
+void RegExpMacroAssemblerS390::Pop(Register target) {
+ DCHECK(!target.is(backtrack_stackpointer()));
+ __ LoadP(target, MemOperand(backtrack_stackpointer()));
+ __ la(backtrack_stackpointer(),
+ MemOperand(backtrack_stackpointer(), kPointerSize));
+}
+
+
+void RegExpMacroAssemblerS390::CheckPreemption() {
+ // Check for preemption.
+ ExternalReference stack_limit =
+ ExternalReference::address_of_stack_limit(isolate());
+ __ mov(r2, Operand(stack_limit));
+ __ CmpLogicalP(sp, MemOperand(r2));
+ SafeCall(&check_preempt_label_, le);
+}
+
+
+void RegExpMacroAssemblerS390::CheckStackLimit() {
+ ExternalReference stack_limit =
+ ExternalReference::address_of_regexp_stack_limit(isolate());
+ __ mov(r2, Operand(stack_limit));
+ __ CmpLogicalP(backtrack_stackpointer(), MemOperand(r2));
+ SafeCall(&stack_overflow_label_, le);
+}
+
+
+void RegExpMacroAssemblerS390::CallCFunctionUsingStub(
+ ExternalReference function,
+ int num_arguments) {
+ // Must pass all arguments in registers. The stub pushes on the stack.
+ DCHECK(num_arguments <= 8);
+ __ mov(code_pointer(), Operand(function));
+ // RegExpCEntryStub stub;
+ // __ lay(sp, MemOperand(sp, -kCalleeRegisterSaveAreaSize));
+ Label ret;
+ __ larl(r14, &ret);
+ __ StoreP(r14, MemOperand(sp, kStackFrameRASlot * kPointerSize));
+ __ b(code_pointer());
+ __ bind(&ret);
+ // __ CallStub(&stub);
+ // __ Call(code_pointer());
+ // __ la(sp, MemOperand(sp, kCalleeRegisterSaveAreaSize));
+ if (base::OS::ActivationFrameAlignment() > kPointerSize) {
+ __ LoadP(sp, MemOperand(sp, (kNumRequiredStackFrameSlots * kPointerSize)));
+ } else {
+ __ la(sp, MemOperand(sp, (kNumRequiredStackFrameSlots * kPointerSize)));
+ }
+ __ mov(code_pointer(), Operand(masm_->CodeObject()));
+}
+
+
+bool RegExpMacroAssemblerS390::CanReadUnaligned() {
+ return CpuFeatures::IsSupported(UNALIGNED_ACCESSES) && !slow_safe();
+}
+
+
+void RegExpMacroAssemblerS390::LoadCurrentCharacterUnchecked(int cp_offset,
+ int characters) {
+ DCHECK(characters == 1);
+ if (mode_ == LATIN1) {
+ __ LoadlB(current_character(), MemOperand(current_input_offset(),
+ end_of_input_address(), cp_offset * char_size()));
+ } else {
+ DCHECK(mode_ == UC16);
+ __ LoadLogicalHalfWordP(current_character(), MemOperand(
+ current_input_offset(), end_of_input_address(), cp_offset * char_size()));
+ }
+}
+
+#undef __
+
+#endif // V8_INTERPRETED_REGEXP
+} // namespace internal
+} // namespace v8
+
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/regexp-macro-assembler-s390.h
@@ -0,0 +1,221 @@
+// Copyright 2014 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_S390_REGEXP_MACRO_ASSEMBLER_S390_H_
+#define V8_S390_REGEXP_MACRO_ASSEMBLER_S390_H_
+
+#include "src/macro-assembler.h"
+#include "src/s390/assembler-s390.h"
+#include "src/s390/assembler-s390-inl.h"
+
+namespace v8 {
+namespace internal {
+
+
+#ifndef V8_INTERPRETED_REGEXP
+class RegExpMacroAssemblerS390 : public NativeRegExpMacroAssembler {
+ public:
+ RegExpMacroAssemblerS390(Isolate* isolate, Zone* zone, Mode mode,
+ int registers_to_save);
+ virtual ~RegExpMacroAssemblerS390();
+ virtual int stack_limit_slack();
+ virtual void AdvanceCurrentPosition(int by);
+ virtual void AdvanceRegister(int reg, int by);
+ virtual void Backtrack();
+ virtual void Bind(Label* label);
+ virtual void CheckAtStart(Label* on_at_start);
+ virtual void CheckCharacter(unsigned c, Label* on_equal);
+ virtual void CheckCharacterAfterAnd(unsigned c, unsigned mask,
+ Label* on_equal);
+ virtual void CheckCharacterGT(uc16 limit, Label* on_greater);
+ virtual void CheckCharacterLT(uc16 limit, Label* on_less);
+ // A "greedy loop" is a loop that is both greedy and with a simple
+ // body. It has a particularly simple implementation.
+ virtual void CheckGreedyLoop(Label* on_tos_equals_current_position);
+ virtual void CheckNotAtStart(Label* on_not_at_start);
+ virtual void CheckNotBackReference(int start_reg, Label* on_no_match);
+ virtual void CheckNotBackReferenceIgnoreCase(int start_reg,
+ Label* on_no_match);
+ virtual void CheckNotCharacter(unsigned c, Label* on_not_equal);
+ virtual void CheckNotCharacterAfterAnd(unsigned c, unsigned mask,
+ Label* on_not_equal);
+ virtual void CheckNotCharacterAfterMinusAnd(uc16 c, uc16 minus, uc16 mask,
+ Label* on_not_equal);
+ virtual void CheckCharacterInRange(uc16 from, uc16 to, Label* on_in_range);
+ virtual void CheckCharacterNotInRange(uc16 from, uc16 to,
+ Label* on_not_in_range);
+ virtual void CheckBitInTable(Handle<ByteArray> table, Label* on_bit_set);
+
+ // Checks whether the given offset from the current position is before
+ // the end of the string.
+ virtual void CheckPosition(int cp_offset, Label* on_outside_input);
+ virtual bool CheckSpecialCharacterClass(uc16 type, Label* on_no_match);
+ virtual void Fail();
+ virtual Handle<HeapObject> GetCode(Handle<String> source);
+ virtual void GoTo(Label* label);
+ virtual void IfRegisterGE(int reg, int comparand, Label* if_ge);
+ virtual void IfRegisterLT(int reg, int comparand, Label* if_lt);
+ virtual void IfRegisterEqPos(int reg, Label* if_eq);
+ virtual IrregexpImplementation Implementation();
+ virtual void LoadCurrentCharacter(int cp_offset, Label* on_end_of_input,
+ bool check_bounds = true,
+ int characters = 1);
+ virtual void PopCurrentPosition();
+ virtual void PopRegister(int register_index);
+ virtual void PushBacktrack(Label* label);
+ virtual void PushCurrentPosition();
+ virtual void PushRegister(int register_index,
+ StackCheckFlag check_stack_limit);
+ virtual void ReadCurrentPositionFromRegister(int reg);
+ virtual void ReadStackPointerFromRegister(int reg);
+ virtual void SetCurrentPositionFromEnd(int by);
+ virtual void SetRegister(int register_index, int to);
+ virtual bool Succeed();
+ virtual void WriteCurrentPositionToRegister(int reg, int cp_offset);
+ virtual void ClearRegisters(int reg_from, int reg_to);
+ virtual void WriteStackPointerToRegister(int reg);
+ virtual bool CanReadUnaligned();
+
+ // Called from RegExp if the stack-guard is triggered.
+ // If the code object is relocated, the return address is fixed before
+ // returning.
+ static int CheckStackGuardState(Address* return_address, Code* re_code,
+ Address re_frame);
+
+ private:
+ // Offsets from frame_pointer() of function parameters and stored registers.
+ static const int kFramePointer = 0;
+
+ // Above the frame pointer - Stored registers and stack passed parameters.
+ // Register 6-15(sp)
+ static const int kStoredRegisters = kFramePointer;
+ // Return address (stored from link register, read into pc on return).
+ // static const int kReturnAddress = kStoredRegisters + 7 * kPointerSize;
+ // FIXME: broken in 64 bit
+ static const int kCallerFrame = kStoredRegisters +
+ kCalleeRegisterSaveAreaSize;
+ // Stack parameters placed by caller.
+ static const int kCaptureArraySize = kCallerFrame;
+ static const int kStackAreaBase = kCallerFrame + kPointerSize;
+ // kDirectCall again
+ static const int kSecondaryReturnAddress = kStackAreaBase + 2 * kPointerSize;
+ static const int kIsolate = kSecondaryReturnAddress + kPointerSize;
+
+ // Below the frame pointer.
+ // Register parameters stored by setup code.
+ static const int kDirectCall = kFramePointer - kPointerSize;
+ static const int kStackHighEnd = kDirectCall - kPointerSize;
+ static const int kNumOutputRegisters = kStackHighEnd - kPointerSize;
+ static const int kRegisterOutput = kNumOutputRegisters - kPointerSize;
+ static const int kInputEnd = kRegisterOutput - kPointerSize;
+ static const int kInputStart = kInputEnd - kPointerSize;
+ static const int kStartIndex = kInputStart - kPointerSize;
+ static const int kInputString = kStartIndex - kPointerSize;
+ // When adding local variables remember to push space for them in
+ // the frame in GetCode.
+ static const int kSuccessfulCaptures = kInputString - kPointerSize;
+ static const int kInputStartMinusOne = kSuccessfulCaptures - kPointerSize;
+ // First register address. Following registers are below it on the stack.
+ static const int kRegisterZero = kInputStartMinusOne - kPointerSize;
+
+ // Initial size of code buffer.
+ static const size_t kRegExpCodeSize = 1024;
+
+ // Load a number of characters at the given offset from the
+ // current position, into the current-character register.
+ void LoadCurrentCharacterUnchecked(int cp_offset, int character_count);
+
+ // Check whether preemption has been requested.
+ void CheckPreemption();
+
+ // Check whether we are exceeding the stack limit on the backtrack stack.
+ void CheckStackLimit();
+ void CallCFunctionUsingStub(ExternalReference function, int num_arguments);
+
+
+ // Generate a call to CheckStackGuardState.
+ void CallCheckStackGuardState(Register scratch);
+
+ // The ebp-relative location of a regexp register.
+ MemOperand register_location(int register_index);
+
+ // Register holding the current input position as negative offset from
+ // the end of the string.
+ inline Register current_input_offset() { return r8; }
+
+ // The register containing the current character after LoadCurrentCharacter.
+ inline Register current_character() { return r9; }
+
+ // Register holding address of the end of the input string.
+ inline Register end_of_input_address() { return r10; }
+
+ // Register holding the frame address. Local variables, parameters and
+ // regexp registers are addressed relative to this.
+ inline Register frame_pointer() { return fp; }
+
+ // The register containing the backtrack stack top. Provides a meaningful
+ // name to the register.
+ inline Register backtrack_stackpointer() { return r13; }
+
+ // Register holding pointer to the current code object.
+ inline Register code_pointer() { return r7; }
+
+ // Byte size of chars in the string to match (decided by the Mode argument)
+ inline int char_size() { return static_cast<int>(mode_); }
+
+ // Equivalent to a conditional branch to the label, unless the label
+ // is NULL, in which case it is a conditional Backtrack.
+ void BranchOrBacktrack(Condition condition, Label* to, CRegister cr = cr7);
+
+ // Call and return internally in the generated code in a way that
+ // is GC-safe (i.e., doesn't leave absolute code addresses on the stack)
+ inline void SafeCall(Label* to, Condition cond = al, CRegister cr = cr7);
+ inline void SafeReturn();
+ inline void SafeCallTarget(Label* name);
+
+ // Pushes the value of a register on the backtrack stack. Decrements the
+ // stack pointer by a word size and stores the register's value there.
+ inline void Push(Register source);
+
+ // Pops a value from the backtrack stack. Reads the word at the stack pointer
+ // and increments it by a word size.
+ inline void Pop(Register target);
+
+ Isolate* isolate() const { return masm_->isolate(); }
+
+ MacroAssembler* masm_;
+
+ // Which mode to generate code for (Latin1 or UC16).
+ Mode mode_;
+
+ // One greater than maximal register index actually used.
+ int num_registers_;
+
+ // Number of registers to output at the end (the saved registers
+ // are always 0..num_saved_registers_-1)
+ int num_saved_registers_;
+
+ // Labels used internally.
+ Label entry_label_;
+ Label start_label_;
+ Label success_label_;
+ Label backtrack_label_;
+ Label exit_label_;
+ Label check_preempt_label_;
+ Label stack_overflow_label_;
+ Label internal_failure_label_;
+};
+
+// Set of non-volatile registers saved/restored by generated regexp code.
+const RegList kRegExpCalleeSaved =
+ 1 << 6 | 1 << 7 | 1 << 8 | 1 << 9 | 1 << 10 | 1 << 11 | 1 << 13;
+
+#endif // V8_INTERPRETED_REGEXP
+}
+} // namespace v8::internal
+
+#endif // V8_S390_REGEXP_MACRO_ASSEMBLER_S390_H_
--- /dev/null
+++ b/deps/v8/src/s390/simulator-s390.cc
@@ -0,0 +1,4694 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include <stdarg.h>
+#include <stdlib.h>
+#include <cmath>
+#include "src/v8.h"
+#if V8_TARGET_ARCH_S390
+
+#include "src/assembler.h"
+#include "src/base/bits.h"
+#include "src/codegen.h"
+#include "src/disasm.h"
+#include "src/s390/constants-s390.h"
+#include "src/s390/frames-s390.h"
+#include "src/s390/simulator-s390.h"
+#if defined(USE_SIMULATOR)
+
+// Only build the simulator if not compiling for real s390 hardware.
+namespace v8 {
+namespace internal {
+
+// This macro provides a platform independent use of sscanf. The reason for
+// SScanF not being implemented in a platform independent way through
+// ::v8::internal::OS in the same way as SNPrintF is that the
+// Windows C Run-Time Library does not provide vsscanf.
+#define SScanF sscanf // NOLINT
+
+// The S390Debugger class is used by the simulator while debugging simulated
+// PowerPC code.
+class S390Debugger {
+ public:
+ explicit S390Debugger(Simulator* sim) : sim_(sim) {}
+ ~S390Debugger();
+
+ void Stop(Instruction* instr);
+ void Debug();
+
+ private:
+#if V8_TARGET_LITTLE_ENDIAN
+ static const Instr kBreakpointInstr = (0x0000FFB2); // TRAP4 0000
+ static const Instr kNopInstr = (0x00160016); // OR r0, r0 x2
+#else
+ static const Instr kBreakpointInstr = (0xB2FF0000); // TRAP4 0000
+ static const Instr kNopInstr = (0x16001600); // OR r0, r0 x2
+#endif
+
+ Simulator* sim_;
+
+ intptr_t GetRegisterValue(int regnum);
+ double GetRegisterPairDoubleValue(int regnum);
+ double GetFPDoubleRegisterValue(int regnum);
+ float GetFPFloatRegisterValue(int regnum);
+ bool GetValue(const char* desc, intptr_t* value);
+ bool GetFPDoubleValue(const char* desc, double* value);
+
+ // Set or delete a breakpoint. Returns true if successful.
+ bool SetBreakpoint(Instruction* break_pc);
+ bool DeleteBreakpoint(Instruction* break_pc);
+
+ // Undo and redo all breakpoints. This is needed to bracket disassembly and
+ // execution to skip past breakpoints when run from the debugger.
+ void UndoBreakpoints();
+ void RedoBreakpoints();
+};
+
+
+S390Debugger::~S390Debugger() {}
+
+
+#ifdef GENERATED_CODE_COVERAGE
+static FILE* coverage_log = NULL;
+
+
+static void InitializeCoverage() {
+ char* file_name = getenv("V8_GENERATED_CODE_COVERAGE_LOG");
+ if (file_name != NULL) {
+ coverage_log = fopen(file_name, "aw+");
+ }
+}
+
+
+void S390Debugger::Stop(Instruction* instr) {
+ // Get the stop code.
+ uint32_t code = instr->SvcValue() & kStopCodeMask;
+ // Retrieve the encoded address, which comes just after this stop.
+ char** msg_address =
+ reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
+ char* msg = *msg_address;
+ DCHECK(msg != NULL);
+
+ // Update this stop description.
+ if (isWatchedStop(code) && !watched_stops_[code].desc) {
+ watched_stops_[code].desc = msg;
+ }
+
+ if (strlen(msg) > 0) {
+ if (coverage_log != NULL) {
+ fprintf(coverage_log, "%s\n", msg);
+ fflush(coverage_log);
+ }
+ // Overwrite the instruction and address with nops.
+ instr->SetInstructionBits(kNopInstr);
+ reinterpret_cast<Instruction*>(msg_address)->SetInstructionBits(kNopInstr);
+ }
+ sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
+}
+
+
+#else // ndef GENERATED_CODE_COVERAGE
+
+static void InitializeCoverage() {}
+
+
+void S390Debugger::Stop(Instruction* instr) {
+ // Get the stop code.
+ // use of kStopCodeMask not right on PowerPC
+ uint32_t code = instr->SvcValue() & kStopCodeMask;
+ // Retrieve the encoded address, which comes just after this stop.
+ char* msg =
+ *reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
+ // Update this stop description.
+ if (sim_->isWatchedStop(code) && !sim_->watched_stops_[code].desc) {
+ sim_->watched_stops_[code].desc = msg;
+ }
+ // Print the stop message and code if it is not the default code.
+ if (code != kMaxStopCode) {
+ PrintF("Simulator hit stop %u: %s\n", code, msg);
+ } else {
+ PrintF("Simulator hit %s\n", msg);
+ }
+ sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
+ Debug();
+}
+#endif
+
+
+intptr_t S390Debugger::GetRegisterValue(int regnum) {
+ return sim_->get_register(regnum);
+}
+
+
+double S390Debugger::GetRegisterPairDoubleValue(int regnum) {
+ return sim_->get_double_from_register_pair(regnum);
+}
+
+
+double S390Debugger::GetFPDoubleRegisterValue(int regnum) {
+ return sim_->get_double_from_d_register(regnum);
+}
+
+
+float S390Debugger::GetFPFloatRegisterValue(int regnum) {
+ return sim_->get_float_from_d_register(regnum);
+}
+
+
+bool S390Debugger::GetValue(const char* desc, intptr_t* value) {
+ int regnum = Registers::Number(desc);
+ if (regnum != kNoRegister) {
+ *value = GetRegisterValue(regnum);
+ return true;
+ } else {
+ if (strncmp(desc, "0x", 2) == 0) {
+ return SScanF(desc + 2, "%" V8PRIxPTR,
+ reinterpret_cast<uintptr_t*>(value)) == 1;
+ } else {
+ return SScanF(desc, "%" V8PRIuPTR,
+ reinterpret_cast<uintptr_t*>(value)) == 1;
+ }
+ }
+ return false;
+}
+
+
+bool S390Debugger::GetFPDoubleValue(const char* desc, double* value) {
+ int regnum = FPRegisters::Number(desc);
+ if (regnum != kNoRegister) {
+ *value = sim_->get_double_from_d_register(regnum);
+ return true;
+ }
+ return false;
+}
+
+
+bool S390Debugger::SetBreakpoint(Instruction* break_pc) {
+ // Check if a breakpoint can be set. If not return without any side-effects.
+ if (sim_->break_pc_ != NULL) {
+ return false;
+ }
+
+ // Set the breakpoint.
+ sim_->break_pc_ = break_pc;
+ sim_->break_instr_ = break_pc->InstructionBits();
+ // Not setting the breakpoint instruction in the code itself. It will be set
+ // when the debugger shell continues.
+ return true;
+}
+
+
+bool S390Debugger::DeleteBreakpoint(Instruction* break_pc) {
+ if (sim_->break_pc_ != NULL) {
+ sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
+ }
+
+ sim_->break_pc_ = NULL;
+ sim_->break_instr_ = 0;
+ return true;
+}
+
+
+void S390Debugger::UndoBreakpoints() {
+ if (sim_->break_pc_ != NULL) {
+ sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
+ }
+}
+
+
+void S390Debugger::RedoBreakpoints() {
+ if (sim_->break_pc_ != NULL) {
+ sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
+ }
+}
+
+
+void S390Debugger::Debug() {
+ intptr_t last_pc = -1;
+ bool done = false;
+
+#define COMMAND_SIZE 63
+#define ARG_SIZE 255
+
+#define STR(a) #a
+#define XSTR(a) STR(a)
+
+ char cmd[COMMAND_SIZE + 1];
+ char arg1[ARG_SIZE + 1];
+ char arg2[ARG_SIZE + 1];
+ char* argv[3] = {cmd, arg1, arg2};
+
+ // make sure to have a proper terminating character if reaching the limit
+ cmd[COMMAND_SIZE] = 0;
+ arg1[ARG_SIZE] = 0;
+ arg2[ARG_SIZE] = 0;
+
+ // Undo all set breakpoints while running in the debugger shell. This will
+ // make them invisible to all commands.
+ UndoBreakpoints();
+ // Disable tracing while simulating
+ bool trace = ::v8::internal::FLAG_trace_sim;
+ ::v8::internal::FLAG_trace_sim = false;
+
+ while (!done && !sim_->has_bad_pc()) {
+ if (last_pc != sim_->get_pc()) {
+ disasm::NameConverter converter;
+ disasm::Disassembler dasm(converter);
+ // use a reasonably large buffer
+ v8::internal::EmbeddedVector<char, 256> buffer;
+ dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(sim_->get_pc()));
+ PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(), buffer.start());
+ last_pc = sim_->get_pc();
+ }
+ char* line = ReadLine("sim> ");
+ if (line == NULL) {
+ break;
+ } else {
+ char* last_input = sim_->last_debugger_input();
+ if (strcmp(line, "\n") == 0 && last_input != NULL) {
+ line = last_input;
+ } else {
+ // Ownership is transferred to sim_;
+ sim_->set_last_debugger_input(line);
+ }
+ // Use sscanf to parse the individual parts of the command line. At the
+ // moment no command expects more than two parameters.
+ int argc = SScanF(line,
+ "%" XSTR(COMMAND_SIZE) "s "
+ "%" XSTR(ARG_SIZE) "s "
+ "%" XSTR(ARG_SIZE) "s",
+ cmd, arg1, arg2);
+ if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
+ intptr_t value;
+
+ // If at a breakpoint, proceed past it.
+ if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
+ ->InstructionBits() == 0x7d821008) {
+ sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
+ } else {
+ sim_->ExecuteInstruction(
+ reinterpret_cast<Instruction*>(sim_->get_pc()));
+ }
+
+ if (argc == 2 && last_pc != sim_->get_pc() && GetValue(arg1, &value)) {
+ for (int i = 1; (!sim_->has_bad_pc()) && i < value; i++) {
+ disasm::NameConverter converter;
+ disasm::Disassembler dasm(converter);
+ // use a reasonably large buffer
+ v8::internal::EmbeddedVector<char, 256> buffer;
+ dasm.InstructionDecode(buffer,
+ reinterpret_cast<byte*>(sim_->get_pc()));
+ PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(),
+ buffer.start());
+ sim_->ExecuteInstruction(
+ reinterpret_cast<Instruction*>(sim_->get_pc()));
+ }
+ }
+ } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
+ // If at a breakpoint, proceed past it.
+ if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
+ ->InstructionBits() == 0x7d821008) {
+ sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
+ } else {
+ // Execute the one instruction we broke at with breakpoints disabled.
+ sim_->ExecuteInstruction(
+ reinterpret_cast<Instruction*>(sim_->get_pc()));
+ }
+ // Leave the debugger shell.
+ done = true;
+ } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
+ if (argc == 2 || (argc == 3 && strcmp(arg2, "fp") == 0)) {
+ intptr_t value;
+ double dvalue;
+ if (strcmp(arg1, "all") == 0) {
+ for (int i = 0; i < kNumRegisters; i++) {
+ value = GetRegisterValue(i);
+ PrintF(" %3s: %08" V8PRIxPTR, Registers::Name(i), value);
+ if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
+ (i % 2) == 0) {
+ dvalue = GetRegisterPairDoubleValue(i);
+ PrintF(" (%f)\n", dvalue);
+ } else if (i != 0 && !((i + 1) & 3)) {
+ PrintF("\n");
+ }
+ }
+ PrintF(" pc: %08" V8PRIxPTR " cr: %08x\n",
+ sim_->special_reg_pc_, sim_->condition_reg_);
+ } else if (strcmp(arg1, "alld") == 0) {
+ for (int i = 0; i < kNumRegisters; i++) {
+ value = GetRegisterValue(i);
+ PrintF(" %3s: %08" V8PRIxPTR " %11" V8PRIdPTR,
+ Registers::Name(i), value, value);
+ if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
+ (i % 2) == 0) {
+ dvalue = GetRegisterPairDoubleValue(i);
+ PrintF(" (%f)\n", dvalue);
+ } else if (!((i + 1) % 2)) {
+ PrintF("\n");
+ }
+ }
+ PrintF(" pc: %08" V8PRIxPTR " cr: %08x\n",
+ sim_->special_reg_pc_, sim_->condition_reg_);
+ } else if (strcmp(arg1, "allf") == 0) {
+ for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
+ float fvalue = GetFPFloatRegisterValue(i);
+ uint32_t as_words = bit_cast<uint32_t>(fvalue);
+ PrintF("%3s: %f 0x%08x\n", FPRegisters::Name(i), fvalue,
+ as_words);
+ }
+ } else if (strcmp(arg1, "alld") == 0) {
+ for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
+ dvalue = GetFPDoubleRegisterValue(i);
+ uint64_t as_words = bit_cast<uint64_t>(dvalue);
+ PrintF("%3s: %f 0x%08x %08x\n", FPRegisters::Name(i), dvalue,
+ static_cast<uint32_t>(as_words >> 32),
+ static_cast<uint32_t>(as_words & 0xffffffff));
+ }
+ } else if (arg1[0] == 'r' &&
+ (arg1[1] >= '0' && arg1[1] <= '2' &&
+ (arg1[2] == '\0' || (arg1[2] >= '0' && arg1[2] <= '5' &&
+ arg1[3] == '\0')))) {
+ int regnum = strtoul(&arg1[1], 0, 10);
+ if (regnum != kNoRegister) {
+ value = GetRegisterValue(regnum);
+ PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
+ value);
+ } else {
+ PrintF("%s unrecognized\n", arg1);
+ }
+ } else {
+ if (GetValue(arg1, &value)) {
+ PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
+ value);
+ } else if (GetFPDoubleValue(arg1, &dvalue)) {
+ uint64_t as_words = bit_cast<uint64_t>(dvalue);
+ PrintF("%s: %f 0x%08x %08x\n", arg1, dvalue,
+ static_cast<uint32_t>(as_words >> 32),
+ static_cast<uint32_t>(as_words & 0xffffffff));
+ } else {
+ PrintF("%s unrecognized\n", arg1);
+ }
+ }
+ } else {
+ PrintF("print <register>\n");
+ }
+ } else if ((strcmp(cmd, "po") == 0) ||
+ (strcmp(cmd, "printobject") == 0)) {
+ if (argc == 2) {
+ intptr_t value;
+ OFStream os(stdout);
+ if (GetValue(arg1, &value)) {
+ Object* obj = reinterpret_cast<Object*>(value);
+ os << arg1 << ": \n";
+#ifdef DEBUG
+ obj->Print(os);
+ os << "\n";
+#else
+ os << Brief(obj) << "\n";
+#endif
+ } else {
+ os << arg1 << " unrecognized\n";
+ }
+ } else {
+ PrintF("printobject <value>\n");
+ }
+ } else if (strcmp(cmd, "setpc") == 0) {
+ intptr_t value;
+
+ if (!GetValue(arg1, &value)) {
+ PrintF("%s unrecognized\n", arg1);
+ continue;
+ }
+ sim_->set_pc(value);
+ } else if (strcmp(cmd, "stack") == 0 || strcmp(cmd, "mem") == 0) {
+ intptr_t* cur = NULL;
+ intptr_t* end = NULL;
+ int next_arg = 1;
+
+ if (strcmp(cmd, "stack") == 0) {
+ cur = reinterpret_cast<intptr_t*>(sim_->get_register(Simulator::sp));
+ } else { // "mem"
+ intptr_t value;
+ if (!GetValue(arg1, &value)) {
+ PrintF("%s unrecognized\n", arg1);
+ continue;
+ }
+ cur = reinterpret_cast<intptr_t*>(value);
+ next_arg++;
+ }
+
+ intptr_t words; // likely inaccurate variable name for 64bit
+ if (argc == next_arg) {
+ words = 10;
+ } else {
+ if (!GetValue(argv[next_arg], &words)) {
+ words = 10;
+ }
+ }
+ end = cur + words;
+
+ while (cur < end) {
+ PrintF(" 0x%08" V8PRIxPTR ": 0x%08" V8PRIxPTR " %10" V8PRIdPTR,
+ reinterpret_cast<intptr_t>(cur), *cur, *cur);
+ HeapObject* obj = reinterpret_cast<HeapObject*>(*cur);
+ intptr_t value = *cur;
+ Heap* current_heap = v8::internal::Isolate::Current()->heap();
+ if ((value & 1) == 0) {
+ PrintF("(smi %d)", PlatformSmiTagging::SmiToInt(obj));
+ } else if (current_heap->Contains(obj)) {
+ PrintF(" (");
+ obj->ShortPrint();
+ PrintF(")");
+ }
+ PrintF("\n");
+ cur++;
+ }
+ } else if (strcmp(cmd, "disasm") == 0 || strcmp(cmd, "di") == 0) {
+ disasm::NameConverter converter;
+ disasm::Disassembler dasm(converter);
+ // use a reasonably large buffer
+ v8::internal::EmbeddedVector<char, 256> buffer;
+
+ byte* prev = NULL;
+ byte* cur = NULL;
+ byte* end = NULL;
+
+ if (argc == 1) {
+ cur = reinterpret_cast<byte*>(sim_->get_pc());
+ end = cur + (10 * Instruction::kInstrSize);
+ } else if (argc == 2) {
+ int regnum = Registers::Number(arg1);
+ if (regnum != kNoRegister || strncmp(arg1, "0x", 2) == 0) {
+ // The argument is an address or a register name.
+ intptr_t value;
+ if (GetValue(arg1, &value)) {
+ cur = reinterpret_cast<byte*>(value);
+ // Disassemble 10 instructions at <arg1>.
+ end = cur + (10 * Instruction::kInstrSize);
+ }
+ } else {
+ // The argument is the number of instructions.
+ intptr_t value;
+ if (GetValue(arg1, &value)) {
+ cur = reinterpret_cast<byte*>(sim_->get_pc());
+ // Disassemble <arg1> instructions.
+ end = cur + (value * Instruction::kInstrSize);
+ }
+ }
+ } else {
+ intptr_t value1;
+ intptr_t value2;
+ if (GetValue(arg1, &value1) && GetValue(arg2, &value2)) {
+ cur = reinterpret_cast<byte*>(value1);
+ end = cur + (value2 * Instruction::kInstrSize);
+ }
+ }
+
+ while (cur < end) {
+ prev = cur;
+ cur += dasm.InstructionDecode(buffer, cur);
+ PrintF(" 0x%08" V8PRIxPTR " %s\n",
+ reinterpret_cast<intptr_t>(prev), buffer.start());
+ }
+ } else if (strcmp(cmd, "gdb") == 0) {
+ PrintF("relinquishing control to gdb\n");
+ v8::base::OS::DebugBreak();
+ PrintF("regaining control from gdb\n");
+ } else if (strcmp(cmd, "break") == 0) {
+ if (argc == 2) {
+ intptr_t value;
+ if (GetValue(arg1, &value)) {
+ if (!SetBreakpoint(reinterpret_cast<Instruction*>(value))) {
+ PrintF("setting breakpoint failed\n");
+ }
+ } else {
+ PrintF("%s unrecognized\n", arg1);
+ }
+ } else {
+ PrintF("break <address>\n");
+ }
+ } else if (strcmp(cmd, "del") == 0) {
+ if (!DeleteBreakpoint(NULL)) {
+ PrintF("deleting breakpoint failed\n");
+ }
+ } else if (strcmp(cmd, "cr") == 0) {
+ PrintF("Condition reg: %08x\n", sim_->condition_reg_);
+ } else if (strcmp(cmd, "stop") == 0) {
+ intptr_t value;
+ intptr_t stop_pc =
+ sim_->get_pc() - (Instruction::kInstrSize + kPointerSize);
+ Instruction* stop_instr = reinterpret_cast<Instruction*>(stop_pc);
+ Instruction* msg_address =
+ reinterpret_cast<Instruction*>(stop_pc + Instruction::kInstrSize);
+ if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) {
+ // Remove the current stop.
+ if (sim_->isStopInstruction(stop_instr)) {
+ stop_instr->SetInstructionBits(kNopInstr);
+ msg_address->SetInstructionBits(kNopInstr);
+ } else {
+ PrintF("Not at debugger stop.\n");
+ }
+ } else if (argc == 3) {
+ // Print information about all/the specified breakpoint(s).
+ if (strcmp(arg1, "info") == 0) {
+ if (strcmp(arg2, "all") == 0) {
+ PrintF("Stop information:\n");
+ for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
+ sim_->PrintStopInfo(i);
+ }
+ } else if (GetValue(arg2, &value)) {
+ sim_->PrintStopInfo(value);
+ } else {
+ PrintF("Unrecognized argument.\n");
+ }
+ } else if (strcmp(arg1, "enable") == 0) {
+ // Enable all/the specified breakpoint(s).
+ if (strcmp(arg2, "all") == 0) {
+ for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
+ sim_->EnableStop(i);
+ }
+ } else if (GetValue(arg2, &value)) {
+ sim_->EnableStop(value);
+ } else {
+ PrintF("Unrecognized argument.\n");
+ }
+ } else if (strcmp(arg1, "disable") == 0) {
+ // Disable all/the specified breakpoint(s).
+ if (strcmp(arg2, "all") == 0) {
+ for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
+ sim_->DisableStop(i);
+ }
+ } else if (GetValue(arg2, &value)) {
+ sim_->DisableStop(value);
+ } else {
+ PrintF("Unrecognized argument.\n");
+ }
+ }
+ } else {
+ PrintF("Wrong usage. Use help command for more information.\n");
+ }
+ } else if ((strcmp(cmd, "t") == 0) || strcmp(cmd, "trace") == 0) {
+ ::v8::internal::FLAG_trace_sim = !::v8::internal::FLAG_trace_sim;
+ PrintF("Trace of executed instructions is %s\n",
+ ::v8::internal::FLAG_trace_sim ? "on" : "off");
+ } else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
+ PrintF("cont\n");
+ PrintF(" continue execution (alias 'c')\n");
+ PrintF("stepi [num instructions]\n");
+ PrintF(" step one/num instruction(s) (alias 'si')\n");
+ PrintF("print <register>\n");
+ PrintF(" print register content (alias 'p')\n");
+ PrintF(" use register name 'all' to display all integer registers\n");
+ PrintF(
+ " use register name 'alld' to display integer registers "\
+ "with decimal values\n");
+ PrintF(" use register name 'rN' to display register number 'N'\n");
+ PrintF(" add argument 'fp' to print register pair double values\n");
+ PrintF(
+ " use register name 'allf' to display floating-point "\
+ "registers\n");
+ PrintF("printobject <register>\n");
+ PrintF(" print an object from a register (alias 'po')\n");
+ PrintF("cr\n");
+ PrintF(" print condition register\n");
+ PrintF("stack [<num words>]\n");
+ PrintF(" dump stack content, default dump 10 words)\n");
+ PrintF("mem <address> [<num words>]\n");
+ PrintF(" dump memory content, default dump 10 words)\n");
+ PrintF("disasm [<instructions>]\n");
+ PrintF("disasm [<address/register>]\n");
+ PrintF("disasm [[<address/register>] <instructions>]\n");
+ PrintF(" disassemble code, default is 10 instructions\n");
+ PrintF(" from pc (alias 'di')\n");
+ PrintF("gdb\n");
+ PrintF(" enter gdb\n");
+ PrintF("break <address>\n");
+ PrintF(" set a break point on the address\n");
+ PrintF("del\n");
+ PrintF(" delete the breakpoint\n");
+ PrintF("trace (alias 't')\n");
+ PrintF(" toogle the tracing of all executed statements\n");
+ PrintF("stop feature:\n");
+ PrintF(" Description:\n");
+ PrintF(" Stops are debug instructions inserted by\n");
+ PrintF(" the Assembler::stop() function.\n");
+ PrintF(" When hitting a stop, the Simulator will\n");
+ PrintF(" stop and and give control to the S390Debugger.\n");
+ PrintF(" The first %d stop codes are watched:\n",
+ Simulator::kNumOfWatchedStops);
+ PrintF(" - They can be enabled / disabled: the Simulator\n");
+ PrintF(" will / won't stop when hitting them.\n");
+ PrintF(" - The Simulator keeps track of how many times they \n");
+ PrintF(" are met. (See the info command.) Going over a\n");
+ PrintF(" disabled stop still increases its counter. \n");
+ PrintF(" Commands:\n");
+ PrintF(" stop info all/<code> : print infos about number <code>\n");
+ PrintF(" or all stop(s).\n");
+ PrintF(" stop enable/disable all/<code> : enables / disables\n");
+ PrintF(" all or number <code> stop(s)\n");
+ PrintF(" stop unstop\n");
+ PrintF(" ignore the stop instruction at the current location\n");
+ PrintF(" from now on\n");
+ } else {
+ PrintF("Unknown command: %s\n", cmd);
+ }
+ }
+ }
+
+ // Add all the breakpoints back to stop execution and enter the debugger
+ // shell when hit.
+ RedoBreakpoints();
+ // Restore tracing
+ ::v8::internal::FLAG_trace_sim = trace;
+
+#undef COMMAND_SIZE
+#undef ARG_SIZE
+
+#undef STR
+#undef XSTR
+}
+
+
+static bool ICacheMatch(void* one, void* two) {
+ DCHECK((reinterpret_cast<intptr_t>(one) & CachePage::kPageMask) == 0);
+ DCHECK((reinterpret_cast<intptr_t>(two) & CachePage::kPageMask) == 0);
+ return one == two;
+}
+
+
+static uint32_t ICacheHash(void* key) {
+ return static_cast<uint32_t>(reinterpret_cast<uintptr_t>(key)) >> 2;
+}
+
+
+static bool AllOnOnePage(uintptr_t start, int size) {
+ intptr_t start_page = (start & ~CachePage::kPageMask);
+ intptr_t end_page = ((start + size) & ~CachePage::kPageMask);
+ return start_page == end_page;
+}
+
+
+void Simulator::set_last_debugger_input(char* input) {
+ DeleteArray(last_debugger_input_);
+ last_debugger_input_ = input;
+}
+
+
+void Simulator::FlushICache(v8::internal::HashMap* i_cache, void* start_addr,
+ size_t size) {
+ intptr_t start = reinterpret_cast<intptr_t>(start_addr);
+ int intra_line = (start & CachePage::kLineMask);
+ start -= intra_line;
+ size += intra_line;
+ size = ((size - 1) | CachePage::kLineMask) + 1;
+ int offset = (start & CachePage::kPageMask);
+ while (!AllOnOnePage(start, size - 1)) {
+ int bytes_to_flush = CachePage::kPageSize - offset;
+ FlushOnePage(i_cache, start, bytes_to_flush);
+ start += bytes_to_flush;
+ size -= bytes_to_flush;
+ DCHECK_EQ(0, static_cast<int>(start & CachePage::kPageMask));
+ offset = 0;
+ }
+ if (size != 0) {
+ FlushOnePage(i_cache, start, size);
+ }
+}
+
+
+CachePage* Simulator::GetCachePage(v8::internal::HashMap* i_cache, void* page) {
+ v8::internal::HashMap::Entry* entry =
+ i_cache->LookupOrInsert(page, ICacheHash(page));
+ if (entry->value == NULL) {
+ CachePage* new_page = new CachePage();
+ entry->value = new_page;
+ }
+ return reinterpret_cast<CachePage*>(entry->value);
+}
+
+
+// Flush from start up to and not including start + size.
+void Simulator::FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
+ int size) {
+ DCHECK(size <= CachePage::kPageSize);
+ DCHECK(AllOnOnePage(start, size - 1));
+ DCHECK((start & CachePage::kLineMask) == 0);
+ DCHECK((size & CachePage::kLineMask) == 0);
+ void* page = reinterpret_cast<void*>(start & (~CachePage::kPageMask));
+ int offset = (start & CachePage::kPageMask);
+ CachePage* cache_page = GetCachePage(i_cache, page);
+ char* valid_bytemap = cache_page->ValidityByte(offset);
+ memset(valid_bytemap, CachePage::LINE_INVALID, size >> CachePage::kLineShift);
+}
+
+
+void Simulator::CheckICache(v8::internal::HashMap* i_cache,
+ Instruction* instr) {
+ intptr_t address = reinterpret_cast<intptr_t>(instr);
+ void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
+ void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
+ int offset = (address & CachePage::kPageMask);
+ CachePage* cache_page = GetCachePage(i_cache, page);
+ char* cache_valid_byte = cache_page->ValidityByte(offset);
+ bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
+ char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask);
+ if (cache_hit) {
+ // Check that the data in memory matches the contents of the I-cache.
+ CHECK_EQ(memcmp(reinterpret_cast<void*>(instr),
+ cache_page->CachedData(offset), Instruction::kInstrSize), 0);
+ } else {
+ // Cache miss. Load memory into the cache.
+ memcpy(cached_line, line, CachePage::kLineLength);
+ *cache_valid_byte = CachePage::LINE_VALID;
+ }
+}
+
+
+void Simulator::Initialize(Isolate* isolate) {
+ if (isolate->simulator_initialized()) return;
+ isolate->set_simulator_initialized(true);
+ ::v8::internal::ExternalReference::set_redirector(isolate,
+ &RedirectExternalReference);
+}
+
+
+Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
+ i_cache_ = isolate_->simulator_i_cache();
+ if (i_cache_ == NULL) {
+ i_cache_ = new v8::internal::HashMap(&ICacheMatch);
+ isolate_->set_simulator_i_cache(i_cache_);
+ }
+ Initialize(isolate);
+// Set up simulator support first. Some of this information is needed to
+// setup the architecture state.
+#if V8_TARGET_ARCH_S390X
+ size_t stack_size = FLAG_sim_stack_size * KB;
+#else
+ size_t stack_size = MB; // allocate 1MB for stack
+#endif
+ stack_size += 2 * stack_protection_size_;
+ stack_ = reinterpret_cast<char*>(malloc(stack_size));
+ pc_modified_ = false;
+ icount_ = 0;
+ break_pc_ = NULL;
+ break_instr_ = 0;
+
+ // make sure our register type can hold exactly 4/8 bytes
+#ifdef V8_TARGET_ARCH_S390X
+ DCHECK(sizeof(intptr_t) == 8);
+#else
+ DCHECK(sizeof(intptr_t) == 4);
+#endif
+ // Set up architecture state.
+ // All registers are initialized to zero to start with.
+ for (int i = 0; i < kNumGPRs; i++) {
+ registers_[i] = 0;
+ }
+ condition_reg_ = 0;
+ fp_condition_reg_ = 0;
+ special_reg_pc_ = 0;
+ special_reg_lr_ = 0;
+ special_reg_ctr_ = 0;
+
+ // Initializing FP registers.
+ for (int i = 0; i < kNumFPRs; i++) {
+ fp_registers_[i] = 0.0;
+ }
+
+ // The sp is initialized to point to the bottom (high address) of the
+ // allocated stack area. To be safe in potential stack underflows we leave
+ // some buffer below.
+ registers_[sp] =
+ reinterpret_cast<intptr_t>(stack_) + stack_size - stack_protection_size_;
+ InitializeCoverage();
+
+ last_debugger_input_ = NULL;
+}
+
+
+Simulator::~Simulator() { free(stack_); }
+
+
+// When the generated code calls an external reference we need to catch that in
+// the simulator. The external reference will be a function compiled for the
+// host architecture. We need to call that function instead of trying to
+// execute it with the simulator. We do that by redirecting the external
+// reference to a svc (Supervisor Call) instruction that is handled by
+// the simulator. We write the original destination of the jump just at a known
+// offset from the svc instruction so the simulator knows what to call.
+class Redirection {
+ public:
+ Redirection(void* external_function, ExternalReference::Type type)
+ : external_function_(external_function),
+ // we use TRAP4 here (0xBF22)
+#if V8_TARGET_LITTLE_ENDIAN
+ swi_instruction_(0x1000FFB2),
+#else
+ swi_instruction_(0xB2FF0000 | kCallRtRedirected),
+#endif
+ type_(type),
+ next_(NULL) {
+ Isolate* isolate = Isolate::Current();
+ next_ = isolate->simulator_redirection();
+ Simulator::current(isolate)->FlushICache(
+ isolate->simulator_i_cache(),
+ reinterpret_cast<void*>(&swi_instruction_), Instruction::kInstrSize);
+ isolate->set_simulator_redirection(this);
+ }
+
+ void* address_of_swi_instruction() {
+ return reinterpret_cast<void*>(&swi_instruction_);
+ }
+
+ void* external_function() { return external_function_; }
+ ExternalReference::Type type() { return type_; }
+
+ static Redirection* Get(void* external_function,
+ ExternalReference::Type type) {
+ Isolate* isolate = Isolate::Current();
+ Redirection* current = isolate->simulator_redirection();
+ for (; current != NULL; current = current->next_) {
+ if (current->external_function_ == external_function) {
+ DCHECK_EQ(current->type(), type);
+ return current;
+ }
+ }
+ return new Redirection(external_function, type);
+ }
+
+ static Redirection* FromSwiInstruction(Instruction* swi_instruction) {
+ char* addr_of_swi = reinterpret_cast<char*>(swi_instruction);
+ char* addr_of_redirection =
+ addr_of_swi - offsetof(Redirection, swi_instruction_);
+ return reinterpret_cast<Redirection*>(addr_of_redirection);
+ }
+
+ static void* ReverseRedirection(intptr_t reg) {
+ Redirection* redirection = FromSwiInstruction(
+ reinterpret_cast<Instruction*>(reinterpret_cast<void*>(reg)));
+ return redirection->external_function();
+ }
+
+ static void DeleteChain(Redirection* redirection) {
+ while (redirection != nullptr) {
+ Redirection* next = redirection->next_;
+ delete redirection;
+ redirection = next;
+ }
+ }
+
+ private:
+ void* external_function_;
+ uint32_t swi_instruction_;
+ ExternalReference::Type type_;
+ Redirection* next_;
+};
+
+
+// static
+void Simulator::TearDown(HashMap* i_cache, Redirection* first) {
+ Redirection::DeleteChain(first);
+ if (i_cache != nullptr) {
+ for (HashMap::Entry* entry = i_cache->Start(); entry != nullptr;
+ entry = i_cache->Next(entry)) {
+ delete static_cast<CachePage*>(entry->value);
+ }
+ delete i_cache;
+ }
+}
+
+
+void* Simulator::RedirectExternalReference(void* external_function,
+ ExternalReference::Type type) {
+ Redirection* redirection = Redirection::Get(external_function, type);
+ return redirection->address_of_swi_instruction();
+}
+
+
+// Get the active Simulator for the current thread.
+Simulator* Simulator::current(Isolate* isolate) {
+ v8::internal::Isolate::PerIsolateThreadData* isolate_data =
+ isolate->FindOrAllocatePerThreadDataForThisThread();
+ DCHECK(isolate_data != NULL);
+
+ Simulator* sim = isolate_data->simulator();
+ if (sim == NULL) {
+ // TODO(146): delete the simulator object when a thread/isolate goes away.
+ sim = new Simulator(isolate);
+ isolate_data->set_simulator(sim);
+ }
+ return sim;
+}
+
+
+// Sets the register in the architecture state.
+void Simulator::set_register(int reg, uint64_t value) {
+ DCHECK((reg >= 0) && (reg < kNumGPRs));
+ registers_[reg] = value;
+}
+
+
+// Get the register from the architecture state.
+uint64_t Simulator::get_register(int reg) const {
+ DCHECK((reg >= 0) && (reg < kNumGPRs));
+ // Stupid code added to avoid bug in GCC.
+ // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
+ if (reg >= kNumGPRs) return 0;
+ // End stupid code.
+ return registers_[reg];
+}
+
+
+template<typename T>
+T Simulator::get_low_register(int reg) const {
+ DCHECK((reg >= 0) && (reg < kNumGPRs));
+ // Stupid code added to avoid bug in GCC.
+ // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
+ if (reg >= kNumGPRs) return 0;
+ // End stupid code.
+ return static_cast<T>(registers_[reg] & 0xFFFFFFFF);
+}
+
+
+template<typename T>
+T Simulator::get_high_register(int reg) const {
+ DCHECK((reg >= 0) && (reg < kNumGPRs));
+ // Stupid code added to avoid bug in GCC.
+ // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
+ if (reg >= kNumGPRs) return 0;
+ // End stupid code.
+ return static_cast<T>(registers_[reg] >> 32);
+}
+
+
+void Simulator::set_low_register(int reg, uint32_t value) {
+ uint64_t shifted_val = static_cast<uint64_t>(value);
+ uint64_t orig_val = static_cast<uint64_t>(registers_[reg]);
+ uint64_t result = (orig_val >> 32 << 32) | shifted_val;
+ registers_[reg] = result;
+}
+
+
+void Simulator::set_high_register(int reg, uint32_t value) {
+ uint64_t shifted_val = static_cast<uint64_t>(value) << 32;
+ uint64_t orig_val = static_cast<uint64_t>(registers_[reg]);
+ uint64_t result = (orig_val & 0xFFFFFFFF) | shifted_val;
+ registers_[reg] = result;
+}
+
+
+double Simulator::get_double_from_register_pair(int reg) {
+ DCHECK((reg >= 0) && (reg < kNumGPRs) && ((reg % 2) == 0));
+
+ double dm_val = 0.0;
+#if 0 && !V8_TARGET_ARCH_S390X // doesn't make sense in 64bit mode
+ // Read the bits from the unsigned integer register_[] array
+ // into the double precision floating point value and return it.
+ char buffer[sizeof(fp_registers_[0])];
+ memcpy(buffer, ®isters_[reg], 2 * sizeof(registers_[0]));
+ memcpy(&dm_val, buffer, 2 * sizeof(registers_[0]));
+#endif
+ return (dm_val);
+}
+
+
+// Raw access to the PC register.
+void Simulator::set_pc(intptr_t value) {
+ pc_modified_ = true;
+ special_reg_pc_ = value;
+}
+
+
+bool Simulator::has_bad_pc() const {
+ return ((special_reg_pc_ == bad_lr) || (special_reg_pc_ == end_sim_pc));
+}
+
+
+// Raw access to the PC register without the special adjustment when reading.
+intptr_t Simulator::get_pc() const { return special_reg_pc_; }
+
+
+// Runtime FP routines take:
+// - two double arguments
+// - one double argument and zero or one integer arguments.
+// All are consructed here from d1, d2 and r2.
+void Simulator::GetFpArgs(double* x, double* y, intptr_t* z) {
+ *x = get_double_from_d_register(0);
+ *y = get_double_from_d_register(2);
+ *z = get_register(2);
+}
+
+
+// The return value is in d0.
+void Simulator::SetFpResult(const double& result) {
+ set_d_register_from_double(0, result);
+}
+
+
+void Simulator::TrashCallerSaveRegisters() {
+ // We don't trash the registers with the return value.
+#if 0 // A good idea to trash volatile registers, needs to be done
+ registers_[2] = 0x50Bad4U;
+ registers_[3] = 0x50Bad4U;
+ registers_[12] = 0x50Bad4U;
+#endif
+}
+
+
+uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) {
+ uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
+ return *ptr;
+}
+
+
+int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) {
+ int32_t* ptr = reinterpret_cast<int32_t*>(addr);
+ return *ptr;
+}
+
+
+void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) {
+ uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
+ *ptr = value;
+ return;
+}
+
+
+void Simulator::WriteW(intptr_t addr, int32_t value, Instruction* instr) {
+ int32_t* ptr = reinterpret_cast<int32_t*>(addr);
+ *ptr = value;
+ return;
+}
+
+
+uint16_t Simulator::ReadHU(intptr_t addr, Instruction* instr) {
+ uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
+ return *ptr;
+}
+
+
+int16_t Simulator::ReadH(intptr_t addr, Instruction* instr) {
+ int16_t* ptr = reinterpret_cast<int16_t*>(addr);
+ return *ptr;
+}
+
+
+void Simulator::WriteH(intptr_t addr, uint16_t value, Instruction* instr) {
+ uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
+ *ptr = value;
+ return;
+}
+
+
+void Simulator::WriteH(intptr_t addr, int16_t value, Instruction* instr) {
+ int16_t* ptr = reinterpret_cast<int16_t*>(addr);
+ *ptr = value;
+ return;
+}
+
+
+uint8_t Simulator::ReadBU(intptr_t addr) {
+ uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
+ return *ptr;
+}
+
+
+int8_t Simulator::ReadB(intptr_t addr) {
+ int8_t* ptr = reinterpret_cast<int8_t*>(addr);
+ return *ptr;
+}
+
+
+void Simulator::WriteB(intptr_t addr, uint8_t value) {
+ uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
+ *ptr = value;
+}
+
+
+void Simulator::WriteB(intptr_t addr, int8_t value) {
+ int8_t* ptr = reinterpret_cast<int8_t*>(addr);
+ *ptr = value;
+}
+
+
+int64_t Simulator::ReadDW(intptr_t addr) {
+ int64_t* ptr = reinterpret_cast<int64_t*>(addr);
+ return *ptr;
+}
+
+
+void Simulator::WriteDW(intptr_t addr, int64_t value) {
+ int64_t* ptr = reinterpret_cast<int64_t*>(addr);
+ *ptr = value;
+ return;
+}
+
+
+/**
+ * Reads a double value from memory at given address.
+ */
+double Simulator::ReadDouble(intptr_t addr) {
+ double* ptr = reinterpret_cast<double *>(addr);
+ return *ptr;
+}
+
+
+// Returns the limit of the stack area to enable checking for stack overflows.
+uintptr_t Simulator::StackLimit() const {
+ // Leave a safety margin to prevent overrunning the stack when pushing values.
+ return reinterpret_cast<uintptr_t>(stack_) + stack_protection_size_;
+}
+
+
+// Unsupported instructions use Format to print an error and stop execution.
+void Simulator::Format(Instruction* instr, const char* format) {
+ PrintF("Simulator found unsupported instruction:\n 0x%08" V8PRIxPTR ": %s\n",
+ reinterpret_cast<intptr_t>(instr), format);
+ UNIMPLEMENTED();
+}
+
+
+// Calculate C flag value for additions.
+bool Simulator::CarryFrom(int32_t left, int32_t right, int32_t carry) {
+ uint32_t uleft = static_cast<uint32_t>(left);
+ uint32_t uright = static_cast<uint32_t>(right);
+ uint32_t urest = 0xffffffffU - uleft;
+
+ return (uright > urest) ||
+ (carry && (((uright + 1) > urest) || (uright > (urest - 1))));
+}
+
+
+// Calculate C flag value for subtractions.
+bool Simulator::BorrowFrom(int32_t left, int32_t right) {
+ uint32_t uleft = static_cast<uint32_t>(left);
+ uint32_t uright = static_cast<uint32_t>(right);
+
+ return (uright > uleft);
+}
+
+
+// Calculate V flag value for additions and subtractions.
+bool Simulator::OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
+ bool addition) {
+ bool overflow;
+ if (addition) {
+ // operands have the same sign
+ overflow = ((left >= 0 && right >= 0) || (left < 0 && right < 0))
+ // and operands and result have different sign
+ &&
+ ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
+ } else {
+ // operands have different signs
+ overflow = ((left < 0 && right >= 0) || (left >= 0 && right < 0))
+ // and first operand and result have different signs
+ &&
+ ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
+ }
+ return overflow;
+}
+
+
+#if V8_TARGET_ARCH_S390X
+struct ObjectPair {
+ intptr_t x;
+ intptr_t y;
+};
+
+#else
+
+typedef uint64_t ObjectPair;
+
+#endif
+
+// #if V8_TARGET_ARCH_S390X
+// struct ObjectPair {
+// intptr_t x;
+// intptr_t y;
+// };
+//
+//
+// static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
+// *x = pair->x;
+// *y = pair->y;
+// }
+// #else
+// typedef uint64_t ObjectPair;
+//
+//
+// static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
+// #if V8_TARGET_BIG_ENDIAN
+// *x = static_cast<int32_t>(*pair >> 32);
+// *y = static_cast<int32_t>(*pair);
+// #else
+// *x = static_cast<int32_t>(*pair);
+// *y = static_cast<int32_t>(*pair >> 32);
+// #endif
+// }
+// #endif
+
+// Calls into the V8 runtime are based on this very simple interface.
+// Note: To be able to return two values from some calls the code in
+// runtime.cc uses the ObjectPair which is essentially two pointer
+// values stuffed into a structure. With the code below we assume that
+// all runtime calls return this pair. If they don't, the r4 result
+// register contains a bogus value, which is fine because it is
+// caller-saved.
+#if !V8_TARGET_ARCH_S390X
+typedef ObjectPair (*SimulatorRuntimeCall)(intptr_t arg0, intptr_t arg1,
+ intptr_t arg2, intptr_t arg3,
+ intptr_t arg4, intptr_t arg5);
+#else
+typedef ObjectPair (*SimulatorRuntimeObjectPairCall)(intptr_t arg0,
+ intptr_t arg1,
+ intptr_t arg2, intptr_t arg3,
+ intptr_t arg14, intptr_t arg5);
+
+typedef intptr_t (*SimulatorRuntimeCall)(intptr_t arg0, intptr_t arg1,
+ intptr_t arg2, intptr_t arg3,
+ intptr_t arg14, intptr_t arg5);
+#endif
+// These prototypes handle the four types of FP calls.
+typedef int (*SimulatorRuntimeCompareCall)(double darg0, double darg1);
+typedef double (*SimulatorRuntimeFPFPCall)(double darg0, double darg1);
+typedef double (*SimulatorRuntimeFPCall)(double darg0);
+typedef double (*SimulatorRuntimeFPIntCall)(double darg0, intptr_t arg0);
+
+// This signature supports direct call in to API function native callback
+// (refer to InvocationCallback in v8.h).
+typedef void (*SimulatorRuntimeDirectApiCall)(intptr_t arg0);
+typedef void (*SimulatorRuntimeProfilingApiCall)(intptr_t arg0, void* arg1);
+
+// This signature supports direct call to accessor getter callback.
+typedef void (*SimulatorRuntimeDirectGetterCall)(intptr_t arg0, intptr_t arg1);
+typedef void (*SimulatorRuntimeProfilingGetterCall)(intptr_t arg0,
+ intptr_t arg1, void* arg2);
+
+// Software interrupt instructions are used by the simulator to call into the
+// C-based V8 runtime.
+void Simulator::SoftwareInterrupt(Instruction* instr) {
+ int svc = instr->SvcValue();
+ switch (svc) {
+ case kCallRtRedirected: {
+ // Check if stack is aligned. Error if not aligned is reported below to
+ // include information on the function called.
+ bool stack_aligned =
+ (get_register(sp) & (::v8::internal::FLAG_sim_stack_alignment - 1)) ==
+ 0;
+ Redirection* redirection = Redirection::FromSwiInstruction(instr);
+ const int kArgCount = 6;
+ int arg0_regnum = 2;
+#if V8_TARGET_ARCH_S390X && !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
+ intptr_t result_buffer = 0;
+ if (redirection->type() == ExternalReference::BUILTIN_OBJECTPAIR_CALL) {
+ result_buffer = get_register(r2);
+ arg0_regnum++;
+ }
+#endif
+ intptr_t arg[kArgCount];
+ for (int i = 0; i < kArgCount-1; i++) {
+ arg[i] = get_register(arg0_regnum + i);
+ }
+ intptr_t* stack_pointer = reinterpret_cast<intptr_t*>(get_register(sp));
+ arg[5] = stack_pointer[kCalleeRegisterSaveAreaSize / kPointerSize];
+ bool fp_call =
+ (redirection->type() == ExternalReference::BUILTIN_FP_FP_CALL) ||
+ (redirection->type() == ExternalReference::BUILTIN_COMPARE_CALL) ||
+ (redirection->type() == ExternalReference::BUILTIN_FP_CALL) ||
+ (redirection->type() == ExternalReference::BUILTIN_FP_INT_CALL);
+
+ // Place the return address on the stack, making the call GC safe.
+ *reinterpret_cast<intptr_t*>(get_register(sp)
+ + kStackFrameRASlot * kPointerSize) = get_register(r14);
+
+ intptr_t external =
+ reinterpret_cast<intptr_t>(redirection->external_function());
+ if (fp_call) {
+ double dval0, dval1; // one or two double parameters
+ intptr_t ival; // zero or one integer parameters
+ int iresult = 0; // integer return value
+ double dresult = 0; // double return value
+ GetFpArgs(&dval0, &dval1, &ival);
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ SimulatorRuntimeCall generic_target =
+ reinterpret_cast<SimulatorRuntimeCall>(external);
+ switch (redirection->type()) {
+ case ExternalReference::BUILTIN_FP_FP_CALL:
+ case ExternalReference::BUILTIN_COMPARE_CALL:
+ PrintF("Call to host function at %p with args %f, %f",
+ FUNCTION_ADDR(generic_target), dval0, dval1);
+ break;
+ case ExternalReference::BUILTIN_FP_CALL:
+ PrintF("Call to host function at %p with arg %f",
+ FUNCTION_ADDR(generic_target), dval0);
+ break;
+ case ExternalReference::BUILTIN_FP_INT_CALL:
+ PrintF("Call to host function at %p with args %f, %" V8PRIdPTR,
+ FUNCTION_ADDR(generic_target), dval0, ival);
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
+ static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+ switch (redirection->type()) {
+ case ExternalReference::BUILTIN_COMPARE_CALL: {
+ SimulatorRuntimeCompareCall target =
+ reinterpret_cast<SimulatorRuntimeCompareCall>(external);
+ iresult = target(dval0, dval1);
+ set_register(r2, iresult);
+ break;
+ }
+ case ExternalReference::BUILTIN_FP_FP_CALL: {
+ SimulatorRuntimeFPFPCall target =
+ reinterpret_cast<SimulatorRuntimeFPFPCall>(external);
+ dresult = target(dval0, dval1);
+ SetFpResult(dresult);
+ break;
+ }
+ case ExternalReference::BUILTIN_FP_CALL: {
+ SimulatorRuntimeFPCall target =
+ reinterpret_cast<SimulatorRuntimeFPCall>(external);
+ dresult = target(dval0);
+ SetFpResult(dresult);
+ break;
+ }
+ case ExternalReference::BUILTIN_FP_INT_CALL: {
+ SimulatorRuntimeFPIntCall target =
+ reinterpret_cast<SimulatorRuntimeFPIntCall>(external);
+ dresult = target(dval0, ival);
+ SetFpResult(dresult);
+ break;
+ }
+ default:
+ UNREACHABLE();
+ break;
+ }
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ switch (redirection->type()) {
+ case ExternalReference::BUILTIN_COMPARE_CALL:
+ PrintF("Returned %08x\n", iresult);
+ break;
+ case ExternalReference::BUILTIN_FP_FP_CALL:
+ case ExternalReference::BUILTIN_FP_CALL:
+ case ExternalReference::BUILTIN_FP_INT_CALL:
+ PrintF("Returned %f\n", dresult);
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ }
+ } else if (redirection->type() == ExternalReference::DIRECT_API_CALL) {
+ // See callers of MacroAssembler::CallApiFunctionAndReturn for
+ // explanation of register usage.
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ PrintF("Call to host function at %p args %08" V8PRIxPTR,
+ reinterpret_cast<void*>(external), arg[0]);
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
+ static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+ SimulatorRuntimeDirectApiCall target =
+ reinterpret_cast<SimulatorRuntimeDirectApiCall>(external);
+ target(arg[0]);
+ } else if (redirection->type() == ExternalReference::PROFILING_API_CALL) {
+ // See callers of MacroAssembler::CallApiFunctionAndReturn for
+ // explanation of register usage.
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ PrintF("Call to host function at %p args %08" V8PRIxPTR
+ " %08" V8PRIxPTR,
+ reinterpret_cast<void*>(external), arg[0], arg[1]);
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
+ static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+ SimulatorRuntimeProfilingApiCall target =
+ reinterpret_cast<SimulatorRuntimeProfilingApiCall>(external);
+ target(arg[0], Redirection::ReverseRedirection(arg[1]));
+ } else if (redirection->type() == ExternalReference::DIRECT_GETTER_CALL) {
+ // See callers of MacroAssembler::CallApiFunctionAndReturn for
+ // explanation of register usage.
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ PrintF("Call to host function at %p args %08" V8PRIxPTR
+ " %08" V8PRIxPTR,
+ reinterpret_cast<void*>(external), arg[0], arg[1]);
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
+ static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+ SimulatorRuntimeDirectGetterCall target =
+ reinterpret_cast<SimulatorRuntimeDirectGetterCall>(external);
+#if !ABI_PASSES_HANDLES_IN_REGS
+ arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
+#endif
+ target(arg[0], arg[1]);
+ } else if (redirection->type() ==
+ ExternalReference::PROFILING_GETTER_CALL) {
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ PrintF("Call to host function at %p args %08" V8PRIxPTR
+ " %08" V8PRIxPTR " %08" V8PRIxPTR,
+ reinterpret_cast<void*>(external), arg[0], arg[1], arg[2]);
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
+ static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+ SimulatorRuntimeProfilingGetterCall target =
+ reinterpret_cast<SimulatorRuntimeProfilingGetterCall>(external);
+#if !ABI_PASSES_HANDLES_IN_REGS
+ arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
+#endif
+ target(arg[0], arg[1], Redirection::ReverseRedirection(arg[2]));
+ } else {
+ // builtin call.
+ if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+ SimulatorRuntimeCall target =
+ reinterpret_cast<SimulatorRuntimeCall>(external);
+ PrintF(
+ "Call to host function at %p,\n"
+ "\t\t\t\targs %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR
+ ", %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR,
+ FUNCTION_ADDR(target), arg[0], arg[1], arg[2], arg[3], arg[4],
+ arg[5]);
+ if (!stack_aligned) {
+ PrintF(" with unaligned stack %08" V8PRIxPTR
+ "\n", static_cast<intptr_t>(get_register(sp)));
+ }
+ PrintF("\n");
+ }
+ CHECK(stack_aligned);
+#if !V8_TARGET_ARCH_S390X
+ DCHECK(redirection->type() == ExternalReference::BUILTIN_CALL);
+ SimulatorRuntimeCall target =
+ reinterpret_cast<SimulatorRuntimeCall>(external);
+ int64_t result = target(arg[0], arg[1], arg[2], arg[3], arg[4], arg[5]);
+ int32_t lo_res = static_cast<int32_t>(result);
+ int32_t hi_res = static_cast<int32_t>(result >> 32);
+#if !V8_TARGET_LITTLE_ENDIAN
+ if (::v8::internal::FLAG_trace_sim) {
+ PrintF("Returned %08x\n", hi_res);
+ }
+ set_register(r2, hi_res);
+ set_register(r3, lo_res);
+#else
+ if (::v8::internal::FLAG_trace_sim) {
+ PrintF("Returned %08x\n", lo_res);
+ }
+ set_register(r2, lo_res);
+ set_register(r3, hi_res);
+#endif
+#else
+ if (redirection->type() == ExternalReference::BUILTIN_CALL) {
+ SimulatorRuntimeCall target =
+ reinterpret_cast<SimulatorRuntimeCall>(external);
+ intptr_t result = target(arg[0], arg[1], arg[2], arg[3], arg[4],
+ arg[5]);
+ if (::v8::internal::FLAG_trace_sim) {
+ PrintF("Returned %08" V8PRIxPTR "\n", result);
+ }
+ set_register(r2, result);
+ } else {
+ DCHECK(redirection->type() ==
+ ExternalReference::BUILTIN_OBJECTPAIR_CALL);
+ SimulatorRuntimeObjectPairCall target =
+ reinterpret_cast<SimulatorRuntimeObjectPairCall>(external);
+ ObjectPair result = target(arg[0], arg[1], arg[2], arg[3],
+ arg[4], arg[5]);
+ if (::v8::internal::FLAG_trace_sim) {
+ PrintF("Returned %08" V8PRIxPTR ", %08" V8PRIxPTR "\n",
+ result.x, result.y);
+ }
+#if ABI_RETURNS_OBJECT_PAIRS_IN_REGS
+ set_register(r2, result.x);
+ set_register(r3, result.y);
+#else
+ memcpy(reinterpret_cast<void *>(result_buffer), &result,
+ sizeof(ObjectPair));
+#endif
+ }
+#endif
+ }
+ int64_t saved_lr = *reinterpret_cast<intptr_t*>(get_register(sp)
+ + kStackFrameRASlot * kPointerSize);
+#if (!V8_TARGET_ARCH_S390X && V8_HOST_ARCH_S390)
+ // On zLinux-31, the saved_lr might be tagged with a high bit of 1.
+ // Cleanse it before proceeding with simulation.
+ saved_lr &= 0x7FFFFFFF;
+#endif
+ set_pc(saved_lr);
+ break;
+ }
+ case kBreakpoint: {
+ S390Debugger dbg(this);
+ dbg.Debug();
+ break;
+ }
+ // stop uses all codes greater than 1 << 23.
+ default: {
+ if (svc >= (1 << 23)) {
+ uint32_t code = svc & kStopCodeMask;
+ if (isWatchedStop(code)) {
+ IncreaseStopCounter(code);
+ }
+ // Stop if it is enabled, otherwise go on jumping over the stop
+ // and the message address.
+ if (isEnabledStop(code)) {
+ S390Debugger dbg(this);
+ dbg.Stop(instr);
+ } else {
+ set_pc(get_pc() + Instruction::kInstrSize + kPointerSize);
+ }
+ } else {
+ // This is not a valid svc code.
+ UNREACHABLE();
+ break;
+ }
+ }
+ }
+}
+
+
+// Stop helper functions.
+bool Simulator::isStopInstruction(Instruction* instr) {
+ return (instr->Bits(27, 24) == 0xF) && (instr->SvcValue() >= kStopCode);
+}
+
+
+bool Simulator::isWatchedStop(uint32_t code) {
+ DCHECK(code <= kMaxStopCode);
+ return code < kNumOfWatchedStops;
+}
+
+
+bool Simulator::isEnabledStop(uint32_t code) {
+ DCHECK(code <= kMaxStopCode);
+ // Unwatched stops are always enabled.
+ return !isWatchedStop(code) ||
+ !(watched_stops_[code].count & kStopDisabledBit);
+}
+
+
+void Simulator::EnableStop(uint32_t code) {
+ DCHECK(isWatchedStop(code));
+ if (!isEnabledStop(code)) {
+ watched_stops_[code].count &= ~kStopDisabledBit;
+ }
+}
+
+
+void Simulator::DisableStop(uint32_t code) {
+ DCHECK(isWatchedStop(code));
+ if (isEnabledStop(code)) {
+ watched_stops_[code].count |= kStopDisabledBit;
+ }
+}
+
+
+void Simulator::IncreaseStopCounter(uint32_t code) {
+ DCHECK(code <= kMaxStopCode);
+ DCHECK(isWatchedStop(code));
+ if ((watched_stops_[code].count & ~(1 << 31)) == 0x7fffffff) {
+ PrintF(
+ "Stop counter for code %i has overflowed.\n"
+ "Enabling this code and reseting the counter to 0.\n",
+ code);
+ watched_stops_[code].count = 0;
+ EnableStop(code);
+ } else {
+ watched_stops_[code].count++;
+ }
+}
+
+
+// Print a stop status.
+void Simulator::PrintStopInfo(uint32_t code) {
+ DCHECK(code <= kMaxStopCode);
+ if (!isWatchedStop(code)) {
+ PrintF("Stop not watched.");
+ } else {
+ const char* state = isEnabledStop(code) ? "Enabled" : "Disabled";
+ int32_t count = watched_stops_[code].count & ~kStopDisabledBit;
+ // Don't print the state of unused breakpoints.
+ if (count != 0) {
+ if (watched_stops_[code].desc) {
+ PrintF("stop %i - 0x%x: \t%s, \tcounter = %i, \t%s\n", code, code,
+ state, count, watched_stops_[code].desc);
+ } else {
+ PrintF("stop %i - 0x%x: \t%s, \tcounter = %i\n", code, code, state,
+ count);
+ }
+ }
+ }
+}
+
+
+// Method for checking overflow on signed addition:
+// Test src1 and src2 have opposite sign,
+// (1) No overflow if they have opposite sign
+// (2) Test the result and one of the operands have opposite sign
+// (a) No overflow if they don't have opposite sign
+// (b) Overflow if opposite
+#define CheckOverflowForIntAdd(src1, src2) \
+ (((src1) ^ (src2)) < 0 ? \
+ false : ((((src1) + (src2)) ^ (src1)) < 0))
+
+// Method for checking overflow on signed subtraction:
+#define CheckOverflowForIntSub(src1, src2) \
+ (((src1 - src2) < src1) != (src2 > 0))
+
+// Method for checking overflow on unsigned addtion
+#define CheckOverflowForUIntAdd(src1, src2) \
+ ((src1) + (src2) < (src1) || (src1) + (src2) < (src2))
+
+// Method for checking overflow on unsigned subtraction
+#define CheckOverflowForUIntSub(src1, src2) \
+ ((src1) - (src2) > (src1))
+
+// Method for checking overflow on multiplication
+#define CheckOverflowForMul(src1, src2) \
+ (((src1) * (src2)) / (src2) != (src1))
+
+// Method for checking overflow on shift right
+#define CheckOverflowForShiftRight(src1, src2) \
+ (((src1) >> (src2)) << (src2) != (src1))
+
+// Method for checking overflow on shift left
+#define CheckOverflowForShiftLeft(src1, src2) \
+ (((src1) << (src2)) >> (src2) != (src1))
+
+// S390 Decode and simulate helpers
+bool Simulator::DecodeTwoByte(Instruction* instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ switch (op) {
+ // RR format instructions
+ case SVC: {
+ UNIMPLEMENTED();
+ return true;
+ }
+ case AR:
+ case SR:
+ case MR:
+ case DR:
+ case OR:
+ case NR:
+ case XR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ bool isOF = false;
+ switch (op) {
+ case AR:
+ isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+ r1_val += r2_val;
+ SetS390ConditionCode<int32_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case SR:
+ isOF = CheckOverflowForIntSub(r1_val, r2_val);
+ r1_val -= r2_val;
+ SetS390ConditionCode<int32_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case OR:
+ r1_val |= r2_val;
+ SetS390BitWiseConditionCode<uint32_t>(r1_val);
+ break;
+ case NR:
+ r1_val &= r2_val;
+ SetS390BitWiseConditionCode<uint32_t>(r1_val);
+ break;
+ case XR:
+ r1_val ^= r2_val;
+ SetS390BitWiseConditionCode<uint32_t>(r1_val);
+ break;
+ case MR: {
+ DCHECK(r1 % 2 == 0);
+ r1_val = get_low_register<int32_t>(r1 + 1);
+ int64_t product = static_cast<int64_t>(r1_val)
+ * static_cast<int64_t>(r2_val);
+ int32_t high_bits = product >> 32;
+ r1_val = high_bits;
+ int32_t low_bits = product & 0x00000000FFFFFFFF;
+ set_low_register(r1, high_bits);
+ set_low_register(r1+1, low_bits);
+ break;
+ }
+ case DR: {
+ // reg-reg pair should be even-odd pair, assert r1 is an even register
+ DCHECK(r1 % 2 == 0);
+ // leftmost 32 bits of the dividend are in r1
+ // rightmost 32 bits of the dividend are in r1+1
+ // get the signed value from r1
+ int64_t dividend = static_cast<int64_t>(r1_val) << 32;
+ // get unsigned value from r1+1
+ // avoid addition with sign-extended r1+1 value
+ dividend += get_low_register<uint32_t>(r1 + 1);
+ int32_t remainder = dividend % r2_val;
+ int32_t quotient = dividend / r2_val;
+ r1_val = remainder;
+ set_low_register(r1, remainder);
+ set_low_register(r1+1, quotient);
+ break; // reg pair
+ }
+ default: UNREACHABLE(); break;
+ }
+ set_low_register(r1, r1_val);
+ break;
+ }
+ case LR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ set_low_register(r1, get_low_register<int32_t>(r2));
+ break;
+ }
+ case LDR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int64_t r2_val = get_d_register(r2);
+ set_d_register(r1, r2_val);
+ break;
+ }
+ case CR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ SetS390ConditionCode<int32_t>(r1_val, r2_val);
+ break;
+ }
+ case CLR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ uint32_t r1_val = get_low_register<uint32_t>(r1);
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ SetS390ConditionCode<uint32_t>(r1_val, r2_val);
+ break;
+ }
+ case BCR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ if (TestConditionCode(Condition(r1))) {
+ intptr_t r2_val = get_register(r2);
+#if (!V8_TARGET_ARCH_S390X && V8_HOST_ARCH_S390)
+ // On 31-bit, the top most bit may be 0 or 1, but is ignored by the
+ // hardware. Cleanse the top bit before jumping to it, unless it's one
+ // of the special PCs
+ if (r2_val != bad_lr && r2_val != end_sim_pc)
+ r2_val &= 0x7FFFFFFF;
+#endif
+ set_pc(r2_val);
+ }
+ break;
+ }
+ case LTR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ SetS390ConditionCode<int32_t>(r2_val, 0);
+ set_low_register(r1, r2_val);
+ break;
+ }
+ case ALR:
+ case SLR: {
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ uint32_t r1_val = get_low_register<uint32_t>(r1);
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ uint32_t alu_out = 0;
+ bool isOF = false;
+ if (ALR == op) {
+ alu_out = r1_val + r2_val;
+ isOF = CheckOverflowForUIntAdd(r1_val, r2_val);
+ } else if (SLR == op) {
+ alu_out = r1_val - r2_val;
+ isOF = CheckOverflowForUIntSub(r1_val, r2_val);
+ } else {
+ UNREACHABLE();
+ }
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<uint32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case LNR: {
+ // Load Negative (32)
+ RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ r2_val = (r2_val >= 0)? -r2_val : r2_val; // If pos, then negate it.
+ set_low_register(r1, r2_val);
+ condition_reg_ = (r2_val == 0)?CC_EQ:CC_LT; // CC0 - result is zero
+ // CC1 - result is negative
+ break;
+ }
+ case BASR: {
+ RRInstruction * rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ intptr_t link_addr = get_pc() + 2;
+ // If R2 is zero, the BASR does not branch.
+ int64_t r2_val = (r2 == 0)?link_addr:get_register(r2);
+#if (!V8_TARGET_ARCH_S390X && V8_HOST_ARCH_S390)
+ // On 31-bit, the top most bit may be 0 or 1, which can cause issues
+ // for stackwalker. The top bit should either be cleanse before being
+ // pushed onto the stack, or during stack walking when dereferenced.
+ // For simulator, we'll take the worst case scenario and always tag
+ // the high bit, to flush out more problems.
+ link_addr |= 0x80000000;
+#endif
+ set_register(r1, link_addr);
+ set_pc(r2_val);
+ break;
+ }
+ case LCR: {
+ RRInstruction * rrinst = reinterpret_cast<RRInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ int32_t original_r2_val = r2_val;
+ r2_val = ~r2_val;
+ r2_val = r2_val+1;
+ set_low_register(r1, r2_val);
+ SetS390ConditionCode<int32_t>(r2_val, 0);
+ // Checks for overflow where r2_val = -2147483648.
+ // Cannot do int comparison due to GCC 4.8 bug on x86.
+ // Detect INT_MIN alternatively, as it is the only value where both
+ // original and result are negative due to overflow.
+ if (r2_val < 0 && original_r2_val < 0) {
+ SetS390OverflowCode(true);
+ }
+ break;
+ }
+ case BKPT: {
+ set_pc(get_pc() + 2);
+ S390Debugger dbg(this);
+ dbg.Debug();
+ break;
+ }
+ default:
+ UNREACHABLE();
+ return false;
+ break;
+ }
+ return true;
+}
+
+
+// Decode routine for four-byte instructions
+bool Simulator::DecodeFourByte(Instruction* instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ // Pre-cast instruction to various types
+ RREInstruction* rreInst = reinterpret_cast<RREInstruction*>(instr);
+ SIInstruction* siInstr = reinterpret_cast<SIInstruction*>(instr);
+
+ switch (op) {
+ case LLGFR: {
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ set_register(r1, static_cast<uint64_t>(r2_val));
+ break;
+ }
+ case EX: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int r1 = rxinst->R1Value();
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+
+ SixByteInstr the_instr = Instruction::InstructionBits(
+ reinterpret_cast<const byte*>(b2_val + x2_val + d2_val));
+ int length = Instruction::InstructionLength(
+ reinterpret_cast<const byte*>(b2_val + x2_val + d2_val));
+
+ char new_instr_buf[8];
+ char *addr = reinterpret_cast<char *>(&new_instr_buf[0]);
+ the_instr |= static_cast<SixByteInstr>(r1_val & 0xff)
+ << (8 * length - 16);
+ Instruction::SetInstructionBits<SixByteInstr>(
+ reinterpret_cast<byte*>(addr), static_cast<SixByteInstr>(the_instr));
+ ExecuteInstruction(reinterpret_cast<Instruction*>(addr), false);
+ break;
+ }
+ case LGR: {
+ // Load Register (64)
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ set_register(r1, get_register(r2));
+ break;
+ }
+ case LDGR: {
+ // Load FPR from GPR (L <- 64)
+ uint64_t int_val = get_register(rreInst->R2Value());
+ // double double_val = bit_cast<double, uint64_t>(int_val);
+ // set_d_register_from_double(rreInst->R1Value(), double_val);
+ set_d_register(rreInst->R1Value(), int_val);
+ break;
+ }
+ case LGDR: {
+ // Load GPR from FPR (64 <- L)
+ int64_t double_val = get_d_register(rreInst->R2Value());
+ set_register(rreInst->R1Value(), double_val);
+ break;
+ }
+ case LTGR: {
+ // Load Register (64)
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r2_val = get_register(r2);
+ SetS390ConditionCode<int64_t>(r2_val, 0);
+ set_register(r1, get_register(r2));
+ break;
+ }
+ case LZDR: {
+ int r1 = rreInst->R1Value();
+ set_d_register_from_double(r1, 0.0);
+ break;
+ }
+ case CGR: {
+ // Compare (64)
+ int64_t r1_val = get_register(rreInst->R1Value());
+ int64_t r2_val = get_register(rreInst->R2Value());
+ SetS390ConditionCode<int64_t>(r1_val, r2_val);
+ break;
+ }
+ case CLGR: {
+ // Compare Logical (64)
+ uint64_t r1_val = static_cast<uint64_t>(get_register(rreInst->R1Value()));
+ uint64_t r2_val = static_cast<uint64_t>(get_register(rreInst->R2Value()));
+ SetS390ConditionCode<uint64_t>(r1_val, r2_val);
+ break;
+ }
+ case LH: {
+ // Load Halfword
+ RXInstruction * rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int r1 = rxinst->R1Value();
+ int x2 = rxinst->X2Value();
+ int b2 = rxinst->B2Value();
+
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t mem_addr = x2_val + b2_val + d2_val;
+
+ int32_t result = static_cast<int32_t>(ReadH(mem_addr, instr));
+ set_low_register(r1, result);
+ break;
+ }
+ case LHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int i = riinst->I2Value();
+ set_low_register(r1, i);
+ break;
+ }
+ case LGHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int64_t i = riinst->I2Value();
+ set_register(r1, i);
+ break;
+ }
+ case CHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int16_t i = riinst->I2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ SetS390ConditionCode<int32_t>(r1_val, i);
+ break;
+ }
+ case CGHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int64_t i = static_cast<int64_t>(riinst->I2Value());
+ int64_t r1_val = get_register(r1);
+ SetS390ConditionCode<int64_t>(r1_val, i);
+ break;
+ }
+ case BRAS: {
+ RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
+ int r1 = rilInstr->R1Value();
+ intptr_t d2 = rilInstr->I2Value();
+ intptr_t pc = get_pc();
+ set_register(r1, pc + 4); // save next instruction to register
+ set_pc(pc + d2 * 2); // update register
+ break;
+ }
+ case BRC: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int m1 = riinst->M1Value();
+ if (TestConditionCode((Condition)m1)) {
+ intptr_t offset = riinst->I2Value() * 2;
+ set_pc(get_pc() + offset);
+ }
+ break;
+ }
+ case BRCT:
+ case BRCTG: {
+ // Branch On Count (32/64).
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int64_t value = (op == BRCT)?get_low_register<int32_t>(r1):
+ get_register(r1);
+ if (BRCT == op)
+ set_low_register(r1, --value);
+ else
+ set_register(r1, --value);
+ // Branch if value != 0
+ if (value != 0) {
+ intptr_t offset = riinst->I2Value() * 2;
+ set_pc(get_pc() + offset);
+ }
+ break;
+ }
+ case BXH: {
+ RSInstruction* rsinst = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsinst->R1Value();
+ int r3 = rsinst->R3Value();
+ int b2 = rsinst->B2Value();
+ int d2 = rsinst->D2Value();
+
+ // r1_val is the first operand, r3_val is the increment
+ int32_t r1_val = r1 == 0 ? 0 : get_register(r1);
+ int32_t r3_val = r2 == 0 ? 0 : get_register(r3);
+ intptr_t b2_val = b2 == 0 ? 0 : get_register(b2);
+ intptr_t branch_address = b2_val + d2;
+ // increment r1_val
+ r1_val += r3_val;
+
+ // if the increment is even, then it designates a pair of registers
+ // and the contents of the even and odd registers of the pair are used as
+ // the increment and compare value respectively. If the increment is odd,
+ // the increment itself is used as both the increment and compare value
+ int32_t compare_val = r3 % 2 == 0 ? get_register(r3+1) : r3_val;
+ if (r1_val > compare_val) {
+ // branch to address if r1_val is greater than compare value
+ set_pc(branch_address);
+ }
+
+ // update contents of register in r1 with the new incremented value
+ set_register(r1, r1_val);
+ break;
+ }
+ case IIHH: case IIHL: case IILH: case IILL: {
+ UNIMPLEMENTED();
+ break;
+ }
+ case STM:
+ case LM: {
+ // Store Multiple 32-bits.
+ RSInstruction* rsinstr = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsinstr->R1Value();
+ int r3 = rsinstr->R3Value();
+ int rb = rsinstr->B2Value();
+ int offset = rsinstr->D2Value();
+
+ // Regs roll around if r3 is less than r1.
+ // Artifically increase r3 by 16 so we can calculate
+ // the number of regs stored properly.
+ if (r3 < r1)
+ r3 += 16;
+
+ int32_t rb_val = (rb == 0) ? 0 : get_low_register<int32_t>(rb);
+
+ // Store each register in ascending order.
+ for (int i = 0; i <= r3 - r1; i++) {
+ if (op == STM) {
+ int32_t value = get_low_register<int32_t>((r1 + i) % 16);
+ WriteW(rb_val + offset + 4 * i, value, instr);
+ } else if (op == LM) {
+ int32_t value = ReadW(rb_val + offset + 4 * i, instr);
+ set_low_register((r1 + i) % 16, value);
+ }
+ }
+ break;
+ }
+ case SLL:
+ case SRL: {
+ RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsInstr->R1Value();
+ int b2 = rsInstr->B2Value();
+ intptr_t d2 = rsInstr->D2Value();
+ // only takes rightmost 6bits
+ int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ uint32_t r1_val = get_low_register<uint32_t>(r1);
+ uint32_t alu_out = 0;
+ if (SLL == op) {
+ alu_out = r1_val << shiftBits;
+ } else if (SRL == op) {
+ alu_out = r1_val >> shiftBits;
+ } else {
+ UNREACHABLE();
+ }
+ set_low_register(r1, alu_out);
+ break;
+ }
+ case SLA:
+ case SRA: {
+ RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsInstr->R1Value();
+ int b2 = rsInstr->B2Value();
+ intptr_t d2 = rsInstr->D2Value();
+ // only takes rightmost 6bits
+ int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ int32_t alu_out = 0;
+ bool isOF = false;
+ if (op == SLA) {
+ isOF = CheckOverflowForShiftLeft(r1_val, shiftBits);
+ alu_out = r1_val << shiftBits;
+ } else if (op == SRA) {
+ alu_out = r1_val >> shiftBits;
+ }
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case LLHR: { UNIMPLEMENTED(); break; }
+ case LLGHR: { UNIMPLEMENTED(); break; }
+ case L:
+ case LA:
+ case LD:
+ case LE: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int32_t r1 = rxinst->R1Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t addr = b2_val + x2_val + d2_val;
+ if (op == L) {
+ int32_t mem_val = ReadW(addr, instr);
+ set_low_register(r1, mem_val);
+ } else if (op == LA) {
+ set_register(r1, addr);
+ } else if (op == LD) {
+ int64_t dbl_val = *reinterpret_cast<int64_t*>(addr);
+ set_d_register(r1, dbl_val);
+ } else if (op == LE) {
+ uint32_t float_val = *reinterpret_cast<uint32_t*>(addr);
+ set_d_register(r1, static_cast<uint64_t>(float_val));
+ }
+ break;
+ }
+ case C:
+ case CL: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t addr = b2_val + x2_val + d2_val;
+ int32_t mem_val = ReadW(addr, instr);
+ if (C == op)
+ SetS390ConditionCode<int32_t>(r1_val, mem_val);
+ else if (CL == op)
+ SetS390ConditionCode<uint32_t>(r1_val, mem_val);
+ break;
+ }
+ case CLI: {
+ // Compare Immediate (Mem - Imm) (8)
+ int b1 = siInstr->B1Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t d1_val = siInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+ uint8_t mem_val = ReadB(addr);
+ uint8_t imm_val = siInstr->I2Value();
+ SetS390ConditionCode<uint8_t>(mem_val, imm_val);
+ break;
+ }
+ case TM: {
+ // Test Under Mask (Mem - Imm) (8)
+ int b1 = siInstr->B1Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t d1_val = siInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+ uint8_t mem_val = ReadB(addr);
+ uint8_t imm_val = siInstr->I2Value();
+ uint8_t selected_bits = mem_val & imm_val;
+ // CC0: Selected bits are zero
+ // CC1: Selected bits mixed zeros and ones
+ // CC3: Selected bits all ones
+ if (0 == selected_bits) {
+ condition_reg_ = CC_EQ; // CC0
+ } else if (selected_bits == imm_val) {
+ condition_reg_ = 0x1; // CC3
+ } else {
+ condition_reg_ = 0x4; // CC1
+ }
+ break;
+ }
+ case ST:
+ case STE:
+ case STD: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t addr = b2_val + x2_val + d2_val;
+ if (op == ST) {
+ WriteW(addr, r1_val, instr);
+ } else if (op == STD) {
+ int64_t frs_val = get_d_register(rxinst->R1Value());
+ WriteDW(addr, frs_val);
+ } else if (op == STE) {
+ int64_t frs_val = get_d_register(rxinst->R1Value());
+ WriteW(addr, static_cast<int32_t>(frs_val), instr);
+ }
+ break;
+ }
+ case LTGFR:
+ case LGFR: {
+ // Load and Test Register (64 <- 32) (Sign Extends 32-bit val)
+ // Load Register (64 <- 32) (Sign Extends 32-bit val)
+ RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInstr->R1Value();
+ int r2 = rreInstr->R2Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ int64_t result = static_cast<int64_t>(r2_val);
+ set_register(r1, result);
+
+ if (LTGFR == op)
+ SetS390ConditionCode<int64_t>(result, 0);
+ break;
+ }
+ case LNGR: {
+ // Load Negative (64)
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r2_val = get_register(r2);
+ r2_val = (r2_val >= 0)? -r2_val : r2_val; // If pos, then negate it.
+ set_register(r1, r2_val);
+ condition_reg_ = (r2_val == 0)?CC_EQ:CC_LT; // CC0 - result is zero
+ // CC1 - result is negative
+ break;
+ }
+ case TRAP4: {
+ // whack the space of the caller allocated stack
+ int64_t sp_addr = get_register(sp);
+ for (int i = 0; i < kCalleeRegisterSaveAreaSize / kPointerSize; ++i) {
+ // we dont want to whack the RA (r14)
+ if (i != 14) (reinterpret_cast<intptr_t*>(sp_addr))[i] = 0xdeadbabe;
+ }
+ SoftwareInterrupt(instr);
+ break;
+ }
+ case STC: {
+ // Store Character/Byte
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ uint8_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t mem_addr = b2_val + x2_val + d2_val;
+ WriteB(mem_addr, r1_val);
+ break;
+ }
+ case STH: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int16_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t mem_addr = b2_val + x2_val + d2_val;
+ WriteH(mem_addr, r1_val, instr);
+ break;
+ }
+#if V8_TARGET_ARCH_S390X
+ case LCGR: {
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r2_val = get_register(r2);
+ r2_val = ~r2_val;
+ r2_val = r2_val+1;
+ set_register(r1, r2_val);
+ SetS390ConditionCode<int64_t>(r2_val, 0);
+ // if the input is INT_MIN, loading its compliment would be overflowing
+ if (r2_val < 0 && (r2_val + 1) > 0) {
+ SetS390OverflowCode(true);
+ }
+ break;
+ }
+#endif
+ case SRDA: {
+ RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsInstr->R1Value();
+ DCHECK(r1 % 2 == 0); // must be a reg pair
+ int b2 = rsInstr->B2Value();
+ intptr_t d2 = rsInstr->D2Value();
+ // only takes rightmost 6bits
+ int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ int64_t opnd1 = static_cast<int64_t>(get_low_register<int32_t>(r1)) <<32;
+ int64_t opnd2 = static_cast<uint64_t>(get_low_register<uint32_t>(r1+1));
+ int64_t r1_val = opnd1 + opnd2;
+ int64_t alu_out = r1_val >> shiftBits;
+ set_low_register(r1, alu_out >> 32);
+ set_low_register(r1 + 1, alu_out & 0x00000000FFFFFFFF);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ break;
+ }
+ case SRDL: {
+ RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
+ int r1 = rsInstr->R1Value();
+ DCHECK(r1 % 2 == 0); // must be a reg pair
+ int b2 = rsInstr->B2Value();
+ intptr_t d2 = rsInstr->D2Value();
+ // only takes rightmost 6bits
+ int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ uint64_t opnd1 = static_cast<uint64_t>(
+ get_low_register<uint32_t>(r1)) << 32;
+ uint64_t opnd2 = static_cast<uint64_t>(
+ get_low_register<uint32_t>(r1 + 1));
+ uint64_t r1_val = opnd1 | opnd2;
+ uint64_t alu_out = r1_val >> shiftBits;
+ set_low_register(r1, alu_out >> 32);
+ set_low_register(r1 + 1, alu_out & 0x00000000FFFFFFFF);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ break;
+ }
+ default: {
+ return DecodeFourByteArithmetic(instr);
+ }
+ }
+ return true;
+}
+
+
+/**
+ * Decodes and simulates four byte arithmetic instructions
+ */
+bool Simulator::DecodeFourByteArithmetic(Instruction* instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ // Pre-cast instruction to various types
+ RRFInstruction *rrfInst = reinterpret_cast<RRFInstruction*>(instr);
+ RREInstruction* rreInst = reinterpret_cast<RREInstruction*>(instr);
+
+ switch (op) {
+ case AGR:
+ case SGR:
+ case OGR:
+ case NGR:
+ case XGR: {
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r1_val = get_register(r1);
+ int64_t r2_val = get_register(r2);
+ bool isOF = false;
+ switch (op) {
+ case AGR:
+ isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+ r1_val += r2_val;
+ SetS390ConditionCode<int64_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case SGR:
+ isOF = CheckOverflowForIntSub(r1_val, r2_val);
+ r1_val -= r2_val;
+ SetS390ConditionCode<int64_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case OGR:
+ r1_val |= r2_val;
+ SetS390BitWiseConditionCode<uint64_t>(r1_val);
+ break;
+ case NGR:
+ r1_val &= r2_val;
+ SetS390BitWiseConditionCode<uint64_t>(r1_val);
+ break;
+ case XGR:
+ r1_val ^= r2_val;
+ SetS390BitWiseConditionCode<uint64_t>(r1_val);
+ break;
+ default: UNREACHABLE(); break;
+ }
+ set_register(r1, r1_val);
+ break;
+ }
+ case AGFR: {
+ // Add Register (64 <- 32) (Sign Extends 32-bit val)
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r1_val = get_register(r1);
+ int64_t r2_val = static_cast<int64_t>(get_low_register<int32_t>(r2));
+ bool isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+ r1_val += r2_val;
+ SetS390ConditionCode<int64_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r1_val);
+ break;
+ }
+ case SGFR: {
+ // Sub Reg (64 <- 32)
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ int64_t r1_val = get_register(r1);
+ int64_t r2_val = static_cast<int64_t>(get_low_register<int32_t>(r2));
+ bool isOF = false;
+ isOF = CheckOverflowForIntSub(r1_val, r2_val);
+ r1_val -= r2_val;
+ SetS390ConditionCode<int64_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r1_val);
+ break;
+ }
+ case ARK:
+ case SRK:
+ case NRK:
+ case ORK:
+ case XRK: {
+ // 32-bit Non-clobbering arithmetics / bitwise ops
+ int r1 = rrfInst->R1Value();
+ int r2 = rrfInst->R2Value();
+ int r3 = rrfInst->R3Value();
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ int32_t r3_val = get_low_register<int32_t>(r3);
+ if (ARK == op) {
+ bool isOF = CheckOverflowForIntAdd(r2_val, r3_val);
+ SetS390ConditionCode<int32_t>(r2_val + r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_low_register(r1, r2_val + r3_val);
+ } else if (SRK == op) {
+ bool isOF = CheckOverflowForIntSub(r2_val, r3_val);
+ SetS390ConditionCode<int32_t>(r2_val - r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_low_register(r1, r2_val - r3_val);
+ } else {
+ // Assume bitwise operation here
+ uint32_t bitwise_result = 0;
+ if (NRK == op) {
+ bitwise_result = r2_val & r3_val;
+ } else if (ORK == op) {
+ bitwise_result = r2_val | r3_val;
+ } else if (XRK == op) {
+ bitwise_result = r2_val ^ r3_val;
+ }
+ SetS390BitWiseConditionCode<uint32_t>(bitwise_result);
+ set_low_register(r1, bitwise_result);
+ }
+ break;
+ }
+ case ALRK:
+ case SLRK: {
+ // 32-bit Non-clobbering unsigned arithmetics
+ int r1 = rrfInst->R1Value();
+ int r2 = rrfInst->R2Value();
+ int r3 = rrfInst->R3Value();
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ uint32_t r3_val = get_low_register<uint32_t>(r3);
+ if (ALRK == op) {
+ bool isOF = CheckOverflowForUIntAdd(r2_val, r3_val);
+ SetS390ConditionCode<uint32_t>(r2_val + r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_low_register(r1, r2_val + r3_val);
+ } else if (SLRK == op) {
+ bool isOF = CheckOverflowForUIntSub(r2_val, r3_val);
+ SetS390ConditionCode<uint32_t>(r2_val - r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_low_register(r1, r2_val - r3_val);
+ }
+ break;
+ }
+ case AGRK:
+ case SGRK:
+ case NGRK:
+ case OGRK:
+ case XGRK: {
+ // 64-bit Non-clobbering arithmetics / bitwise ops.
+ int r1 = rrfInst->R1Value();
+ int r2 = rrfInst->R2Value();
+ int r3 = rrfInst->R3Value();
+ int64_t r2_val = get_register(r2);
+ int64_t r3_val = get_register(r3);
+ if (AGRK == op) {
+ bool isOF = CheckOverflowForIntAdd(r2_val, r3_val);
+ SetS390ConditionCode<int64_t>(r2_val + r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r2_val + r3_val);
+ } else if (SGRK == op) {
+ bool isOF = CheckOverflowForIntSub(r2_val, r3_val);
+ SetS390ConditionCode<int64_t>(r2_val - r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r2_val - r3_val);
+ } else {
+ // Assume bitwise operation here
+ uint64_t bitwise_result = 0;
+ if (NGRK == op) {
+ bitwise_result = r2_val & r3_val;
+ } else if (OGRK == op) {
+ bitwise_result = r2_val | r3_val;
+ } else if (XGRK == op) {
+ bitwise_result = r2_val ^ r3_val;
+ }
+ SetS390BitWiseConditionCode<uint64_t>(bitwise_result);
+ set_register(r1, bitwise_result);
+ }
+ break;
+ }
+ case ALGRK:
+ case SLGRK: {
+ // 64-bit Non-clobbering unsigned arithmetics
+ int r1 = rrfInst->R1Value();
+ int r2 = rrfInst->R2Value();
+ int r3 = rrfInst->R3Value();
+ uint64_t r2_val = get_register(r2);
+ uint64_t r3_val = get_register(r3);
+ if (ALGRK == op) {
+ bool isOF = CheckOverflowForUIntAdd(r2_val, r3_val);
+ SetS390ConditionCode<uint64_t>(r2_val + r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r2_val + r3_val);
+ } else if (SLGRK == op) {
+ bool isOF = CheckOverflowForUIntSub(r2_val, r3_val);
+ SetS390ConditionCode<uint64_t>(r2_val - r3_val, 0);
+ SetS390OverflowCode(isOF);
+ set_register(r1, r2_val - r3_val);
+ }
+ break;
+ }
+ case AHI:
+ case MHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int i = riinst->I2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ bool isOF = false;
+ switch (op) {
+ case AHI:
+ isOF = CheckOverflowForIntAdd(r1_val, i);
+ r1_val += i;
+ break;
+ case MHI:
+ isOF = CheckOverflowForMul(r1_val, i);
+ r1_val *= i;
+ break; // no overflow indication is given
+ default: break;
+ }
+ set_low_register(r1, r1_val);
+ SetS390ConditionCode<int32_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case AGHI:
+ case MGHI: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int64_t i = static_cast<int64_t>(riinst->I2Value());
+ int64_t r1_val = get_register(r1);
+ bool isOF = false;
+ switch (op) {
+ case AGHI:
+ isOF = CheckOverflowForIntAdd(r1_val, i);
+ r1_val += i;
+ break;
+ case MGHI:
+ isOF = CheckOverflowForMul(r1_val, i);
+ r1_val *= i;
+ break; // no overflow indication is given
+ default: break;
+ }
+ set_register(r1, r1_val);
+ SetS390ConditionCode<int32_t>(r1_val, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case MLR: {
+ RREInstruction* rreinst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreinst->R1Value();
+ int r2 = rreinst->R2Value();
+ DCHECK(r1 % 2 == 0);
+
+ uint32_t r1_val = get_low_register<uint32_t>(r1 + 1);
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ uint64_t product = static_cast<uint64_t>(r1_val)
+ * static_cast<uint64_t>(r2_val);
+ int32_t high_bits = product >> 32;
+ int32_t low_bits = product & 0x00000000FFFFFFFF;
+ set_low_register(r1, high_bits);
+ set_low_register(r1 + 1, low_bits);
+ break;
+ }
+ case DLR: {
+ RREInstruction* rreinst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreinst->R1Value();
+ int r2 = rreinst->R2Value();
+ uint32_t r1_val = get_low_register<uint32_t>(r1);
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ DCHECK(r1 % 2 == 0);
+ uint64_t dividend = static_cast<uint64_t>(r1_val) << 32;
+ dividend += get_low_register<uint32_t>(r1 + 1);
+ uint32_t remainder = dividend % r2_val;
+ uint32_t quotient = dividend / r2_val;
+ r1_val = remainder;
+ set_low_register(r1, remainder);
+ set_low_register(r1+1, quotient);
+ break;
+ }
+ case A:
+ case S:
+ case M:
+ case D:
+ case O:
+ case N:
+ case X: {
+ // 32-bit Reg-Mem instructions
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ int32_t mem_val = ReadW(b2_val + x2_val + d2_val, instr);
+ int32_t alu_out = 0;
+ bool isOF = false;
+ switch (op) {
+ case A:
+ isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+ alu_out = r1_val + mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case S:
+ isOF = CheckOverflowForIntSub(r1_val, mem_val);
+ alu_out = r1_val - mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ case M:
+ case D:
+ UNIMPLEMENTED();
+ break;
+ case O:
+ alu_out = r1_val | mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ case N:
+ alu_out = r1_val & mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ case X:
+ alu_out = r1_val ^ mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ set_low_register(r1, alu_out);
+ break;
+ }
+ case OILL:
+ case OIHL: {
+ RIInstruction* riInst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riInst->R1Value();
+ int i = riInst->I2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ if (OILL == op) {
+ // CC is set based on the 16 bits that are AND'd
+ SetS390BitWiseConditionCode<uint16_t>(r1_val | i);
+ } else if (OILH == op) {
+ // CC is set based on the 16 bits that are AND'd
+ SetS390BitWiseConditionCode<uint16_t>((r1_val >> 16) | i);
+ i = i << 16;
+ } else {
+ UNIMPLEMENTED();
+ }
+ set_low_register(r1, r1_val | i);
+ break;
+ }
+ case NILL:
+ case NILH: {
+ RIInstruction* riInst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riInst->R1Value();
+ int i = riInst->I2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ if (NILL == op) {
+ // CC is set based on the 16 bits that are AND'd
+ SetS390BitWiseConditionCode<uint16_t>(r1_val & i);
+ i |= 0xFFFF0000;
+ } else if (NILH == op) {
+ // CC is set based on the 16 bits that are AND'd
+ SetS390BitWiseConditionCode<uint16_t>((r1_val >> 16) & i);
+ i = (i << 16) | 0x0000FFFF;
+ } else {
+ UNIMPLEMENTED();
+ }
+ set_low_register(r1, r1_val & i);
+ break;
+ }
+ case AH:
+ case SH:
+ case MH: {
+ RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxinst->D2Value();
+ intptr_t addr = b2_val + x2_val + d2_val;
+ int16_t mem_val = ReadH(addr, instr);
+ int32_t alu_out = 0;
+ bool isOF = false;
+ if (AH == op) {
+ isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+ alu_out = r1_val + mem_val;
+ } else if (SH == op) {
+ isOF = CheckOverflowForIntSub(r1_val, mem_val);
+ alu_out = r1_val - mem_val;
+ } else if (MH == op) {
+ alu_out = r1_val * mem_val;
+ } else {
+ UNREACHABLE();
+ }
+ set_low_register(r1, alu_out);
+ if (MH != op) { // MH does not change condition code
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ }
+ break;
+ }
+ case DSGR: {
+ RREInstruction * rreInst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+
+ DCHECK(r1 % 2 == 0);
+
+ int64_t dividend = get_register(r1+1);
+ int64_t divisor = get_register(r2);
+ set_register(r1, dividend % divisor);
+ set_register(r1+1, dividend / divisor);
+
+ break;
+ }
+ case FLOGR: {
+ RREInstruction * rreInst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+
+ DCHECK(r1 % 2 == 0);
+
+ int64_t r2_val = get_register(r2);
+
+ int i = 0;
+ for (; i < 64; i++) {
+ if (r2_val < 0) break;
+ r2_val <<= 1;
+ }
+
+ r2_val = get_register(r2);
+
+ int64_t mask = ~(1 << (63 - i));
+ set_register(r1, i);
+ set_register(r1+1, r2_val & mask);
+
+ break;
+ }
+ case MSR:
+ case MSGR: { // they do not set overflow code
+ RREInstruction * rreInst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ if (op == MSR) {
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ set_low_register(r1, r1_val * r2_val);
+ } else if (op == MSGR) {
+ int64_t r1_val = get_register(r1);
+ int64_t r2_val = get_register(r2);
+ set_register(r1, r1_val * r2_val);
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ case MS: {
+ RXInstruction * rxinst = reinterpret_cast<RXInstruction*>(instr);
+ int r1 = rxinst->R1Value();
+ int b2 = rxinst->B2Value();
+ int x2 = rxinst->X2Value();
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t d2_val = rxinst->D2Value();
+ int32_t mem_val = ReadW(b2_val + x2_val + d2_val, instr);
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ set_low_register(r1, r1_val * mem_val);
+ break;
+ }
+ case LGBR:
+ case LBR: {
+ RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+#ifdef V8_TARGET_ARCH_S390X
+ int64_t r2_val = get_low_register<int64_t>(r2);
+ r2_val <<= 56;
+ r2_val >>= 56;
+ set_register(r1, r2_val);
+#else
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ r2_val <<= 24;
+ r2_val >>= 24;
+ set_low_register(r1, r2_val);
+#endif
+ break;
+ }
+ case LHR: {
+ RREInstruction* rrinst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rrinst->R1Value();
+ int r2 = rrinst->R2Value();
+#ifdef V8_TARGET_ARCH_S390X
+ int64_t r2_val = get_low_register<int64_t>(r2);
+ r2_val <<= 48;
+ r2_val >>= 48;
+ set_register(r1, r2_val);
+#else
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ r2_val <<= 16;
+ r2_val >>= 16;
+ set_low_register(r1, r2_val);
+#endif
+ break;
+ }
+ default: {
+ return DecodeFourByteFloatingPoint(instr);
+ }
+ }
+ return true;
+}
+
+
+/**
+ * Decodes and simulates four byte floating point instructions
+ */
+bool Simulator::DecodeFourByteFloatingPoint(Instruction* instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ switch (op) {
+ case ADBR:
+ case SDBR:
+ case MDBR:
+ case MADBR:
+ case DDBR:
+ case CDBR:
+ case CDFBR:
+ case CDGBR:
+ case CFDBR:
+ case CGDBR:
+ case SQDBR:
+ case CFEBR:
+ case CEFBR:
+ case LCDBR:
+ case LPDBR: {
+ RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInstr->R1Value();
+ int r2 = rreInstr->R2Value();
+ double r1_val = get_double_from_d_register(r1);
+ double r2_val = get_double_from_d_register(r2);
+ if (op == ADBR) {
+ r1_val += r2_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ } else if (op == SDBR) {
+ r1_val -= r2_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ } else if (op == MDBR) {
+ r1_val *= r2_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ } else if (op == MADBR) {
+ RRDInstruction* rrdInstr = reinterpret_cast<RRDInstruction*>(instr);
+ int r1 = rrdInstr->R1Value();
+ int r2 = rrdInstr->R2Value();
+ int r3 = rrdInstr->R3Value();
+ double r1_val = get_double_from_d_register(r1);
+ double r2_val = get_double_from_d_register(r2);
+ double r3_val = get_double_from_d_register(r3);
+ r1_val += r2_val * r3_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ } else if (op == DDBR) {
+ r1_val /= r2_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ } else if (op == CDBR) {
+ if (isNaN(r1_val) || isNaN(r2_val)) {
+ condition_reg_ = CC_OF;
+ } else {
+ SetS390ConditionCode<double>(r1_val, r2_val);
+ }
+ } else if (op == CDGBR) {
+ int64_t r2_val = get_register(r2);
+ double r1_val = static_cast<double>(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ } else if (op == CDFBR) {
+ // TODO(ALANLI): actually we need to set rounding mode
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ double r1_val = static_cast<double>(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ } else if (op == CEFBR) {
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ float r1_val = static_cast<float>(r2_val);
+ set_d_register_from_float(r1, r1_val);
+ } else if (op == CFDBR) {
+ int mask_val = rreInstr->M3Value();
+ int32_t r1_val = 0;
+
+ if (r2_val == 0.0)
+ condition_reg_ = 8;
+ else if (r2_val < 0.0)
+ condition_reg_ = 4;
+ else if (r2_val > 0.0)
+ condition_reg_ = 2;
+ else
+ condition_reg_ = 1;
+
+ switch (mask_val) {
+ case CURRENT_ROUNDING_MODE:
+ case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: {
+ r1_val = static_cast<int32_t>(r2_val);
+ break;
+ }
+ case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: {
+ double ceil_val = std::ceil(r2_val);
+ double floor_val = std::floor(r2_val);
+ double sub_val1 = std::fabs(r2_val - floor_val);
+ double sub_val2 = std::fabs(r2_val - ceil_val);
+ if (sub_val1 > sub_val2) {
+ r1_val = static_cast<int32_t>(ceil_val);
+ } else if (sub_val1 < sub_val2) {
+ r1_val = static_cast<int32_t>(floor_val);
+ } else { // round away from zero:
+ if (r2_val > 0.0) {
+ r1_val = static_cast<int32_t>(ceil_val);
+ } else {
+ r1_val = static_cast<int32_t>(floor_val);
+ }
+ }
+ break;
+ }
+ case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: {
+ double ceil_val = std::ceil(r2_val);
+ double floor_val = std::floor(r2_val);
+ double sub_val1 = std::fabs(r2_val - floor_val);
+ double sub_val2 = std::fabs(r2_val - ceil_val);
+ if (sub_val1 > sub_val2) {
+ r1_val = static_cast<int32_t>(ceil_val);
+ } else if (sub_val1 < sub_val2) {
+ r1_val = static_cast<int32_t>(floor_val);
+ } else { // check which one is even:
+ int32_t c_v = static_cast<int32_t>(ceil_val);
+ int32_t f_v = static_cast<int32_t>(floor_val);
+ if (f_v % 2 == 0)
+ r1_val = f_v;
+ else
+ r1_val = c_v;
+ }
+ break;
+ }
+ case ROUND_TOWARD_0: {
+ // check for overflow, cast r2_val to 64bit integer
+ // then check value within the range of INT_MIN and INT_MAX
+ // and set condition code accordingly
+ int64_t temp = static_cast<int64_t>(r2_val);
+ if (temp < INT_MIN || temp > INT_MAX) {
+ condition_reg_ = CC_OF;
+ }
+ r1_val = static_cast<int32_t>(r2_val);
+ break;
+ }
+ case ROUND_TOWARD_PLUS_INFINITE: {
+ r1_val = static_cast<int32_t>(std::ceil(r2_val));
+ break;
+ }
+ case ROUND_TOWARD_MINUS_INFINITE: {
+ // check for overflow, cast r2_val to 64bit integer
+ // then check value within the range of INT_MIN and INT_MAX
+ // and set condition code accordingly
+ int64_t temp = static_cast<int64_t>(std::floor(r2_val));
+ if (temp < INT_MIN || temp > INT_MAX) {
+ condition_reg_ = CC_OF;
+ }
+ r1_val = static_cast<int32_t>(std::floor(r2_val));
+ break;
+ }
+ default: UNREACHABLE();
+ }
+ set_low_register(r1, r1_val);
+ } else if (op == CGDBR) {
+ int mask_val = rreInstr->M3Value();
+ int64_t r1_val = 0;
+
+ if (r2_val == 0.0)
+ condition_reg_ = 8;
+ else if (r2_val < 0.0)
+ condition_reg_ = 4;
+ else if (r2_val > 0.0)
+ condition_reg_ = 2;
+ else
+ condition_reg_ = 1;
+
+ switch (mask_val) {
+ case CURRENT_ROUNDING_MODE:
+ case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0:
+ case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: {
+ UNIMPLEMENTED();
+ break;
+ }
+ case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: {
+ double ceil_val = std::ceil(r2_val);
+ double floor_val = std::floor(r2_val);
+ if (abs(r2_val - floor_val) > abs(r2_val - ceil_val)) {
+ r1_val = static_cast<int64_t>(ceil_val);
+ } else if (abs(r2_val - floor_val) < abs(r2_val - ceil_val)) {
+ r1_val = static_cast<int64_t>(floor_val);
+ } else { // check which one is even:
+ int64_t c_v = static_cast<int64_t>(ceil_val);
+ int64_t f_v = static_cast<int64_t>(floor_val);
+ if (f_v % 2 == 0)
+ r1_val = f_v;
+ else
+ r1_val = c_v;
+ }
+ break;
+ }
+ case ROUND_TOWARD_0: {
+ r1_val = static_cast<int64_t>(r2_val);
+ break;
+ }
+ case ROUND_TOWARD_PLUS_INFINITE: {
+ r1_val = static_cast<int64_t>(std::ceil(r2_val));
+ break;
+ }
+ case ROUND_TOWARD_MINUS_INFINITE: {
+ r1_val = static_cast<int64_t>(std::floor(r2_val));
+ break;
+ }
+ default: UNREACHABLE();
+ }
+ set_register(r1, r1_val);
+ } else if (op == SQDBR) {
+ r1_val = std::sqrt(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ } else if (op == CFEBR) {
+ UNIMPLEMENTED();
+ } else if (op == LCDBR) {
+ r1_val = -r2_val;
+ set_d_register_from_double(r1, r1_val);
+ if (r2_val != r2_val) { // input is NaN
+ condition_reg_ = CC_OF;
+ } else if (r2_val == 0) {
+ condition_reg_ = CC_EQ;
+ } else if (r2_val < 0) {
+ condition_reg_ = CC_LT;
+ } else if (r2_val > 0) {
+ condition_reg_ = CC_GT;
+ }
+ } else if (op == LPDBR) {
+ r1_val = std::fabs(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ if (r2_val != r2_val) { // input is NaN
+ condition_reg_ = CC_OF;
+ } else if (r2_val == 0) {
+ condition_reg_ = CC_EQ;
+ } else {
+ condition_reg_ = CC_GT;
+ }
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ case CDLFBR:
+ case CDLGBR:
+ case CLFDBR:
+ case CLGDBR: {
+ // TODO(AlanLi): create different behavior for different masks.
+ // need to instantiate RRFInstruciton actually.
+ RREInstruction *rreInstr = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInstr->R1Value();
+ int r2 = rreInstr->R2Value();
+ if (op == CDLFBR) {
+ uint32_t r2_val = get_low_register<uint32_t>(r2);
+ double r1_val = static_cast<double>(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ } else if (op == CDLGBR) {
+ uint64_t r2_val = get_low_register<uint64_t>(r2);
+ double r1_val = static_cast<double>(r2_val);
+ set_d_register_from_double(r1, r1_val);
+ } else if (op == CLFDBR) {
+ double r2_val = get_double_from_d_register(r2);
+ uint32_t r1_val = static_cast<uint32_t>(r1);
+ set_low_register(r1, r1_val);
+ SetS390ConditionCode<double>(r2_val, 0);
+ } else if (op == CLGDBR) {
+ double r2_val = get_double_from_d_register(r2);
+ uint64_t r1_val = static_cast<uint64_t>(r1);
+ set_register(r1, r1_val);
+ SetS390ConditionCode<double>(r2_val, 0);
+ }
+ break;
+ }
+ case TMLL: {
+ RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
+ int r1 = riinst->R1Value();
+ int mask = riinst->I2Value() & 0x0000FFFF;
+ if (mask == 0) {
+ condition_reg_ = 0x0;
+ break;
+ }
+ uint32_t r1_val = get_low_register<uint32_t>(r1);
+ r1_val = r1_val & 0x0000FFFF; // uses only the last 16bits
+
+ // Test if all selected bits are Zero
+ bool allSelectedBitsAreZeros = true;
+ for (int i = 0; i < 15; i++) {
+ if (mask & (1 << i)) {
+ if (r1_val & (1 << i)) {
+ allSelectedBitsAreZeros = false;
+ break;
+ }
+ }
+ }
+ if (allSelectedBitsAreZeros) {
+ condition_reg_ = 0x8;
+ break; // Done!
+ }
+
+ // Test if all selected bits are one
+ bool allSelectedBitsAreOnes = true;
+ for (int i = 0; i < 15; i++) {
+ if (mask & (1 << i)) {
+ if (!(r1_val & (1 << i))) {
+ allSelectedBitsAreOnes = false;
+ break;
+ }
+ }
+ }
+ if (allSelectedBitsAreOnes) {
+ condition_reg_ = 0x1;
+ break; // Done!
+ }
+
+ // Now we know selected bits mixed zeros and ones
+ // Test if the leftmost bit is zero or one
+ for (int i = 14; i >= 0; i--) {
+ if (mask & (1 << i)) {
+ if (r1_val & (1 << i)) {
+ // leftmost bit is one
+ condition_reg_ = 0x2;
+ } else {
+ // leftmost bit is zero
+ condition_reg_ = 0x4;
+ }
+ break; // Done!
+ }
+ }
+ break;
+ }
+ case LEDBR: {
+ RREInstruction* rreInst = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInst->R1Value();
+ int r2 = rreInst->R2Value();
+ double r2_val = get_double_from_d_register(r2);
+ set_d_register_from_float(r1, static_cast<float>(r2_val));
+ break;
+ }
+ case FIDBRA: {
+ RRFInstruction* rrfInst = reinterpret_cast<RRFInstruction*>(instr);
+ int r1 = rrfInst->R1Value();
+ int r2 = rrfInst->R2Value();
+ int m3 = rrfInst->M3Value();
+ double r2_val = get_double_from_d_register(r2);
+ DCHECK(rrfInst->M4Value() == 0);
+ switch (m3) {
+ case Assembler::FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0:
+ set_d_register_from_double(r1, std::round(r2_val));
+ break;
+ case Assembler::FIDBRA_ROUND_TOWARD_0:
+ set_d_register_from_double(r1, std::trunc(r2_val));
+ break;
+ case Assembler::FIDBRA_ROUND_TOWARD_POS_INF:
+ set_d_register_from_double(r1, std::ceil(r2_val));
+ break;
+ case Assembler::FIDBRA_ROUND_TOWARD_NEG_INF:
+ set_d_register_from_double(r1, std::floor(r2_val));
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ break;
+ }
+ case MSDBR: {
+ UNIMPLEMENTED();
+ break;
+ }
+ case LDEBR: {
+ RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr);
+ int r1 = rreInstr->R1Value();
+ int r2 = rreInstr->R2Value();
+ float r2_val = get_float_from_d_register(r2);
+ set_d_register_from_double(r1, static_cast<double>(r2_val));
+ break;
+ }
+ default: {
+ UNREACHABLE();
+ return false;
+ }
+ }
+ return true;
+}
+
+
+// Decode routine for six-byte instructions
+bool Simulator::DecodeSixByte(Instruction* instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ // Pre-cast instruction to various types
+ RIEInstruction* rieInstr = reinterpret_cast<RIEInstruction*>(instr);
+ RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
+ RSYInstruction* rsyInstr = reinterpret_cast<RSYInstruction*>(instr);
+ RXEInstruction* rxeInstr = reinterpret_cast<RXEInstruction*>(instr);
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ SIYInstruction* siyInstr = reinterpret_cast<SIYInstruction*>(instr);
+ SILInstruction* silInstr = reinterpret_cast<SILInstruction*>(instr);
+ SSInstruction* ssInstr = reinterpret_cast<SSInstruction*>(instr);
+
+ switch (op) {
+ case CLIY: {
+ // Compare Immediate (Mem - Imm) (8)
+ int b1 = siyInstr->B1Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t d1_val = siyInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+ uint8_t mem_val = ReadB(addr);
+ uint8_t imm_val = siyInstr->I2Value();
+ SetS390ConditionCode<uint8_t>(mem_val, imm_val);
+ break;
+ }
+ case TMY: {
+ // Test Under Mask (Mem - Imm) (8)
+ int b1 = siyInstr->B1Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t d1_val = siyInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+ uint8_t mem_val = ReadB(addr);
+ uint8_t imm_val = siyInstr->I2Value();
+ uint8_t selected_bits = mem_val & imm_val;
+ // CC0: Selected bits are zero
+ // CC1: Selected bits mixed zeros and ones
+ // CC3: Selected bits all ones
+ if (0 == selected_bits) {
+ condition_reg_ = CC_EQ; // CC0
+ } else if (selected_bits == imm_val) {
+ condition_reg_ = 0x1; // CC3
+ } else {
+ condition_reg_ = 0x4; // CC1
+ }
+ break;
+ }
+ case LDEB: {
+ // Load Float
+ int r1 = rxeInstr->R1Value();
+ int rb = rxeInstr->B2Value();
+ int rx = rxeInstr->X2Value();
+ int offset = rxeInstr->D2Value();
+ int64_t rb_val = (rb == 0) ? 0 : get_register(rb);
+ int64_t rx_val = (rx == 0) ? 0 : get_register(rx);
+ double ret = static_cast<double>(
+ *reinterpret_cast<float*>(rx_val + rb_val + offset));
+ set_d_register_from_double(r1, ret);
+ break;
+ }
+ case LAY: {
+ // Load Address
+ int r1 = rxyInstr->R1Value();
+ int rb = rxyInstr->B2Value();
+ int rx = rxyInstr->X2Value();
+ int offset = rxyInstr->D2Value();
+ int64_t rb_val = (rb == 0) ? 0 : get_register(rb);
+ int64_t rx_val = (rx == 0) ? 0 : get_register(rx);
+ set_register(r1, rx_val + rb_val + offset);
+ break;
+ }
+ case LARL: {
+ // Load Addresss Relative Long
+ int r1 = rilInstr->R1Value();
+ intptr_t offset = rilInstr->I2Value() * 2;
+ set_register(r1, get_pc() + offset);
+ break;
+ }
+ case LLILF: {
+ // Load Logical into lower 32-bits (zero extend upper 32-bits)
+ int r1 = rilInstr->R1Value();
+ uint64_t imm = static_cast<uint64_t>(rilInstr->I2UnsignedValue());
+ set_register(r1, imm);
+ break;
+ }
+ case LLIHF: {
+ // Load Logical Immediate into high word
+ int r1 = rilInstr->R1Value();
+ uint64_t imm = static_cast<uint64_t>(rilInstr->I2UnsignedValue());
+ set_register(r1, imm << 32);
+ break;
+ }
+ case OILF:
+ case NILF:
+ case IILF: {
+ // Bitwise Op on lower 32-bits
+ int r1 = rilInstr->R1Value();
+ uint32_t imm = rilInstr->I2UnsignedValue();
+ uint32_t alu_out = get_low_register<uint32_t>(r1);
+ if (NILF == op) {
+ alu_out &= imm;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (OILF == op) {
+ alu_out |= imm;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == IILF) {
+ alu_out = imm;
+ } else { DCHECK(false); }
+ set_low_register(r1, alu_out);
+ break;
+ }
+ case OIHF:
+ case NIHF:
+ case IIHF: {
+ // Bitwise Op on upper 32-bits
+ int r1 = rilInstr->R1Value();
+ uint32_t imm = rilInstr->I2Value();
+ uint32_t alu_out = get_high_register<uint32_t>(r1);
+ if (op == NIHF) {
+ alu_out &= imm;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == OIHF) {
+ alu_out |= imm;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == IIHF) {
+ alu_out = imm;
+ } else { DCHECK(false); }
+ set_high_register(r1, alu_out);
+ break;
+ }
+ case CLFI: {
+ // Compare Logical with Immediate (32)
+ int r1 = rilInstr->R1Value();
+ uint32_t imm = rilInstr->I2UnsignedValue();
+ SetS390ConditionCode<uint32_t>(get_low_register<uint32_t>(r1), imm);
+ break;
+ }
+ case CFI: {
+ // Compare with Immediate (32)
+ int r1 = rilInstr->R1Value();
+ int32_t imm = rilInstr->I2Value();
+ SetS390ConditionCode<int32_t>(get_low_register<int32_t>(r1), imm);
+ break;
+ }
+ case CLGFI: {
+ // Compare Logical with Immediate (64)
+ int r1 = rilInstr->R1Value();
+ uint64_t imm = static_cast<uint64_t>(rilInstr->I2UnsignedValue());
+ SetS390ConditionCode<uint64_t>(get_register(r1), imm);
+ break;
+ }
+ case CGFI: {
+ // Compare with Immediate (64)
+ int r1 = rilInstr->R1Value();
+ int64_t imm = static_cast<int64_t>(rilInstr->I2Value());
+ SetS390ConditionCode<int64_t>(get_register(r1), imm);
+ break;
+ }
+ case BRASL: {
+ // Branch and Save Relative Long
+ int r1 = rilInstr->R1Value();
+ intptr_t d2 = rilInstr->I2Value();
+ intptr_t pc = get_pc();
+ set_register(r1, pc + 6); // save next instruction to register
+ set_pc(pc + d2 *2); // update register
+ break;
+ }
+ case BRCL: {
+ // Branch on Condition Relative Long
+ Condition m1 = (Condition)rilInstr->R1Value();
+ if (TestConditionCode((Condition)m1)) {
+ intptr_t offset = rilInstr->I2Value() * 2;
+ set_pc(get_pc() + offset);
+ }
+ break;
+ }
+ case LMG:
+ case STMG: {
+ // Store Multiple 64-bits.
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int rb = rsyInstr->B2Value();
+ int offset = rsyInstr->D2Value();
+
+ // Regs roll around if r3 is less than r1.
+ // Artifically increase r3 by 16 so we can calculate
+ // the number of regs stored properly.
+ if (r3 < r1)
+ r3 += 16;
+
+ int64_t rb_val = (rb == 0) ? 0 : get_register(rb);
+
+ // Store each register in ascending order.
+ for (int i = 0; i <= r3 - r1; i++) {
+ if (op == LMG) {
+ int64_t value = ReadDW(rb_val + offset + 8 * i);
+ set_register((r1 + i) % 16, value);
+ } else if (op == STMG) {
+ int64_t value = get_register((r1 + i) % 16);
+ WriteDW(rb_val + offset + 8 * i, value);
+ } else { DCHECK(false); }
+ }
+ break;
+ }
+ case SLLK:
+ case RLL:
+ case SRLK: {
+ // For SLLK/SRLL, the 32-bit third operand is shifted the number
+ // of bits specified by the second-operand address, and the result is
+ // placed at the first-operand location. Except for when the R1 and R3
+ // fields designate the same register, the third operand remains
+ // unchanged in general register R3.
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int b2 = rsyInstr->B2Value();
+ intptr_t d2 = rsyInstr->D2Value();
+ // only takes rightmost 6 bits
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ // unsigned
+ uint32_t r3_val = get_low_register<uint32_t>(r3);
+ uint32_t alu_out = 0;
+ if (SLLK == op) {
+ alu_out = r3_val << shiftBits;
+ } else if (SRLK == op) {
+ alu_out = r3_val >> shiftBits;
+ } else if (RLL == op) {
+ uint32_t rotateBits = r3_val >> (32 - shiftBits);
+ alu_out = (r3_val << shiftBits) | (rotateBits);
+ } else {
+ UNREACHABLE();
+ }
+ set_low_register(r1, alu_out);
+ break;
+ }
+ case SLLG:
+ case SRLG: {
+ // For SLLG/SRLG, the 64-bit third operand is shifted the number
+ // of bits specified by the second-operand address, and the result is
+ // placed at the first-operand location. Except for when the R1 and R3
+ // fields designate the same register, the third operand remains
+ // unchanged in general register R3.
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int b2 = rsyInstr->B2Value();
+ intptr_t d2 = rsyInstr->D2Value();
+ // only takes rightmost 6 bits
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ // unsigned
+ uint64_t r3_val = get_register(r3);
+ uint64_t alu_out = 0;
+ if (op == SLLG) {
+ alu_out = r3_val << shiftBits;
+ } else if (op == SRLG) {
+ alu_out = r3_val >> shiftBits;
+ } else {
+ UNREACHABLE();
+ }
+ set_register(r1, alu_out);
+ break;
+ }
+ case SLAK:
+ case SRAK: {
+ // 32-bit non-clobbering shift-left/right arithmetic
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int b2 = rsyInstr->B2Value();
+ intptr_t d2 = rsyInstr->D2Value();
+ // only takes rightmost 6 bits
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ int32_t r3_val = get_low_register<int32_t>(r3);
+ int32_t alu_out = 0;
+ bool isOF = false;
+ if (op == SLAK) {
+ isOF = CheckOverflowForShiftLeft(r3_val, shiftBits);
+ alu_out = r3_val << shiftBits;
+ } else if (op == SRAK) {
+ alu_out = r3_val >> shiftBits;
+ }
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case SLAG:
+ case SRAG: {
+ // 64-bit non-clobbering shift-left/right arithmetic
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int b2 = rsyInstr->B2Value();
+ intptr_t d2 = rsyInstr->D2Value();
+ // only takes rightmost 6 bits
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int shiftBits = (b2_val + d2) & 0x3F;
+ int64_t r3_val = get_register(r3);
+ intptr_t alu_out = 0;
+ bool isOF = false;
+ if (op == SLAG) {
+ isOF = CheckOverflowForShiftLeft(r3_val, shiftBits);
+ alu_out = r3_val << shiftBits;
+ } else if (op == SRAG) {
+ alu_out = r3_val >> shiftBits;
+ }
+ set_register(r1, alu_out);
+ SetS390ConditionCode<intptr_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case LMY:
+ case STMY: {
+ RSYInstruction* rsyInstr = reinterpret_cast<RSYInstruction*>(instr);
+ // Load/Store Multiple (32)
+ int r1 = rsyInstr->R1Value();
+ int r3 = rsyInstr->R3Value();
+ int b2 = rsyInstr->B2Value();
+ int offset = rsyInstr->D2Value();
+
+ // Regs roll around if r3 is less than r1.
+ // Artifically increase r3 by 16 so we can calculate
+ // the number of regs stored properly.
+ if (r3 < r1)
+ r3 += 16;
+
+ int32_t b2_val = (b2 == 0) ? 0 : get_low_register<int32_t>(b2);
+
+ // Store each register in ascending order.
+ for (int i = 0; i <= r3 - r1; i++) {
+ if (op == LMY) {
+ int32_t value = ReadW(b2_val + offset + 4*i, instr);
+ set_low_register((r1 + i) % 16, value);
+ } else {
+ int32_t value = get_low_register<int32_t>((r1 + i) % 16);
+ WriteW(b2_val + offset + 4*i, value, instr);
+ }
+ }
+ break;
+ }
+ case LT:
+ case LTG: {
+ // Load and Test (32/64)
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t addr = x2_val + b2_val + d2;
+
+ if (op == LT) {
+ int32_t value = ReadW(addr, instr);
+ set_low_register(r1, value);
+ SetS390ConditionCode<int32_t>(value, 0);
+ } else if (op == LTG) {
+ int64_t value = ReadDW(addr);
+ set_register(r1, value);
+ SetS390ConditionCode<int64_t>(value, 0);
+ }
+ break;
+ }
+ case LY:
+ case LB:
+ case LGB:
+ case LG:
+ case LGF:
+ case LGH:
+ case LLGF:
+ case STG:
+ case STY:
+ case STCY:
+ case STHY:
+ case STEY:
+ case LDY:
+ case LHY:
+ case STDY:
+ case LEY: {
+ // Miscellaneous Loads and Stores
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t addr = x2_val + b2_val + d2;
+ if (op == LY) {
+ uint32_t mem_val = ReadWU(addr, instr);
+ set_low_register(r1, mem_val);
+ } else if (op == LB) {
+ int32_t mem_val = ReadB(addr);
+ set_low_register(r1, mem_val);
+ } else if (op == LGB) {
+ int64_t mem_val = ReadB(addr);
+ set_register(r1, mem_val);
+ } else if (op == LG) {
+ int64_t mem_val = ReadDW(addr);
+ set_register(r1, mem_val);
+ } else if (op == LGF) {
+ int64_t mem_val = static_cast<int64_t>(ReadW(addr, instr));
+ set_register(r1, mem_val);
+ } else if (op == LGH) {
+ int64_t mem_val = static_cast<int64_t>(ReadH(addr, instr));
+ set_register(r1, mem_val);
+ } else if (op == LLGF) {
+ uint64_t mem_val = static_cast<uint64_t>(ReadWU(addr, instr));
+ set_register(r1, mem_val);
+ } else if (op == LDY) {
+ uint64_t dbl_val = *reinterpret_cast<uint64_t*>(addr);
+ set_d_register(r1, dbl_val);
+ } else if (op == STEY) {
+ int64_t frs_val = get_d_register(r1);
+ WriteW(addr, static_cast<int32_t>(frs_val), instr);
+ } else if (op == LEY) {
+ uint32_t float_val = *reinterpret_cast<uint32_t*>(addr);
+ set_d_register(r1, static_cast<uint64_t>(float_val));
+ } else if (op == STY) {
+ uint32_t value = get_low_register<uint32_t>(r1);
+ WriteW(addr, value, instr);
+ } else if (op == STG) {
+ uint64_t value = get_register(r1);
+ WriteDW(addr, value);
+ } else if (op == STDY) {
+ int64_t frs_val = get_d_register(r1);
+ WriteDW(addr, frs_val);
+ } else if (op == STCY) {
+ uint8_t value = get_low_register<uint32_t>(r1);
+ WriteB(addr, value);
+ } else if (op == STHY) {
+ uint16_t value = get_low_register<uint32_t>(r1);
+ WriteH(addr, value, instr);
+ } else if (op == LHY) {
+ int32_t result = static_cast<int32_t>(ReadH(addr, instr));
+ set_low_register(r1, result);
+ }
+ break;
+ }
+ case MVC: {
+ // Move Character
+ int b1 = ssInstr->B1Value();
+ intptr_t d1 = ssInstr->D1Value();
+ int b2 = ssInstr->B2Value();
+ intptr_t d2 = ssInstr->D2Value();
+ int length = ssInstr->Length();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t src_addr = b2_val + d2;
+ intptr_t dst_addr = b1_val + d1;
+ // remember that the length is the actual length - 1
+ for (int i = 0; i < length + 1; ++i) {
+ WriteB(dst_addr++, ReadB(src_addr++));
+ }
+ break;
+ }
+ case MVHI: {
+ // Move Integer (32)
+ int b1 = silInstr->B1Value();
+ intptr_t d1 = silInstr->D1Value();
+ int16_t i2 = silInstr->I2Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t src_addr = b1_val + d1;
+ WriteW(src_addr, i2, instr);
+ break;
+ }
+ case MVGHI: {
+ // Move Integer (64)
+ int b1 = silInstr->B1Value();
+ intptr_t d1 = silInstr->D1Value();
+ int16_t i2 = silInstr->I2Value();
+ int64_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+ intptr_t src_addr = b1_val + d1;
+ WriteDW(src_addr, i2);
+ break;
+ }
+ case LLH:
+ case LLGH: {
+ // Load Logical Halfworld
+ int r1 = rxyInstr->R1Value();
+ int b2 = rxyInstr->B2Value();
+ int x2 = rxyInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxyInstr->D2Value();
+ uint16_t mem_val = ReadHU(b2_val + d2_val + x2_val, instr);
+ if (op == LLH) {
+ set_low_register(r1, mem_val);
+ } else if (op == LLGH) {
+ set_register(r1, mem_val);
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ case LLC:
+ case LLGC: {
+ // Load Logical Character - loads a byte and zero extends.
+ int r1 = rxyInstr->R1Value();
+ int b2 = rxyInstr->B2Value();
+ int x2 = rxyInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxyInstr->D2Value();
+ uint8_t mem_val = ReadBU(b2_val + d2_val + x2_val);
+ if (op == LLC) {
+ set_low_register(r1, static_cast<uint32_t>(mem_val));
+ } else if (op == LLGC) {
+ set_register(r1, static_cast<uint64_t>(mem_val));
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ case XIHF:
+ case XILF: {
+ int r1 = rilInstr->R1Value();
+ uint32_t imm = rilInstr->I2UnsignedValue();
+ uint32_t alu_out = 0;
+ if (op == XILF) {
+ alu_out = get_low_register<uint32_t>(r1);
+ alu_out = alu_out ^ imm;
+ set_low_register(r1, alu_out);
+ } else if (op == XIHF) {
+ alu_out = get_high_register<uint32_t>(r1);
+ alu_out = alu_out ^ imm;
+ set_high_register(r1, alu_out);
+ } else {
+ UNREACHABLE();
+ }
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ }
+ case RISBG: {
+ // Rotate then insert selected bits
+ int r1 = rieInstr->R1Value();
+ int r2 = rieInstr->R2Value();
+ // Starting Bit Position is Bits 2-7 of I3 field
+ uint32_t start_bit = rieInstr->I3Value() & 0x3F;
+ // Ending Bit Position is Bits 2-7 of I4 field
+ uint32_t end_bit = rieInstr->I4Value() & 0x3F;
+ // Shift Amount is Bits 2-7 of I5 field
+ uint32_t shift_amount = rieInstr->I5Value() & 0x3F;
+ // Zero out Remaining (unslected) bits if Bit 0 of I4 is 1.
+ bool zero_remaining = (0 != (rieInstr->I4Value() & 0x80));
+
+ uint64_t src_val = get_register(r2);
+
+ // Rotate Left by Shift Amount first
+ uint64_t rotated_val = (src_val << shift_amount) |
+ (src_val >> (64 - shift_amount));
+ int32_t width = end_bit - start_bit + 1;
+
+ uint64_t selection_mask = 0;
+ if (width < 64) {
+ selection_mask = (static_cast<uint64_t>(1) << width) - 1;
+ } else {
+ selection_mask = static_cast<uint64_t>(static_cast<int64_t>(-1));
+ }
+ selection_mask = selection_mask << (63 - end_bit);
+
+ uint64_t selected_val = rotated_val & selection_mask;
+
+ if (!zero_remaining) {
+ // Merged the unselected bits from the original value
+ selected_val = (src_val & ~selection_mask) | selected_val;
+ }
+
+ // Condition code is set by treating result as 64-bit signed int
+ SetS390ConditionCode<int64_t>(selected_val, 0);
+ set_register(r1, selected_val);
+ break;
+ }
+ default:
+ return DecodeSixByteArithmetic(instr);
+ }
+ return true;
+}
+
+
+/**
+ * Decodes and simulates six byte arithmetic instructions
+ */
+bool Simulator::DecodeSixByteArithmetic(Instruction *instr) {
+ Opcode op = instr->S390OpcodeValue();
+
+ // Pre-cast instruction to various types
+ SIYInstruction *siyInstr = reinterpret_cast<SIYInstruction*>(instr);
+
+ switch (op) {
+ case CDB:
+ case ADB:
+ case SDB:
+ case MDB:
+ case DDB:
+ case SQDB: {
+ RXEInstruction* rxeInstr = reinterpret_cast<RXEInstruction*>(instr);
+ int b2 = rxeInstr->B2Value();
+ int x2 = rxeInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxeInstr->D2Value();
+ double r1_val = get_double_from_d_register(rxeInstr->R1Value());
+ double dbl_val = ReadDouble(b2_val + x2_val + d2_val);
+
+ switch (op) {
+ case CDB:
+ SetS390ConditionCode<double>(r1_val, dbl_val);
+ break;
+ case ADB:
+ r1_val += dbl_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ break;
+ case SDB:
+ r1_val -= dbl_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ break;
+ case MDB:
+ r1_val *= dbl_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ break;
+ case DDB:
+ r1_val /= dbl_val;
+ set_d_register_from_double(r1, r1_val);
+ SetS390ConditionCode<double>(r1_val, 0);
+ break;
+ case SQDB:
+ r1_val = std::sqrt(dbl_val);
+ set_d_register_from_double(r1, r1_val);
+ default:
+ UNREACHABLE();
+ break;
+ }
+ break;
+ }
+ case LRV:
+ case LRVH:
+ case STRV:
+ case STRVH: {
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ intptr_t mem_addr = b2_val + x2_val + d2;
+
+ if (op == LRVH) {
+ int16_t mem_val = ReadH(mem_addr, instr);
+ int32_t result = ByteReverse(mem_val) & 0x0000ffff;
+ result |= r1_val & 0xffff0000;
+ set_low_register(r1, result);
+ } else if (op == LRV) {
+ int32_t mem_val = ReadW(mem_addr, instr);
+ set_low_register(r1, ByteReverse(mem_val));
+ } else if (op == STRVH) {
+ int16_t result = static_cast<int16_t>(r1_val >> 16);
+ WriteH(mem_addr, ByteReverse(result), instr);
+ } else if (op == STRV) {
+ WriteW(mem_addr, ByteReverse(r1_val), instr);
+ }
+
+ break;
+ }
+ case AHIK:
+ case AGHIK: {
+ // Non-clobbering Add Halfword Immediate
+ RIEInstruction* rieInst = reinterpret_cast<RIEInstruction*>(instr);
+ int r1 = rieInst->R1Value();
+ int r2 = rieInst->R2Value();
+ bool isOF = false;
+ if (AHIK == op) {
+ // 32-bit Add
+ int32_t r2_val = get_low_register<int32_t>(r2);
+ int32_t imm = rieInst->I6Value();
+ isOF = CheckOverflowForIntAdd(r2_val, imm);
+ set_low_register(r1, r2_val + imm);
+ SetS390ConditionCode<int32_t>(r2_val + imm, 0);
+ } else if (AGHIK == op) {
+ // 64-bit Add
+ int64_t r2_val = get_register(r2);
+ int64_t imm = static_cast<int64_t>(rieInst->I6Value());
+ isOF = CheckOverflowForIntAdd(r2_val, imm);
+ set_register(r1, r2_val + imm);
+ SetS390ConditionCode<int64_t>(r2_val + imm, 0);
+ }
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case ALFI:
+ case SLFI: {
+ RILInstruction *rilInstr = reinterpret_cast<RILInstruction*>(instr);
+ int r1 = rilInstr->R1Value();
+ uint32_t imm = rilInstr->I2UnsignedValue();
+ uint32_t alu_out = get_low_register<uint32_t>(r1);
+ if (op == ALFI) {
+ alu_out += imm;
+ } else if (op == SLFI) {
+ alu_out -= imm;
+ }
+ SetS390ConditionCode<uint32_t>(alu_out, 0);
+ set_low_register(r1, alu_out);
+ break;
+ }
+ case ML: { UNIMPLEMENTED(); break; }
+ case AY:
+ case SY:
+ case NY:
+ case OY:
+ case XY:
+ case CY: { // @TODO(Alanli): set overflow
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int32_t alu_out = get_low_register<int32_t>(r1);
+ int32_t mem_val = ReadW(b2_val + x2_val + d2, instr);
+ bool isOF = false;
+ if (op == AY) {
+ isOF = CheckOverflowForIntAdd(alu_out, mem_val);
+ alu_out += mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ } else if (op == SY) {
+ isOF = CheckOverflowForIntSub(alu_out, mem_val);
+ alu_out -= mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ } else if (op == NY) {
+ alu_out &= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == OY) {
+ alu_out |= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == XY) {
+ alu_out ^= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ } else if (op == CY) {
+ SetS390ConditionCode<int32_t>(alu_out, mem_val);
+ }
+ if (op != CY) {
+ set_low_register(r1, alu_out);
+ }
+ break;
+ }
+ case AHY:
+ case SHY: {
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int32_t r1_val = get_low_register<int32_t>(rxyInstr->R1Value());
+ int b2 = rxyInstr->B2Value();
+ int x2 = rxyInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxyInstr->D2Value();
+ int16_t mem_val = ReadH(b2_val + d2_val + x2_val, instr);
+ int32_t alu_out = 0;
+ bool isOF = false;
+ switch (op) {
+ case AHY:
+ alu_out = r1_val + mem_val;
+ isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+ break;
+ case SHY:
+ alu_out = r1_val - mem_val;
+ isOF = CheckOverflowForIntSub(r1_val, mem_val);
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case AG:
+ case SG:
+ case NG:
+ case OG:
+ case XG:
+ case CG:
+ case CLG: {
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t alu_out = get_register(r1);
+ int64_t mem_val = ReadDW(b2_val + x2_val + d2);
+
+ switch (op) {
+ case AG: {
+ alu_out += mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ break;
+ }
+ case SG: {
+ alu_out -= mem_val;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ break;
+ }
+ case NG: {
+ alu_out &= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ }
+ case OG: {
+ alu_out |= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ }
+ case XG: {
+ alu_out ^= mem_val;
+ SetS390BitWiseConditionCode<uint32_t>(alu_out);
+ break;
+ }
+ case CG: {
+ SetS390ConditionCode<int64_t>(alu_out, mem_val);
+ break;
+ }
+ case CLG: {
+ SetS390ConditionCode<uint64_t>(alu_out, mem_val);
+ break;
+ }
+ default: {
+ DCHECK(false);
+ break;
+ }
+ }
+
+ if (op != CG) {
+ set_register(r1, alu_out);
+ }
+ break;
+ }
+ case ALY:
+ case SLY:
+ case CLY: { // @TODO(AlanLi): ALY and SLY needs to set condition code.
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ int x2 = rxyInstr->X2Value();
+ int b2 = rxyInstr->B2Value();
+ int d2 = rxyInstr->D2Value();
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ uint32_t alu_out = get_low_register<uint32_t>(r1);
+ uint32_t mem_val = ReadWU(b2_val + x2_val + d2, instr);
+
+ if (op == ALY) {
+ alu_out += mem_val;
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<uint32_t>(alu_out, 0);
+ } else if (op == SLY) {
+ alu_out -= mem_val;
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<uint32_t>(alu_out, 0);
+ } else if (op == CLY) {
+ SetS390ConditionCode<uint32_t>(alu_out, mem_val);
+ }
+ break;
+ }
+ case AGFI:
+ case AFI: {
+ // Clobbering Add Word Immediate
+ RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
+ int r1 = rilInstr->R1Value();
+ int i2 = rilInstr->I2Value();
+ bool isOF = false;
+ if (AFI == op) {
+ // 32-bit Add (Register + 32-bit Immediate)
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ isOF = CheckOverflowForIntAdd(r1_val, i2);
+ int32_t alu_out = r1_val + i2;
+ set_low_register(r1, alu_out);
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ } else if (AGFI == op) {
+ // 64-bit Add (Register + 32-bit Imm)
+ int64_t r1_val = get_register(r1);
+ isOF = CheckOverflowForIntAdd(r1_val, i2);
+ int64_t alu_out = r1_val + i2;
+ set_register(r1, alu_out);
+ SetS390ConditionCode<int64_t>(alu_out, 0);
+ }
+ SetS390OverflowCode(isOF);
+ break;
+ }
+ case ASI: {
+ int8_t i2 = static_cast<int8_t>(siyInstr->I2Value());
+ int b1 = siyInstr->B1Value();
+ intptr_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+
+ int d1_val = siyInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+
+ int32_t mem_val = ReadW(addr, instr);
+ bool isOF = CheckOverflowForIntAdd(mem_val, i2);
+ int32_t alu_out = mem_val + i2;
+ SetS390ConditionCode<int32_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ WriteW(addr, alu_out, instr);
+ break;
+ }
+ case AGSI: {
+ int8_t i2 = static_cast<int8_t>(siyInstr->I2Value());
+ int b1 = siyInstr->B1Value();
+ intptr_t b1_val = (b1 == 0) ? 0 : get_register(b1);
+
+ int d1_val = siyInstr->D1Value();
+ intptr_t addr = b1_val + d1_val;
+
+ int64_t mem_val = ReadDW(addr);
+ int isOF = CheckOverflowForIntAdd(mem_val, i2);
+ int64_t alu_out = mem_val + i2;
+ SetS390ConditionCode<uint64_t>(alu_out, 0);
+ SetS390OverflowCode(isOF);
+ WriteDW(addr, alu_out);
+ break;
+ }
+ case AGF:
+ case SGF:
+ case ALG:
+ case SLG: {
+#ifndef V8_TARGET_ARCH_S390X
+ DCHECK(false);
+#endif
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ uint64_t r1_val = get_register(rxyInstr->R1Value());
+ int b2 = rxyInstr->B2Value();
+ int x2 = rxyInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxyInstr->D2Value();
+ uint64_t alu_out = r1_val;
+ if (op == ALG) {
+ uint64_t mem_val =
+ static_cast<uint64_t>(ReadDW(b2_val + d2_val + x2_val));
+ alu_out += mem_val;
+ SetS390ConditionCode<uint64_t>(alu_out, 0);
+ } else if (op == SLG) {
+ uint64_t mem_val =
+ static_cast<uint64_t>(ReadDW(b2_val + d2_val + x2_val));
+ alu_out -= mem_val;
+ SetS390ConditionCode<uint64_t>(alu_out, 0);
+ } else if (op == AGF) {
+ uint32_t mem_val = ReadW(b2_val + d2_val + x2_val, instr);
+ alu_out += mem_val;
+ SetS390ConditionCode<int64_t>(alu_out, 0);
+ } else if (op == SGF) {
+ uint32_t mem_val = ReadW(b2_val + d2_val + x2_val, instr);
+ alu_out -= mem_val;
+ SetS390ConditionCode<int64_t>(alu_out, 0);
+ } else { DCHECK(false); }
+ set_register(r1, alu_out);
+ break;
+ }
+ case ALGFI:
+ case SLGFI: { // TODO(ALANLI): add carry
+#ifndef V8_TARGET_ARCH_S390X
+ // should only be called on 64bit
+ DCHECK(false);
+#endif
+ RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
+ int r1 = rilInstr->R1Value();
+ uint32_t i2 = rilInstr->I2UnsignedValue();
+ uint64_t r1_val = (uint64_t)(get_register(r1));
+ uint64_t alu_out;
+ if (op == ALGFI)
+ alu_out = r1_val + i2;
+ else
+ alu_out = r1_val - i2;
+ set_register(r1, (intptr_t)alu_out);
+ SetS390ConditionCode<uint64_t>(alu_out, 0);
+ break;
+ }
+ case MSY:
+ case MSG: {
+ RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
+ int r1 = rxyInstr->R1Value();
+ int b2 = rxyInstr->B2Value();
+ int x2 = rxyInstr->X2Value();
+ int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+ int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+ intptr_t d2_val = rxyInstr->D2Value();
+ if (op == MSY) {
+ int32_t mem_val = ReadW(b2_val + d2_val + x2_val, instr);
+ int32_t r1_val = get_low_register<int32_t>(r1);
+ set_low_register(r1, mem_val * r1_val);
+ } else if (op == MSG) {
+ int64_t mem_val = ReadDW(b2_val + d2_val + x2_val);
+ int64_t r1_val = get_register(r1);
+ set_register(r1, mem_val * r1_val);
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ case MSFI:
+ case MSGFI: {
+ RILInstruction* rilinst = reinterpret_cast<RILInstruction*>(instr);
+ int r1 = rilinst->R1Value();
+ int32_t i2 = rilinst->I2Value();
+ if (op == MSFI) {
+ int32_t alu_out = get_low_register<int32_t>(r1);
+ alu_out = alu_out * i2;
+ set_low_register(r1, alu_out);
+ } else if (op == MSGFI) {
+ int64_t alu_out = get_register(r1);
+ alu_out = alu_out *i2;
+ set_register(r1, alu_out);
+ } else {
+ UNREACHABLE();
+ }
+ break;
+ }
+ default:
+ UNREACHABLE();
+ return false;
+ }
+ return true;
+}
+
+
+int16_t Simulator:: ByteReverse(int16_t hword) {
+ return (hword << 8) | ((hword >> 8) & 0x00ff);
+}
+
+
+int32_t Simulator:: ByteReverse(int32_t word) {
+ int32_t result = word << 24;
+ result |= (word << 8) & 0x00ff0000;
+ result |= (word >> 8) & 0x0000ff00;
+ result |= (word >> 24) & 0x00000ff;
+ return result;
+}
+
+
+// Executes the current instruction.
+void Simulator::ExecuteInstruction(Instruction* instr, bool auto_incr_pc) {
+ if (v8::internal::FLAG_check_icache) {
+ CheckICache(isolate_->simulator_i_cache(), instr);
+ }
+ pc_modified_ = false;
+ if (::v8::internal::FLAG_trace_sim) {
+ disasm::NameConverter converter;
+ disasm::Disassembler dasm(converter);
+ // use a reasonably large buffer
+ v8::internal::EmbeddedVector<char, 256> buffer;
+ dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(instr));
+#ifdef V8_TARGET_ARCH_S390X
+ PrintF("%05ld %08" V8PRIxPTR " %s\n", icount_,
+ reinterpret_cast<intptr_t>(instr), buffer.start());
+#else
+ PrintF("%05lld %08" V8PRIxPTR " %s\n", icount_,
+ reinterpret_cast<intptr_t>(instr), buffer.start());
+#endif
+ // Flush stdout to prevent incomplete file output during abnormal exits
+ // This is caused by the output being buffered before being written to file
+ fflush(stdout);
+ }
+
+ // Try to simulate as S390 Instruction first.
+ bool processed = true;
+
+ int instrLength = instr->InstructionLength();
+ if (instrLength == 2)
+ processed = DecodeTwoByte(instr);
+ else if (instrLength == 4)
+ processed = DecodeFourByte(instr);
+ else if (instrLength == 6)
+ processed = DecodeSixByte(instr);
+
+ if (processed) {
+ if (!pc_modified_ && auto_incr_pc) {
+ set_pc(reinterpret_cast<intptr_t>(instr) + instrLength);
+ }
+ return;
+ }
+}
+
+
+void Simulator::DebugStart() {
+ S390Debugger dbg(this);
+ dbg.Debug();
+}
+
+
+void Simulator::Execute() {
+ // Get the PC to simulate. Cannot use the accessor here as we need the
+ // raw PC value and not the one used as input to arithmetic instructions.
+ intptr_t program_counter = get_pc();
+
+ if (::v8::internal::FLAG_stop_sim_at == 0) {
+ // Fast version of the dispatch loop without checking whether the simulator
+ // should be stopping at a particular executed instruction.
+ while (program_counter != end_sim_pc) {
+ Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
+ icount_++;
+ ExecuteInstruction(instr);
+ program_counter = get_pc();
+ }
+ } else {
+ // FLAG_stop_sim_at is at the non-default value. Stop in the debugger when
+ // we reach the particular instuction count.
+ while (program_counter != end_sim_pc) {
+ Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
+ icount_++;
+ if (icount_ == ::v8::internal::FLAG_stop_sim_at) {
+ S390Debugger dbg(this);
+ dbg.Debug();
+ } else {
+ ExecuteInstruction(instr);
+ }
+ program_counter = get_pc();
+ }
+ }
+}
+
+
+void Simulator::CallInternal(byte*entry, int reg_arg_count) {
+// Prepare to execute the code at entry
+#if ABI_USES_FUNCTION_DESCRIPTORS
+ // entry is the function descriptor
+ set_pc(*(reinterpret_cast<intptr_t*>(entry)));
+#else
+ // entry is the instruction address
+ set_pc(reinterpret_cast<intptr_t>(entry));
+#endif
+// Remember the values of non-volatile registers.
+ int64_t r6_val = get_register(r6);
+ int64_t r7_val = get_register(r7);
+ int64_t r8_val = get_register(r8);
+ int64_t r9_val = get_register(r9);
+ int64_t r10_val = get_register(r10);
+ int64_t r11_val = get_register(r11);
+ int64_t r12_val = get_register(r12);
+ int64_t r13_val = get_register(r13);
+
+
+ // Put down marker for end of simulation. The simulator will stop simulation
+ // when the PC reaches this value. By saving the "end simulation" value into
+ // the LR the simulation stops when returning to this call point.
+ registers_[14] = end_sim_pc;
+
+
+
+ // Set up the non-volatile registers with a known value. To be able to check
+ // that they are preserved properly across JS execution.
+ intptr_t callee_saved_value = icount_;
+ if (reg_arg_count < 5) {
+ set_register(r6, callee_saved_value + 6);
+ }
+ set_register(r7, callee_saved_value + 7);
+ set_register(r8, callee_saved_value + 8);
+ set_register(r9, callee_saved_value + 9);
+ set_register(r10, callee_saved_value + 10);
+ set_register(r11, callee_saved_value + 11);
+ set_register(r12, callee_saved_value + 12);
+ set_register(r13, callee_saved_value + 13);
+
+ // Start the simulation
+ Execute();
+
+ // Check that the non-volatile registers have been preserved.
+#ifndef V8_TARGET_ARCH_S390X
+ if (reg_arg_count < 5) {
+ DCHECK_EQ(callee_saved_value + 6, get_low_register<int32_t>(r6));
+ }
+ DCHECK_EQ(callee_saved_value + 7 , get_low_register<int32_t>(r7));
+ DCHECK_EQ(callee_saved_value + 8 , get_low_register<int32_t>(r8));
+ DCHECK_EQ(callee_saved_value + 9 , get_low_register<int32_t>(r9));
+ DCHECK_EQ(callee_saved_value + 10, get_low_register<int32_t>(r10));
+ DCHECK_EQ(callee_saved_value + 11, get_low_register<int32_t>(r11));
+ DCHECK_EQ(callee_saved_value + 12, get_low_register<int32_t>(r12));
+ DCHECK_EQ(callee_saved_value + 13, get_low_register<int32_t>(r13));
+#else
+ if (reg_arg_count < 5) {
+ DCHECK_EQ(callee_saved_value + 6, get_register(r6));
+ }
+ DCHECK_EQ(callee_saved_value + 7 , get_register(r7));
+ DCHECK_EQ(callee_saved_value + 8 , get_register(r8));
+ DCHECK_EQ(callee_saved_value + 9 , get_register(r9));
+ DCHECK_EQ(callee_saved_value + 10, get_register(r10));
+ DCHECK_EQ(callee_saved_value + 11, get_register(r11));
+ DCHECK_EQ(callee_saved_value + 12, get_register(r12));
+ DCHECK_EQ(callee_saved_value + 13, get_register(r13));
+#endif
+
+ // Restore non-volatile registers with the original value.
+ set_register(r6, r6_val);
+ set_register(r7, r7_val);
+ set_register(r8, r8_val);
+ set_register(r9, r9_val);
+ set_register(r10, r10_val);
+ set_register(r11, r11_val);
+ set_register(r12, r12_val);
+ set_register(r13, r13_val);
+}
+
+
+intptr_t Simulator::Call(byte* entry, int argument_count, ...) {
+ // Remember the values of non-volatile registers.
+ int64_t r6_val = get_register(r6);
+ int64_t r7_val = get_register(r7);
+ int64_t r8_val = get_register(r8);
+ int64_t r9_val = get_register(r9);
+ int64_t r10_val = get_register(r10);
+ int64_t r11_val = get_register(r11);
+ int64_t r12_val = get_register(r12);
+ int64_t r13_val = get_register(r13);
+
+
+ va_list parameters;
+ va_start(parameters, argument_count);
+ // Set up arguments
+
+ // First 5 arguments passed in registers r2-r6.
+ int reg_arg_count = (argument_count > 5) ? 5 : argument_count;
+ int stack_arg_count = argument_count - reg_arg_count;
+ for (int i = 0; i < reg_arg_count; i++) {
+ intptr_t value = va_arg(parameters, intptr_t);
+ set_register(i + 2, value);
+ }
+
+ // Remaining arguments passed on stack.
+ int64_t original_stack = get_register(sp);
+ // Compute position of stack on entry to generated code.
+ intptr_t entry_stack = (original_stack -
+ (kCalleeRegisterSaveAreaSize +
+ stack_arg_count * sizeof(intptr_t)));
+ if (base::OS::ActivationFrameAlignment() != 0) {
+ entry_stack &= -base::OS::ActivationFrameAlignment();
+ }
+ // Store remaining arguments on stack, from low to high memory.
+ // +2 is a hack for the LR slot + old SP on PPC
+ intptr_t* stack_argument = reinterpret_cast<intptr_t*>(entry_stack +
+ kCalleeRegisterSaveAreaSize);
+ for (int i = 0; i < stack_arg_count; i++) {
+ intptr_t value = va_arg(parameters, intptr_t);
+ stack_argument[i] = value;
+ }
+ va_end(parameters);
+ set_register(sp, entry_stack);
+
+ // Prepare to execute the code at entry
+#if ABI_USES_FUNCTION_DESCRIPTORS
+ // entry is the function descriptor
+ set_pc(*(reinterpret_cast<intptr_t *>(entry)));
+#else
+ // entry is the instruction address
+ set_pc(reinterpret_cast<intptr_t>(entry));
+#endif
+
+ // Put down marker for end of simulation. The simulator will stop simulation
+ // when the PC reaches this value. By saving the "end simulation" value into
+ // the LR the simulation stops when returning to this call point.
+ registers_[14] = end_sim_pc;
+
+
+
+ // Set up the non-volatile registers with a known value. To be able to check
+ // that they are preserved properly across JS execution.
+ intptr_t callee_saved_value = icount_;
+ if (reg_arg_count < 5) {
+ set_register(r6, callee_saved_value + 6);
+ }
+ set_register(r7, callee_saved_value + 7);
+ set_register(r8, callee_saved_value + 8);
+ set_register(r9, callee_saved_value + 9);
+ set_register(r10, callee_saved_value + 10);
+ set_register(r11, callee_saved_value + 11);
+ set_register(r12, callee_saved_value + 12);
+ set_register(r13, callee_saved_value + 13);
+
+ // Start the simulation
+ Execute();
+
+ // Check that the non-volatile registers have been preserved.
+#ifndef V8_TARGET_ARCH_S390X
+ if (reg_arg_count < 5) {
+ DCHECK_EQ(callee_saved_value + 6, get_low_register<int32_t>(r6));
+ }
+ DCHECK_EQ(callee_saved_value + 7 , get_low_register<int32_t>(r7));
+ DCHECK_EQ(callee_saved_value + 8 , get_low_register<int32_t>(r8));
+ DCHECK_EQ(callee_saved_value + 9 , get_low_register<int32_t>(r9));
+ DCHECK_EQ(callee_saved_value + 10, get_low_register<int32_t>(r10));
+ DCHECK_EQ(callee_saved_value + 11, get_low_register<int32_t>(r11));
+ DCHECK_EQ(callee_saved_value + 12, get_low_register<int32_t>(r12));
+ DCHECK_EQ(callee_saved_value + 13, get_low_register<int32_t>(r13));
+#else
+ if (reg_arg_count < 5) {
+ DCHECK_EQ(callee_saved_value + 6, get_register(r6));
+ }
+ DCHECK_EQ(callee_saved_value + 7 , get_register(r7));
+ DCHECK_EQ(callee_saved_value + 8 , get_register(r8));
+ DCHECK_EQ(callee_saved_value + 9 , get_register(r9));
+ DCHECK_EQ(callee_saved_value + 10, get_register(r10));
+ DCHECK_EQ(callee_saved_value + 11, get_register(r11));
+ DCHECK_EQ(callee_saved_value + 12, get_register(r12));
+ DCHECK_EQ(callee_saved_value + 13, get_register(r13));
+#endif
+
+
+ // Restore non-volatile registers with the original value.
+ set_register(r6, r6_val);
+ set_register(r7, r7_val);
+ set_register(r8, r8_val);
+ set_register(r9, r9_val);
+ set_register(r10, r10_val);
+ set_register(r11, r11_val);
+ set_register(r12, r12_val);
+ set_register(r13, r13_val);
+ // Pop stack passed arguments.
+
+#ifndef V8_TARGET_ARCH_S390X
+ DCHECK_EQ(entry_stack, get_low_register<int32_t>(sp));
+#else
+ DCHECK_EQ(entry_stack, get_register(sp));
+#endif
+ set_register(sp, original_stack);
+
+ // Return value register
+ intptr_t result = get_register(r2);
+ return result;
+}
+
+
+void Simulator::CallFP(byte* entry, double d0, double d1) {
+ set_d_register_from_double(0, d0);
+ set_d_register_from_double(1, d1);
+ CallInternal(entry);
+}
+
+
+int32_t Simulator::CallFPReturnsInt(byte* entry, double d0, double d1) {
+ CallFP(entry, d0, d1);
+ int32_t result = get_register(r2);
+ return result;
+}
+
+
+double Simulator::CallFPReturnsDouble(byte* entry, double d0, double d1) {
+ CallFP(entry, d0, d1);
+ return get_double_from_d_register(0);
+}
+
+
+uintptr_t Simulator::PushAddress(uintptr_t address) {
+ uintptr_t new_sp = get_register(sp) - sizeof(uintptr_t);
+ uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(new_sp);
+ *stack_slot = address;
+ set_register(sp, new_sp);
+ return new_sp;
+}
+
+
+uintptr_t Simulator::PopAddress() {
+ uintptr_t current_sp = get_register(sp);
+ uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
+ uintptr_t address = *stack_slot;
+ set_register(sp, current_sp + sizeof(uintptr_t));
+ return address;
+}
+} // namespace internal
+} // namespace v8
+
+#endif // USE_SIMULATOR
+#endif // V8_TARGET_ARCH_S390
--- /dev/null
+++ b/deps/v8/src/s390/simulator-s390.h
@@ -0,0 +1,463 @@
+// Copyright 2012 the V8 project authors. All rights reserved.
+//
+// Copyright IBM Corp. 2012, 2015. All rights reserved.
+//
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+
+// Declares a Simulator for S390 instructions if we are not generating a native
+// S390 binary. This Simulator allows us to run and debug S390 code generation
+// on regular desktop machines.
+// V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
+// which will start execution in the Simulator or forwards to the real entry
+// on a S390 hardware platform.
+
+#ifndef V8_S390_SIMULATOR_S390_H_
+#define V8_S390_SIMULATOR_S390_H_
+
+#include "src/allocation.h"
+
+#if !defined(USE_SIMULATOR)
+// Running without a simulator on a native s390 platform.
+
+namespace v8 {
+namespace internal {
+
+// When running without a simulator we call the entry directly.
+#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
+ (entry(p0, p1, p2, p3, p4))
+
+typedef int (*ppc_regexp_matcher)(String*, int, const byte*, const byte*, int*,
+ int, Address, int, void*, Isolate*);
+
+
+// Call the generated regexp code directly. The code at the entry address
+// should act as a function matching the type ppc_regexp_matcher.
+// The ninth argument is a dummy that reserves the space used for
+// the return address added by the ExitFrame in native calls.
+#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
+ (FUNCTION_CAST<ppc_regexp_matcher>(entry)(p0, p1, p2, p3, p4, p5, p6, p7, \
+ NULL, p8))
+
+// The stack limit beyond which we will throw stack overflow errors in
+// generated code. Because generated code on s390 uses the C stack, we
+// just use the C stack limit.
+class SimulatorStack : public v8::internal::AllStatic {
+ public:
+ static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate,
+ uintptr_t c_limit) {
+ USE(isolate);
+ return c_limit;
+ }
+
+ static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
+ return try_catch_address;
+ }
+
+ static inline void UnregisterCTryCatch() {}
+};
+
+}
+} // namespace v8::internal
+
+#else // !defined(USE_SIMULATOR)
+// Running with a simulator.
+
+#include "src/assembler.h"
+#include "src/hashmap.h"
+#include "src/s390/constants-s390.h"
+
+namespace v8 {
+namespace internal {
+
+class CachePage {
+ public:
+ static const int LINE_VALID = 0;
+ static const int LINE_INVALID = 1;
+
+ static const int kPageShift = 12;
+ static const int kPageSize = 1 << kPageShift;
+ static const int kPageMask = kPageSize - 1;
+ static const int kLineShift = 2; // The cache line is only 4 bytes right now.
+ static const int kLineLength = 1 << kLineShift;
+ static const int kLineMask = kLineLength - 1;
+
+ CachePage() { memset(&validity_map_, LINE_INVALID, sizeof(validity_map_)); }
+
+ char* ValidityByte(int offset) {
+ return &validity_map_[offset >> kLineShift];
+ }
+
+ char* CachedData(int offset) {
+ return &data_[offset];
+ }
+
+ private:
+ char data_[kPageSize]; // The cached data.
+ static const int kValidityMapSize = kPageSize >> kLineShift;
+ char validity_map_[kValidityMapSize]; // One byte per line.
+};
+
+
+class Simulator {
+ public:
+ friend class S390Debugger;
+ enum Register {
+ no_reg = -1,
+ r0 = 0,
+ r1 = 1,
+ r2 = 2,
+ r3 = 3,
+ r4 = 4,
+ r5 = 5,
+ r6 = 6,
+ r7 = 7,
+ r8 = 8,
+ r9 = 9,
+ r10 = 10,
+ r11 = 11,
+ r12 = 12,
+ r13 = 13,
+ r14 = 14,
+ r15 = 15,
+ fp = r11,
+ ip = r12,
+ cp = r13,
+ ra = r14,
+ sp = r15, // name aliases
+ kNumGPRs = 16,
+ d0 = 0, d1, d2, d3, d4, d5, d6, d7,
+ d8, d9, d10, d11, d12, d13, d14, d15,
+ kNumFPRs = 16
+ };
+
+ explicit Simulator(Isolate* isolate);
+ ~Simulator();
+
+ // The currently executing Simulator instance. Potentially there can be one
+ // for each native thread.
+ static Simulator* current(v8::internal::Isolate* isolate);
+
+ // Accessors for register state.
+ void set_register(int reg, uint64_t value);
+ uint64_t get_register(int reg) const;
+ template<typename T> T get_low_register(int reg) const;
+ template<typename T> T get_high_register(int reg) const;
+ void set_low_register(int reg, uint32_t value);
+ void set_high_register(int reg, uint32_t value);
+
+ double get_double_from_register_pair(int reg);
+ void set_d_register_from_double(int dreg, const double dbl) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ *bit_cast<double*>(&fp_registers_[dreg]) = dbl;
+ }
+
+ double get_double_from_d_register(int dreg) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ return *bit_cast<double*>(&fp_registers_[dreg]);
+ }
+ void set_d_register(int dreg, int64_t value) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ fp_registers_[dreg] = value;
+ }
+ int64_t get_d_register(int dreg) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ return fp_registers_[dreg];
+ }
+
+ void set_d_register_from_float(int dreg, const float f) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ double df = static_cast<double>(f);
+ set_d_register_from_double(dreg, df);
+ // float* f_addr = reinterpret_cast<float*>(&fp_registers_[dreg]);
+ // *f_addr = f;
+ }
+
+ double get_float_from_d_register(int dreg) {
+ DCHECK(dreg >= 0 && dreg < kNumFPRs);
+ // float* f_addr = reinterpret_cast<float*>(&fp_registers_[dreg]);
+ // return *f_addr;
+ return static_cast<double>(get_double_from_d_register(dreg));
+ }
+
+ // Special case of set_register and get_register to access the raw PC value.
+ void set_pc(intptr_t value);
+ intptr_t get_pc() const;
+
+ Address get_sp() {
+ return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp)));
+ }
+
+ // Accessor to the internal simulator stack area.
+ uintptr_t StackLimit() const;
+
+ // Executes S390 instructions until the PC reaches end_sim_pc.
+ void Execute();
+
+ // Call on program start.
+ static void Initialize(Isolate* isolate);
+
+ static void TearDown(HashMap* i_cache, Redirection* first);
+
+ // V8 generally calls into generated JS code with 5 parameters and into
+ // generated RegExp code with 7 parameters. This is a convenience function,
+ // which sets up the simulator state and grabs the result on return.
+ intptr_t Call(byte* entry, int argument_count, ...);
+ // Alternative: call a 2-argument double function.
+ void CallFP(byte* entry, double d0, double d1);
+ int32_t CallFPReturnsInt(byte* entry, double d0, double d1);
+ double CallFPReturnsDouble(byte* entry, double d0, double d1);
+
+ // Push an address onto the JS stack.
+ uintptr_t PushAddress(uintptr_t address);
+
+ // Pop an address from the JS stack.
+ uintptr_t PopAddress();
+
+ // Debugger input.
+ void set_last_debugger_input(char* input);
+ char* last_debugger_input() { return last_debugger_input_; }
+
+ // ICache checking.
+ static void FlushICache(v8::internal::HashMap* i_cache, void* start,
+ size_t size);
+
+ // Returns true if pc register contains one of the 'special_values' defined
+ // below (bad_lr, end_sim_pc).
+ bool has_bad_pc() const;
+
+ private:
+ enum special_values {
+ // Known bad pc value to ensure that the simulator does not execute
+ // without being properly setup.
+ bad_lr = -1,
+ // A pc value used to signal the simulator to stop execution. Generally
+ // the lr is set to this value on transition from native C code to
+ // simulated execution, so that the simulator can "return" to the native
+ // C code.
+ end_sim_pc = -2
+ };
+
+ // Unsupported instructions use Format to print an error and stop execution.
+ void Format(Instruction* instr, const char* format);
+
+ // Helper functions to set the conditional flags in the architecture state.
+ bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0);
+ bool BorrowFrom(int32_t left, int32_t right);
+ bool OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
+ bool addition);
+
+ // Helper functions to decode common "addressing" modes
+ int32_t GetShiftRm(Instruction* instr, bool* carry_out);
+ int32_t GetImm(Instruction* instr, bool* carry_out);
+ void ProcessPUW(Instruction* instr, int num_regs, int operand_size,
+ intptr_t* start_address, intptr_t* end_address);
+ void HandleRList(Instruction* instr, bool load);
+ void HandleVList(Instruction* inst);
+ void SoftwareInterrupt(Instruction* instr);
+
+ // Stop helper functions.
+ inline bool isStopInstruction(Instruction* instr);
+ inline bool isWatchedStop(uint32_t bkpt_code);
+ inline bool isEnabledStop(uint32_t bkpt_code);
+ inline void EnableStop(uint32_t bkpt_code);
+ inline void DisableStop(uint32_t bkpt_code);
+ inline void IncreaseStopCounter(uint32_t bkpt_code);
+ void PrintStopInfo(uint32_t code);
+
+ // Byte Reverse
+ inline int16_t ByteReverse(int16_t hword);
+ inline int32_t ByteReverse(int32_t word);
+
+ // Read and write memory.
+ inline uint8_t ReadBU(intptr_t addr);
+ inline int8_t ReadB(intptr_t addr);
+ inline void WriteB(intptr_t addr, uint8_t value);
+ inline void WriteB(intptr_t addr, int8_t value);
+
+ inline uint16_t ReadHU(intptr_t addr, Instruction* instr);
+ inline int16_t ReadH(intptr_t addr, Instruction* instr);
+ // Note: Overloaded on the sign of the value.
+ inline void WriteH(intptr_t addr, uint16_t value, Instruction* instr);
+ inline void WriteH(intptr_t addr, int16_t value, Instruction* instr);
+
+ inline uint32_t ReadWU(intptr_t addr, Instruction* instr);
+ inline int32_t ReadW(intptr_t addr, Instruction* instr);
+ inline void WriteW(intptr_t addr, uint32_t value, Instruction* instr);
+ inline void WriteW(intptr_t addr, int32_t value, Instruction* instr);
+
+ inline int64_t ReadDW(intptr_t addr);
+ inline double ReadDouble(intptr_t addr);
+ inline void WriteDW(intptr_t addr, int64_t value);
+
+ // S390
+ void Trace(Instruction* instr);
+ bool DecodeTwoByte(Instruction* instr);
+ bool DecodeFourByte(Instruction* instr);
+ bool DecodeFourByteArithmetic(Instruction *instr);
+ bool DecodeFourByteFloatingPoint(Instruction* instr);
+ bool DecodeSixByte(Instruction* instr);
+ bool DecodeSixByteArithmetic(Instruction *instr);
+ bool S390InstructionDecode(Instruction *instr);
+
+ template <typename T>
+ void SetS390ConditionCode(T lhs, T rhs) {
+ condition_reg_ = 0;
+ if (lhs == rhs) {
+ condition_reg_ |= CC_EQ;
+ } else if (lhs < rhs) {
+ condition_reg_ |= CC_LT;
+ } else if (lhs > rhs) {
+ condition_reg_ |= CC_GT;
+ }
+
+ // We get down here only for floating point
+ // comparisons and the values are unordered
+ // i.e. NaN
+ if (condition_reg_ == 0)
+ condition_reg_ = unordered;
+ }
+
+ bool isNaN(double value) {
+ return (value != value);
+ }
+
+ // Set the condition code for bitwise operations
+ // CC0 is set if value == 0.
+ // CC1 is set if value != 0.
+ // CC2/CC3 are not set.
+ template <typename T>
+ void SetS390BitWiseConditionCode(T value) {
+ condition_reg_ = 0;
+
+ if (value == 0)
+ condition_reg_ |= CC_EQ;
+ else
+ condition_reg_ |= CC_LT;
+ }
+
+ void SetS390OverflowCode(bool isOF) {
+ if (isOF) condition_reg_ = CC_OF;
+ }
+
+ bool TestConditionCode(Condition mask) {
+ // Check for unconditional branch
+ if (mask == 0xf)
+ return true;
+
+ return (condition_reg_ & mask) != 0;
+ }
+
+ // Executes one instruction.
+ void ExecuteInstruction(Instruction* instr, bool auto_incr_pc = true);
+
+ // ICache.
+ static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr);
+ static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
+ int size);
+ static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page);
+
+ // Runtime call support.
+ static void* RedirectExternalReference(
+ void* external_function, v8::internal::ExternalReference::Type type);
+
+ // Handle arguments and return value for runtime FP functions.
+ void GetFpArgs(double* x, double* y, intptr_t* z);
+ void SetFpResult(const double& result);
+ void TrashCallerSaveRegisters();
+
+ void CallInternal(byte* entry, int reg_arg_count = 3);
+
+ // Architecture state.
+ // On z9 and higher, and supported Linux on System z platforms, all registers
+ // are 64-bit, even in 31-bit mode.
+ uint64_t registers_[kNumGPRs];
+ // condition register. In s390, the last 4 bits are used.
+ int32_t condition_reg_;
+ int32_t fp_condition_reg_; // PowerPC
+ intptr_t special_reg_lr_; // PowerPC
+ intptr_t special_reg_pc_; // PowerPC
+ intptr_t special_reg_ctr_; // PowerPC
+ int32_t special_reg_xer_; // PowerPC
+
+ int64_t fp_registers_[kNumFPRs];
+
+ // Simulator support.
+ char* stack_;
+ static const size_t stack_protection_size_ = 256 * kPointerSize;
+ bool pc_modified_;
+ int64_t icount_;
+
+ // Debugger input.
+ char* last_debugger_input_;
+
+ // Icache simulation
+ v8::internal::HashMap* i_cache_;
+
+ // Registered breakpoints.
+ Instruction* break_pc_;
+ Instr break_instr_;
+
+ v8::internal::Isolate* isolate_;
+
+ // A stop is watched if its code is less than kNumOfWatchedStops.
+ // Only watched stops support enabling/disabling and the counter feature.
+ static const uint32_t kNumOfWatchedStops = 256;
+
+ // Breakpoint is disabled if bit 31 is set.
+ static const uint32_t kStopDisabledBit = 1 << 31;
+
+ // A stop is enabled, meaning the simulator will stop when meeting the
+ // instruction, if bit 31 of watched_stops_[code].count is unset.
+ // The value watched_stops_[code].count & ~(1 << 31) indicates how many times
+ // the breakpoint was hit or gone through.
+ struct StopCountAndDesc {
+ uint32_t count;
+ char* desc;
+ };
+ StopCountAndDesc watched_stops_[kNumOfWatchedStops];
+ void DebugStart();
+};
+
+
+// When running with the simulator transition into simulated execution at this
+// point.
+#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
+ reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \
+ FUNCTION_ADDR(entry), 5, (intptr_t)p0, (intptr_t)p1, (intptr_t)p2, \
+ (intptr_t)p3, (intptr_t)p4))
+
+#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
+ Simulator::current(Isolate::Current()) \
+ ->Call(entry, 10, (intptr_t)p0, (intptr_t)p1, (intptr_t)p2, \
+ (intptr_t)p3, (intptr_t)p4, (intptr_t)p5, (intptr_t)p6, \
+ (intptr_t)p7, (intptr_t)NULL, (intptr_t)p8)
+
+
+// The simulator has its own stack. Thus it has a different stack limit from
+// the C-based native code. Setting the c_limit to indicate a very small
+// stack cause stack overflow errors, since the simulator ignores the input.
+// This is unlikely to be an issue in practice, though it might cause testing
+// trouble down the line.
+class SimulatorStack : public v8::internal::AllStatic {
+ public:
+ static inline uintptr_t JsLimitFromCLimit(v8::internal::Isolate* isolate,
+ uintptr_t c_limit) {
+ return Simulator::current(isolate)->StackLimit();
+ }
+
+ static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
+ Simulator* sim = Simulator::current(Isolate::Current());
+ return sim->PushAddress(try_catch_address);
+ }
+
+ static inline void UnregisterCTryCatch() {
+ Simulator::current(Isolate::Current())->PopAddress();
+ }
+};
+}
+} // namespace v8::internal
+
+#endif // !defined(USE_SIMULATOR)
+#endif // V8_S390_SIMULATOR_S390_H_
--- a/deps/v8/src/sampler.cc
+++ b/deps/v8/src/sampler.cc
@@ -262,6 +262,12 @@
reinterpret_cast<Address>(simulator_->get_register(Simulator::sp));
state->fp =
reinterpret_cast<Address>(simulator_->get_register(Simulator::fp));
+#elif V8_TARGET_ARCH_S390
+ state->pc = reinterpret_cast<Address>(simulator_->get_pc());
+ state->sp = reinterpret_cast<Address>(simulator_->get_register(
+ Simulator::sp));
+ state->fp = reinterpret_cast<Address>(simulator_->get_register(
+ Simulator::fp));
#endif
}
@@ -367,7 +373,7 @@
#else
// Extracting the sample from the context is extremely machine dependent.
ucontext_t* ucontext = reinterpret_cast<ucontext_t*>(context);
-#if !(V8_OS_OPENBSD || (V8_OS_LINUX && V8_HOST_ARCH_PPC))
+#if !(V8_OS_OPENBSD || (V8_OS_LINUX && (V8_HOST_ARCH_PPC || V8_HOST_ARCH_S390)))
mcontext_t& mcontext = ucontext->uc_mcontext;
#endif
#if V8_OS_LINUX
@@ -408,6 +414,17 @@
state.pc = reinterpret_cast<Address>(ucontext->uc_mcontext.regs->nip);
state.sp = reinterpret_cast<Address>(ucontext->uc_mcontext.regs->gpr[PT_R1]);
state.fp = reinterpret_cast<Address>(ucontext->uc_mcontext.regs->gpr[PT_R31]);
+#elif V8_HOST_ARCH_S390
+#if V8_TARGET_ARCH_32_BIT
+ // 31-bit targets will have the upper bit of the PSW set, and requires
+ // masking out.
+ state.pc = reinterpret_cast<Address>(ucontext->uc_mcontext.psw.addr &
+ 0x7FFFFFFF);
+#else
+ state.pc = reinterpret_cast<Address>(ucontext->uc_mcontext.psw.addr);
+#endif
+ state.sp = reinterpret_cast<Address>(ucontext->uc_mcontext.gregs[15]);
+ state.fp = reinterpret_cast<Address>(ucontext->uc_mcontext.gregs[11]);
#endif // V8_HOST_ARCH_*
#elif V8_OS_MACOSX
#if V8_HOST_ARCH_X64
--- a/deps/v8/src/simulator.h
+++ b/deps/v8/src/simulator.h
@@ -21,6 +21,8 @@
#include "src/mips64/simulator-mips64.h"
#elif V8_TARGET_ARCH_X87
#include "src/x87/simulator-x87.h"
+#elif V8_TARGET_ARCH_S390
+#include "src/s390/simulator-s390.h"
#else
#error Unsupported target architecture.
#endif
--- a/deps/v8/src/snapshot/serialize.cc
+++ b/deps/v8/src/snapshot/serialize.cc
@@ -1058,7 +1058,7 @@
ALL_SPACES(kBackref, kPlain, kStartOfObject)
ALL_SPACES(kBackrefWithSkip, kPlain, kStartOfObject)
#if defined(V8_TARGET_ARCH_MIPS) || defined(V8_TARGET_ARCH_MIPS64) || \
- defined(V8_TARGET_ARCH_PPC) || V8_EMBEDDED_CONSTANT_POOL
+ defined(V8_TARGET_ARCH_PPC) || defined(V8_TARGET_ARCH_S390) || V8_EMBEDDED_CONSTANT_POOL
// Deserialize a new object from pointer found in code and write
// a pointer to it to the current object. Required only for MIPS, PPC or
// ARM with embedded constant pool, and omitted on the other architectures
@@ -1082,7 +1082,7 @@
// current object.
SINGLE_CASE(kRootArray, kPlain, kStartOfObject, 0)
#if defined(V8_TARGET_ARCH_MIPS) || defined(V8_TARGET_ARCH_MIPS64) || \
- defined(V8_TARGET_ARCH_PPC) || V8_EMBEDDED_CONSTANT_POOL
+ defined(V8_TARGET_ARCH_PPC) || defined(V8_TARGET_ARCH_S390) || V8_EMBEDDED_CONSTANT_POOL
// Find an object in the roots array and write a pointer to it to in code.
SINGLE_CASE(kRootArray, kFromCode, kStartOfObject, 0)
#endif
--- a/deps/v8/src/utils.h
+++ b/deps/v8/src/utils.h
@@ -1366,7 +1366,7 @@
INLINE(void CopyCharsUnsigned(uint8_t* dest, const uint8_t* src, size_t chars));
INLINE(void CopyCharsUnsigned(uint16_t* dest, const uint16_t* src,
size_t chars));
-#elif defined(V8_HOST_ARCH_PPC)
+#elif defined(V8_HOST_ARCH_PPC) || defined(V8_HOST_ARCH_S390)
INLINE(void CopyCharsUnsigned(uint8_t* dest, const uint8_t* src, size_t chars));
INLINE(void CopyCharsUnsigned(uint16_t* dest, const uint16_t* src,
size_t chars));
@@ -1529,7 +1529,7 @@
MemCopy(dest, src, chars * sizeof(*dest));
}
}
-#elif defined(V8_HOST_ARCH_PPC)
+#elif defined(V8_HOST_ARCH_PPC) || defined(V8_HOST_ARCH_S390)
#define CASE(n) \
case n: \
memcpy(dest, src, n); \
--- a/deps/v8/tools/gyp/v8.gyp
+++ b/deps/v8/tools/gyp/v8.gyp
@@ -1282,6 +1282,49 @@
'../../src/compiler/x64/linkage-x64.cc',
],
}],
+ ['v8_target_arch=="s390" or v8_target_arch=="s390x"', {
+ 'sources': [ ### gcmole(arch:s390) ###
+ '../../src/s390/assembler-s390-inl.h',
+ '../../src/s390/assembler-s390.cc',
+ '../../src/s390/assembler-s390.h',
+ '../../src/s390/builtins-s390.cc',
+ '../../src/s390/code-stubs-s390.cc',
+ '../../src/s390/code-stubs-s390.h',
+ '../../src/s390/codegen-s390.cc',
+ '../../src/s390/codegen-s390.h',
+ '../../src/s390/constants-s390.h',
+ '../../src/s390/constants-s390.cc',
+ '../../src/s390/cpu-s390.cc',
+ '../../src/s390/debug-s390.cc',
+ '../../src/s390/deoptimizer-s390.cc',
+ '../../src/s390/disasm-s390.cc',
+ '../../src/s390/frames-s390.cc',
+ '../../src/s390/frames-s390.h',
+ '../../src/s390/full-codegen-s390.cc',
+ '../../src/s390/interface-descriptors-s390.cc',
+ '../../src/s390/interface-descriptors-s390.h',
+ '../../src/s390/lithium-s390.cc',
+ '../../src/s390/lithium-s390.h',
+ '../../src/s390/lithium-codegen-s390.cc',
+ '../../src/s390/lithium-codegen-s390.h',
+ '../../src/s390/lithium-gap-resolver-s390.cc',
+ '../../src/s390/lithium-gap-resolver-s390.h',
+ '../../src/s390/macro-assembler-s390.cc',
+ '../../src/s390/macro-assembler-s390.h',
+ '../../src/s390/regexp-macro-assembler-s390.cc',
+ '../../src/s390/regexp-macro-assembler-s390.h',
+ '../../src/s390/simulator-s390.cc',
+ '../../src/compiler/s390/code-generator-s390.cc',
+ '../../src/compiler/s390/instruction-codes-s390.h',
+ '../../src/compiler/s390/instruction-selector-s390.cc',
+ '../../src/compiler/s390/linkage-s390.cc',
+ '../../src/ic/s390/access-compiler-s390.cc',
+ '../../src/ic/s390/handler-compiler-s390.cc',
+ '../../src/ic/s390/ic-s390.cc',
+ '../../src/ic/s390/ic-compiler-s390.cc',
+ '../../src/ic/s390/stub-cache-s390.cc',
+ ],
+ }],
['v8_target_arch=="ppc" or v8_target_arch=="ppc64"', {
'sources': [ ### gcmole(arch:ppc) ###
'../../src/ppc/assembler-ppc-inl.h',
--- a/deps/v8/tools/run-deopt-fuzzer.py
+++ b/deps/v8/tools/run-deopt-fuzzer.py
@@ -68,6 +68,8 @@
"ia32",
"ppc",
"ppc64",
+ "s390",
+ "s390x",
"mipsel",
"nacl_ia32",
"nacl_x64",
--- a/deps/v8/tools/run-tests.py
+++ b/deps/v8/tools/run-tests.py
@@ -149,6 +149,8 @@
"mips64el",
"nacl_ia32",
"nacl_x64",
+ "s390",
+ "s390x",
"ppc",
"ppc64",
"x64",
--- a/deps/v8/tools/testrunner/local/statusfile.py
+++ b/deps/v8/tools/testrunner/local/statusfile.py
@@ -57,7 +57,7 @@
for var in ["debug", "release", "big", "little",
"android_arm", "android_arm64", "android_ia32", "android_x87",
"android_x64", "arm", "arm64", "ia32", "mips", "mipsel",
- "mips64el", "x64", "x87", "nacl_ia32", "nacl_x64", "ppc", "ppc64",
+ "mips64el", "x64", "x87", "nacl_ia32", "nacl_x64", "ppc", "ppc64", "s390", "s390x",
"macos", "windows", "linux", "aix"]:
VARIABLES[var] = var
--- a/deps/v8/tools/testrunner/local/utils.py
+++ b/deps/v8/tools/testrunner/local/utils.py
@@ -102,6 +102,8 @@
return 'ia32'
elif machine == 'amd64':
return 'ia32'
+ elif id == 's390x':
+ return 's390'
elif machine == 'ppc64':
return 'ppc'
else:
--- /dev/null
+++ b/deps/v8/src/compiler/s390/OWNERS
@@ -0,0 +1,3 @@
+joransiu@ca.ibm.com
+mbrandy@us.ibm.com
+michael_dawson@ca.ibm.com
--- /dev/null
+++ b/deps/v8/src/compiler/s390/code-generator-s390.cc
@@ -0,0 +1,1576 @@
+// Copyright 2014 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/compiler/code-generator.h"
+
+#include "src/compiler/code-generator-impl.h"
+#include "src/compiler/gap-resolver.h"
+#include "src/compiler/node-matchers.h"
+#include "src/s390/macro-assembler-s390.h"
+#include "src/scopes.h"
+
+namespace v8 {
+namespace internal {
+namespace compiler {
+
+#define __ masm()->
+
+#define kScratchReg ip
+
+
+// Adds S390-specific methods to convert InstructionOperands.
+class S390OperandConverter final : public InstructionOperandConverter {
+ public:
+ S390OperandConverter(CodeGenerator* gen, Instruction* instr)
+ : InstructionOperandConverter(gen, instr) {}
+
+
+ bool CompareLogical() const {
+ switch (instr_->flags_condition()) {
+ case kUnsignedLessThan:
+ case kUnsignedGreaterThanOrEqual:
+ case kUnsignedLessThanOrEqual:
+ case kUnsignedGreaterThan:
+ return true;
+ default:
+ return false;
+ }
+ UNREACHABLE();
+ return false;
+ }
+
+ Operand InputImmediate(size_t index) {
+ Constant constant = ToConstant(instr_->InputAt(index));
+ switch (constant.type()) {
+ case Constant::kInt32:
+ return Operand(constant.ToInt32());
+ case Constant::kFloat32:
+ return Operand(
+ isolate()->factory()->NewNumber(constant.ToFloat32(), TENURED));
+ case Constant::kFloat64:
+ return Operand(
+ isolate()->factory()->NewNumber(constant.ToFloat64(), TENURED));
+ case Constant::kInt64:
+#if V8_TARGET_ARCH_S390X
+ return Operand(constant.ToInt64());
+#endif
+ case Constant::kExternalReference:
+ case Constant::kHeapObject:
+ case Constant::kRpoNumber:
+ break;
+ }
+ UNREACHABLE();
+ return Operand::Zero();
+ }
+
+ MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) {
+ const size_t index = *first_index;
+ *mode = AddressingModeField::decode(instr_->opcode());
+ switch (*mode) {
+ case kMode_None:
+ break;
+ case kMode_MRI:
+ *first_index += 2;
+ return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
+ case kMode_MRR:
+ *first_index += 2;
+ return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
+ }
+ UNREACHABLE();
+ return MemOperand(r0);
+ }
+
+
+ MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) {
+ return MemoryOperand(mode, &first_index);
+ }
+
+ MemOperand ToMemOperand(InstructionOperand* op) const {
+ DCHECK(op != NULL);
+ DCHECK(!op->IsRegister());
+ DCHECK(!op->IsDoubleRegister());
+ DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot());
+ // The linkage computes where all spill slots are located.
+ FrameOffset offset = linkage()->GetFrameOffset(
+ AllocatedOperand::cast(op)->index(), frame(), 0);
+ return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
+ }
+};
+
+
+static inline bool HasRegisterInput(Instruction* instr, int index) {
+ return instr->InputAt(index)->IsRegister();
+}
+
+
+namespace {
+
+class OutOfLineLoadNAN32 final : public OutOfLineCode {
+ public:
+ OutOfLineLoadNAN32(CodeGenerator* gen, DoubleRegister result)
+ : OutOfLineCode(gen), result_(result) {}
+
+ void Generate() final {
+ __ LoadDoubleLiteral(result_, std::numeric_limits<float>::quiet_NaN(),
+ kScratchReg);
+ }
+
+ private:
+ DoubleRegister const result_;
+};
+
+
+class OutOfLineLoadNAN64 final : public OutOfLineCode {
+ public:
+ OutOfLineLoadNAN64(CodeGenerator* gen, DoubleRegister result)
+ : OutOfLineCode(gen), result_(result) {}
+
+ void Generate() final {
+ __ LoadDoubleLiteral(result_, std::numeric_limits<double>::quiet_NaN(),
+ kScratchReg);
+ }
+
+ private:
+ DoubleRegister const result_;
+};
+
+
+class OutOfLineLoadZero final : public OutOfLineCode {
+ public:
+ OutOfLineLoadZero(CodeGenerator* gen, Register result)
+ : OutOfLineCode(gen), result_(result) {}
+
+ void Generate() final { __ LoadImmP(result_, Operand::Zero()); }
+
+ private:
+ Register const result_;
+};
+
+
+Condition FlagsConditionToCondition(FlagsCondition condition) {
+ switch (condition) {
+ case kEqual:
+ return eq;
+ case kNotEqual:
+ return ne;
+ case kSignedLessThan:
+ case kUnsignedLessThan:
+ return lt;
+ case kSignedGreaterThanOrEqual:
+ case kUnsignedGreaterThanOrEqual:
+ return ge;
+ case kSignedLessThanOrEqual:
+ case kUnsignedLessThanOrEqual:
+ return le;
+ case kSignedGreaterThan:
+ case kUnsignedGreaterThan:
+ return gt;
+ case kOverflow:
+#if V8_TARGET_ARCH_S390X
+ return ne;
+#else
+ return lt;
+#endif
+ case kNotOverflow:
+#if V8_TARGET_ARCH_S390X
+ return eq;
+#else
+ return ge;
+#endif
+ case kUnorderedEqual:
+ case kUnorderedNotEqual:
+ break;
+ }
+ UNREACHABLE();
+ return kNoCondition;
+}
+
+} // namespace
+
+#define ASSEMBLE_FLOAT_UNOP(asm_instr) \
+ do { \
+ __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));\
+ } while (0)
+
+
+#define ASSEMBLE_FLOAT_BINOP(asm_instr) \
+ do { \
+ __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
+ i.InputDoubleRegister(1)); \
+ } while (0)
+
+
+#define ASSEMBLE_BINOP(asm_instr_reg, asm_instr_imm) \
+ do { \
+ if (HasRegisterInput(instr, 1)) { \
+ __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
+ i.InputRegister(1)); \
+ } else { \
+ __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
+ i.InputImmediate(1)); \
+ } \
+ } while (0)
+
+
+#define ASSEMBLE_BINOP_INT(asm_instr_reg, asm_instr_imm) \
+ do { \
+ if (HasRegisterInput(instr, 1)) { \
+ __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
+ i.InputRegister(1)); \
+ } else { \
+ __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
+ i.InputInt32(1)); \
+ } \
+ } while (0)
+
+
+#if V8_TARGET_ARCH_S390X
+#define ASSEMBLE_ADD_WITH_OVERFLOW() \
+ do { \
+ ASSEMBLE_BINOP(AddP, AddP); \
+ __ TestIfInt32(i.OutputRegister(), r0); \
+ } while (0)
+#else
+#define ASSEMBLE_ADD_WITH_OVERFLOW() \
+ do { \
+ if (HasRegisterInput(instr, 1)) { \
+ __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
+ i.InputRegister(1), kScratchReg, r0); \
+ } else { \
+ __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
+ i.InputInt32(1), kScratchReg, r0); \
+ } \
+ } while (0)
+#endif
+
+
+#if V8_TARGET_ARCH_S390X
+#define ASSEMBLE_SUB_WITH_OVERFLOW() \
+ do { \
+ ASSEMBLE_BINOP(SubP, SubP); \
+ __ TestIfInt32(i.OutputRegister(), r0); \
+ } while (0)
+#else
+#define ASSEMBLE_SUB_WITH_OVERFLOW() \
+ do { \
+ if (HasRegisterInput(instr, 1)) { \
+ __ SubAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
+ i.InputRegister(1), kScratchReg, r0); \
+ } else { \
+ __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
+ -i.InputInt32(1), kScratchReg, r0); \
+ } \
+ } while (0)
+#endif
+
+
+#define ASSEMBLE_COMPARE(cmp_instr, cmpl_instr) \
+ do { \
+ if (HasRegisterInput(instr, 1)) { \
+ if (i.CompareLogical()) { \
+ __ cmpl_instr(i.InputRegister(0), i.InputRegister(1)); \
+ } else { \
+ __ cmp_instr(i.InputRegister(0), i.InputRegister(1)); \
+ } \
+ } else { \
+ if (i.CompareLogical()) { \
+ __ cmpl_instr(i.InputRegister(0), i.InputImmediate(1)); \
+ } else { \
+ __ cmp_instr(i.InputRegister(0), i.InputImmediate(1)); \
+ } \
+ } \
+ } while (0)
+
+
+#define ASSEMBLE_FLOAT_COMPARE(cmp_instr) \
+ do { \
+ __ cmp_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1); \
+ } while (0)
+
+
+
+// Divide instruction dr will implicity use register pair
+// r0 & r1 below.
+// R0:R1 = R1 / divisor - R0 remainder
+// Copy remainder to output reg
+#define ASSEMBLE_MODULO(div_instr, shift_instr) \
+ do { \
+ __ LoadRR(r0, i.InputRegister(0)); \
+ __ shift_instr(r0, Operand(32)); \
+ __ div_instr(r0, i.InputRegister(1)); \
+ __ ltr(i.OutputRegister(), r0); \
+ } while (0)
+
+
+#define ASSEMBLE_FLOAT_MODULO() \
+ do { \
+ FrameScope scope(masm(), StackFrame::MANUAL); \
+ __ PrepareCallCFunction(0, 2, kScratchReg); \
+ __ MovToFloatParameters(i.InputDoubleRegister(0), \
+ i.InputDoubleRegister(1)); \
+ __ CallCFunction(ExternalReference::mod_two_doubles_operation(isolate()), \
+ 0, 2); \
+ __ MovFromFloatResult(i.OutputDoubleRegister()); \
+ } while (0)
+
+
+#define ASSEMBLE_FLOAT_MAX(double_scratch_reg, general_scratch_reg) \
+ do { \
+ Label ge, done; \
+ __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
+ __ bge(&ge, Label::kNear); \
+ __ Move(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); \
+ __ b(&done, Label::kNear); \
+ __ bind(&ge); \
+ __ Move(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
+ __ bind(&done); \
+ } while (0)
+
+
+#define ASSEMBLE_FLOAT_MIN(double_scratch_reg, general_scratch_reg) \
+ do { \
+ Label ge, done; \
+ __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
+ __ bge(&ge, Label::kNear); \
+ __ Move(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
+ __ b(&done, Label::kNear); \
+ __ bind(&ge); \
+ __ Move(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); \
+ __ bind(&done); \
+ } while (0)
+
+
+// Only MRI mode for these instructions available
+#define ASSEMBLE_LOAD_FLOAT(asm_instr) \
+ do { \
+ DoubleRegister result = i.OutputDoubleRegister(); \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode); \
+ __ asm_instr(result, operand); \
+ } while (0)
+
+
+#define ASSEMBLE_LOAD_INTEGER(asm_instr) \
+ do { \
+ Register result = i.OutputRegister(); \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode); \
+ __ asm_instr(result, operand); \
+ } while (0)
+
+
+#define ASSEMBLE_STORE_FLOAT32() \
+ do { \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, &index); \
+ DoubleRegister value = i.InputDoubleRegister(index); \
+ __ StoreDoubleAsFloat32(value, operand, kScratchDoubleReg); \
+ } while (0)
+
+
+#define ASSEMBLE_STORE_DOUBLE() \
+ do { \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, &index); \
+ DoubleRegister value = i.InputDoubleRegister(index); \
+ __ StoreF(value, operand); \
+ } while (0)
+
+
+#define ASSEMBLE_STORE_INTEGER(asm_instr) \
+ do { \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, &index); \
+ Register value = i.InputRegister(index); \
+ __ asm_instr(value, operand); \
+ } while (0)
+
+
+// TODO(Tara): Check this implementation and those of all the
+// ASSEMBLE_CHECKED_* methods
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, width) \
+ do { \
+ DoubleRegister result = i.OutputDoubleRegister(); \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, index); \
+ Register offset = operand.rb(); \
+ __ lgfr(offset, offset); \
+ if (HasRegisterInput(instr, 2)) { \
+ __ CmpLogical32(offset, i.InputRegister(2)); \
+ } else { \
+ __ CmpLogical32(offset, i.InputImmediate(2)); \
+ } \
+ auto ool = new (zone()) OutOfLineLoadNAN##width(this, result); \
+ __ bge(ool->entry()); \
+ __ asm_instr(result, operand); \
+ __ bind(ool->exit()); \
+ } while (0)
+
+
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \
+ do { \
+ Register result = i.OutputRegister(); \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, index); \
+ Register offset = operand.rb(); \
+ __ lgfr(offset, offset); \
+ if (HasRegisterInput(instr, 2)) { \
+ __ CmpLogical32(offset, i.InputRegister(2)); \
+ } else { \
+ __ CmpLogical32(offset, i.InputImmediate(2)); \
+ } \
+ auto ool = new (zone()) OutOfLineLoadZero(this, result); \
+ __ bge(ool->entry()); \
+ __ asm_instr(result, operand); \
+ __ bind(ool->exit()); \
+ } while (0)
+
+
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
+ do { \
+ Label done; \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, index); \
+ Register offset = operand.rb(); \
+ __ lgfr(offset, offset); \
+ if (HasRegisterInput(instr, 2)) { \
+ __ CmpLogical32(offset, i.InputRegister(2)); \
+ } else { \
+ __ CmpLogical32(offset, i.InputImmediate(2)); \
+ } \
+ __ bge(&done); \
+ DoubleRegister value = i.InputDoubleRegister(3); \
+ __ StoreDoubleAsFloat32(value, operand, \
+ kScratchDoubleReg); \
+ __ bind(&done); \
+ } while (0)
+
+
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
+ do { \
+ Label done; \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, index); \
+ DCHECK_EQ(kMode_MRR, mode); \
+ Register offset = operand.rb(); \
+ __ lgfr(offset, offset); \
+ if (HasRegisterInput(instr, 2)) { \
+ __ CmpLogical32(offset, i.InputRegister(2)); \
+ } else { \
+ __ CmpLogical32(offset, i.InputImmediate(2)); \
+ } \
+ __ bge(&done); \
+ DoubleRegister value = i.InputDoubleRegister(3); \
+ __ StoreF(value, operand); \
+ __ bind(&done); \
+ } while (0)
+
+
+// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
+#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
+ do { \
+ Label done; \
+ size_t index = 0; \
+ AddressingMode mode = kMode_None; \
+ MemOperand operand = i.MemoryOperand(&mode, index); \
+ Register offset = operand.rb(); \
+ __ lgfr(offset, offset); \
+ if (HasRegisterInput(instr, 2)) { \
+ __ CmpLogical32(offset, i.InputRegister(2)); \
+ } else { \
+ __ CmpLogical32(offset, i.InputImmediate(2)); \
+ } \
+ __ bge(&done); \
+ Register value = i.InputRegister(3); \
+ __ asm_instr(value, operand); \
+ __ bind(&done); \
+ } while (0)
+
+
+#define ASSEMBLE_STORE_WRITE_BARRIER() \
+ do { \
+ Register object = i.InputRegister(0); \
+ Register index = i.InputRegister(1); \
+ Register value = i.InputRegister(2); \
+ __ AddP(index, object); \
+ __ StoreP(value, MemOperand(index)); \
+ SaveFPRegsMode mode = \
+ frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs; \
+ LinkRegisterStatus lr_status = kLRHasNotBeenSaved; \
+ __ RecordWrite(object, index, value, lr_status, mode); \
+ } while (0)
+
+
+void CodeGenerator::AssembleDeconstructActivationRecord() {
+ CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
+ int stack_slots = frame()->GetSpillSlotCount();
+ if (descriptor->IsJSFunctionCall() || stack_slots > 0) {
+ __ LeaveFrame(StackFrame::MANUAL);
+ }
+}
+
+
+// Assembles an instruction after register allocation, producing machine code.
+void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
+ S390OperandConverter i(this, instr);
+ ArchOpcode opcode = ArchOpcodeField::decode(instr->opcode());
+
+ switch (opcode) {
+ case kArchCallCodeObject: {
+ EnsureSpaceForLazyDeopt();
+ if (HasRegisterInput(instr, 0)) {
+ __ AddP(ip, i.InputRegister(0),
+ Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ Call(ip);
+ } else {
+ __ Call(Handle<Code>::cast(i.InputHeapObject(0)),
+ RelocInfo::CODE_TARGET);
+ }
+ RecordCallPosition(instr);
+ break;
+ }
+ case kArchTailCallCodeObject: {
+ AssembleDeconstructActivationRecord();
+ if (HasRegisterInput(instr, 0)) {
+ __ AddP(ip, i.InputRegister(0),
+ Operand(Code::kHeaderSize - kHeapObjectTag));
+ __ Jump(ip);
+ } else {
+ // We cannot use the constant pool to load the target since
+ // we've already restored the caller's frame.
+ ConstantPoolUnavailableScope constant_pool_unavailable(masm());
+ __ Jump(Handle<Code>::cast(i.InputHeapObject(0)),
+ RelocInfo::CODE_TARGET);
+ }
+ break;
+ }
+ case kArchCallJSFunction: {
+ EnsureSpaceForLazyDeopt();
+ Register func = i.InputRegister(0);
+ if (FLAG_debug_code) {
+ // Check the function's context matches the context argument.
+ __ LoadP(kScratchReg,
+ FieldMemOperand(func, JSFunction::kContextOffset));
+ __ CmpP(cp, kScratchReg);
+ __ Assert(eq, kWrongFunctionContext);
+ }
+ __ LoadP(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset));
+ __ Call(ip);
+ RecordCallPosition(instr);
+ break;
+ }
+ case kArchTailCallJSFunction: {
+ Register func = i.InputRegister(0);
+ if (FLAG_debug_code) {
+ // Check the function's context matches the context argument.
+ __ LoadP(kScratchReg,
+ FieldMemOperand(func, JSFunction::kContextOffset));
+ __ CmpP(cp, kScratchReg);
+ __ Assert(eq, kWrongFunctionContext);
+ }
+ AssembleDeconstructActivationRecord();
+ __ LoadP(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset));
+ __ Jump(ip);
+ break;
+ }
+ case kArchPrepareCallCFunction: {
+ int const num_parameters = MiscField::decode(instr->opcode());
+ __ PrepareCallCFunction(num_parameters, kScratchReg);
+ break;
+ }
+ case kArchCallCFunction: {
+ int const num_parameters = MiscField::decode(instr->opcode());
+ if (instr->InputAt(0)->IsImmediate()) {
+ ExternalReference ref = i.InputExternalReference(0);
+ __ CallCFunction(ref, num_parameters);
+ } else {
+ Register func = i.InputRegister(0);
+ __ CallCFunction(func, num_parameters);
+ }
+ break;
+ }
+ case kArchJmp:
+ AssembleArchJump(i.InputRpo(0));
+ break;
+ case kArchLookupSwitch:
+ AssembleArchLookupSwitch(instr);
+ break;
+ case kArchTableSwitch:
+ AssembleArchTableSwitch(instr);
+ break;
+ case kArchNop:
+ // don't emit code for nops.
+ break;
+ case kArchDeoptimize: {
+ int deopt_state_id =
+ BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
+ AssembleDeoptimizerCall(deopt_state_id, Deoptimizer::EAGER);
+ break;
+ }
+ case kArchRet:
+ AssembleReturn();
+ break;
+ case kArchStackPointer:
+ __ LoadRR(i.OutputRegister(), sp);
+ break;
+ case kArchFramePointer:
+ __ LoadRR(i.OutputRegister(), fp);
+ break;
+ case kArchTruncateDoubleToI:
+ // TODO(mbrandy): move slow call to stub out of line.
+ __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0));
+ break;
+ case kS390_And:
+ ASSEMBLE_BINOP(AndP, AndP);
+ break;
+ case kS390_AndComplement:
+ __ NotP(i.InputRegister(1));
+ __ AndP(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
+ break;
+ case kS390_Or:
+ ASSEMBLE_BINOP(OrP, OrP);
+ break;
+ case kS390_OrComplement:
+ __ NotP(i.InputRegister(1));
+ __ OrP(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
+ break;
+ case kS390_Xor:
+ ASSEMBLE_BINOP(XorP, XorP);
+ break;
+ case kS390_ShiftLeft32:
+ if (HasRegisterInput(instr, 1)) {
+ if (i.OutputRegister().is(i.InputRegister(1))) {
+ __ LoadRR(kScratchReg, i.InputRegister(1));
+ __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg);
+ } else {
+ ASSEMBLE_BINOP(ShiftLeft, ShiftLeft);
+ }
+ } else {
+ ASSEMBLE_BINOP(ShiftLeft, ShiftLeft);
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_ShiftLeft64:
+ ASSEMBLE_BINOP(sllg, sllg);
+ break;
+#endif
+ case kS390_ShiftRight32:
+ if (HasRegisterInput(instr, 1)) {
+ if (i.OutputRegister().is(i.InputRegister(1))) {
+ __ LoadRR(kScratchReg, i.InputRegister(1));
+ __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg);
+ } else {
+ ASSEMBLE_BINOP(ShiftRight, ShiftRight);
+ }
+ } else {
+ ASSEMBLE_BINOP(ShiftRight, ShiftRight);
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_ShiftRight64:
+ ASSEMBLE_BINOP(srlg, srlg);
+ break;
+#endif
+ case kS390_ShiftRightAlg32:
+ if (HasRegisterInput(instr, 1)) {
+ if (i.OutputRegister().is(i.InputRegister(1))) {
+ __ LoadRR(kScratchReg, i.InputRegister(1));
+ __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0),
+ kScratchReg);
+ } else {
+ ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith);
+ }
+ } else {
+ ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith);
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_ShiftRightAlg64:
+ ASSEMBLE_BINOP(srag, srag);
+ break;
+#endif
+ case kS390_RotRight32:
+ if (HasRegisterInput(instr, 1)) {
+ __ LoadComplementRR(kScratchReg, i.InputRegister(1));
+ __ rll(i.OutputRegister(), i.InputRegister(0), kScratchReg);
+ } else {
+ __ rll(i.OutputRegister(),
+ i.InputRegister(0), Operand(32 - i.InputInt32(1)));
+ // DCHECK(0); // Not implemented for now
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_RotRight64:
+ if (HasRegisterInput(instr, 1)) {
+ __ LoadComplementRR(kScratchReg, i.InputRegister(1));
+ __ rll(i.OutputRegister(), i.InputRegister(0), kScratchReg,
+ Operand(32));
+ __ lgfr(i.OutputRegister(), i.OutputRegister());
+ } else {
+ UNIMPLEMENTED(); // Not implemented for now
+ }
+ break;
+#endif
+ case kS390_Not:
+ __ LoadRR(i.OutputRegister(), i.InputRegister(0));
+ __ NotP(i.OutputRegister());
+ break;
+ case kS390_RotLeftAndMask32:
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ int shiftAmount = i.InputInt32(1);
+ int endBit = 63 - i.InputInt32(3);
+ int startBit = 63 - i.InputInt32(2);
+ __ rll(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
+ __ risbg(i.OutputRegister(), i.OutputRegister(), Operand(startBit),
+ Operand(endBit), Operand::Zero(), true);
+ } else {
+ UNIMPLEMENTED();
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_RotLeftAndClear64:
+// __ rldic(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1),
+// 63 - i.InputInt32(2), i.OutputRCBit());
+ UNIMPLEMENTED(); // Find correct instruction
+ break;
+ case kS390_RotLeftAndClearLeft64:
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ int shiftAmount = i.InputInt32(1);
+ int endBit = 63;
+ int startBit = 63 - i.InputInt32(2);
+ __ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
+ Operand(endBit), Operand(shiftAmount), true);
+ } else {
+ UNIMPLEMENTED();
+ }
+ break;
+ case kS390_RotLeftAndClearRight64:
+// __ rldicr(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1),
+// 63 - i.InputInt32(2), i.OutputRCBit()); == sldi
+ UNIMPLEMENTED(); // Confirm this sllg is correct
+// __ sllg(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1),
+// 63 - i.InputInt32(2));
+ break;
+#endif
+ case kS390_Add:
+ ASSEMBLE_BINOP(AddP, AddP);
+ break;
+ case kS390_AddWithOverflow32:
+ ASSEMBLE_ADD_WITH_OVERFLOW();
+ break;
+ case kS390_AddDouble:
+ // Ensure we don't clobber right/InputReg(1)
+ if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
+ ASSEMBLE_FLOAT_UNOP(adbr);
+ } else {
+ if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ adbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
+ }
+ break;
+ case kS390_Sub:
+ ASSEMBLE_BINOP(SubP, SubP);
+ break;
+ case kS390_SubWithOverflow32:
+ ASSEMBLE_SUB_WITH_OVERFLOW();
+ break;
+ case kS390_SubDouble:
+ // OutputDoubleReg() = i.InputDoubleRegister(0) - i.InputDoubleRegister(1)
+ if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
+ __ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ sdbr(i.OutputDoubleRegister(), kScratchDoubleReg);
+ } else {
+ if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) {
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ }
+ __ sdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
+ }
+ break;
+ case kS390_Mul32:
+#if V8_TARGET_ARCH_S390X
+ case kS390_Mul64:
+#endif
+ __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
+ break;
+ case kS390_MulHigh32:
+ __ LoadRR(r1, i.InputRegister(0));
+ __ mr_z(r0, i.InputRegister(1));
+ __ LoadRR(i.OutputRegister(), r0);
+ break;
+ case kS390_MulHighU32:
+ __ LoadRR(r1, i.InputRegister(0));
+ __ mlr(r0, i.InputRegister(1));
+ __ LoadRR(i.OutputRegister(), r0);
+ break;
+ case kS390_MulDouble:
+ // Ensure we don't clobber right
+ if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
+ ASSEMBLE_FLOAT_UNOP(mdbr);
+ } else {
+ if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ mdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
+ }
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_Div64:
+#endif
+ case kS390_Div32:
+ __ LoadRR(r0, i.InputRegister(0));
+ __ srda(r0, Operand(32));
+ __ dr(r0, i.InputRegister(1));
+ __ ltr(i.OutputRegister(), r1);
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_DivU64:
+#endif
+ case kS390_DivU32:
+ __ LoadRR(r0, i.InputRegister(0));
+ __ srdl(r0, Operand(32));
+ __ dlr(r0, i.InputRegister(1)); // R0:R1 = R1 / divisor -
+ __ ltr(i.OutputRegister(), r1); // Copy remainder to output reg
+ break;
+
+ case kS390_DivDouble:
+ // InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1)
+ if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
+ __ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ ddbr(i.OutputDoubleRegister(), kScratchDoubleReg);
+ } else {
+ if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
+ __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ ddbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
+}
+ break;
+ case kS390_Mod32:
+ ASSEMBLE_MODULO(dr, srda);
+ break;
+ case kS390_ModU32:
+ ASSEMBLE_MODULO(dlr, srdl);
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_Mod64:
+ ASSEMBLE_MODULO(dr, srda);
+ break;
+ case kS390_ModU64:
+ ASSEMBLE_MODULO(dlr, srdl);
+ break;
+#endif
+ case kS390_ModDouble:
+ ASSEMBLE_FLOAT_MODULO();
+ break;
+ case kS390_Neg:
+ __ LoadComplementRR(i.OutputRegister(), i.InputRegister(0));
+ break;
+ case kS390_MaxDouble:
+ ASSEMBLE_FLOAT_MAX(kScratchDoubleReg, kScratchReg);
+ break;
+ case kS390_MinDouble:
+ ASSEMBLE_FLOAT_MIN(kScratchDoubleReg, kScratchReg);
+ break;
+ case kS390_AbsDouble:
+ __ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ break;
+ case kS390_SqrtDouble:
+ ASSEMBLE_FLOAT_UNOP(sqdbr);
+ break;
+ case kS390_FloorDouble:
+// ASSEMBLE_FLOAT_UNOP_RC(frim);
+ __ FloatFloor64(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
+ kScratchReg);
+ break;
+ case kS390_CeilDouble:
+ __ FloatCeiling64(i.OutputDoubleRegister(),
+ i.InputDoubleRegister(0),
+ kScratchReg);
+ break;
+ case kS390_TruncateDouble:
+ __ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
+ v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0);
+ break;
+ case kS390_RoundDouble:
+ __ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
+ v8::internal::Assembler::FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0);
+ break;
+ case kS390_NegDouble:
+ ASSEMBLE_FLOAT_UNOP(lcdbr);
+ break;
+ case kS390_Cntlz32:
+ {
+ Label done;
+ __ llgfr(i.OutputRegister(), i.InputRegister(0));
+ __ flogr(r0, i.OutputRegister());
+ __ LoadRR(i.OutputRegister(), r0);
+ __ CmpP(r0, Operand::Zero());
+ __ beq(&done, Label::kNear);
+ __ SubP(i.OutputRegister(), Operand(32));
+ __ bind(&done);
+ }
+ break;
+ case kS390_Cmp32:
+ ASSEMBLE_COMPARE(Cmp32, CmpLogical32);
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_Cmp64:
+ ASSEMBLE_COMPARE(CmpP, CmpLogicalP);
+ break;
+#endif
+ case kS390_CmpDouble:
+ __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
+ break;
+ case kS390_Tst32:
+ if (HasRegisterInput(instr, 1)) {
+ __ AndP(r0, i.InputRegister(0), i.InputRegister(1));
+ } else {
+ __ AndP(r0, i.InputRegister(0), i.InputImmediate(1));
+ }
+#if V8_TARGET_ARCH_S390X
+ __ lgfr(r0, r0);
+ __ LoadAndTestP(r0, r0);
+#endif
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_Tst64:
+ if (HasRegisterInput(instr, 1)) {
+ __ AndP(r0, i.InputRegister(0), i.InputRegister(1));
+ } else {
+ __ AndP(r0, i.InputRegister(0), i.InputImmediate(1));
+ }
+ break;
+#endif
+ case kS390_Push:
+ __ Push(i.InputRegister(0));
+ break;
+ case kS390_PushFrame: {
+ int num_slots = i.InputInt32(1);
+ __ StoreP(i.InputRegister(0), MemOperand(sp, -num_slots * kPointerSize));
+ __ lay(sp, MemOperand(sp, -num_slots * kPointerSize));
+ break;
+ }
+ case kS390_StoreToStackSlot: {
+ int slot = i.InputInt32(1);
+ __ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize));
+ break;
+ }
+ case kS390_ExtendSignWord8:
+ #if V8_TARGET_ARCH_S390X
+ __ lgbr(i.OutputRegister(), i.InputRegister(0));
+ #else
+ __ lbr(i.OutputRegister(), i.InputRegister(0));
+ #endif
+ break;
+ case kS390_ExtendSignWord16:
+ #if V8_TARGET_ARCH_S390X
+ __ lghr(i.OutputRegister(), i.InputRegister(0));
+ #else
+ __ lhr(i.OutputRegister(), i.InputRegister(0));
+ #endif
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_ExtendSignWord32:
+ __ lgfr(i.OutputRegister(), i.InputRegister(0));
+ break;
+ case kS390_Uint32ToUint64:
+ // Zero extend
+ __ llgfr(i.OutputRegister(), i.InputRegister(0));
+ break;
+ case kS390_Int64ToInt32:
+ // TODO(mbrandy): sign extend?
+ __ Move(i.OutputRegister(), i.InputRegister(0));
+ break;
+#endif
+ case kS390_Int32ToDouble:
+ __ ConvertIntToDouble(i.InputRegister(0), i.OutputDoubleRegister());
+ break;
+ case kS390_Uint32ToDouble:
+ __ ConvertUnsignedIntToDouble(i.InputRegister(0),
+ i.OutputDoubleRegister());
+ break;
+ case kS390_DoubleToInt32:
+ case kS390_DoubleToUint32:
+ __ ConvertDoubleToInt64(i.InputDoubleRegister(0),
+#if !V8_TARGET_ARCH_S390X
+ kScratchReg,
+#endif
+ i.OutputRegister(), kScratchDoubleReg);
+ break;
+ case kS390_DoubleToFloat32:
+ __ ledbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ __ ldebr(i.OutputDoubleRegister(), i.OutputDoubleRegister());
+ break;
+ case kS390_Float32ToDouble:
+ // Nothing to do.
+ __ Move(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
+ break;
+ case kS390_DoubleExtractLowWord32:
+ // __ MovDoubleLowToInt(i.OutputRegister(), i.InputDoubleRegister(0));
+ __ stdy(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize));
+ __ LoadlW(i.OutputRegister(),
+ MemOperand(sp, -kDoubleSize + Register::kMantissaOffset));
+ break;
+ case kS390_DoubleExtractHighWord32:
+ // __ MovDoubleHighToInt(i.OutputRegister(), i.InputDoubleRegister(0));
+ __ stdy(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize));
+ __ LoadlW(i.OutputRegister(),
+ MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ break;
+ case kS390_DoubleInsertLowWord32:
+ __ InsertDoubleLow(i.OutputDoubleRegister(), i.InputRegister(1));
+ break;
+ case kS390_DoubleInsertHighWord32:
+ __ InsertDoubleHigh(i.OutputDoubleRegister(), i.InputRegister(1));
+ break;
+ case kS390_DoubleConstruct:
+ // TODO(Tara): Use ldgr
+ #if V8_TARGET_LITTLE_ENDIAN
+ __ StoreW(i.InputRegister(0), MemOperand(sp, -kDoubleSize / 2));
+ __ StoreW(i.InputRegister(1), MemOperand(sp, -kDoubleSize));
+ #else
+ __ StoreW(i.InputRegister(1), MemOperand(sp, -kDoubleSize / 2));
+ __ StoreW(i.InputRegister(0), MemOperand(sp, -kDoubleSize));
+ #endif
+ __ ldy(i.OutputDoubleRegister(), MemOperand(sp, -kDoubleSize));
+ break;
+ case kS390_LoadWordU8:
+ ASSEMBLE_LOAD_INTEGER(LoadlB);
+ // __ LoadlB(i.OutputRegister(), i.MemoryOperand());
+ break;
+ case kS390_LoadWordS8:
+ ASSEMBLE_LOAD_INTEGER(LoadlB);
+#if V8_TARGET_ARCH_S390X
+ __ lgbr(i.OutputRegister(), i.OutputRegister());
+#else
+ __ lbr(i.OutputRegister(), i.OutputRegister());
+#endif
+ break;
+ case kS390_LoadWordU16:
+ ASSEMBLE_LOAD_INTEGER(LoadLogicalHalfWordP);
+ break;
+ case kS390_LoadWordS16:
+ ASSEMBLE_LOAD_INTEGER(LoadHalfWordP);
+ break;
+ case kS390_LoadWordS32:
+ ASSEMBLE_LOAD_INTEGER(LoadW);
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_LoadWord64:
+ ASSEMBLE_LOAD_INTEGER(lg);
+ break;
+#endif
+ case kS390_LoadFloat32:
+ ASSEMBLE_LOAD_FLOAT(LoadShortConvertToDoubleF);
+ break;
+ case kS390_LoadDouble:
+ ASSEMBLE_LOAD_FLOAT(LoadF);
+ break;
+ case kS390_StoreWord8:
+ ASSEMBLE_STORE_INTEGER(StoreByte);
+ break;
+ case kS390_StoreWord16:
+ ASSEMBLE_STORE_INTEGER(StoreHalfWord);
+ break;
+ case kS390_StoreWord32:
+ ASSEMBLE_STORE_INTEGER(StoreW);
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kS390_StoreWord64:
+ ASSEMBLE_STORE_INTEGER(StoreP);
+ break;
+#endif
+ case kS390_StoreFloat32:
+ ASSEMBLE_STORE_FLOAT32();
+ break;
+ case kS390_StoreDouble:
+ ASSEMBLE_STORE_DOUBLE();
+ break;
+ case kS390_StoreWriteBarrier:
+ ASSEMBLE_STORE_WRITE_BARRIER();
+ break;
+ case kCheckedLoadInt8:
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlB);
+#if V8_TARGET_ARCH_S390X
+ __ lgbr(i.OutputRegister(), i.OutputRegister());
+#else
+ __ lbr(i.OutputRegister(), i.OutputRegister());
+#endif
+ break;
+ case kCheckedLoadUint8:
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlB);
+ break;
+ case kCheckedLoadInt16:
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadHalfWordP);
+ break;
+ case kCheckedLoadUint16:
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadLogicalHalfWordP);
+ break;
+ case kCheckedLoadWord32:
+ ASSEMBLE_CHECKED_LOAD_INTEGER(LoadW);
+ break;
+ case kCheckedLoadFloat32:
+ ASSEMBLE_CHECKED_LOAD_FLOAT(LoadShortConvertToDoubleF, 32);
+ break;
+ case kCheckedLoadFloat64:
+ ASSEMBLE_CHECKED_LOAD_FLOAT(LoadF, 64);
+ break;
+ case kCheckedStoreWord8:
+ ASSEMBLE_CHECKED_STORE_INTEGER(StoreByte);
+ break;
+ case kCheckedStoreWord16:
+ ASSEMBLE_CHECKED_STORE_INTEGER(StoreHalfWord);
+ break;
+ case kCheckedStoreWord32:
+ ASSEMBLE_CHECKED_STORE_INTEGER(StoreW);
+ break;
+ case kCheckedStoreFloat32:
+ ASSEMBLE_CHECKED_STORE_FLOAT32();
+ break;
+ case kCheckedStoreFloat64:
+ ASSEMBLE_CHECKED_STORE_DOUBLE();
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+}
+
+
+// Assembles branches after an instruction.
+void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
+ S390OperandConverter i(this, instr);
+ Label* tlabel = branch->true_label;
+ Label* flabel = branch->false_label;
+ ArchOpcode op = instr->arch_opcode();
+ FlagsCondition condition = branch->condition;
+
+ // Overflow checked for add/sub only.
+ DCHECK((condition != kOverflow && condition != kNotOverflow) ||
+ (op == kS390_AddWithOverflow32 || op == kS390_SubWithOverflow32));
+
+ Condition cond = FlagsConditionToCondition(condition);
+ if (op == kS390_CmpDouble) {
+ // check for unordered if necessary
+ // Branching to flabel/tlabel according to what's expected by tests
+ if (cond == le || cond == eq || cond == lt) {
+ __ bunordered(flabel);
+ } else if (cond == gt || cond == ne || cond == ge) {
+ __ bunordered(tlabel);
+ }
+ }
+ __ b(cond, tlabel);
+ if (!branch->fallthru) __ b(flabel); // no fallthru to flabel.
+}
+
+
+void CodeGenerator::AssembleArchJump(RpoNumber target) {
+ if (!IsNextInAssemblyOrder(target)) __ b(GetLabel(target));
+}
+
+
+// Assembles boolean materializations after an instruction.
+void CodeGenerator::AssembleArchBoolean(Instruction* instr,
+ FlagsCondition condition) {
+ S390OperandConverter i(this, instr);
+ Label done;
+ ArchOpcode op = instr->arch_opcode();
+ bool check_unordered = (op == kS390_CmpDouble);
+
+ // Overflow checked for add/sub only.
+ DCHECK((condition != kOverflow && condition != kNotOverflow) ||
+ (op == kS390_AddWithOverflow32 || op == kS390_SubWithOverflow32));
+
+ // Materialize a full 32-bit 1 or 0 value. The result register is always the
+ // last output of the instruction.
+ DCHECK_NE(0u, instr->OutputCount());
+ Register reg = i.OutputRegister(instr->OutputCount() - 1);
+ Condition cond = FlagsConditionToCondition(condition);
+ switch (cond) {
+ case ne:
+ case ge:
+ case gt:
+ if (check_unordered) {
+ __ LoadImmP(reg, Operand(1));
+ __ LoadImmP(kScratchReg, Operand::Zero());
+ __ bunordered(&done);
+ Label cond_true;
+ __ b(cond, &cond_true, Label::kNear);
+ __ LoadRR(reg, kScratchReg);
+ __ bind(&cond_true);
+ } else {
+ Label cond_true, done_here;
+ __ LoadImmP(reg, Operand(1));
+ __ b(cond, &cond_true, Label::kNear);
+ __ LoadImmP(reg, Operand::Zero());
+ __ bind(&cond_true);
+ }
+ break;
+ case eq:
+ case lt:
+ case le:
+ if (check_unordered) {
+ __ LoadImmP(reg, Operand::Zero());
+ __ LoadImmP(kScratchReg, Operand(1));
+ __ bunordered(&done);
+ Label cond_false;
+ __ b(NegateCondition(cond), &cond_false, Label::kNear);
+ __ LoadRR(reg, kScratchReg);
+ __ bind(&cond_false);
+ } else {
+ __ LoadImmP(reg, Operand::Zero());
+ Label cond_false;
+ __ b(NegateCondition(cond), &cond_false, Label::kNear);
+ __ LoadImmP(reg, Operand(1));
+ __ bind(&cond_false);
+ }
+ break;
+ default:
+ UNREACHABLE();
+ break;
+ }
+ __ bind(&done);
+}
+
+
+void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
+ S390OperandConverter i(this, instr);
+ Register input = i.InputRegister(0);
+ for (size_t index = 2; index < instr->InputCount(); index += 2) {
+ __ CmpP(input, Operand(i.InputInt32(index + 0)));
+ __ beq(GetLabel(i.InputRpo(index + 1)));
+ }
+ AssembleArchJump(i.InputRpo(1));
+}
+
+
+void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
+ S390OperandConverter i(this, instr);
+ Register input = i.InputRegister(0);
+ int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
+ Label** cases = zone()->NewArray<Label*>(case_count);
+ for (int32_t index = 0; index < case_count; ++index) {
+ cases[index] = GetLabel(i.InputRpo(index + 2));
+ }
+ Label* const table = AddJumpTable(cases, case_count);
+ __ CmpLogicalP(input, Operand(case_count));
+ __ bge(GetLabel(i.InputRpo(1)));
+ __ larl(kScratchReg, table);
+ __ ShiftLeftP(r1, input, Operand(kPointerSizeLog2));
+ __ LoadP(kScratchReg, MemOperand(kScratchReg, r1));
+ __ Jump(kScratchReg);
+}
+
+
+void CodeGenerator::AssembleDeoptimizerCall(
+ int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
+ Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
+ isolate(), deoptimization_id, bailout_type);
+ __ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
+}
+
+
+void CodeGenerator::AssemblePrologue() {
+ CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
+ int stack_slots = frame()->GetSpillSlotCount();
+ if (descriptor->kind() == CallDescriptor::kCallAddress) {
+// __ function_descriptor();
+ int register_save_area_size = 0;
+ RegList frame_saves = fp.bit();
+ __ Push(r14, fp);
+ __ LoadRR(fp, sp);
+ // Save callee-saved registers.
+ const RegList saves = descriptor->CalleeSavedRegisters() & ~frame_saves;
+ for (int i = Register::kNumRegisters - 1; i >= 0; i--) {
+ if (!((1 << i) & saves)) continue;
+ register_save_area_size += kPointerSize;
+ }
+ frame()->SetRegisterSaveAreaSize(register_save_area_size);
+ __ MultiPush(saves);
+ } else if (descriptor->IsJSFunctionCall()) {
+ CompilationInfo* info = this->info();
+ __ Prologue(info->IsCodePreAgingActive());
+ frame()->SetRegisterSaveAreaSize(
+ StandardFrameConstants::kFixedFrameSizeFromFp);
+ } else if (needs_frame_) {
+ __ StubPrologue();
+ frame()->SetRegisterSaveAreaSize(
+ StandardFrameConstants::kFixedFrameSizeFromFp);
+ }
+
+ if (info()->is_osr()) {
+ // TurboFan OSR-compiled functions cannot be entered directly.
+ __ Abort(kShouldNotDirectlyEnterOsrFunction);
+
+ // Unoptimized code jumps directly to this entrypoint while the unoptimized
+ // frame is still on the stack. Optimized code uses OSR values directly from
+ // the unoptimized frame. Thus, all that needs to be done is to allocate the
+ // remaining stack slots.
+ if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
+ osr_pc_offset_ = __ pc_offset();
+ // TODO(titzer): cannot address target function == local #-1
+ __ LoadP(r3, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
+ DCHECK(stack_slots >= frame()->GetOsrStackSlotCount());
+ stack_slots -= frame()->GetOsrStackSlotCount();
+ }
+
+ if (stack_slots > 0) {
+ __ lay(sp, MemOperand(sp, -stack_slots * kPointerSize));
+ }
+}
+
+
+void CodeGenerator::AssembleReturn() {
+ CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
+ int stack_slots = frame()->GetSpillSlotCount();
+ if (descriptor->kind() == CallDescriptor::kCallAddress) {
+ if (frame()->GetRegisterSaveAreaSize() > 0) {
+ // Remove this frame's spill slots first.
+ if (stack_slots > 0) {
+ __ lay(sp, MemOperand(sp, stack_slots * kPointerSize));
+ }
+ // Restore registers.
+ RegList frame_saves = fp.bit();
+ const RegList saves = descriptor->CalleeSavedRegisters() & ~frame_saves;
+ if (saves != 0) {
+ __ MultiPop(saves);
+ }
+ }
+ __ LeaveFrame(StackFrame::MANUAL);
+ __ Ret();
+ } else if (descriptor->IsJSFunctionCall() || needs_frame_) {
+ // Canonicalize JSFunction return sites for now.
+ if (return_label_.is_bound()) {
+ __ b(&return_label_);
+ } else {
+ __ bind(&return_label_);
+ int pop_count = descriptor->IsJSFunctionCall()
+ ? static_cast<int>(descriptor->JSParameterCount())
+ : (info()->IsStub()
+ ? info()->code_stub()->GetStackParameterCount()
+ : 0);
+ __ LeaveFrame(StackFrame::MANUAL, pop_count * kPointerSize);
+ __ Ret();
+ }
+ } else {
+ __ Ret();
+ }
+}
+
+
+void CodeGenerator::AssembleMove(InstructionOperand* source,
+ InstructionOperand* destination) {
+ S390OperandConverter g(this, NULL);
+ // Dispatch on the source and destination operand kinds. Not all
+ // combinations are possible.
+ if (source->IsRegister()) {
+ DCHECK(destination->IsRegister() || destination->IsStackSlot());
+ Register src = g.ToRegister(source);
+ if (destination->IsRegister()) {
+ __ Move(g.ToRegister(destination), src);
+ } else {
+ __ StoreP(src, g.ToMemOperand(destination));
+ }
+ } else if (source->IsStackSlot()) {
+ DCHECK(destination->IsRegister() || destination->IsStackSlot());
+ MemOperand src = g.ToMemOperand(source);
+ if (destination->IsRegister()) {
+ __ LoadP(g.ToRegister(destination), src);
+ } else {
+ Register temp = kScratchReg;
+ __ LoadP(temp, src, r0);
+ __ StoreP(temp, g.ToMemOperand(destination));
+ }
+ } else if (source->IsConstant()) {
+ Constant src = g.ToConstant(source);
+ if (destination->IsRegister() || destination->IsStackSlot()) {
+ Register dst =
+ destination->IsRegister() ? g.ToRegister(destination) : kScratchReg;
+ switch (src.type()) {
+ case Constant::kInt32:
+ __ mov(dst, Operand(src.ToInt32()));
+ break;
+ case Constant::kInt64:
+ __ mov(dst, Operand(src.ToInt64()));
+ break;
+ case Constant::kFloat32:
+ __ Move(dst,
+ isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
+ break;
+ case Constant::kFloat64:
+ __ Move(dst,
+ isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
+ break;
+ case Constant::kExternalReference:
+ __ mov(dst, Operand(src.ToExternalReference()));
+ break;
+ case Constant::kHeapObject: {
+ Handle<HeapObject> src_object = src.ToHeapObject();
+ Heap::RootListIndex index;
+ int offset;
+ if (IsMaterializableFromFrame(src_object, &offset)) {
+ __ LoadP(dst, MemOperand(fp, offset));
+ } else if (IsMaterializableFromRoot(src_object, &index)) {
+ __ LoadRoot(dst, index);
+ } else {
+ __ Move(dst, src_object);
+ }
+ break;
+ }
+ case Constant::kRpoNumber:
+ UNREACHABLE(); // TODO(dcarney): loading RPO constants on PPC.
+ break;
+ }
+ if (destination->IsStackSlot()) {
+ __ StoreP(dst, g.ToMemOperand(destination), r0);
+ }
+ } else {
+ DoubleRegister dst = destination->IsDoubleRegister()
+ ? g.ToDoubleRegister(destination)
+ : kScratchDoubleReg;
+ double value = (src.type() == Constant::kFloat32) ? src.ToFloat32()
+ : src.ToFloat64();
+ __ LoadDoubleLiteral(dst, value, kScratchReg);
+ if (destination->IsDoubleStackSlot()) {
+ __ StoreF(dst, g.ToMemOperand(destination));
+ }
+ }
+ } else if (source->IsDoubleRegister()) {
+ DoubleRegister src = g.ToDoubleRegister(source);
+ if (destination->IsDoubleRegister()) {
+ DoubleRegister dst = g.ToDoubleRegister(destination);
+ __ Move(dst, src);
+ } else {
+ DCHECK(destination->IsDoubleStackSlot());
+ __ StoreF(src, g.ToMemOperand(destination));
+ }
+ } else if (source->IsDoubleStackSlot()) {
+ DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot());
+ MemOperand src = g.ToMemOperand(source);
+ if (destination->IsDoubleRegister()) {
+ __ LoadF(g.ToDoubleRegister(destination), src);
+ } else {
+ DoubleRegister temp = kScratchDoubleReg;
+ __ LoadF(temp, src);
+ __ StoreF(temp, g.ToMemOperand(destination));
+ }
+ } else {
+ UNREACHABLE();
+ }
+}
+
+
+void CodeGenerator::AssembleSwap(InstructionOperand* source,
+ InstructionOperand* destination) {
+ S390OperandConverter g(this, NULL);
+ // Dispatch on the source and destination operand kinds. Not all
+ // combinations are possible.
+ if (source->IsRegister()) {
+ // Register-register.
+ Register temp = kScratchReg;
+ Register src = g.ToRegister(source);
+ if (destination->IsRegister()) {
+ Register dst = g.ToRegister(destination);
+ __ LoadRR(temp, src);
+ __ LoadRR(src, dst);
+ __ LoadRR(dst, temp);
+ } else {
+ DCHECK(destination->IsStackSlot());
+ MemOperand dst = g.ToMemOperand(destination);
+ __ LoadRR(temp, src);
+ __ LoadP(src, dst);
+ __ StoreP(temp, dst);
+ }
+#if V8_TARGET_ARCH_S390X
+ } else if (source->IsStackSlot() || source->IsDoubleStackSlot()) {
+#else
+ } else if (source->IsStackSlot()) {
+ DCHECK(destination->IsStackSlot());
+#endif
+ Register temp_0 = kScratchReg;
+ Register temp_1 = r0;
+ MemOperand src = g.ToMemOperand(source);
+ MemOperand dst = g.ToMemOperand(destination);
+ __ LoadP(temp_0, src);
+ __ LoadP(temp_1, dst);
+ __ StoreP(temp_0, dst);
+ __ StoreP(temp_1, src);
+ } else if (source->IsDoubleRegister()) {
+ DoubleRegister temp = kScratchDoubleReg;
+ DoubleRegister src = g.ToDoubleRegister(source);
+ if (destination->IsDoubleRegister()) {
+ DoubleRegister dst = g.ToDoubleRegister(destination);
+ __ ldr(temp, src);
+ __ ldr(src, dst);
+ __ ldr(dst, temp);
+ } else {
+ DCHECK(destination->IsDoubleStackSlot());
+ MemOperand dst = g.ToMemOperand(destination);
+ __ ldr(temp, src);
+ __ LoadF(src, dst);
+ __ StoreF(temp, dst);
+ }
+#if !V8_TARGET_ARCH_S390X
+ } else if (source->IsDoubleStackSlot()) {
+ DCHECK(destination->IsDoubleStackSlot());
+ DoubleRegister temp_0 = kScratchDoubleReg;
+ DoubleRegister temp_1 = d0;
+ MemOperand src = g.ToMemOperand(source);
+ MemOperand dst = g.ToMemOperand(destination);
+ __ LoadF(temp_0, src);
+ __ LoadF(temp_1, dst);
+ __ StoreF(temp_0, dst);
+ __ StoreF(temp_1, src);
+#endif
+ } else {
+ // No other combinations are possible.
+ UNREACHABLE();
+ }
+}
+
+
+void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
+ for (size_t index = 0; index < target_count; ++index) {
+ __ emit_label_addr(targets[index]);
+ }
+}
+
+
+void CodeGenerator::AddNopForSmiCodeInlining() {
+ // We do not insert nops for inlined Smi code.
+}
+
+
+void CodeGenerator::EnsureSpaceForLazyDeopt() {
+ int space_needed = Deoptimizer::patch_size();
+ if (!info()->IsStub()) {
+ // Ensure that we have enough space after the previous lazy-bailout
+ // instruction for patching the code here.
+ int current_pc = masm()->pc_offset();
+ if (current_pc < last_lazy_deopt_pc_ + space_needed) {
+ int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
+ DCHECK_EQ(0, padding_size % 2);
+ while (padding_size > 0) {
+ __ nop();
+ padding_size -= 2;
+ }
+ }
+ }
+}
+
+#undef __
+
+} // namespace compiler
+} // namespace internal
+} // namespace v8
--- /dev/null
+++ b/deps/v8/src/compiler/s390/instruction-codes-s390.h
@@ -0,0 +1,127 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
+#define V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
+
+namespace v8 {
+namespace internal {
+namespace compiler {
+
+// S390-specific opcodes that specify which assembly sequence to emit.
+// Most opcodes specify a single instruction.
+#define TARGET_ARCH_OPCODE_LIST(V) \
+ V(S390_And) \
+ V(S390_AndComplement) \
+ V(S390_Or) \
+ V(S390_OrComplement) \
+ V(S390_Xor) \
+ V(S390_ShiftLeft32) \
+ V(S390_ShiftLeft64) \
+ V(S390_ShiftRight32) \
+ V(S390_ShiftRight64) \
+ V(S390_ShiftRightAlg32) \
+ V(S390_ShiftRightAlg64) \
+ V(S390_RotRight32) \
+ V(S390_RotRight64) \
+ V(S390_Not) \
+ V(S390_RotLeftAndMask32) \
+ V(S390_RotLeftAndClear64) \
+ V(S390_RotLeftAndClearLeft64) \
+ V(S390_RotLeftAndClearRight64) \
+ V(S390_Add) \
+ V(S390_AddWithOverflow32) \
+ V(S390_AddDouble) \
+ V(S390_Sub) \
+ V(S390_SubWithOverflow32) \
+ V(S390_SubDouble) \
+ V(S390_Mul32) \
+ V(S390_Mul64) \
+ V(S390_MulHigh32) \
+ V(S390_MulHighU32) \
+ V(S390_MulDouble) \
+ V(S390_Div32) \
+ V(S390_Div64) \
+ V(S390_DivU32) \
+ V(S390_DivU64) \
+ V(S390_DivDouble) \
+ V(S390_Mod32) \
+ V(S390_Mod64) \
+ V(S390_ModU32) \
+ V(S390_ModU64) \
+ V(S390_ModDouble) \
+ V(S390_Neg) \
+ V(S390_NegDouble) \
+ V(S390_SqrtDouble) \
+ V(S390_FloorDouble) \
+ V(S390_CeilDouble) \
+ V(S390_TruncateDouble) \
+ V(S390_RoundDouble) \
+ V(S390_MaxDouble) \
+ V(S390_MinDouble) \
+ V(S390_AbsDouble) \
+ V(S390_Cntlz32) \
+ V(S390_Cmp32) \
+ V(S390_Cmp64) \
+ V(S390_CmpDouble) \
+ V(S390_Tst32) \
+ V(S390_Tst64) \
+ V(S390_Push) \
+ V(S390_PushFrame) \
+ V(S390_StoreToStackSlot) \
+ V(S390_ExtendSignWord8) \
+ V(S390_ExtendSignWord16) \
+ V(S390_ExtendSignWord32) \
+ V(S390_Uint32ToUint64) \
+ V(S390_Int64ToInt32) \
+ V(S390_Int32ToDouble) \
+ V(S390_Uint32ToDouble) \
+ V(S390_Float32ToDouble) \
+ V(S390_DoubleToInt32) \
+ V(S390_DoubleToUint32) \
+ V(S390_DoubleToFloat32) \
+ V(S390_DoubleExtractLowWord32) \
+ V(S390_DoubleExtractHighWord32) \
+ V(S390_DoubleInsertLowWord32) \
+ V(S390_DoubleInsertHighWord32) \
+ V(S390_DoubleConstruct) \
+ V(S390_LoadWordS8) \
+ V(S390_LoadWordU8) \
+ V(S390_LoadWordS16) \
+ V(S390_LoadWordU16) \
+ V(S390_LoadWordS32) \
+ V(S390_LoadWord64) \
+ V(S390_LoadFloat32) \
+ V(S390_LoadDouble) \
+ V(S390_StoreWord8) \
+ V(S390_StoreWord16) \
+ V(S390_StoreWord32) \
+ V(S390_StoreWord64) \
+ V(S390_StoreFloat32) \
+ V(S390_StoreDouble) \
+ V(S390_StoreWriteBarrier)
+
+
+// Addressing modes represent the "shape" of inputs to an instruction.
+// Many instructions support multiple addressing modes. Addressing modes
+// are encoded into the InstructionCode of the instruction and tell the
+// code generator after register allocation which assembler method to call.
+//
+// We use the following local notation for addressing modes:
+//
+// R = register
+// O = register or stack slot
+// D = double register
+// I = immediate (handle, external, int32)
+// MRI = [register + immediate]
+// MRR = [register + register]
+#define TARGET_ADDRESSING_MODE_LIST(V) \
+ V(MRI) /* [%r0 + K] */ \
+ V(MRR) /* [%r0 + %r1] */
+
+} // namespace compiler
+} // namespace internal
+} // namespace v8
+
+#endif // V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
--- /dev/null
+++ b/deps/v8/src/compiler/s390/instruction-selector-s390.cc
@@ -0,0 +1,1669 @@
+// Copyright 2014 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/base/adapters.h"
+#include "src/compiler/instruction-selector-impl.h"
+#include "src/compiler/node-matchers.h"
+#include "src/compiler/node-properties.h"
+
+namespace v8 {
+namespace internal {
+namespace compiler {
+
+enum ImmediateMode {
+ kInt16Imm,
+ kInt16Imm_Unsigned,
+ kInt16Imm_Negate,
+ kInt16Imm_4ByteAligned,
+ kShift32Imm,
+ kShift64Imm,
+ kNoImmediate
+};
+
+
+// Adds S390-specific methods for generating operands.
+class S390OperandGenerator final : public OperandGenerator {
+ public:
+ explicit S390OperandGenerator(InstructionSelector* selector)
+ : OperandGenerator(selector) {}
+
+ InstructionOperand UseOperand(Node* node, ImmediateMode mode) {
+ if (CanBeImmediate(node, mode)) {
+ return UseImmediate(node);
+ }
+ return UseRegister(node);
+ }
+
+ bool CanBeImmediate(Node* node, ImmediateMode mode) {
+ int64_t value;
+ if (node->opcode() == IrOpcode::kInt32Constant)
+ value = OpParameter<int32_t>(node);
+ else if (node->opcode() == IrOpcode::kInt64Constant)
+ value = OpParameter<int64_t>(node);
+ else
+ return false;
+ return CanBeImmediate(value, mode);
+ }
+
+ bool CanBeImmediate(int64_t value, ImmediateMode mode) {
+ switch (mode) {
+ case kInt16Imm:
+ return is_int16(value);
+ case kInt16Imm_Unsigned:
+ return is_uint16(value);
+ case kInt16Imm_Negate:
+ return is_int16(-value);
+ case kInt16Imm_4ByteAligned:
+ return is_int16(value) && !(value & 3);
+ case kShift32Imm:
+ return 0 <= value && value < 32;
+ case kShift64Imm:
+ return 0 <= value && value < 64;
+ case kNoImmediate:
+ return false;
+ }
+ return false;
+ }
+};
+
+
+namespace {
+
+void VisitRR(InstructionSelector* selector, ArchOpcode opcode, Node* node) {
+ S390OperandGenerator g(selector);
+ selector->Emit(opcode, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
+void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, Node* node) {
+ S390OperandGenerator g(selector);
+ selector->Emit(opcode, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)),
+ g.UseRegister(node->InputAt(1)));
+}
+
+
+void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, Node* node,
+ ImmediateMode operand_mode) {
+ S390OperandGenerator g(selector);
+ selector->Emit(opcode, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)),
+ g.UseOperand(node->InputAt(1), operand_mode));
+}
+
+
+// Shared routine for multiple binary operations.
+template <typename Matcher>
+void VisitBinop(InstructionSelector* selector, Node* node,
+ InstructionCode opcode, ImmediateMode operand_mode,
+ FlagsContinuation* cont) {
+ S390OperandGenerator g(selector);
+ Matcher m(node);
+ InstructionOperand inputs[4];
+ size_t input_count = 0;
+ InstructionOperand outputs[2];
+ size_t output_count = 0;
+
+ inputs[input_count++] = g.UseRegister(m.left().node());
+ inputs[input_count++] = g.UseOperand(m.right().node(), operand_mode);
+
+ if (cont->IsBranch()) {
+ inputs[input_count++] = g.Label(cont->true_block());
+ inputs[input_count++] = g.Label(cont->false_block());
+ }
+
+ outputs[output_count++] = g.DefineAsRegister(node);
+ if (cont->IsSet()) {
+ outputs[output_count++] = g.DefineAsRegister(cont->result());
+ }
+
+ DCHECK_NE(0u, input_count);
+ DCHECK_NE(0u, output_count);
+ DCHECK_GE(arraysize(inputs), input_count);
+ DCHECK_GE(arraysize(outputs), output_count);
+
+ selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
+ inputs);
+}
+
+
+// Shared routine for multiple binary operations.
+template <typename Matcher>
+void VisitBinop(InstructionSelector* selector, Node* node, ArchOpcode opcode,
+ ImmediateMode operand_mode) {
+ FlagsContinuation cont;
+ VisitBinop<Matcher>(selector, node, opcode, operand_mode, &cont);
+}
+
+} // namespace
+
+
+void InstructionSelector::VisitLoad(Node* node) {
+ MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
+ MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
+ S390OperandGenerator g(this);
+ Node* base = node->InputAt(0);
+ Node* offset = node->InputAt(1);
+
+ ArchOpcode opcode;
+ ImmediateMode mode = kInt16Imm;
+ switch (rep) {
+ case kRepFloat32:
+ opcode = kS390_LoadFloat32;
+ break;
+ case kRepFloat64:
+ opcode = kS390_LoadDouble;
+ break;
+ case kRepBit: // Fall through.
+ case kRepWord8:
+ opcode = (typ == kTypeInt32) ? kS390_LoadWordS8 : kS390_LoadWordU8;
+ break;
+ case kRepWord16:
+ opcode = (typ == kTypeInt32) ? kS390_LoadWordS16 : kS390_LoadWordU16;
+ break;
+#if !V8_TARGET_ARCH_S390X
+ case kRepTagged: // Fall through.
+#endif
+ case kRepWord32:
+ opcode = kS390_LoadWordS32;
+#if V8_TARGET_ARCH_S390X
+ // TODO(mbrandy): this applies to signed loads only (lwa)
+ mode = kInt16Imm_4ByteAligned;
+#endif
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kRepTagged: // Fall through.
+ case kRepWord64:
+ opcode = kS390_LoadWord64;
+ mode = kInt16Imm_4ByteAligned;
+ break;
+#endif
+ default:
+ UNREACHABLE();
+ return;
+ }
+ if (g.CanBeImmediate(offset, mode)) {
+ Emit(opcode | AddressingModeField::encode(kMode_MRI),
+ g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(offset));
+ } else if (g.CanBeImmediate(base, mode)) {
+ Emit(opcode | AddressingModeField::encode(kMode_MRI),
+ g.DefineAsRegister(node), g.UseRegister(offset), g.UseImmediate(base));
+ } else {
+ Emit(opcode | AddressingModeField::encode(kMode_MRR),
+ g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(offset));
+ }
+}
+
+
+void InstructionSelector::VisitStore(Node* node) {
+ S390OperandGenerator g(this);
+ Node* base = node->InputAt(0);
+ Node* offset = node->InputAt(1);
+ Node* value = node->InputAt(2);
+
+ StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
+ MachineType rep = RepresentationOf(store_rep.machine_type());
+ if (store_rep.write_barrier_kind() == kFullWriteBarrier) {
+ DCHECK(rep == kRepTagged);
+ // TODO(dcarney): refactor RecordWrite function to take temp registers
+ // and pass them here instead of using fixed regs
+ // TODO(dcarney): handle immediate indices.
+ InstructionOperand temps[] = {g.TempRegister(r8), g.TempRegister(r9)};
+ Emit(kS390_StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, r7),
+ g.UseFixed(offset, r8), g.UseFixed(value, r9), arraysize(temps),
+ temps);
+ return;
+ }
+ DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind());
+ ArchOpcode opcode;
+ ImmediateMode mode = kInt16Imm;
+ switch (rep) {
+ case kRepFloat32:
+ opcode = kS390_StoreFloat32;
+ break;
+ case kRepFloat64:
+ opcode = kS390_StoreDouble;
+ break;
+ case kRepBit: // Fall through.
+ case kRepWord8:
+ opcode = kS390_StoreWord8;
+ break;
+ case kRepWord16:
+ opcode = kS390_StoreWord16;
+ break;
+#if !V8_TARGET_ARCH_S390X
+ case kRepTagged: // Fall through.
+#endif
+ case kRepWord32:
+ opcode = kS390_StoreWord32;
+ break;
+#if V8_TARGET_ARCH_S390X
+ case kRepTagged: // Fall through.
+ case kRepWord64:
+ opcode = kS390_StoreWord64;
+ mode = kInt16Imm_4ByteAligned;
+ break;
+#endif
+ default:
+ UNREACHABLE();
+ return;
+ }
+ if (g.CanBeImmediate(offset, mode)) {
+ Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
+ g.UseRegister(base), g.UseImmediate(offset), g.UseRegister(value));
+ } else if (g.CanBeImmediate(base, mode)) {
+ Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
+ g.UseRegister(offset), g.UseImmediate(base), g.UseRegister(value));
+ } else {
+ Emit(opcode | AddressingModeField::encode(kMode_MRR), g.NoOutput(),
+ g.UseRegister(base), g.UseRegister(offset), g.UseRegister(value));
+ }
+}
+
+
+void InstructionSelector::VisitCheckedLoad(Node* node) {
+ MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
+ MachineType typ = TypeOf(OpParameter<MachineType>(node));
+ S390OperandGenerator g(this);
+ Node* const base = node->InputAt(0);
+ Node* const offset = node->InputAt(1);
+ Node* const length = node->InputAt(2);
+ ArchOpcode opcode;
+ switch (rep) {
+ case kRepWord8:
+ opcode = typ == kTypeInt32 ? kCheckedLoadInt8 : kCheckedLoadUint8;
+ break;
+ case kRepWord16:
+ opcode = typ == kTypeInt32 ? kCheckedLoadInt16 : kCheckedLoadUint16;
+ break;
+ case kRepWord32:
+ opcode = kCheckedLoadWord32;
+ break;
+ case kRepFloat32:
+ opcode = kCheckedLoadFloat32;
+ break;
+ case kRepFloat64:
+ opcode = kCheckedLoadFloat64;
+ break;
+ default:
+ UNREACHABLE();
+ return;
+ }
+ AddressingMode addressingMode = kMode_MRR;
+ Emit(opcode | AddressingModeField::encode(addressingMode),
+ g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(offset),
+ g.UseOperand(length, kInt16Imm_Unsigned));
+}
+
+
+void InstructionSelector::VisitCheckedStore(Node* node) {
+ MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
+ S390OperandGenerator g(this);
+ Node* const base = node->InputAt(0);
+ Node* const offset = node->InputAt(1);
+ Node* const length = node->InputAt(2);
+ Node* const value = node->InputAt(3);
+ ArchOpcode opcode;
+ switch (rep) {
+ case kRepWord8:
+ opcode = kCheckedStoreWord8;
+ break;
+ case kRepWord16:
+ opcode = kCheckedStoreWord16;
+ break;
+ case kRepWord32:
+ opcode = kCheckedStoreWord32;
+ break;
+ case kRepFloat32:
+ opcode = kCheckedStoreFloat32;
+ break;
+ case kRepFloat64:
+ opcode = kCheckedStoreFloat64;
+ break;
+ default:
+ UNREACHABLE();
+ return;
+ }
+ AddressingMode addressingMode = kMode_MRR;
+ Emit(opcode | AddressingModeField::encode(addressingMode), g.NoOutput(),
+ g.UseRegister(base), g.UseRegister(offset),
+ g.UseOperand(length, kInt16Imm_Unsigned), g.UseRegister(value));
+}
+
+
+template <typename Matcher>
+static void VisitLogical(InstructionSelector* selector, Node* node, Matcher* m,
+ ArchOpcode opcode, bool left_can_cover,
+ bool right_can_cover, ImmediateMode imm_mode) {
+ S390OperandGenerator g(selector);
+
+ // Map instruction to equivalent operation with inverted right input.
+ ArchOpcode inv_opcode = opcode;
+ switch (opcode) {
+ case kS390_And:
+ inv_opcode = kS390_AndComplement;
+ break;
+ case kS390_Or:
+ inv_opcode = kS390_OrComplement;
+ break;
+ default:
+ UNREACHABLE();
+ }
+
+ // Select Logical(y, ~x) for Logical(Xor(x, -1), y).
+ if ((m->left().IsWord32Xor() || m->left().IsWord64Xor()) && left_can_cover) {
+ Matcher mleft(m->left().node());
+ if (mleft.right().Is(-1)) {
+ selector->Emit(inv_opcode, g.DefineAsRegister(node),
+ g.UseRegister(m->right().node()),
+ g.UseRegister(mleft.left().node()));
+ return;
+ }
+ }
+
+ // Select Logical(x, ~y) for Logical(x, Xor(y, -1)).
+ if ((m->right().IsWord32Xor() || m->right().IsWord64Xor()) &&
+ right_can_cover) {
+ Matcher mright(m->right().node());
+ if (mright.right().Is(-1)) {
+ // TODO(all): support shifted operand on right.
+ selector->Emit(inv_opcode, g.DefineAsRegister(node),
+ g.UseRegister(m->left().node()),
+ g.UseRegister(mright.left().node()));
+ return;
+ }
+ }
+
+ VisitBinop<Matcher>(selector, node, opcode, imm_mode);
+}
+
+
+static inline bool IsContiguousMask32(uint32_t value, int* mb, int* me) {
+ int mask_width = base::bits::CountPopulation32(value);
+ int mask_msb = base::bits::CountLeadingZeros32(value);
+ int mask_lsb = base::bits::CountTrailingZeros32(value);
+ if ((mask_width == 0) || (mask_msb + mask_width + mask_lsb != 32))
+ return false;
+ *mb = mask_lsb + mask_width - 1;
+ *me = mask_lsb;
+ return true;
+}
+
+
+#if V8_TARGET_ARCH_S390X
+static inline bool IsContiguousMask64(uint64_t value, int* mb, int* me) {
+ int mask_width = base::bits::CountPopulation64(value);
+ int mask_msb = base::bits::CountLeadingZeros64(value);
+ int mask_lsb = base::bits::CountTrailingZeros64(value);
+ if ((mask_width == 0) || (mask_msb + mask_width + mask_lsb != 64))
+ return false;
+ *mb = mask_lsb + mask_width - 1;
+ *me = mask_lsb;
+ return true;
+}
+#endif
+
+
+// TODO(mbrandy): Absorb rotate-right into rlwinm?
+void InstructionSelector::VisitWord32And(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ int mb;
+ int me;
+ if (m.right().HasValue() && IsContiguousMask32(m.right().Value(), &mb, &me)) {
+ int sh = 0;
+ Node* left = m.left().node();
+ if ((m.left().IsWord32Shr() || m.left().IsWord32Shl()) &&
+ CanCover(node, left)) {
+ // Try to absorb left/right shift into rlwinm
+ Int32BinopMatcher mleft(m.left().node());
+ if (mleft.right().IsInRange(0, 31)) {
+ left = mleft.left().node();
+ sh = mleft.right().Value();
+ if (m.left().IsWord32Shr()) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (mb > 31 - sh) mb = 31 - sh;
+ sh = (32 - sh) & 0x1f;
+ } else {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (me < sh) me = sh;
+ }
+ }
+ }
+ if (mb >= me) {
+ Emit(kS390_RotLeftAndMask32, g.DefineAsRegister(node),
+ g.UseRegister(left), g.TempImmediate(sh), g.TempImmediate(mb),
+ g.TempImmediate(me));
+ return;
+ }
+ }
+ VisitLogical<Int32BinopMatcher>(
+ this, node, &m, kS390_And, CanCover(node, m.left().node()),
+ CanCover(node, m.right().node()), kInt16Imm_Unsigned);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+// TODO(mbrandy): Absorb rotate-right into rldic?
+void InstructionSelector::VisitWord64And(Node* node) {
+ S390OperandGenerator g(this);
+ Int64BinopMatcher m(node);
+ int mb;
+ int me;
+ if (m.right().HasValue() && IsContiguousMask64(m.right().Value(), &mb, &me)) {
+ int sh = 0;
+ Node* left = m.left().node();
+ if ((m.left().IsWord64Shr() || m.left().IsWord64Shl()) &&
+ CanCover(node, left)) {
+ // Try to absorb left/right shift into rldic
+ Int64BinopMatcher mleft(m.left().node());
+ if (mleft.right().IsInRange(0, 63)) {
+ left = mleft.left().node();
+ sh = mleft.right().Value();
+ if (m.left().IsWord64Shr()) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (mb > 63 - sh) mb = 63 - sh;
+ sh = (64 - sh) & 0x3f;
+ } else {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (me < sh) me = sh;
+ }
+ }
+ }
+ if (mb >= me) {
+ bool match = false;
+ ArchOpcode opcode;
+ int mask;
+ if (me == 0) {
+ match = true;
+ opcode = kS390_RotLeftAndClearLeft64;
+ mask = mb;
+ } else if (mb == 63) {
+ match = true;
+ opcode = kS390_RotLeftAndClearRight64;
+ mask = me;
+ } else if (sh && me <= sh && m.left().IsWord64Shl()) {
+ match = true;
+ opcode = kS390_RotLeftAndClear64;
+ mask = mb;
+ }
+ if (match) {
+ Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left),
+ g.TempImmediate(sh), g.TempImmediate(mask));
+ return;
+ }
+ }
+ }
+ VisitLogical<Int64BinopMatcher>(
+ this, node, &m, kS390_And, CanCover(node, m.left().node()),
+ CanCover(node, m.right().node()), kInt16Imm_Unsigned);
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Or(Node* node) {
+ Int32BinopMatcher m(node);
+ VisitLogical<Int32BinopMatcher>(
+ this, node, &m, kS390_Or, CanCover(node, m.left().node()),
+ CanCover(node, m.right().node()), kInt16Imm_Unsigned);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Or(Node* node) {
+ Int64BinopMatcher m(node);
+ VisitLogical<Int64BinopMatcher>(
+ this, node, &m, kS390_Or, CanCover(node, m.left().node()),
+ CanCover(node, m.right().node()), kInt16Imm_Unsigned);
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Xor(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ if (m.right().Is(-1)) {
+ Emit(kS390_Not, g.DefineAsRegister(node), g.UseRegister(m.left().node()));
+ } else {
+ VisitBinop<Int32BinopMatcher>(this, node, kS390_Xor, kInt16Imm_Unsigned);
+ }
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Xor(Node* node) {
+ S390OperandGenerator g(this);
+ Int64BinopMatcher m(node);
+ if (m.right().Is(-1)) {
+ Emit(kS390_Not, g.DefineAsRegister(node), g.UseRegister(m.left().node()));
+ } else {
+ VisitBinop<Int64BinopMatcher>(this, node, kS390_Xor, kInt16Imm_Unsigned);
+ }
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Shl(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ if (m.left().IsWord32And() && m.right().IsInRange(0, 31)) {
+ // Try to absorb logical-and into rlwinm
+ Int32BinopMatcher mleft(m.left().node());
+ int sh = m.right().Value();
+ int mb;
+ int me;
+ if (mleft.right().HasValue() &&
+ IsContiguousMask32(mleft.right().Value() << sh, &mb, &me)) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (me < sh) me = sh;
+ if (mb >= me) {
+ Emit(kS390_RotLeftAndMask32, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()), g.TempImmediate(sh),
+ g.TempImmediate(mb), g.TempImmediate(me));
+ return;
+ }
+ }
+ }
+ VisitRRO(this, kS390_ShiftLeft32, node, kShift32Imm);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Shl(Node* node) {
+ S390OperandGenerator g(this);
+ Int64BinopMatcher m(node);
+ // TODO(mbrandy): eliminate left sign extension if right >= 32
+ if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) {
+ // Try to absorb logical-and into rldic
+ Int64BinopMatcher mleft(m.left().node());
+ int sh = m.right().Value();
+ int mb;
+ int me;
+ if (mleft.right().HasValue() &&
+ IsContiguousMask64(mleft.right().Value() << sh, &mb, &me)) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (me < sh) me = sh;
+ if (mb >= me) {
+ bool match = false;
+ ArchOpcode opcode;
+ int mask;
+ if (me == 0) {
+ match = true;
+ opcode = kS390_RotLeftAndClearLeft64;
+ mask = mb;
+ } else if (mb == 63) {
+ match = true;
+ opcode = kS390_RotLeftAndClearRight64;
+ mask = me;
+ } else if (sh && me <= sh) {
+ match = true;
+ opcode = kS390_RotLeftAndClear64;
+ mask = mb;
+ }
+ if (match) {
+ Emit(opcode, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()), g.TempImmediate(sh),
+ g.TempImmediate(mask));
+ return;
+ }
+ }
+ }
+ }
+ VisitRRO(this, kS390_ShiftLeft64, node, kShift64Imm);
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Shr(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ if (m.left().IsWord32And() && m.right().IsInRange(0, 31)) {
+ // Try to absorb logical-and into rlwinm
+ Int32BinopMatcher mleft(m.left().node());
+ int sh = m.right().Value();
+ int mb;
+ int me;
+ if (mleft.right().HasValue() &&
+ IsContiguousMask32((uint32_t)(mleft.right().Value()) >> sh, &mb, &me)) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (mb > 31 - sh) mb = 31 - sh;
+ sh = (32 - sh) & 0x1f;
+ if (mb >= me) {
+ Emit(kS390_RotLeftAndMask32, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()), g.TempImmediate(sh),
+ g.TempImmediate(mb), g.TempImmediate(me));
+ return;
+ }
+ }
+ }
+ VisitRRO(this, kS390_ShiftRight32, node, kShift32Imm);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Shr(Node* node) {
+ S390OperandGenerator g(this);
+ Int64BinopMatcher m(node);
+ if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) {
+ // Try to absorb logical-and into rldic
+ Int64BinopMatcher mleft(m.left().node());
+ int sh = m.right().Value();
+ int mb;
+ int me;
+ if (mleft.right().HasValue() &&
+ IsContiguousMask64((uint64_t)(mleft.right().Value()) >> sh, &mb, &me)) {
+ // Adjust the mask such that it doesn't include any rotated bits.
+ if (mb > 63 - sh) mb = 63 - sh;
+ sh = (64 - sh) & 0x3f;
+ if (mb >= me) {
+ bool match = false;
+ ArchOpcode opcode;
+ int mask;
+ if (me == 0) {
+ match = true;
+ opcode = kS390_RotLeftAndClearLeft64;
+ mask = mb;
+ } else if (mb == 63) {
+ match = true;
+ opcode = kS390_RotLeftAndClearRight64;
+ mask = me;
+ }
+ if (match) {
+ Emit(opcode, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()), g.TempImmediate(sh),
+ g.TempImmediate(mask));
+ return;
+ }
+ }
+ }
+ }
+ VisitRRO(this, kS390_ShiftRight64, node, kShift64Imm);
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Sar(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ // Replace with sign extension for (x << K) >> K where K is 16 or 24.
+ if (CanCover(node, m.left().node()) && m.left().IsWord32Shl()) {
+ Int32BinopMatcher mleft(m.left().node());
+ if (mleft.right().Is(16) && m.right().Is(16)) {
+ Emit(kS390_ExtendSignWord16, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()));
+ return;
+ } else if (mleft.right().Is(24) && m.right().Is(24)) {
+ Emit(kS390_ExtendSignWord8, g.DefineAsRegister(node),
+ g.UseRegister(mleft.left().node()));
+ return;
+ }
+ }
+ VisitRRO(this, kS390_ShiftRightAlg32, node, kShift32Imm);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Sar(Node* node) {
+ VisitRRO(this, kS390_ShiftRightAlg64, node, kShift64Imm);
+}
+#endif
+
+
+// TODO(mbrandy): Absorb logical-and into rlwinm?
+void InstructionSelector::VisitWord32Ror(Node* node) {
+ VisitRRO(this, kS390_RotRight32, node, kShift32Imm);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+// TODO(mbrandy): Absorb logical-and into rldic?
+void InstructionSelector::VisitWord64Ror(Node* node) {
+ VisitRRO(this, kS390_RotRight64, node, kShift64Imm);
+}
+#endif
+
+
+void InstructionSelector::VisitWord32Clz(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_Cntlz32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
+void InstructionSelector::VisitInt32Add(Node* node) {
+ VisitBinop<Int32BinopMatcher>(this, node, kS390_Add, kInt16Imm);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitInt64Add(Node* node) {
+ VisitBinop<Int64BinopMatcher>(this, node, kS390_Add, kInt16Imm);
+}
+#endif
+
+
+void InstructionSelector::VisitInt32Sub(Node* node) {
+ S390OperandGenerator g(this);
+ Int32BinopMatcher m(node);
+ if (m.left().Is(0)) {
+ Emit(kS390_Neg, g.DefineAsRegister(node), g.UseRegister(m.right().node()));
+ } else {
+ VisitBinop<Int32BinopMatcher>(this, node, kS390_Sub, kInt16Imm_Negate);
+ }
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitInt64Sub(Node* node) {
+ S390OperandGenerator g(this);
+ Int64BinopMatcher m(node);
+ if (m.left().Is(0)) {
+ Emit(kS390_Neg, g.DefineAsRegister(node), g.UseRegister(m.right().node()));
+ } else {
+ VisitBinop<Int64BinopMatcher>(this, node, kS390_Sub, kInt16Imm_Negate);
+ }
+}
+#endif
+
+
+void InstructionSelector::VisitInt32Mul(Node* node) {
+ VisitRRR(this, kS390_Mul32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitInt64Mul(Node* node) {
+ VisitRRR(this, kS390_Mul64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitInt32MulHigh(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_MulHigh32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
+
+void InstructionSelector::VisitUint32MulHigh(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_MulHighU32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
+
+
+void InstructionSelector::VisitInt32Div(Node* node) {
+ VisitRRR(this, kS390_Div32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitInt64Div(Node* node) {
+ VisitRRR(this, kS390_Div64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitUint32Div(Node* node) {
+ VisitRRR(this, kS390_DivU32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitUint64Div(Node* node) {
+ VisitRRR(this, kS390_DivU64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitInt32Mod(Node* node) {
+ VisitRRR(this, kS390_Mod32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitInt64Mod(Node* node) {
+ VisitRRR(this, kS390_Mod64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitUint32Mod(Node* node) {
+ VisitRRR(this, kS390_ModU32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitUint64Mod(Node* node) {
+ VisitRRR(this, kS390_ModU64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitChangeFloat32ToFloat64(Node* node) {
+ VisitRR(this, kS390_Float32ToDouble, node);
+}
+
+
+void InstructionSelector::VisitChangeInt32ToFloat64(Node* node) {
+ VisitRR(this, kS390_Int32ToDouble, node);
+}
+
+
+void InstructionSelector::VisitChangeUint32ToFloat64(Node* node) {
+ VisitRR(this, kS390_Uint32ToDouble, node);
+}
+
+
+void InstructionSelector::VisitChangeFloat64ToInt32(Node* node) {
+ VisitRR(this, kS390_DoubleToInt32, node);
+}
+
+
+void InstructionSelector::VisitChangeFloat64ToUint32(Node* node) {
+ VisitRR(this, kS390_DoubleToUint32, node);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitChangeInt32ToInt64(Node* node) {
+ // TODO(mbrandy): inspect input to see if nop is appropriate.
+ VisitRR(this, kS390_ExtendSignWord32, node);
+}
+
+
+void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
+ // TODO(mbrandy): inspect input to see if nop is appropriate.
+ VisitRR(this, kS390_Uint32ToUint64, node);
+}
+#endif
+
+
+void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
+ VisitRR(this, kS390_DoubleToFloat32, node);
+}
+
+
+void InstructionSelector::VisitTruncateFloat64ToInt32(Node* node) {
+ switch (TruncationModeOf(node->op())) {
+ case TruncationMode::kJavaScript:
+ return VisitRR(this, kArchTruncateDoubleToI, node);
+ case TruncationMode::kRoundToZero:
+ return VisitRR(this, kS390_DoubleToInt32, node);
+ }
+ UNREACHABLE();
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
+ // TODO(mbrandy): inspect input to see if nop is appropriate.
+ VisitRR(this, kS390_Int64ToInt32, node);
+}
+#endif
+
+
+void InstructionSelector::VisitFloat32Add(Node* node) {
+ VisitRRR(this, kS390_AddDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Add(Node* node) {
+ // TODO(mbrandy): detect multiply-add
+ VisitRRR(this, kS390_AddDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat32Sub(Node* node) {
+ S390OperandGenerator g(this);
+ Float32BinopMatcher m(node);
+ if (m.left().IsMinusZero()) {
+ Emit(kS390_NegDouble, g.DefineAsRegister(node),
+ g.UseRegister(m.right().node()));
+ return;
+ }
+ VisitRRR(this, kS390_SubDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Sub(Node* node) {
+ // TODO(mbrandy): detect multiply-subtract
+ S390OperandGenerator g(this);
+ Float64BinopMatcher m(node);
+ if (m.left().IsMinusZero()) {
+ if (m.right().IsFloat64RoundDown() &&
+ CanCover(m.node(), m.right().node())) {
+ if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub &&
+ CanCover(m.right().node(), m.right().InputAt(0))) {
+ Float64BinopMatcher mright0(m.right().InputAt(0));
+ if (mright0.left().IsMinusZero()) {
+ // -floor(-x) = ceil(x)
+ Emit(kS390_CeilDouble, g.DefineAsRegister(node),
+ g.UseRegister(mright0.right().node()));
+ return;
+ }
+ }
+ }
+ Emit(kS390_NegDouble, g.DefineAsRegister(node),
+ g.UseRegister(m.right().node()));
+ return;
+ }
+ VisitRRR(this, kS390_SubDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat32Mul(Node* node) {
+ VisitRRR(this, kS390_MulDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Mul(Node* node) {
+ // TODO(mbrandy): detect negate
+ VisitRRR(this, kS390_MulDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat32Div(Node* node) {
+ VisitRRR(this, kS390_DivDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Div(Node* node) {
+ VisitRRR(this, kS390_DivDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Mod(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_ModDouble, g.DefineAsFixed(node, d1),
+ g.UseFixed(node->InputAt(0), d1),
+ g.UseFixed(node->InputAt(1), d2))->MarkAsCall();
+}
+
+
+void InstructionSelector::VisitFloat32Max(Node* node) { UNREACHABLE(); }
+
+
+void InstructionSelector::VisitFloat64Max(Node* node) { UNREACHABLE(); }
+
+
+void InstructionSelector::VisitFloat32Min(Node* node) { UNREACHABLE(); }
+
+
+void InstructionSelector::VisitFloat64Min(Node* node) { UNREACHABLE(); }
+
+
+void InstructionSelector::VisitFloat32Abs(Node* node) {
+ VisitRR(this, kS390_AbsDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Abs(Node* node) {
+ VisitRR(this, kS390_AbsDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat32Sqrt(Node* node) {
+ VisitRR(this, kS390_SqrtDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64Sqrt(Node* node) {
+ VisitRR(this, kS390_SqrtDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64RoundDown(Node* node) {
+ VisitRR(this, kS390_FloorDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64RoundTruncate(Node* node) {
+ VisitRR(this, kS390_TruncateDouble, node);
+}
+
+
+void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) {
+ VisitRR(this, kS390_RoundDouble, node);
+}
+
+
+void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
+ if (Node* ovf = NodeProperties::FindProjection(node, 1)) {
+ FlagsContinuation cont(kOverflow, ovf);
+ return VisitBinop<Int32BinopMatcher>(this, node, kS390_AddWithOverflow32,
+ kInt16Imm, &cont);
+ }
+ FlagsContinuation cont;
+ VisitBinop<Int32BinopMatcher>(this, node, kS390_AddWithOverflow32, kInt16Imm,
+ &cont);
+}
+
+
+void InstructionSelector::VisitInt32SubWithOverflow(Node* node) {
+ if (Node* ovf = NodeProperties::FindProjection(node, 1)) {
+ FlagsContinuation cont(kOverflow, ovf);
+ return VisitBinop<Int32BinopMatcher>(this, node, kS390_SubWithOverflow32,
+ kInt16Imm_Negate, &cont);
+ }
+ FlagsContinuation cont;
+ VisitBinop<Int32BinopMatcher>(this, node, kS390_SubWithOverflow32,
+ kInt16Imm_Negate, &cont);
+}
+
+
+static bool CompareLogical(FlagsContinuation* cont) {
+ switch (cont->condition()) {
+ case kUnsignedLessThan:
+ case kUnsignedGreaterThanOrEqual:
+ case kUnsignedLessThanOrEqual:
+ case kUnsignedGreaterThan:
+ return true;
+ default:
+ return false;
+ }
+ UNREACHABLE();
+ return false;
+}
+
+
+namespace {
+
+// Shared routine for multiple compare operations.
+void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
+ InstructionOperand left, InstructionOperand right,
+ FlagsContinuation* cont) {
+ S390OperandGenerator g(selector);
+ opcode = cont->Encode(opcode);
+ if (cont->IsBranch()) {
+ selector->Emit(opcode, g.NoOutput(), left, right,
+ g.Label(cont->true_block()), g.Label(cont->false_block()));
+ } else {
+ DCHECK(cont->IsSet());
+ selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
+ }
+}
+
+
+// Shared routine for multiple word compare operations.
+void VisitWordCompare(InstructionSelector* selector, Node* node,
+ InstructionCode opcode, FlagsContinuation* cont,
+ bool commutative, ImmediateMode immediate_mode) {
+ S390OperandGenerator g(selector);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+
+ // Match immediates on left or right side of comparison.
+ if (g.CanBeImmediate(right, immediate_mode)) {
+ VisitCompare(selector, opcode, g.UseRegister(left), g.UseImmediate(right),
+ cont);
+ } else if (g.CanBeImmediate(left, immediate_mode)) {
+ if (!commutative) cont->Commute();
+ VisitCompare(selector, opcode, g.UseRegister(right), g.UseImmediate(left),
+ cont);
+ } else {
+ VisitCompare(selector, opcode, g.UseRegister(left), g.UseRegister(right),
+ cont);
+ }
+}
+
+
+void VisitWord32Compare(InstructionSelector* selector, Node* node,
+ FlagsContinuation* cont) {
+ ImmediateMode mode = (CompareLogical(cont) ? kInt16Imm_Unsigned : kInt16Imm);
+ VisitWordCompare(selector, node, kS390_Cmp32, cont, false, mode);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void VisitWord64Compare(InstructionSelector* selector, Node* node,
+ FlagsContinuation* cont) {
+ ImmediateMode mode = (CompareLogical(cont) ? kInt16Imm_Unsigned : kInt16Imm);
+ VisitWordCompare(selector, node, kS390_Cmp64, cont, false, mode);
+}
+#endif
+
+
+// Shared routine for multiple float32 compare operations.
+void VisitFloat32Compare(InstructionSelector* selector, Node* node,
+ FlagsContinuation* cont) {
+ S390OperandGenerator g(selector);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ VisitCompare(selector, kS390_CmpDouble, g.UseRegister(left),
+ g.UseRegister(right), cont);
+}
+
+
+// Shared routine for multiple float64 compare operations.
+void VisitFloat64Compare(InstructionSelector* selector, Node* node,
+ FlagsContinuation* cont) {
+ S390OperandGenerator g(selector);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ VisitCompare(selector, kS390_CmpDouble, g.UseRegister(left),
+ g.UseRegister(right), cont);
+}
+
+
+// Shared routine for word comparisons against zero.
+void VisitWordCompareZero(InstructionSelector* selector, Node* user,
+ Node* value, InstructionCode opcode,
+ FlagsContinuation* cont) {
+ while (selector->CanCover(user, value)) {
+ switch (value->opcode()) {
+ case IrOpcode::kWord32Equal: {
+ // Combine with comparisons against 0 by simply inverting the
+ // continuation.
+ Int32BinopMatcher m(value);
+ if (m.right().Is(0)) {
+ user = value;
+ value = m.left().node();
+ cont->Negate();
+ continue;
+ }
+ cont->OverwriteAndNegateIfEqual(kEqual);
+ return VisitWord32Compare(selector, value, cont);
+ }
+ case IrOpcode::kInt32LessThan:
+ cont->OverwriteAndNegateIfEqual(kSignedLessThan);
+ return VisitWord32Compare(selector, value, cont);
+ case IrOpcode::kInt32LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kSignedLessThanOrEqual);
+ return VisitWord32Compare(selector, value, cont);
+ case IrOpcode::kUint32LessThan:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThan);
+ return VisitWord32Compare(selector, value, cont);
+ case IrOpcode::kUint32LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual);
+ return VisitWord32Compare(selector, value, cont);
+#if V8_TARGET_ARCH_S390X
+ case IrOpcode::kWord64Equal:
+ cont->OverwriteAndNegateIfEqual(kEqual);
+ return VisitWord64Compare(selector, value, cont);
+ case IrOpcode::kInt64LessThan:
+ cont->OverwriteAndNegateIfEqual(kSignedLessThan);
+ return VisitWord64Compare(selector, value, cont);
+ case IrOpcode::kInt64LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kSignedLessThanOrEqual);
+ return VisitWord64Compare(selector, value, cont);
+ case IrOpcode::kUint64LessThan:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThan);
+ return VisitWord64Compare(selector, value, cont);
+ case IrOpcode::kUint64LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual);
+ return VisitWord64Compare(selector, value, cont);
+#endif
+ case IrOpcode::kFloat32Equal:
+ cont->OverwriteAndNegateIfEqual(kEqual);
+ return VisitFloat32Compare(selector, value, cont);
+ case IrOpcode::kFloat32LessThan:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThan);
+ return VisitFloat32Compare(selector, value, cont);
+ case IrOpcode::kFloat32LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual);
+ return VisitFloat32Compare(selector, value, cont);
+ case IrOpcode::kFloat64Equal:
+ cont->OverwriteAndNegateIfEqual(kEqual);
+ return VisitFloat64Compare(selector, value, cont);
+ case IrOpcode::kFloat64LessThan:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThan);
+ return VisitFloat64Compare(selector, value, cont);
+ case IrOpcode::kFloat64LessThanOrEqual:
+ cont->OverwriteAndNegateIfEqual(kUnsignedLessThanOrEqual);
+ return VisitFloat64Compare(selector, value, cont);
+ case IrOpcode::kProjection:
+ // Check if this is the overflow output projection of an
+ // <Operation>WithOverflow node.
+ if (ProjectionIndexOf(value->op()) == 1u) {
+ // We cannot combine the <Operation>WithOverflow with this branch
+ // unless the 0th projection (the use of the actual value of the
+ // <Operation> is either NULL, which means there's no use of the
+ // actual value, or was already defined, which means it is scheduled
+ // *AFTER* this branch).
+ Node* const node = value->InputAt(0);
+ Node* const result = NodeProperties::FindProjection(node, 0);
+ if (result == NULL || selector->IsDefined(result)) {
+ switch (node->opcode()) {
+ case IrOpcode::kInt32AddWithOverflow:
+ cont->OverwriteAndNegateIfEqual(kOverflow);
+ return VisitBinop<Int32BinopMatcher>(
+ selector, node, kS390_AddWithOverflow32, kInt16Imm, cont);
+ case IrOpcode::kInt32SubWithOverflow:
+ cont->OverwriteAndNegateIfEqual(kOverflow);
+ return VisitBinop<Int32BinopMatcher>(selector, node,
+ kS390_SubWithOverflow32,
+ kInt16Imm_Negate, cont);
+ default:
+ break;
+ }
+ }
+ }
+ break;
+ case IrOpcode::kInt32Sub:
+ return VisitWord32Compare(selector, value, cont);
+ case IrOpcode::kWord32And:
+ // TODO(mbandy): opportunity for rlwinm?
+ return VisitWordCompare(selector, value, kS390_Tst32, cont, true,
+ kInt16Imm_Unsigned);
+// TODO(mbrandy): Handle?
+// case IrOpcode::kInt32Add:
+// case IrOpcode::kWord32Or:
+// case IrOpcode::kWord32Xor:
+// case IrOpcode::kWord32Sar:
+// case IrOpcode::kWord32Shl:
+// case IrOpcode::kWord32Shr:
+// case IrOpcode::kWord32Ror:
+#if V8_TARGET_ARCH_S390X
+ case IrOpcode::kInt64Sub:
+ return VisitWord64Compare(selector, value, cont);
+ case IrOpcode::kWord64And:
+ // TODO(mbandy): opportunity for rldic?
+ return VisitWordCompare(selector, value, kS390_Tst64, cont, true,
+ kInt16Imm_Unsigned);
+// TODO(mbrandy): Handle?
+// case IrOpcode::kInt64Add:
+// case IrOpcode::kWord64Or:
+// case IrOpcode::kWord64Xor:
+// case IrOpcode::kWord64Sar:
+// case IrOpcode::kWord64Shl:
+// case IrOpcode::kWord64Shr:
+// case IrOpcode::kWord64Ror:
+#endif
+ default:
+ break;
+ }
+ break;
+ }
+
+ // Branch could not be combined with a compare, emit compare against 0.
+ S390OperandGenerator g(selector);
+ VisitCompare(selector, opcode, g.UseRegister(value), g.TempImmediate(0),
+ cont);
+}
+
+
+void VisitWord32CompareZero(InstructionSelector* selector, Node* user,
+ Node* value, FlagsContinuation* cont) {
+ VisitWordCompareZero(selector, user, value, kS390_Cmp32, cont);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void VisitWord64CompareZero(InstructionSelector* selector, Node* user,
+ Node* value, FlagsContinuation* cont) {
+ VisitWordCompareZero(selector, user, value, kS390_Cmp64, cont);
+}
+#endif
+
+} // namespace
+
+
+void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
+ BasicBlock* fbranch) {
+ FlagsContinuation cont(kNotEqual, tbranch, fbranch);
+ VisitWord32CompareZero(this, branch, branch->InputAt(0), &cont);
+}
+
+
+void InstructionSelector::VisitSwitch(Node* node, const SwitchInfo& sw) {
+ S390OperandGenerator g(this);
+ InstructionOperand value_operand = g.UseRegister(node->InputAt(0));
+
+ // Emit either ArchTableSwitch or ArchLookupSwitch.
+ size_t table_space_cost = 4 + sw.value_range;
+ size_t table_time_cost = 3;
+ size_t lookup_space_cost = 3 + 2 * sw.case_count;
+ size_t lookup_time_cost = sw.case_count;
+ if (sw.case_count > 0 &&
+ table_space_cost + 3 * table_time_cost <=
+ lookup_space_cost + 3 * lookup_time_cost &&
+ sw.min_value > std::numeric_limits<int32_t>::min()) {
+ InstructionOperand index_operand = value_operand;
+ if (sw.min_value) {
+ index_operand = g.TempRegister();
+ Emit(kS390_Sub, index_operand, value_operand,
+ g.TempImmediate(sw.min_value));
+ }
+ // Generate a table lookup.
+ return EmitTableSwitch(sw, index_operand);
+ }
+
+ // Generate a sequence of conditional jumps.
+ return EmitLookupSwitch(sw, value_operand);
+}
+
+
+void InstructionSelector::VisitWord32Equal(Node* const node) {
+ FlagsContinuation cont(kEqual, node);
+ Int32BinopMatcher m(node);
+ if (m.right().Is(0)) {
+ return VisitWord32CompareZero(this, m.node(), m.left().node(), &cont);
+ }
+ VisitWord32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitInt32LessThan(Node* node) {
+ FlagsContinuation cont(kSignedLessThan, node);
+ VisitWord32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitInt32LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kSignedLessThanOrEqual, node);
+ VisitWord32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitUint32LessThan(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThan, node);
+ VisitWord32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitUint32LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThanOrEqual, node);
+ VisitWord32Compare(this, node, &cont);
+}
+
+
+#if V8_TARGET_ARCH_S390X
+void InstructionSelector::VisitWord64Equal(Node* const node) {
+ FlagsContinuation cont(kEqual, node);
+ Int64BinopMatcher m(node);
+ if (m.right().Is(0)) {
+ return VisitWord64CompareZero(this, m.node(), m.left().node(), &cont);
+ }
+ VisitWord64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitInt64LessThan(Node* node) {
+ FlagsContinuation cont(kSignedLessThan, node);
+ VisitWord64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitInt64LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kSignedLessThanOrEqual, node);
+ VisitWord64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitUint64LessThan(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThan, node);
+ VisitWord64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitUint64LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThanOrEqual, node);
+ VisitWord64Compare(this, node, &cont);
+}
+#endif
+
+
+void InstructionSelector::VisitFloat32Equal(Node* node) {
+ FlagsContinuation cont(kEqual, node);
+ VisitFloat32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitFloat32LessThan(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThan, node);
+ VisitFloat32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitFloat32LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThanOrEqual, node);
+ VisitFloat32Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitFloat64Equal(Node* node) {
+ FlagsContinuation cont(kEqual, node);
+ VisitFloat64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitFloat64LessThan(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThan, node);
+ VisitFloat64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
+ FlagsContinuation cont(kUnsignedLessThanOrEqual, node);
+ VisitFloat64Compare(this, node, &cont);
+}
+
+
+void InstructionSelector::VisitCall(Node* node, BasicBlock* handler) {
+ S390OperandGenerator g(this);
+ const CallDescriptor* descriptor = OpParameter<const CallDescriptor*>(node);
+
+ FrameStateDescriptor* frame_state_descriptor = nullptr;
+ if (descriptor->NeedsFrameState()) {
+ frame_state_descriptor =
+ GetFrameStateDescriptor(node->InputAt(descriptor->InputCount()));
+ }
+
+ CallBuffer buffer(zone(), descriptor, frame_state_descriptor);
+
+ // Compute InstructionOperands for inputs and outputs.
+ // TODO(turbofan): on PPC it's probably better to use the code object in a
+ // register if there are multiple uses of it. Improve constant pool and the
+ // heuristics in the register allocator for where to emit constants.
+ InitializeCallBuffer(node, &buffer, true, true);
+
+ // Prepare for C function call.
+ if (descriptor->IsCFunctionCall()) {
+ Emit(kArchPrepareCallCFunction |
+ MiscField::encode(static_cast<int>(descriptor->CParameterCount())),
+ 0, nullptr, 0, nullptr);
+
+ // Poke any stack arguments.
+ int slot = kStackFrameExtraParamSlot;
+ for (Node* node : buffer.pushed_nodes) {
+ Emit(kS390_StoreToStackSlot, g.NoOutput(), g.UseRegister(node),
+ g.TempImmediate(slot));
+ ++slot;
+ }
+ } else {
+ // Push any stack arguments.
+ int num_slots = buffer.pushed_nodes.size();
+ int slot = 0;
+ for (Node* node : buffer.pushed_nodes) {
+ if (slot == 0) {
+ Emit(kS390_PushFrame, g.NoOutput(), g.UseRegister(node),
+ g.TempImmediate(num_slots));
+ } else {
+ Emit(kS390_StoreToStackSlot, g.NoOutput(), g.UseRegister(node),
+ g.TempImmediate(slot));
+ }
+ ++slot;
+ }
+ }
+
+ // Pass label of exception handler block.
+ CallDescriptor::Flags flags = descriptor->flags();
+ if (handler) {
+ DCHECK_EQ(IrOpcode::kIfException, handler->front()->opcode());
+ IfExceptionHint hint = OpParameter<IfExceptionHint>(handler->front());
+ if (hint == IfExceptionHint::kLocallyCaught) {
+ flags |= CallDescriptor::kHasLocalCatchHandler;
+ }
+ flags |= CallDescriptor::kHasExceptionHandler;
+ buffer.instruction_args.push_back(g.Label(handler));
+ }
+
+ // Select the appropriate opcode based on the call type.
+ InstructionCode opcode;
+ switch (descriptor->kind()) {
+ case CallDescriptor::kCallAddress:
+ opcode =
+ kArchCallCFunction |
+ MiscField::encode(static_cast<int>(descriptor->CParameterCount()));
+ break;
+ case CallDescriptor::kCallCodeObject:
+ opcode = kArchCallCodeObject | MiscField::encode(flags);
+ break;
+ case CallDescriptor::kCallJSFunction:
+ opcode = kArchCallJSFunction | MiscField::encode(flags);
+ break;
+ default:
+ UNREACHABLE();
+ return;
+ }
+
+ // Emit the call instruction.
+ size_t const output_count = buffer.outputs.size();
+ auto* outputs = output_count ? &buffer.outputs.front() : nullptr;
+ Emit(opcode, output_count, outputs, buffer.instruction_args.size(),
+ &buffer.instruction_args.front())->MarkAsCall();
+}
+
+
+void InstructionSelector::VisitTailCall(Node* node) {
+ S390OperandGenerator g(this);
+ CallDescriptor const* descriptor = OpParameter<CallDescriptor const*>(node);
+ DCHECK_NE(0, descriptor->flags() & CallDescriptor::kSupportsTailCalls);
+ DCHECK_EQ(0, descriptor->flags() & CallDescriptor::kPatchableCallSite);
+ DCHECK_EQ(0, descriptor->flags() & CallDescriptor::kNeedsNopAfterCall);
+
+ // TODO(turbofan): Relax restriction for stack parameters.
+ if (linkage()->GetIncomingDescriptor()->CanTailCall(node)) {
+ CallBuffer buffer(zone(), descriptor, nullptr);
+
+ // Compute InstructionOperands for inputs and outputs.
+ // TODO(turbofan): on S390 it's probably better to use the code object in a
+ // register if there are multiple uses of it. Improve constant pool and the
+ // heuristics in the register allocator for where to emit constants.
+ InitializeCallBuffer(node, &buffer, true, false);
+
+ // Select the appropriate opcode based on the call type.
+ InstructionCode opcode;
+ switch (descriptor->kind()) {
+ case CallDescriptor::kCallCodeObject:
+ opcode = kArchTailCallCodeObject;
+ break;
+ case CallDescriptor::kCallJSFunction:
+ opcode = kArchTailCallJSFunction;
+ break;
+ default:
+ UNREACHABLE();
+ return;
+ }
+ opcode |= MiscField::encode(descriptor->flags());
+
+ // Emit the tailcall instruction.
+ Emit(opcode, 0, nullptr, buffer.instruction_args.size(),
+ &buffer.instruction_args.front());
+ } else {
+ FrameStateDescriptor* frame_state_descriptor = nullptr;
+ if (descriptor->NeedsFrameState()) {
+ frame_state_descriptor =
+ GetFrameStateDescriptor(node->InputAt(descriptor->InputCount()));
+ }
+
+ CallBuffer buffer(zone(), descriptor, frame_state_descriptor);
+
+ // Compute InstructionOperands for inputs and outputs.
+ // TODO(turbofan): on S390 it's probably better to use the code object in a
+ // register if there are multiple uses of it. Improve constant pool and the
+ // heuristics in the register allocator for where to emit constants.
+ InitializeCallBuffer(node, &buffer, true, false);
+
+ // Push any stack arguments.
+ for (Node* node : base::Reversed(buffer.pushed_nodes)) {
+ Emit(kS390_Push, g.NoOutput(), g.UseRegister(node));
+ }
+
+ // Select the appropriate opcode based on the call type.
+ InstructionCode opcode;
+ switch (descriptor->kind()) {
+ case CallDescriptor::kCallCodeObject: {
+ opcode = kArchCallCodeObject;
+ break;
+ }
+ case CallDescriptor::kCallJSFunction:
+ opcode = kArchCallJSFunction;
+ break;
+ default:
+ UNREACHABLE();
+ return;
+ }
+ opcode |= MiscField::encode(descriptor->flags());
+
+ // Emit the call instruction.
+ size_t const output_count = buffer.outputs.size();
+ auto* outputs = output_count ? &buffer.outputs.front() : nullptr;
+ Emit(opcode, output_count, outputs, buffer.instruction_args.size(),
+ &buffer.instruction_args.front())->MarkAsCall();
+ Emit(kArchRet, 0, nullptr, output_count, outputs);
+ }
+}
+
+
+void InstructionSelector::VisitFloat64ExtractLowWord32(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_DoubleExtractLowWord32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
+void InstructionSelector::VisitFloat64ExtractHighWord32(Node* node) {
+ S390OperandGenerator g(this);
+ Emit(kS390_DoubleExtractHighWord32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
+void InstructionSelector::VisitFloat64InsertLowWord32(Node* node) {
+ S390OperandGenerator g(this);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ if (left->opcode() == IrOpcode::kFloat64InsertHighWord32 &&
+ CanCover(node, left)) {
+ left = left->InputAt(1);
+ Emit(kS390_DoubleConstruct, g.DefineAsRegister(node), g.UseRegister(left),
+ g.UseRegister(right));
+ return;
+ }
+ Emit(kS390_DoubleInsertLowWord32, g.DefineSameAsFirst(node),
+ g.UseRegister(left), g.UseRegister(right));
+}
+
+
+void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
+ S390OperandGenerator g(this);
+ Node* left = node->InputAt(0);
+ Node* right = node->InputAt(1);
+ if (left->opcode() == IrOpcode::kFloat64InsertLowWord32 &&
+ CanCover(node, left)) {
+ left = left->InputAt(1);
+ Emit(kS390_DoubleConstruct, g.DefineAsRegister(node), g.UseRegister(right),
+ g.UseRegister(left));
+ return;
+ }
+ Emit(kS390_DoubleInsertHighWord32, g.DefineSameAsFirst(node),
+ g.UseRegister(left), g.UseRegister(right));
+}
+
+
+// static
+MachineOperatorBuilder::Flags
+InstructionSelector::SupportedMachineOperatorFlags() {
+ return MachineOperatorBuilder::kFloat64RoundDown |
+ MachineOperatorBuilder::kFloat64RoundTruncate |
+ MachineOperatorBuilder::kFloat64RoundTiesAway;
+ // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
+}
+
+} // namespace compiler
+} // namespace internal
+} // namespace v8
--- /dev/null
+++ b/deps/v8/src/compiler/s390/linkage-s390.cc
@@ -0,0 +1,78 @@
+// Copyright 2015 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/assembler.h"
+#include "src/code-stubs.h"
+#include "src/compiler/linkage.h"
+#include "src/compiler/linkage-impl.h"
+#include "src/zone.h"
+
+namespace v8 {
+namespace internal {
+namespace compiler {
+
+struct S390LinkageHelperTraits {
+ static Register ReturnValueReg() { return r2; }
+ static Register ReturnValue2Reg() { return r3; }
+ // TODO(Tara): Confirm if the JSCallFunctionReg = r3 is correct
+ static Register JSCallFunctionReg() { return r3; }
+ static Register ContextReg() { return cp; }
+ static Register RuntimeCallFunctionReg() { return r3; }
+ static Register RuntimeCallArgCountReg() { return r2; }
+ static RegList CCalleeSaveRegisters() {
+ return r6.bit() | r7.bit() | r8.bit() | r9.bit() | r10.bit() |
+ fp.bit() | ip.bit() | r13.bit() | sp.bit();
+ }
+ static RegList CCalleeSaveFPRegisters() {
+#if V8_TARGET_ARCH_S390X
+ return d8.bit() | d9.bit() | d10.bit() |
+ d11.bit() | d12.bit() | d13.bit() | d14.bit() | d15.bit();
+#else
+ return d2.bit() | d4.bit();
+#endif
+ }
+ static Register CRegisterParameter(int i) {
+ static Register register_parameters[] = {r2, r3, r4, r5, r6};
+ return register_parameters[i];
+ }
+ static int CRegisterParametersLength() { return 5; }
+ static int CStackBackingStoreLength() { return 0; }
+};
+
+
+typedef LinkageHelper<S390LinkageHelperTraits> LH;
+
+CallDescriptor* Linkage::GetJSCallDescriptor(Zone* zone, bool is_osr,
+ int parameter_count,
+ CallDescriptor::Flags flags) {
+ return LH::GetJSCallDescriptor(zone, is_osr, parameter_count, flags);
+}
+
+
+CallDescriptor* Linkage::GetRuntimeCallDescriptor(
+ Zone* zone, Runtime::FunctionId function, int parameter_count,
+ Operator::Properties properties) {
+ return LH::GetRuntimeCallDescriptor(zone, function, parameter_count,
+ properties);
+}
+
+
+CallDescriptor* Linkage::GetStubCallDescriptor(
+ Isolate* isolate, Zone* zone, const CallInterfaceDescriptor& descriptor,
+ int stack_parameter_count, CallDescriptor::Flags flags,
+ Operator::Properties properties, MachineType return_type) {
+ return LH::GetStubCallDescriptor(isolate, zone, descriptor,
+ stack_parameter_count, flags, properties,
+ return_type);
+}
+
+
+CallDescriptor* Linkage::GetSimplifiedCDescriptor(Zone* zone,
+ const MachineSignature* sig) {
+ return LH::GetSimplifiedCDescriptor(zone, sig);
+}
+
+} // namespace compiler
+} // namespace internal
+} // namespace v8
|