1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
|
/*
* Copyright (c) 2025, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2025, Arm Limited. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*/
/**
* @test
* @bug 8346236
* @summary Auto-vectorization support for various Float16 operations
* @modules jdk.incubator.vector
* @library /test/lib /
* @compile TestFloat16VectorOperations.java
* @run driver compiler.vectorization.TestFloat16VectorOperations
*/
package compiler.vectorization;
import compiler.lib.ir_framework.*;
import jdk.incubator.vector.Float16;
import static jdk.incubator.vector.Float16.*;
import static java.lang.Float.*;
import jdk.test.lib.*;
import compiler.lib.generators.Generator;
import static compiler.lib.generators.Generators.G;
public class TestFloat16VectorOperations {
private short[] input1;
private short[] input2;
private short[] input3;
private short[] output;
private static short SCALAR_FP16 = (short)0x7777;
private static final int LEN = 2048;
public static void main(String args[]) {
// Test with default MaxVectorSize
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector");
// Test with different values of MaxVectorSize
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector", "-XX:MaxVectorSize=8");
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector", "-XX:MaxVectorSize=16");
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector", "-XX:MaxVectorSize=32");
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector", "-XX:MaxVectorSize=64");
}
public static boolean assertResults(short expected, short actual) {
Float16 expected_fp16 = shortBitsToFloat16(expected);
Float16 actual_fp16 = shortBitsToFloat16(actual);
return !expected_fp16.equals(actual_fp16);
}
public TestFloat16VectorOperations() {
input1 = new short[LEN];
input2 = new short[LEN];
input3 = new short[LEN];
output = new short[LEN];
short min_value = float16ToRawShortBits(Float16.MIN_VALUE);
short max_value = float16ToRawShortBits(Float16.MAX_VALUE);
Generator<Short> gen = G.float16s();
for (int i = 0; i < LEN; ++i) {
input1[i] = gen.next();
input2[i] = gen.next();
input3[i] = gen.next();
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.ADD_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.ADD_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorAddFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(add(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorAddFloat16")
public void checkResultAdd() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(float16ToFloat(input1[i]) + float16ToFloat(input2[i]));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.SUB_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.SUB_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorSubFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(subtract(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorSubFloat16")
public void checkResultSub() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(float16ToFloat(input1[i]) - float16ToFloat(input2[i]));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.MUL_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.MUL_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorMulFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(multiply(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorMulFloat16")
public void checkResultMul() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(float16ToFloat(input1[i]) * float16ToFloat(input2[i]));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.DIV_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.DIV_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorDivFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(divide(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorDivFloat16")
public void checkResultDiv() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(float16ToFloat(input1[i]) / float16ToFloat(input2[i]));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.MIN_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.MIN_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorMinFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(min(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorMinFloat16")
public void checkResultMin() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(Math.min(float16ToFloat(input1[i]), float16ToFloat(input2[i])));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.MAX_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.MAX_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorMaxFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(max(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i])));
}
}
@Check(test="vectorMaxFloat16")
public void checkResultMax() {
for (int i = 0; i < LEN; ++i) {
short expected = floatToFloat16(Math.max(float16ToFloat(input1[i]), float16ToFloat(input2[i])));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.SQRT_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.SQRT_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorSqrtFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(sqrt(shortBitsToFloat16(input1[i])));
}
}
@Check(test="vectorSqrtFloat16")
public void checkResultSqrt() {
for (int i = 0; i < LEN; ++i) {
short expected = float16ToRawShortBits(sqrt(shortBitsToFloat16(input1[i])));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input = " + input1[i] +
" output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.FMA_VHF, ">= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.FMA_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorFmaFloat16() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i]),
shortBitsToFloat16(input3[i])));
}
}
@Check(test="vectorFmaFloat16")
public void checkResultFma() {
for (int i = 0; i < LEN; ++i) {
short expected = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i]),
shortBitsToFloat16(input3[i])));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
"input3 = " + input3[i] + " output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.FMA_VHF, " >= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.FMA_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorFmaFloat16ScalarMixedConstants() {
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(SCALAR_FP16),
shortBitsToFloat16(floatToFloat16(3.0f))));
}
}
@Check(test="vectorFmaFloat16ScalarMixedConstants")
public void checkResultFmaScalarMixedConstants() {
for (int i = 0; i < LEN; ++i) {
short expected = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(SCALAR_FP16),
shortBitsToFloat16(floatToFloat16(3.0f))));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + SCALAR_FP16 +
"input3 = 3.0 " + "output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.FMA_VHF, " >= 1"},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.FMA_VHF, ">= 1"},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorFmaFloat16MixedConstants() {
short input3 = floatToFloat16(3.0f);
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i]), shortBitsToFloat16(input3)));
}
}
@Check(test="vectorFmaFloat16MixedConstants")
public void checkResultFmaMixedConstants() {
short input3 = floatToFloat16(3.0f);
for (int i = 0; i < LEN; ++i) {
short expected = float16ToRawShortBits(fma(shortBitsToFloat16(input1[i]), shortBitsToFloat16(input2[i]), shortBitsToFloat16(input3)));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1[i] + " input2 = " + input2[i] +
"input3 = " + input3 + " output = " + output[i] + " expected = " + expected);
}
}
}
@Test
@Warmup(50)
@IR(counts = {IRNode.FMA_VHF, " 0 "},
applyIfCPUFeatureOr = {"avx512_fp16", "true", "zvfh", "true", "sve", "true"})
@IR(counts = {IRNode.FMA_VHF, " 0 "},
applyIfCPUFeatureAnd = {"fphp", "true", "asimdhp", "true"})
public void vectorFmaFloat16AllConstants() {
short input1 = floatToFloat16(1.0f);
short input2 = floatToFloat16(2.0f);
short input3 = floatToFloat16(3.0f);
for (int i = 0; i < LEN; ++i) {
output[i] = float16ToRawShortBits(fma(shortBitsToFloat16(input1), shortBitsToFloat16(input2), shortBitsToFloat16(input3)));
}
}
@Check(test="vectorFmaFloat16AllConstants")
public void checkResultFmaAllConstants() {
short input1 = floatToFloat16(1.0f);
short input2 = floatToFloat16(2.0f);
short input3 = floatToFloat16(3.0f);
for (int i = 0; i < LEN; ++i) {
short expected = float16ToRawShortBits(fma(shortBitsToFloat16(input1), shortBitsToFloat16(input2), shortBitsToFloat16(input3)));
if (assertResults(expected, output[i])) {
throw new RuntimeException("Invalid result: [" + i + "] input1 = " + input1 + " input2 = " + input2 +
"input3 = " + input3 + " output = " + output[i] + " expected = " + expected);
}
}
}
}
|
